1 /* 2 Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver 3 4 Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com> 5 Copyright (C) 2006-2007 Georg Acher 6 Copyright (C) 2007-2008 Darron Broad 7 March 2007 8 Fixed some bugs. 9 Added diseqc support. 10 Added corrected signal strength support. 11 August 2007 12 Sync with legacy version. 13 Some clean ups. 14 Copyright (C) 2008 Igor Liplianin 15 September, 9th 2008 16 Fixed locking on high symbol rates (>30000). 17 Implement MPEG initialization parameter. 18 January, 17th 2009 19 Fill set_voltage with actually control voltage code. 20 Correct set tone to not affect voltage. 21 22 This program is free software; you can redistribute it and/or modify 23 it under the terms of the GNU General Public License as published by 24 the Free Software Foundation; either version 2 of the License, or 25 (at your option) any later version. 26 27 This program is distributed in the hope that it will be useful, 28 but WITHOUT ANY WARRANTY; without even the implied warranty of 29 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 30 GNU General Public License for more details. 31 32 You should have received a copy of the GNU General Public License 33 along with this program; if not, write to the Free Software 34 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 35 */ 36 37 #include <linux/slab.h> 38 #include <linux/kernel.h> 39 #include <linux/module.h> 40 #include <linux/moduleparam.h> 41 #include <linux/init.h> 42 #include <linux/firmware.h> 43 44 #include "dvb_frontend.h" 45 #include "cx24116.h" 46 47 static int debug; 48 module_param(debug, int, 0644); 49 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); 50 51 #define dprintk(args...) \ 52 do { \ 53 if (debug) \ 54 printk(KERN_INFO "cx24116: " args); \ 55 } while (0) 56 57 #define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw" 58 #define CX24116_SEARCH_RANGE_KHZ 5000 59 60 /* known registers */ 61 #define CX24116_REG_COMMAND (0x00) /* command args 0x00..0x1e */ 62 #define CX24116_REG_EXECUTE (0x1f) /* execute command */ 63 #define CX24116_REG_MAILBOX (0x96) /* FW or multipurpose mailbox? */ 64 #define CX24116_REG_RESET (0x20) /* reset status > 0 */ 65 #define CX24116_REG_SIGNAL (0x9e) /* signal low */ 66 #define CX24116_REG_SSTATUS (0x9d) /* signal high / status */ 67 #define CX24116_REG_QUALITY8 (0xa3) 68 #define CX24116_REG_QSTATUS (0xbc) 69 #define CX24116_REG_QUALITY0 (0xd5) 70 #define CX24116_REG_BER0 (0xc9) 71 #define CX24116_REG_BER8 (0xc8) 72 #define CX24116_REG_BER16 (0xc7) 73 #define CX24116_REG_BER24 (0xc6) 74 #define CX24116_REG_UCB0 (0xcb) 75 #define CX24116_REG_UCB8 (0xca) 76 #define CX24116_REG_CLKDIV (0xf3) 77 #define CX24116_REG_RATEDIV (0xf9) 78 79 /* configured fec (not tuned) or actual FEC (tuned) 1=1/2 2=2/3 etc */ 80 #define CX24116_REG_FECSTATUS (0x9c) 81 82 /* FECSTATUS bits */ 83 /* mask to determine configured fec (not tuned) or actual fec (tuned) */ 84 #define CX24116_FEC_FECMASK (0x1f) 85 86 /* Select DVB-S demodulator, else DVB-S2 */ 87 #define CX24116_FEC_DVBS (0x20) 88 #define CX24116_FEC_UNKNOWN (0x40) /* Unknown/unused */ 89 90 /* Pilot mode requested when tuning else always reset when tuned */ 91 #define CX24116_FEC_PILOT (0x80) 92 93 /* arg buffer size */ 94 #define CX24116_ARGLEN (0x1e) 95 96 /* rolloff */ 97 #define CX24116_ROLLOFF_020 (0x00) 98 #define CX24116_ROLLOFF_025 (0x01) 99 #define CX24116_ROLLOFF_035 (0x02) 100 101 /* pilot bit */ 102 #define CX24116_PILOT_OFF (0x00) 103 #define CX24116_PILOT_ON (0x40) 104 105 /* signal status */ 106 #define CX24116_HAS_SIGNAL (0x01) 107 #define CX24116_HAS_CARRIER (0x02) 108 #define CX24116_HAS_VITERBI (0x04) 109 #define CX24116_HAS_SYNCLOCK (0x08) 110 #define CX24116_HAS_UNKNOWN1 (0x10) 111 #define CX24116_HAS_UNKNOWN2 (0x20) 112 #define CX24116_STATUS_MASK (0x0f) 113 #define CX24116_SIGNAL_MASK (0xc0) 114 115 #define CX24116_DISEQC_TONEOFF (0) /* toneburst never sent */ 116 #define CX24116_DISEQC_TONECACHE (1) /* toneburst cached */ 117 #define CX24116_DISEQC_MESGCACHE (2) /* message cached */ 118 119 /* arg offset for DiSEqC */ 120 #define CX24116_DISEQC_BURST (1) 121 #define CX24116_DISEQC_ARG2_2 (2) /* unknown value=2 */ 122 #define CX24116_DISEQC_ARG3_0 (3) /* unknown value=0 */ 123 #define CX24116_DISEQC_ARG4_0 (4) /* unknown value=0 */ 124 #define CX24116_DISEQC_MSGLEN (5) 125 #define CX24116_DISEQC_MSGOFS (6) 126 127 /* DiSEqC burst */ 128 #define CX24116_DISEQC_MINI_A (0) 129 #define CX24116_DISEQC_MINI_B (1) 130 131 /* DiSEqC tone burst */ 132 static int toneburst = 1; 133 module_param(toneburst, int, 0644); 134 MODULE_PARM_DESC(toneburst, "DiSEqC toneburst 0=OFF, 1=TONE CACHE, "\ 135 "2=MESSAGE CACHE (default:1)"); 136 137 /* SNR measurements */ 138 static int esno_snr; 139 module_param(esno_snr, int, 0644); 140 MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\ 141 "1=ESNO(db * 10) (default:0)"); 142 143 enum cmds { 144 CMD_SET_VCO = 0x10, 145 CMD_TUNEREQUEST = 0x11, 146 CMD_MPEGCONFIG = 0x13, 147 CMD_TUNERINIT = 0x14, 148 CMD_BANDWIDTH = 0x15, 149 CMD_GETAGC = 0x19, 150 CMD_LNBCONFIG = 0x20, 151 CMD_LNBSEND = 0x21, /* Formerly CMD_SEND_DISEQC */ 152 CMD_LNBDCLEVEL = 0x22, 153 CMD_SET_TONE = 0x23, 154 CMD_UPDFWVERS = 0x35, 155 CMD_TUNERSLEEP = 0x36, 156 CMD_AGCCONTROL = 0x3b, /* Unknown */ 157 }; 158 159 /* The Demod/Tuner can't easily provide these, we cache them */ 160 struct cx24116_tuning { 161 u32 frequency; 162 u32 symbol_rate; 163 enum fe_spectral_inversion inversion; 164 enum fe_code_rate fec; 165 166 enum fe_delivery_system delsys; 167 enum fe_modulation modulation; 168 enum fe_pilot pilot; 169 enum fe_rolloff rolloff; 170 171 /* Demod values */ 172 u8 fec_val; 173 u8 fec_mask; 174 u8 inversion_val; 175 u8 pilot_val; 176 u8 rolloff_val; 177 }; 178 179 /* Basic commands that are sent to the firmware */ 180 struct cx24116_cmd { 181 u8 len; 182 u8 args[CX24116_ARGLEN]; 183 }; 184 185 struct cx24116_state { 186 struct i2c_adapter *i2c; 187 const struct cx24116_config *config; 188 189 struct dvb_frontend frontend; 190 191 struct cx24116_tuning dcur; 192 struct cx24116_tuning dnxt; 193 194 u8 skip_fw_load; 195 u8 burst; 196 struct cx24116_cmd dsec_cmd; 197 }; 198 199 static int cx24116_writereg(struct cx24116_state *state, int reg, int data) 200 { 201 u8 buf[] = { reg, data }; 202 struct i2c_msg msg = { .addr = state->config->demod_address, 203 .flags = 0, .buf = buf, .len = 2 }; 204 int err; 205 206 if (debug > 1) 207 printk("cx24116: %s: write reg 0x%02x, value 0x%02x\n", 208 __func__, reg, data); 209 210 err = i2c_transfer(state->i2c, &msg, 1); 211 if (err != 1) { 212 printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n", 213 __func__, err, reg, data); 214 return -EREMOTEIO; 215 } 216 217 return 0; 218 } 219 220 /* Bulk byte writes to a single I2C address, for 32k firmware load */ 221 static int cx24116_writeregN(struct cx24116_state *state, int reg, 222 const u8 *data, u16 len) 223 { 224 int ret; 225 struct i2c_msg msg; 226 u8 *buf; 227 228 buf = kmalloc(len + 1, GFP_KERNEL); 229 if (buf == NULL) { 230 ret = -ENOMEM; 231 goto error; 232 } 233 234 *(buf) = reg; 235 memcpy(buf + 1, data, len); 236 237 msg.addr = state->config->demod_address; 238 msg.flags = 0; 239 msg.buf = buf; 240 msg.len = len + 1; 241 242 if (debug > 1) 243 printk(KERN_INFO "cx24116: %s: write regN 0x%02x, len = %d\n", 244 __func__, reg, len); 245 246 ret = i2c_transfer(state->i2c, &msg, 1); 247 if (ret != 1) { 248 printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n", 249 __func__, ret, reg); 250 ret = -EREMOTEIO; 251 } 252 253 error: 254 kfree(buf); 255 256 return ret; 257 } 258 259 static int cx24116_readreg(struct cx24116_state *state, u8 reg) 260 { 261 int ret; 262 u8 b0[] = { reg }; 263 u8 b1[] = { 0 }; 264 struct i2c_msg msg[] = { 265 { .addr = state->config->demod_address, .flags = 0, 266 .buf = b0, .len = 1 }, 267 { .addr = state->config->demod_address, .flags = I2C_M_RD, 268 .buf = b1, .len = 1 } 269 }; 270 271 ret = i2c_transfer(state->i2c, msg, 2); 272 273 if (ret != 2) { 274 printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", 275 __func__, reg, ret); 276 return ret; 277 } 278 279 if (debug > 1) 280 printk(KERN_INFO "cx24116: read reg 0x%02x, value 0x%02x\n", 281 reg, b1[0]); 282 283 return b1[0]; 284 } 285 286 static int cx24116_set_inversion(struct cx24116_state *state, 287 enum fe_spectral_inversion inversion) 288 { 289 dprintk("%s(%d)\n", __func__, inversion); 290 291 switch (inversion) { 292 case INVERSION_OFF: 293 state->dnxt.inversion_val = 0x00; 294 break; 295 case INVERSION_ON: 296 state->dnxt.inversion_val = 0x04; 297 break; 298 case INVERSION_AUTO: 299 state->dnxt.inversion_val = 0x0C; 300 break; 301 default: 302 return -EINVAL; 303 } 304 305 state->dnxt.inversion = inversion; 306 307 return 0; 308 } 309 310 /* 311 * modfec (modulation and FEC) 312 * =========================== 313 * 314 * MOD FEC mask/val standard 315 * ---- -------- ----------- -------- 316 * QPSK FEC_1_2 0x02 0x02+X DVB-S 317 * QPSK FEC_2_3 0x04 0x02+X DVB-S 318 * QPSK FEC_3_4 0x08 0x02+X DVB-S 319 * QPSK FEC_4_5 0x10 0x02+X DVB-S (?) 320 * QPSK FEC_5_6 0x20 0x02+X DVB-S 321 * QPSK FEC_6_7 0x40 0x02+X DVB-S 322 * QPSK FEC_7_8 0x80 0x02+X DVB-S 323 * QPSK FEC_8_9 0x01 0x02+X DVB-S (?) (NOT SUPPORTED?) 324 * QPSK AUTO 0xff 0x02+X DVB-S 325 * 326 * For DVB-S high byte probably represents FEC 327 * and low byte selects the modulator. The high 328 * byte is search range mask. Bit 5 may turn 329 * on DVB-S and remaining bits represent some 330 * kind of calibration (how/what i do not know). 331 * 332 * Eg.(2/3) szap "Zone Horror" 333 * 334 * mask/val = 0x04, 0x20 335 * status 1f | signal c3c0 | snr a333 | ber 00000098 | unc 0 | FE_HAS_LOCK 336 * 337 * mask/val = 0x04, 0x30 338 * status 1f | signal c3c0 | snr a333 | ber 00000000 | unc 0 | FE_HAS_LOCK 339 * 340 * After tuning FECSTATUS contains actual FEC 341 * in use numbered 1 through to 8 for 1/2 .. 2/3 etc 342 * 343 * NBC=NOT/NON BACKWARD COMPATIBLE WITH DVB-S (DVB-S2 only) 344 * 345 * NBC-QPSK FEC_1_2 0x00, 0x04 DVB-S2 346 * NBC-QPSK FEC_3_5 0x00, 0x05 DVB-S2 347 * NBC-QPSK FEC_2_3 0x00, 0x06 DVB-S2 348 * NBC-QPSK FEC_3_4 0x00, 0x07 DVB-S2 349 * NBC-QPSK FEC_4_5 0x00, 0x08 DVB-S2 350 * NBC-QPSK FEC_5_6 0x00, 0x09 DVB-S2 351 * NBC-QPSK FEC_8_9 0x00, 0x0a DVB-S2 352 * NBC-QPSK FEC_9_10 0x00, 0x0b DVB-S2 353 * 354 * NBC-8PSK FEC_3_5 0x00, 0x0c DVB-S2 355 * NBC-8PSK FEC_2_3 0x00, 0x0d DVB-S2 356 * NBC-8PSK FEC_3_4 0x00, 0x0e DVB-S2 357 * NBC-8PSK FEC_5_6 0x00, 0x0f DVB-S2 358 * NBC-8PSK FEC_8_9 0x00, 0x10 DVB-S2 359 * NBC-8PSK FEC_9_10 0x00, 0x11 DVB-S2 360 * 361 * For DVB-S2 low bytes selects both modulator 362 * and FEC. High byte is meaningless here. To 363 * set pilot, bit 6 (0x40) is set. When inspecting 364 * FECSTATUS bit 7 (0x80) represents the pilot 365 * selection whilst not tuned. When tuned, actual FEC 366 * in use is found in FECSTATUS as per above. Pilot 367 * value is reset. 368 */ 369 370 /* A table of modulation, fec and configuration bytes for the demod. 371 * Not all S2 mmodulation schemes are support and not all rates with 372 * a scheme are support. Especially, no auto detect when in S2 mode. 373 */ 374 static struct cx24116_modfec { 375 enum fe_delivery_system delivery_system; 376 enum fe_modulation modulation; 377 enum fe_code_rate fec; 378 u8 mask; /* In DVBS mode this is used to autodetect */ 379 u8 val; /* Passed to the firmware to indicate mode selection */ 380 } CX24116_MODFEC_MODES[] = { 381 /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ 382 383 /*mod fec mask val */ 384 { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, 385 { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ 386 { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ 387 { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ 388 { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ 389 { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ 390 { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ 391 { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ 392 { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ 393 { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, 394 /* NBC-QPSK */ 395 { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, 396 { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, 397 { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, 398 { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, 399 { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, 400 { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, 401 { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, 402 { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, 403 /* 8PSK */ 404 { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, 405 { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, 406 { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, 407 { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, 408 { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, 409 { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, 410 /* 411 * `val' can be found in the FECSTATUS register when tuning. 412 * FECSTATUS will give the actual FEC in use if tuning was successful. 413 */ 414 }; 415 416 static int cx24116_lookup_fecmod(struct cx24116_state *state, 417 enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f) 418 { 419 int i, ret = -EOPNOTSUPP; 420 421 dprintk("%s(0x%02x,0x%02x)\n", __func__, m, f); 422 423 for (i = 0; i < ARRAY_SIZE(CX24116_MODFEC_MODES); i++) { 424 if ((d == CX24116_MODFEC_MODES[i].delivery_system) && 425 (m == CX24116_MODFEC_MODES[i].modulation) && 426 (f == CX24116_MODFEC_MODES[i].fec)) { 427 ret = i; 428 break; 429 } 430 } 431 432 return ret; 433 } 434 435 static int cx24116_set_fec(struct cx24116_state *state, 436 enum fe_delivery_system delsys, 437 enum fe_modulation mod, 438 enum fe_code_rate fec) 439 { 440 int ret = 0; 441 442 dprintk("%s(0x%02x,0x%02x)\n", __func__, mod, fec); 443 444 ret = cx24116_lookup_fecmod(state, delsys, mod, fec); 445 446 if (ret < 0) 447 return ret; 448 449 state->dnxt.fec = fec; 450 state->dnxt.fec_val = CX24116_MODFEC_MODES[ret].val; 451 state->dnxt.fec_mask = CX24116_MODFEC_MODES[ret].mask; 452 dprintk("%s() mask/val = 0x%02x/0x%02x\n", __func__, 453 state->dnxt.fec_mask, state->dnxt.fec_val); 454 455 return 0; 456 } 457 458 static int cx24116_set_symbolrate(struct cx24116_state *state, u32 rate) 459 { 460 dprintk("%s(%d)\n", __func__, rate); 461 462 /* check if symbol rate is within limits */ 463 if ((rate > state->frontend.ops.info.symbol_rate_max) || 464 (rate < state->frontend.ops.info.symbol_rate_min)) { 465 dprintk("%s() unsupported symbol_rate = %d\n", __func__, rate); 466 return -EOPNOTSUPP; 467 } 468 469 state->dnxt.symbol_rate = rate; 470 dprintk("%s() symbol_rate = %d\n", __func__, rate); 471 472 return 0; 473 } 474 475 static int cx24116_load_firmware(struct dvb_frontend *fe, 476 const struct firmware *fw); 477 478 static int cx24116_firmware_ondemand(struct dvb_frontend *fe) 479 { 480 struct cx24116_state *state = fe->demodulator_priv; 481 const struct firmware *fw; 482 int ret = 0; 483 484 dprintk("%s()\n", __func__); 485 486 if (cx24116_readreg(state, 0x20) > 0) { 487 488 if (state->skip_fw_load) 489 return 0; 490 491 /* Load firmware */ 492 /* request the firmware, this will block until loaded */ 493 printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", 494 __func__, CX24116_DEFAULT_FIRMWARE); 495 ret = request_firmware(&fw, CX24116_DEFAULT_FIRMWARE, 496 state->i2c->dev.parent); 497 printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", 498 __func__); 499 if (ret) { 500 printk(KERN_ERR "%s: No firmware uploaded (timeout or file not found?)\n", 501 __func__); 502 return ret; 503 } 504 505 /* Make sure we don't recurse back through here 506 * during loading */ 507 state->skip_fw_load = 1; 508 509 ret = cx24116_load_firmware(fe, fw); 510 if (ret) 511 printk(KERN_ERR "%s: Writing firmware to device failed\n", 512 __func__); 513 514 release_firmware(fw); 515 516 printk(KERN_INFO "%s: Firmware upload %s\n", __func__, 517 ret == 0 ? "complete" : "failed"); 518 519 /* Ensure firmware is always loaded if required */ 520 state->skip_fw_load = 0; 521 } 522 523 return ret; 524 } 525 526 /* Take a basic firmware command structure, format it 527 * and forward it for processing 528 */ 529 static int cx24116_cmd_execute(struct dvb_frontend *fe, struct cx24116_cmd *cmd) 530 { 531 struct cx24116_state *state = fe->demodulator_priv; 532 int i, ret; 533 534 dprintk("%s()\n", __func__); 535 536 /* Load the firmware if required */ 537 ret = cx24116_firmware_ondemand(fe); 538 if (ret != 0) { 539 printk(KERN_ERR "%s(): Unable initialise the firmware\n", 540 __func__); 541 return ret; 542 } 543 544 /* Write the command */ 545 for (i = 0; i < cmd->len ; i++) { 546 dprintk("%s: 0x%02x == 0x%02x\n", __func__, i, cmd->args[i]); 547 cx24116_writereg(state, i, cmd->args[i]); 548 } 549 550 /* Start execution and wait for cmd to terminate */ 551 cx24116_writereg(state, CX24116_REG_EXECUTE, 0x01); 552 while (cx24116_readreg(state, CX24116_REG_EXECUTE)) { 553 msleep(10); 554 if (i++ > 64) { 555 /* Avoid looping forever if the firmware does 556 not respond */ 557 printk(KERN_WARNING "%s() Firmware not responding\n", 558 __func__); 559 return -EREMOTEIO; 560 } 561 } 562 return 0; 563 } 564 565 static int cx24116_load_firmware(struct dvb_frontend *fe, 566 const struct firmware *fw) 567 { 568 struct cx24116_state *state = fe->demodulator_priv; 569 struct cx24116_cmd cmd; 570 int i, ret, len, max, remaining; 571 unsigned char vers[4]; 572 573 dprintk("%s\n", __func__); 574 dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n", 575 fw->size, 576 fw->data[0], 577 fw->data[1], 578 fw->data[fw->size-2], 579 fw->data[fw->size-1]); 580 581 /* Toggle 88x SRST pin to reset demod */ 582 if (state->config->reset_device) 583 state->config->reset_device(fe); 584 585 /* Begin the firmware load process */ 586 /* Prepare the demod, load the firmware, cleanup after load */ 587 588 /* Init PLL */ 589 cx24116_writereg(state, 0xE5, 0x00); 590 cx24116_writereg(state, 0xF1, 0x08); 591 cx24116_writereg(state, 0xF2, 0x13); 592 593 /* Start PLL */ 594 cx24116_writereg(state, 0xe0, 0x03); 595 cx24116_writereg(state, 0xe0, 0x00); 596 597 /* Unknown */ 598 cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46); 599 cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00); 600 601 /* Unknown */ 602 cx24116_writereg(state, 0xF0, 0x03); 603 cx24116_writereg(state, 0xF4, 0x81); 604 cx24116_writereg(state, 0xF5, 0x00); 605 cx24116_writereg(state, 0xF6, 0x00); 606 607 /* Split firmware to the max I2C write len and write. 608 * Writes whole firmware as one write when i2c_wr_max is set to 0. */ 609 if (state->config->i2c_wr_max) 610 max = state->config->i2c_wr_max; 611 else 612 max = INT_MAX; /* enough for 32k firmware */ 613 614 for (remaining = fw->size; remaining > 0; remaining -= max - 1) { 615 len = remaining; 616 if (len > max - 1) 617 len = max - 1; 618 619 cx24116_writeregN(state, 0xF7, &fw->data[fw->size - remaining], 620 len); 621 } 622 623 cx24116_writereg(state, 0xF4, 0x10); 624 cx24116_writereg(state, 0xF0, 0x00); 625 cx24116_writereg(state, 0xF8, 0x06); 626 627 /* Firmware CMD 10: VCO config */ 628 cmd.args[0x00] = CMD_SET_VCO; 629 cmd.args[0x01] = 0x05; 630 cmd.args[0x02] = 0xdc; 631 cmd.args[0x03] = 0xda; 632 cmd.args[0x04] = 0xae; 633 cmd.args[0x05] = 0xaa; 634 cmd.args[0x06] = 0x04; 635 cmd.args[0x07] = 0x9d; 636 cmd.args[0x08] = 0xfc; 637 cmd.args[0x09] = 0x06; 638 cmd.len = 0x0a; 639 ret = cx24116_cmd_execute(fe, &cmd); 640 if (ret != 0) 641 return ret; 642 643 cx24116_writereg(state, CX24116_REG_SSTATUS, 0x00); 644 645 /* Firmware CMD 14: Tuner config */ 646 cmd.args[0x00] = CMD_TUNERINIT; 647 cmd.args[0x01] = 0x00; 648 cmd.args[0x02] = 0x00; 649 cmd.len = 0x03; 650 ret = cx24116_cmd_execute(fe, &cmd); 651 if (ret != 0) 652 return ret; 653 654 cx24116_writereg(state, 0xe5, 0x00); 655 656 /* Firmware CMD 13: MPEG config */ 657 cmd.args[0x00] = CMD_MPEGCONFIG; 658 cmd.args[0x01] = 0x01; 659 cmd.args[0x02] = 0x75; 660 cmd.args[0x03] = 0x00; 661 if (state->config->mpg_clk_pos_pol) 662 cmd.args[0x04] = state->config->mpg_clk_pos_pol; 663 else 664 cmd.args[0x04] = 0x02; 665 cmd.args[0x05] = 0x00; 666 cmd.len = 0x06; 667 ret = cx24116_cmd_execute(fe, &cmd); 668 if (ret != 0) 669 return ret; 670 671 /* Firmware CMD 35: Get firmware version */ 672 cmd.args[0x00] = CMD_UPDFWVERS; 673 cmd.len = 0x02; 674 for (i = 0; i < 4; i++) { 675 cmd.args[0x01] = i; 676 ret = cx24116_cmd_execute(fe, &cmd); 677 if (ret != 0) 678 return ret; 679 vers[i] = cx24116_readreg(state, CX24116_REG_MAILBOX); 680 } 681 printk(KERN_INFO "%s: FW version %i.%i.%i.%i\n", __func__, 682 vers[0], vers[1], vers[2], vers[3]); 683 684 return 0; 685 } 686 687 static int cx24116_read_status(struct dvb_frontend *fe, enum fe_status *status) 688 { 689 struct cx24116_state *state = fe->demodulator_priv; 690 691 int lock = cx24116_readreg(state, CX24116_REG_SSTATUS) & 692 CX24116_STATUS_MASK; 693 694 dprintk("%s: status = 0x%02x\n", __func__, lock); 695 696 *status = 0; 697 698 if (lock & CX24116_HAS_SIGNAL) 699 *status |= FE_HAS_SIGNAL; 700 if (lock & CX24116_HAS_CARRIER) 701 *status |= FE_HAS_CARRIER; 702 if (lock & CX24116_HAS_VITERBI) 703 *status |= FE_HAS_VITERBI; 704 if (lock & CX24116_HAS_SYNCLOCK) 705 *status |= FE_HAS_SYNC | FE_HAS_LOCK; 706 707 return 0; 708 } 709 710 static int cx24116_read_ber(struct dvb_frontend *fe, u32 *ber) 711 { 712 struct cx24116_state *state = fe->demodulator_priv; 713 714 dprintk("%s()\n", __func__); 715 716 *ber = (cx24116_readreg(state, CX24116_REG_BER24) << 24) | 717 (cx24116_readreg(state, CX24116_REG_BER16) << 16) | 718 (cx24116_readreg(state, CX24116_REG_BER8) << 8) | 719 cx24116_readreg(state, CX24116_REG_BER0); 720 721 return 0; 722 } 723 724 /* TODO Determine function and scale appropriately */ 725 static int cx24116_read_signal_strength(struct dvb_frontend *fe, 726 u16 *signal_strength) 727 { 728 struct cx24116_state *state = fe->demodulator_priv; 729 struct cx24116_cmd cmd; 730 int ret; 731 u16 sig_reading; 732 733 dprintk("%s()\n", __func__); 734 735 /* Firmware CMD 19: Get AGC */ 736 cmd.args[0x00] = CMD_GETAGC; 737 cmd.len = 0x01; 738 ret = cx24116_cmd_execute(fe, &cmd); 739 if (ret != 0) 740 return ret; 741 742 sig_reading = 743 (cx24116_readreg(state, 744 CX24116_REG_SSTATUS) & CX24116_SIGNAL_MASK) | 745 (cx24116_readreg(state, CX24116_REG_SIGNAL) << 6); 746 *signal_strength = 0 - sig_reading; 747 748 dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n", 749 __func__, sig_reading, *signal_strength); 750 751 return 0; 752 } 753 754 /* SNR (0..100)% = (sig & 0xf0) * 10 + (sig & 0x0f) * 10 / 16 */ 755 static int cx24116_read_snr_pct(struct dvb_frontend *fe, u16 *snr) 756 { 757 struct cx24116_state *state = fe->demodulator_priv; 758 u8 snr_reading; 759 static const u32 snr_tab[] = { /* 10 x Table (rounded up) */ 760 0x00000, 0x0199A, 0x03333, 0x04ccD, 0x06667, 761 0x08000, 0x0999A, 0x0b333, 0x0cccD, 0x0e667, 762 0x10000, 0x1199A, 0x13333, 0x14ccD, 0x16667, 763 0x18000 }; 764 765 dprintk("%s()\n", __func__); 766 767 snr_reading = cx24116_readreg(state, CX24116_REG_QUALITY0); 768 769 if (snr_reading >= 0xa0 /* 100% */) 770 *snr = 0xffff; 771 else 772 *snr = snr_tab[(snr_reading & 0xf0) >> 4] + 773 (snr_tab[(snr_reading & 0x0f)] >> 4); 774 775 dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__, 776 snr_reading, *snr); 777 778 return 0; 779 } 780 781 /* The reelbox patches show the value in the registers represents 782 * ESNO, from 0->30db (values 0->300). We provide this value by 783 * default. 784 */ 785 static int cx24116_read_snr_esno(struct dvb_frontend *fe, u16 *snr) 786 { 787 struct cx24116_state *state = fe->demodulator_priv; 788 789 dprintk("%s()\n", __func__); 790 791 *snr = cx24116_readreg(state, CX24116_REG_QUALITY8) << 8 | 792 cx24116_readreg(state, CX24116_REG_QUALITY0); 793 794 dprintk("%s: raw 0x%04x\n", __func__, *snr); 795 796 return 0; 797 } 798 799 static int cx24116_read_snr(struct dvb_frontend *fe, u16 *snr) 800 { 801 if (esno_snr == 1) 802 return cx24116_read_snr_esno(fe, snr); 803 else 804 return cx24116_read_snr_pct(fe, snr); 805 } 806 807 static int cx24116_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 808 { 809 struct cx24116_state *state = fe->demodulator_priv; 810 811 dprintk("%s()\n", __func__); 812 813 *ucblocks = (cx24116_readreg(state, CX24116_REG_UCB8) << 8) | 814 cx24116_readreg(state, CX24116_REG_UCB0); 815 816 return 0; 817 } 818 819 /* Overwrite the current tuning params, we are about to tune */ 820 static void cx24116_clone_params(struct dvb_frontend *fe) 821 { 822 struct cx24116_state *state = fe->demodulator_priv; 823 state->dcur = state->dnxt; 824 } 825 826 /* Wait for LNB */ 827 static int cx24116_wait_for_lnb(struct dvb_frontend *fe) 828 { 829 struct cx24116_state *state = fe->demodulator_priv; 830 int i; 831 832 dprintk("%s() qstatus = 0x%02x\n", __func__, 833 cx24116_readreg(state, CX24116_REG_QSTATUS)); 834 835 /* Wait for up to 300 ms */ 836 for (i = 0; i < 30 ; i++) { 837 if (cx24116_readreg(state, CX24116_REG_QSTATUS) & 0x20) 838 return 0; 839 msleep(10); 840 } 841 842 dprintk("%s(): LNB not ready\n", __func__); 843 844 return -ETIMEDOUT; /* -EBUSY ? */ 845 } 846 847 static int cx24116_set_voltage(struct dvb_frontend *fe, 848 enum fe_sec_voltage voltage) 849 { 850 struct cx24116_cmd cmd; 851 int ret; 852 853 dprintk("%s: %s\n", __func__, 854 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : 855 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??"); 856 857 /* Wait for LNB ready */ 858 ret = cx24116_wait_for_lnb(fe); 859 if (ret != 0) 860 return ret; 861 862 /* Wait for voltage/min repeat delay */ 863 msleep(100); 864 865 cmd.args[0x00] = CMD_LNBDCLEVEL; 866 cmd.args[0x01] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); 867 cmd.len = 0x02; 868 869 /* Min delay time before DiSEqC send */ 870 msleep(15); 871 872 return cx24116_cmd_execute(fe, &cmd); 873 } 874 875 static int cx24116_set_tone(struct dvb_frontend *fe, 876 enum fe_sec_tone_mode tone) 877 { 878 struct cx24116_cmd cmd; 879 int ret; 880 881 dprintk("%s(%d)\n", __func__, tone); 882 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { 883 printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone); 884 return -EINVAL; 885 } 886 887 /* Wait for LNB ready */ 888 ret = cx24116_wait_for_lnb(fe); 889 if (ret != 0) 890 return ret; 891 892 /* Min delay time after DiSEqC send */ 893 msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */ 894 895 /* Now we set the tone */ 896 cmd.args[0x00] = CMD_SET_TONE; 897 cmd.args[0x01] = 0x00; 898 cmd.args[0x02] = 0x00; 899 900 switch (tone) { 901 case SEC_TONE_ON: 902 dprintk("%s: setting tone on\n", __func__); 903 cmd.args[0x03] = 0x01; 904 break; 905 case SEC_TONE_OFF: 906 dprintk("%s: setting tone off\n", __func__); 907 cmd.args[0x03] = 0x00; 908 break; 909 } 910 cmd.len = 0x04; 911 912 /* Min delay time before DiSEqC send */ 913 msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */ 914 915 return cx24116_cmd_execute(fe, &cmd); 916 } 917 918 /* Initialise DiSEqC */ 919 static int cx24116_diseqc_init(struct dvb_frontend *fe) 920 { 921 struct cx24116_state *state = fe->demodulator_priv; 922 struct cx24116_cmd cmd; 923 int ret; 924 925 /* Firmware CMD 20: LNB/DiSEqC config */ 926 cmd.args[0x00] = CMD_LNBCONFIG; 927 cmd.args[0x01] = 0x00; 928 cmd.args[0x02] = 0x10; 929 cmd.args[0x03] = 0x00; 930 cmd.args[0x04] = 0x8f; 931 cmd.args[0x05] = 0x28; 932 cmd.args[0x06] = (toneburst == CX24116_DISEQC_TONEOFF) ? 0x00 : 0x01; 933 cmd.args[0x07] = 0x01; 934 cmd.len = 0x08; 935 ret = cx24116_cmd_execute(fe, &cmd); 936 if (ret != 0) 937 return ret; 938 939 /* Prepare a DiSEqC command */ 940 state->dsec_cmd.args[0x00] = CMD_LNBSEND; 941 942 /* DiSEqC burst */ 943 state->dsec_cmd.args[CX24116_DISEQC_BURST] = CX24116_DISEQC_MINI_A; 944 945 /* Unknown */ 946 state->dsec_cmd.args[CX24116_DISEQC_ARG2_2] = 0x02; 947 state->dsec_cmd.args[CX24116_DISEQC_ARG3_0] = 0x00; 948 /* Continuation flag? */ 949 state->dsec_cmd.args[CX24116_DISEQC_ARG4_0] = 0x00; 950 951 /* DiSEqC message length */ 952 state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = 0x00; 953 954 /* Command length */ 955 state->dsec_cmd.len = CX24116_DISEQC_MSGOFS; 956 957 return 0; 958 } 959 960 /* Send DiSEqC message with derived burst (hack) || previous burst */ 961 static int cx24116_send_diseqc_msg(struct dvb_frontend *fe, 962 struct dvb_diseqc_master_cmd *d) 963 { 964 struct cx24116_state *state = fe->demodulator_priv; 965 int i, ret; 966 967 /* Validate length */ 968 if (d->msg_len > sizeof(d->msg)) 969 return -EINVAL; 970 971 /* Dump DiSEqC message */ 972 if (debug) { 973 printk(KERN_INFO "cx24116: %s(", __func__); 974 for (i = 0 ; i < d->msg_len ;) { 975 printk(KERN_INFO "0x%02x", d->msg[i]); 976 if (++i < d->msg_len) 977 printk(KERN_INFO ", "); 978 } 979 printk(") toneburst=%d\n", toneburst); 980 } 981 982 /* DiSEqC message */ 983 for (i = 0; i < d->msg_len; i++) 984 state->dsec_cmd.args[CX24116_DISEQC_MSGOFS + i] = d->msg[i]; 985 986 /* DiSEqC message length */ 987 state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = d->msg_len; 988 989 /* Command length */ 990 state->dsec_cmd.len = CX24116_DISEQC_MSGOFS + 991 state->dsec_cmd.args[CX24116_DISEQC_MSGLEN]; 992 993 /* DiSEqC toneburst */ 994 if (toneburst == CX24116_DISEQC_MESGCACHE) 995 /* Message is cached */ 996 return 0; 997 998 else if (toneburst == CX24116_DISEQC_TONEOFF) 999 /* Message is sent without burst */ 1000 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 0; 1001 1002 else if (toneburst == CX24116_DISEQC_TONECACHE) { 1003 /* 1004 * Message is sent with derived else cached burst 1005 * 1006 * WRITE PORT GROUP COMMAND 38 1007 * 1008 * 0/A/A: E0 10 38 F0..F3 1009 * 1/B/B: E0 10 38 F4..F7 1010 * 2/C/A: E0 10 38 F8..FB 1011 * 3/D/B: E0 10 38 FC..FF 1012 * 1013 * databyte[3]= 8421:8421 1014 * ABCD:WXYZ 1015 * CLR :SET 1016 * 1017 * WX= PORT SELECT 0..3 (X=TONEBURST) 1018 * Y = VOLTAGE (0=13V, 1=18V) 1019 * Z = BAND (0=LOW, 1=HIGH(22K)) 1020 */ 1021 if (d->msg_len >= 4 && d->msg[2] == 0x38) 1022 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 1023 ((d->msg[3] & 4) >> 2); 1024 if (debug) 1025 dprintk("%s burst=%d\n", __func__, 1026 state->dsec_cmd.args[CX24116_DISEQC_BURST]); 1027 } 1028 1029 /* Wait for LNB ready */ 1030 ret = cx24116_wait_for_lnb(fe); 1031 if (ret != 0) 1032 return ret; 1033 1034 /* Wait for voltage/min repeat delay */ 1035 msleep(100); 1036 1037 /* Command */ 1038 ret = cx24116_cmd_execute(fe, &state->dsec_cmd); 1039 if (ret != 0) 1040 return ret; 1041 /* 1042 * Wait for send 1043 * 1044 * Eutelsat spec: 1045 * >15ms delay + (XXX determine if FW does this, see set_tone) 1046 * 13.5ms per byte + 1047 * >15ms delay + 1048 * 12.5ms burst + 1049 * >15ms delay (XXX determine if FW does this, see set_tone) 1050 */ 1051 msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + 1052 ((toneburst == CX24116_DISEQC_TONEOFF) ? 30 : 60)); 1053 1054 return 0; 1055 } 1056 1057 /* Send DiSEqC burst */ 1058 static int cx24116_diseqc_send_burst(struct dvb_frontend *fe, 1059 enum fe_sec_mini_cmd burst) 1060 { 1061 struct cx24116_state *state = fe->demodulator_priv; 1062 int ret; 1063 1064 dprintk("%s(%d) toneburst=%d\n", __func__, burst, toneburst); 1065 1066 /* DiSEqC burst */ 1067 if (burst == SEC_MINI_A) 1068 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 1069 CX24116_DISEQC_MINI_A; 1070 else if (burst == SEC_MINI_B) 1071 state->dsec_cmd.args[CX24116_DISEQC_BURST] = 1072 CX24116_DISEQC_MINI_B; 1073 else 1074 return -EINVAL; 1075 1076 /* DiSEqC toneburst */ 1077 if (toneburst != CX24116_DISEQC_MESGCACHE) 1078 /* Burst is cached */ 1079 return 0; 1080 1081 /* Burst is to be sent with cached message */ 1082 1083 /* Wait for LNB ready */ 1084 ret = cx24116_wait_for_lnb(fe); 1085 if (ret != 0) 1086 return ret; 1087 1088 /* Wait for voltage/min repeat delay */ 1089 msleep(100); 1090 1091 /* Command */ 1092 ret = cx24116_cmd_execute(fe, &state->dsec_cmd); 1093 if (ret != 0) 1094 return ret; 1095 1096 /* 1097 * Wait for send 1098 * 1099 * Eutelsat spec: 1100 * >15ms delay + (XXX determine if FW does this, see set_tone) 1101 * 13.5ms per byte + 1102 * >15ms delay + 1103 * 12.5ms burst + 1104 * >15ms delay (XXX determine if FW does this, see set_tone) 1105 */ 1106 msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + 60); 1107 1108 return 0; 1109 } 1110 1111 static void cx24116_release(struct dvb_frontend *fe) 1112 { 1113 struct cx24116_state *state = fe->demodulator_priv; 1114 dprintk("%s\n", __func__); 1115 kfree(state); 1116 } 1117 1118 static const struct dvb_frontend_ops cx24116_ops; 1119 1120 struct dvb_frontend *cx24116_attach(const struct cx24116_config *config, 1121 struct i2c_adapter *i2c) 1122 { 1123 struct cx24116_state *state; 1124 int ret; 1125 1126 dprintk("%s\n", __func__); 1127 1128 /* allocate memory for the internal state */ 1129 state = kzalloc(sizeof(*state), GFP_KERNEL); 1130 if (state == NULL) 1131 goto error1; 1132 1133 state->config = config; 1134 state->i2c = i2c; 1135 1136 /* check if the demod is present */ 1137 ret = (cx24116_readreg(state, 0xFF) << 8) | 1138 cx24116_readreg(state, 0xFE); 1139 if (ret != 0x0501) { 1140 printk(KERN_INFO "Invalid probe, probably not a CX24116 device\n"); 1141 goto error2; 1142 } 1143 1144 /* create dvb_frontend */ 1145 memcpy(&state->frontend.ops, &cx24116_ops, 1146 sizeof(struct dvb_frontend_ops)); 1147 state->frontend.demodulator_priv = state; 1148 return &state->frontend; 1149 1150 error2: kfree(state); 1151 error1: return NULL; 1152 } 1153 EXPORT_SYMBOL(cx24116_attach); 1154 1155 /* 1156 * Initialise or wake up device 1157 * 1158 * Power config will reset and load initial firmware if required 1159 */ 1160 static int cx24116_initfe(struct dvb_frontend *fe) 1161 { 1162 struct cx24116_state *state = fe->demodulator_priv; 1163 struct cx24116_cmd cmd; 1164 int ret; 1165 1166 dprintk("%s()\n", __func__); 1167 1168 /* Power on */ 1169 cx24116_writereg(state, 0xe0, 0); 1170 cx24116_writereg(state, 0xe1, 0); 1171 cx24116_writereg(state, 0xea, 0); 1172 1173 /* Firmware CMD 36: Power config */ 1174 cmd.args[0x00] = CMD_TUNERSLEEP; 1175 cmd.args[0x01] = 0; 1176 cmd.len = 0x02; 1177 ret = cx24116_cmd_execute(fe, &cmd); 1178 if (ret != 0) 1179 return ret; 1180 1181 ret = cx24116_diseqc_init(fe); 1182 if (ret != 0) 1183 return ret; 1184 1185 /* HVR-4000 needs this */ 1186 return cx24116_set_voltage(fe, SEC_VOLTAGE_13); 1187 } 1188 1189 /* 1190 * Put device to sleep 1191 */ 1192 static int cx24116_sleep(struct dvb_frontend *fe) 1193 { 1194 struct cx24116_state *state = fe->demodulator_priv; 1195 struct cx24116_cmd cmd; 1196 int ret; 1197 1198 dprintk("%s()\n", __func__); 1199 1200 /* Firmware CMD 36: Power config */ 1201 cmd.args[0x00] = CMD_TUNERSLEEP; 1202 cmd.args[0x01] = 1; 1203 cmd.len = 0x02; 1204 ret = cx24116_cmd_execute(fe, &cmd); 1205 if (ret != 0) 1206 return ret; 1207 1208 /* Power off (Shutdown clocks) */ 1209 cx24116_writereg(state, 0xea, 0xff); 1210 cx24116_writereg(state, 0xe1, 1); 1211 cx24116_writereg(state, 0xe0, 1); 1212 1213 return 0; 1214 } 1215 1216 /* dvb-core told us to tune, the tv property cache will be complete, 1217 * it's safe for is to pull values and use them for tuning purposes. 1218 */ 1219 static int cx24116_set_frontend(struct dvb_frontend *fe) 1220 { 1221 struct cx24116_state *state = fe->demodulator_priv; 1222 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1223 struct cx24116_cmd cmd; 1224 enum fe_status tunerstat; 1225 int i, status, ret, retune = 1; 1226 1227 dprintk("%s()\n", __func__); 1228 1229 switch (c->delivery_system) { 1230 case SYS_DVBS: 1231 dprintk("%s: DVB-S delivery system selected\n", __func__); 1232 1233 /* Only QPSK is supported for DVB-S */ 1234 if (c->modulation != QPSK) { 1235 dprintk("%s: unsupported modulation selected (%d)\n", 1236 __func__, c->modulation); 1237 return -EOPNOTSUPP; 1238 } 1239 1240 /* Pilot doesn't exist in DVB-S, turn bit off */ 1241 state->dnxt.pilot_val = CX24116_PILOT_OFF; 1242 1243 /* DVB-S only supports 0.35 */ 1244 if (c->rolloff != ROLLOFF_35) { 1245 dprintk("%s: unsupported rolloff selected (%d)\n", 1246 __func__, c->rolloff); 1247 return -EOPNOTSUPP; 1248 } 1249 state->dnxt.rolloff_val = CX24116_ROLLOFF_035; 1250 break; 1251 1252 case SYS_DVBS2: 1253 dprintk("%s: DVB-S2 delivery system selected\n", __func__); 1254 1255 /* 1256 * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, 1257 * but not hardware auto detection 1258 */ 1259 if (c->modulation != PSK_8 && c->modulation != QPSK) { 1260 dprintk("%s: unsupported modulation selected (%d)\n", 1261 __func__, c->modulation); 1262 return -EOPNOTSUPP; 1263 } 1264 1265 switch (c->pilot) { 1266 case PILOT_AUTO: /* Not supported but emulated */ 1267 state->dnxt.pilot_val = (c->modulation == QPSK) 1268 ? CX24116_PILOT_OFF : CX24116_PILOT_ON; 1269 retune++; 1270 break; 1271 case PILOT_OFF: 1272 state->dnxt.pilot_val = CX24116_PILOT_OFF; 1273 break; 1274 case PILOT_ON: 1275 state->dnxt.pilot_val = CX24116_PILOT_ON; 1276 break; 1277 default: 1278 dprintk("%s: unsupported pilot mode selected (%d)\n", 1279 __func__, c->pilot); 1280 return -EOPNOTSUPP; 1281 } 1282 1283 switch (c->rolloff) { 1284 case ROLLOFF_20: 1285 state->dnxt.rolloff_val = CX24116_ROLLOFF_020; 1286 break; 1287 case ROLLOFF_25: 1288 state->dnxt.rolloff_val = CX24116_ROLLOFF_025; 1289 break; 1290 case ROLLOFF_35: 1291 state->dnxt.rolloff_val = CX24116_ROLLOFF_035; 1292 break; 1293 case ROLLOFF_AUTO: /* Rolloff must be explicit */ 1294 default: 1295 dprintk("%s: unsupported rolloff selected (%d)\n", 1296 __func__, c->rolloff); 1297 return -EOPNOTSUPP; 1298 } 1299 break; 1300 1301 default: 1302 dprintk("%s: unsupported delivery system selected (%d)\n", 1303 __func__, c->delivery_system); 1304 return -EOPNOTSUPP; 1305 } 1306 state->dnxt.delsys = c->delivery_system; 1307 state->dnxt.modulation = c->modulation; 1308 state->dnxt.frequency = c->frequency; 1309 state->dnxt.pilot = c->pilot; 1310 state->dnxt.rolloff = c->rolloff; 1311 1312 ret = cx24116_set_inversion(state, c->inversion); 1313 if (ret != 0) 1314 return ret; 1315 1316 /* FEC_NONE/AUTO for DVB-S2 is not supported and detected here */ 1317 ret = cx24116_set_fec(state, c->delivery_system, c->modulation, c->fec_inner); 1318 if (ret != 0) 1319 return ret; 1320 1321 ret = cx24116_set_symbolrate(state, c->symbol_rate); 1322 if (ret != 0) 1323 return ret; 1324 1325 /* discard the 'current' tuning parameters and prepare to tune */ 1326 cx24116_clone_params(fe); 1327 1328 dprintk("%s: delsys = %d\n", __func__, state->dcur.delsys); 1329 dprintk("%s: modulation = %d\n", __func__, state->dcur.modulation); 1330 dprintk("%s: frequency = %d\n", __func__, state->dcur.frequency); 1331 dprintk("%s: pilot = %d (val = 0x%02x)\n", __func__, 1332 state->dcur.pilot, state->dcur.pilot_val); 1333 dprintk("%s: retune = %d\n", __func__, retune); 1334 dprintk("%s: rolloff = %d (val = 0x%02x)\n", __func__, 1335 state->dcur.rolloff, state->dcur.rolloff_val); 1336 dprintk("%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); 1337 dprintk("%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, 1338 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); 1339 dprintk("%s: Inversion = %d (val = 0x%02x)\n", __func__, 1340 state->dcur.inversion, state->dcur.inversion_val); 1341 1342 /* This is also done in advise/acquire on HVR4000 but not on LITE */ 1343 if (state->config->set_ts_params) 1344 state->config->set_ts_params(fe, 0); 1345 1346 /* Set/Reset B/W */ 1347 cmd.args[0x00] = CMD_BANDWIDTH; 1348 cmd.args[0x01] = 0x01; 1349 cmd.len = 0x02; 1350 ret = cx24116_cmd_execute(fe, &cmd); 1351 if (ret != 0) 1352 return ret; 1353 1354 /* Prepare a tune request */ 1355 cmd.args[0x00] = CMD_TUNEREQUEST; 1356 1357 /* Frequency */ 1358 cmd.args[0x01] = (state->dcur.frequency & 0xff0000) >> 16; 1359 cmd.args[0x02] = (state->dcur.frequency & 0x00ff00) >> 8; 1360 cmd.args[0x03] = (state->dcur.frequency & 0x0000ff); 1361 1362 /* Symbol Rate */ 1363 cmd.args[0x04] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; 1364 cmd.args[0x05] = ((state->dcur.symbol_rate / 1000) & 0x00ff); 1365 1366 /* Automatic Inversion */ 1367 cmd.args[0x06] = state->dcur.inversion_val; 1368 1369 /* Modulation / FEC / Pilot */ 1370 cmd.args[0x07] = state->dcur.fec_val | state->dcur.pilot_val; 1371 1372 cmd.args[0x08] = CX24116_SEARCH_RANGE_KHZ >> 8; 1373 cmd.args[0x09] = CX24116_SEARCH_RANGE_KHZ & 0xff; 1374 cmd.args[0x0a] = 0x00; 1375 cmd.args[0x0b] = 0x00; 1376 cmd.args[0x0c] = state->dcur.rolloff_val; 1377 cmd.args[0x0d] = state->dcur.fec_mask; 1378 1379 if (state->dcur.symbol_rate > 30000000) { 1380 cmd.args[0x0e] = 0x04; 1381 cmd.args[0x0f] = 0x00; 1382 cmd.args[0x10] = 0x01; 1383 cmd.args[0x11] = 0x77; 1384 cmd.args[0x12] = 0x36; 1385 cx24116_writereg(state, CX24116_REG_CLKDIV, 0x44); 1386 cx24116_writereg(state, CX24116_REG_RATEDIV, 0x01); 1387 } else { 1388 cmd.args[0x0e] = 0x06; 1389 cmd.args[0x0f] = 0x00; 1390 cmd.args[0x10] = 0x00; 1391 cmd.args[0x11] = 0xFA; 1392 cmd.args[0x12] = 0x24; 1393 cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46); 1394 cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00); 1395 } 1396 1397 cmd.len = 0x13; 1398 1399 /* We need to support pilot and non-pilot tuning in the 1400 * driver automatically. This is a workaround for because 1401 * the demod does not support autodetect. 1402 */ 1403 do { 1404 /* Reset status register */ 1405 status = cx24116_readreg(state, CX24116_REG_SSTATUS) 1406 & CX24116_SIGNAL_MASK; 1407 cx24116_writereg(state, CX24116_REG_SSTATUS, status); 1408 1409 /* Tune */ 1410 ret = cx24116_cmd_execute(fe, &cmd); 1411 if (ret != 0) 1412 break; 1413 1414 /* 1415 * Wait for up to 500 ms before retrying 1416 * 1417 * If we are able to tune then generally it occurs within 100ms. 1418 * If it takes longer, try a different toneburst setting. 1419 */ 1420 for (i = 0; i < 50 ; i++) { 1421 cx24116_read_status(fe, &tunerstat); 1422 status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); 1423 if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { 1424 dprintk("%s: Tuned\n", __func__); 1425 goto tuned; 1426 } 1427 msleep(10); 1428 } 1429 1430 dprintk("%s: Not tuned\n", __func__); 1431 1432 /* Toggle pilot bit when in auto-pilot */ 1433 if (state->dcur.pilot == PILOT_AUTO) 1434 cmd.args[0x07] ^= CX24116_PILOT_ON; 1435 } while (--retune); 1436 1437 tuned: /* Set/Reset B/W */ 1438 cmd.args[0x00] = CMD_BANDWIDTH; 1439 cmd.args[0x01] = 0x00; 1440 cmd.len = 0x02; 1441 return cx24116_cmd_execute(fe, &cmd); 1442 } 1443 1444 static int cx24116_tune(struct dvb_frontend *fe, bool re_tune, 1445 unsigned int mode_flags, unsigned int *delay, enum fe_status *status) 1446 { 1447 /* 1448 * It is safe to discard "params" here, as the DVB core will sync 1449 * fe->dtv_property_cache with fepriv->parameters_in, where the 1450 * DVBv3 params are stored. The only practical usage for it indicate 1451 * that re-tuning is needed, e. g. (fepriv->state & FESTATE_RETUNE) is 1452 * true. 1453 */ 1454 1455 *delay = HZ / 5; 1456 if (re_tune) { 1457 int ret = cx24116_set_frontend(fe); 1458 if (ret) 1459 return ret; 1460 } 1461 return cx24116_read_status(fe, status); 1462 } 1463 1464 static int cx24116_get_algo(struct dvb_frontend *fe) 1465 { 1466 return DVBFE_ALGO_HW; 1467 } 1468 1469 static const struct dvb_frontend_ops cx24116_ops = { 1470 .delsys = { SYS_DVBS, SYS_DVBS2 }, 1471 .info = { 1472 .name = "Conexant CX24116/CX24118", 1473 .frequency_min = 950000, 1474 .frequency_max = 2150000, 1475 .frequency_stepsize = 1011, /* kHz for QPSK frontends */ 1476 .frequency_tolerance = 5000, 1477 .symbol_rate_min = 1000000, 1478 .symbol_rate_max = 45000000, 1479 .caps = FE_CAN_INVERSION_AUTO | 1480 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 1481 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 1482 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 1483 FE_CAN_2G_MODULATION | 1484 FE_CAN_QPSK | FE_CAN_RECOVER 1485 }, 1486 1487 .release = cx24116_release, 1488 1489 .init = cx24116_initfe, 1490 .sleep = cx24116_sleep, 1491 .read_status = cx24116_read_status, 1492 .read_ber = cx24116_read_ber, 1493 .read_signal_strength = cx24116_read_signal_strength, 1494 .read_snr = cx24116_read_snr, 1495 .read_ucblocks = cx24116_read_ucblocks, 1496 .set_tone = cx24116_set_tone, 1497 .set_voltage = cx24116_set_voltage, 1498 .diseqc_send_master_cmd = cx24116_send_diseqc_msg, 1499 .diseqc_send_burst = cx24116_diseqc_send_burst, 1500 .get_frontend_algo = cx24116_get_algo, 1501 .tune = cx24116_tune, 1502 1503 .set_frontend = cx24116_set_frontend, 1504 }; 1505 1506 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24116/cx24118 hardware"); 1507 MODULE_AUTHOR("Steven Toth"); 1508 MODULE_LICENSE("GPL"); 1509 1510