19a0bf528SMauro Carvalho Chehab /* 29a0bf528SMauro Carvalho Chehab * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator 39a0bf528SMauro Carvalho Chehab * ATBM8830, ATBM8831 49a0bf528SMauro Carvalho Chehab * 59a0bf528SMauro Carvalho Chehab * Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com> 69a0bf528SMauro Carvalho Chehab * 79a0bf528SMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify 89a0bf528SMauro Carvalho Chehab * it under the terms of the GNU General Public License as published by 99a0bf528SMauro Carvalho Chehab * the Free Software Foundation; either version 2 of the License, or 109a0bf528SMauro Carvalho Chehab * (at your option) any later version. 119a0bf528SMauro Carvalho Chehab * 129a0bf528SMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 139a0bf528SMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 149a0bf528SMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 159a0bf528SMauro Carvalho Chehab * GNU General Public License for more details. 169a0bf528SMauro Carvalho Chehab */ 179a0bf528SMauro Carvalho Chehab 189a0bf528SMauro Carvalho Chehab #include <asm/div64.h> 19*fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h> 209a0bf528SMauro Carvalho Chehab 219a0bf528SMauro Carvalho Chehab #include "atbm8830.h" 229a0bf528SMauro Carvalho Chehab #include "atbm8830_priv.h" 239a0bf528SMauro Carvalho Chehab 249a0bf528SMauro Carvalho Chehab #define dprintk(args...) \ 259a0bf528SMauro Carvalho Chehab do { \ 269a0bf528SMauro Carvalho Chehab if (debug) \ 279a0bf528SMauro Carvalho Chehab printk(KERN_DEBUG "atbm8830: " args); \ 289a0bf528SMauro Carvalho Chehab } while (0) 299a0bf528SMauro Carvalho Chehab 309a0bf528SMauro Carvalho Chehab static int debug; 319a0bf528SMauro Carvalho Chehab 329a0bf528SMauro Carvalho Chehab module_param(debug, int, 0644); 339a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 349a0bf528SMauro Carvalho Chehab 359a0bf528SMauro Carvalho Chehab static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data) 369a0bf528SMauro Carvalho Chehab { 379a0bf528SMauro Carvalho Chehab int ret = 0; 389a0bf528SMauro Carvalho Chehab u8 dev_addr; 399a0bf528SMauro Carvalho Chehab u8 buf1[] = { reg >> 8, reg & 0xFF }; 409a0bf528SMauro Carvalho Chehab u8 buf2[] = { data }; 419a0bf528SMauro Carvalho Chehab struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 }; 429a0bf528SMauro Carvalho Chehab struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 }; 439a0bf528SMauro Carvalho Chehab 449a0bf528SMauro Carvalho Chehab dev_addr = priv->config->demod_address; 459a0bf528SMauro Carvalho Chehab msg1.addr = dev_addr; 469a0bf528SMauro Carvalho Chehab msg2.addr = dev_addr; 479a0bf528SMauro Carvalho Chehab 489a0bf528SMauro Carvalho Chehab if (debug >= 2) 499a0bf528SMauro Carvalho Chehab dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data); 509a0bf528SMauro Carvalho Chehab 519a0bf528SMauro Carvalho Chehab ret = i2c_transfer(priv->i2c, &msg1, 1); 529a0bf528SMauro Carvalho Chehab if (ret != 1) 539a0bf528SMauro Carvalho Chehab return -EIO; 549a0bf528SMauro Carvalho Chehab 559a0bf528SMauro Carvalho Chehab ret = i2c_transfer(priv->i2c, &msg2, 1); 569a0bf528SMauro Carvalho Chehab return (ret != 1) ? -EIO : 0; 579a0bf528SMauro Carvalho Chehab } 589a0bf528SMauro Carvalho Chehab 599a0bf528SMauro Carvalho Chehab static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data) 609a0bf528SMauro Carvalho Chehab { 619a0bf528SMauro Carvalho Chehab int ret; 629a0bf528SMauro Carvalho Chehab u8 dev_addr; 639a0bf528SMauro Carvalho Chehab 649a0bf528SMauro Carvalho Chehab u8 buf1[] = { reg >> 8, reg & 0xFF }; 659a0bf528SMauro Carvalho Chehab u8 buf2[] = { 0 }; 669a0bf528SMauro Carvalho Chehab struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 }; 679a0bf528SMauro Carvalho Chehab struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 }; 689a0bf528SMauro Carvalho Chehab 699a0bf528SMauro Carvalho Chehab dev_addr = priv->config->demod_address; 709a0bf528SMauro Carvalho Chehab msg1.addr = dev_addr; 719a0bf528SMauro Carvalho Chehab msg2.addr = dev_addr; 729a0bf528SMauro Carvalho Chehab 739a0bf528SMauro Carvalho Chehab ret = i2c_transfer(priv->i2c, &msg1, 1); 749a0bf528SMauro Carvalho Chehab if (ret != 1) { 759a0bf528SMauro Carvalho Chehab dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret); 769a0bf528SMauro Carvalho Chehab return -EIO; 779a0bf528SMauro Carvalho Chehab } 789a0bf528SMauro Carvalho Chehab 799a0bf528SMauro Carvalho Chehab ret = i2c_transfer(priv->i2c, &msg2, 1); 809a0bf528SMauro Carvalho Chehab if (ret != 1) 819a0bf528SMauro Carvalho Chehab return -EIO; 829a0bf528SMauro Carvalho Chehab 839a0bf528SMauro Carvalho Chehab *p_data = buf2[0]; 849a0bf528SMauro Carvalho Chehab if (debug >= 2) 859a0bf528SMauro Carvalho Chehab dprintk("%s: reg=0x%04X, data=0x%02X\n", 869a0bf528SMauro Carvalho Chehab __func__, reg, buf2[0]); 879a0bf528SMauro Carvalho Chehab 889a0bf528SMauro Carvalho Chehab return 0; 899a0bf528SMauro Carvalho Chehab } 909a0bf528SMauro Carvalho Chehab 919a0bf528SMauro Carvalho Chehab /* Lock register latch so that multi-register read is atomic */ 929a0bf528SMauro Carvalho Chehab static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock) 939a0bf528SMauro Carvalho Chehab { 949a0bf528SMauro Carvalho Chehab return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0); 959a0bf528SMauro Carvalho Chehab } 969a0bf528SMauro Carvalho Chehab 979a0bf528SMauro Carvalho Chehab static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/) 989a0bf528SMauro Carvalho Chehab { 999a0bf528SMauro Carvalho Chehab u32 val; 1009a0bf528SMauro Carvalho Chehab u64 t; 1019a0bf528SMauro Carvalho Chehab 1029a0bf528SMauro Carvalho Chehab /* 0x100000 * freq / 30.4MHz */ 1039a0bf528SMauro Carvalho Chehab t = (u64)0x100000 * freq; 1049a0bf528SMauro Carvalho Chehab do_div(t, 30400); 1059a0bf528SMauro Carvalho Chehab val = t; 1069a0bf528SMauro Carvalho Chehab 1079a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_OSC_CLK, val); 1089a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8); 1099a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16); 1109a0bf528SMauro Carvalho Chehab 1119a0bf528SMauro Carvalho Chehab return 0; 1129a0bf528SMauro Carvalho Chehab } 1139a0bf528SMauro Carvalho Chehab 1149a0bf528SMauro Carvalho Chehab static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/) 1159a0bf528SMauro Carvalho Chehab { 1169a0bf528SMauro Carvalho Chehab 1179a0bf528SMauro Carvalho Chehab u32 fs = priv->config->osc_clk_freq; 1189a0bf528SMauro Carvalho Chehab u64 t; 1199a0bf528SMauro Carvalho Chehab u32 val; 1209a0bf528SMauro Carvalho Chehab u8 dat; 1219a0bf528SMauro Carvalho Chehab 1229a0bf528SMauro Carvalho Chehab if (freq != 0) { 1239a0bf528SMauro Carvalho Chehab /* 2 * PI * (freq - fs) / fs * (2 ^ 22) */ 1249a0bf528SMauro Carvalho Chehab t = (u64) 2 * 31416 * (freq - fs); 1259a0bf528SMauro Carvalho Chehab t <<= 22; 1269a0bf528SMauro Carvalho Chehab do_div(t, fs); 1279a0bf528SMauro Carvalho Chehab do_div(t, 1000); 1289a0bf528SMauro Carvalho Chehab val = t; 1299a0bf528SMauro Carvalho Chehab 1309a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1); 1319a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_IF_FREQ, val); 1329a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8); 1339a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16); 1349a0bf528SMauro Carvalho Chehab 1359a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat); 1369a0bf528SMauro Carvalho Chehab dat &= 0xFC; 1379a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_ADC_CONFIG, dat); 1389a0bf528SMauro Carvalho Chehab } else { 1399a0bf528SMauro Carvalho Chehab /* Zero IF */ 1409a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0); 1419a0bf528SMauro Carvalho Chehab 1429a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat); 1439a0bf528SMauro Carvalho Chehab dat &= 0xFC; 1449a0bf528SMauro Carvalho Chehab dat |= 0x02; 1459a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_ADC_CONFIG, dat); 1469a0bf528SMauro Carvalho Chehab 1479a0bf528SMauro Carvalho Chehab if (priv->config->zif_swap_iq) 1489a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03); 1499a0bf528SMauro Carvalho Chehab else 1509a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01); 1519a0bf528SMauro Carvalho Chehab } 1529a0bf528SMauro Carvalho Chehab 1539a0bf528SMauro Carvalho Chehab return 0; 1549a0bf528SMauro Carvalho Chehab } 1559a0bf528SMauro Carvalho Chehab 1569a0bf528SMauro Carvalho Chehab static int is_locked(struct atbm_state *priv, u8 *locked) 1579a0bf528SMauro Carvalho Chehab { 1589a0bf528SMauro Carvalho Chehab u8 status; 1599a0bf528SMauro Carvalho Chehab 1609a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_LOCK_STATUS, &status); 1619a0bf528SMauro Carvalho Chehab 1629a0bf528SMauro Carvalho Chehab if (locked != NULL) 1639a0bf528SMauro Carvalho Chehab *locked = (status == 1); 1649a0bf528SMauro Carvalho Chehab return 0; 1659a0bf528SMauro Carvalho Chehab } 1669a0bf528SMauro Carvalho Chehab 1679a0bf528SMauro Carvalho Chehab static int set_agc_config(struct atbm_state *priv, 1689a0bf528SMauro Carvalho Chehab u8 min, u8 max, u8 hold_loop) 1699a0bf528SMauro Carvalho Chehab { 1709a0bf528SMauro Carvalho Chehab /* no effect if both min and max are zero */ 1719a0bf528SMauro Carvalho Chehab if (!min && !max) 1729a0bf528SMauro Carvalho Chehab return 0; 1739a0bf528SMauro Carvalho Chehab 1749a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_AGC_MIN, min); 1759a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_AGC_MAX, max); 1769a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop); 1779a0bf528SMauro Carvalho Chehab 1789a0bf528SMauro Carvalho Chehab return 0; 1799a0bf528SMauro Carvalho Chehab } 1809a0bf528SMauro Carvalho Chehab 1819a0bf528SMauro Carvalho Chehab static int set_static_channel_mode(struct atbm_state *priv) 1829a0bf528SMauro Carvalho Chehab { 1839a0bf528SMauro Carvalho Chehab int i; 1849a0bf528SMauro Carvalho Chehab 1859a0bf528SMauro Carvalho Chehab for (i = 0; i < 5; i++) 1869a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x099B + i, 0x08); 1879a0bf528SMauro Carvalho Chehab 1889a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x095B, 0x7F); 1899a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x09CB, 0x01); 1909a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x09CC, 0x7F); 1919a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x09CD, 0x7F); 1929a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x0E01, 0x20); 1939a0bf528SMauro Carvalho Chehab 1949a0bf528SMauro Carvalho Chehab /* For single carrier */ 1959a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x0B03, 0x0A); 1969a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x0935, 0x10); 1979a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x0936, 0x08); 1989a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x093E, 0x08); 1999a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x096E, 0x06); 2009a0bf528SMauro Carvalho Chehab 2019a0bf528SMauro Carvalho Chehab /* frame_count_max0 */ 2029a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x0B09, 0x00); 2039a0bf528SMauro Carvalho Chehab /* frame_count_max1 */ 2049a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x0B0A, 0x08); 2059a0bf528SMauro Carvalho Chehab 2069a0bf528SMauro Carvalho Chehab return 0; 2079a0bf528SMauro Carvalho Chehab } 2089a0bf528SMauro Carvalho Chehab 2099a0bf528SMauro Carvalho Chehab static int set_ts_config(struct atbm_state *priv) 2109a0bf528SMauro Carvalho Chehab { 2119a0bf528SMauro Carvalho Chehab const struct atbm8830_config *cfg = priv->config; 2129a0bf528SMauro Carvalho Chehab 2139a0bf528SMauro Carvalho Chehab /*Set parallel/serial ts mode*/ 2149a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0); 2159a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0); 2169a0bf528SMauro Carvalho Chehab /*Set ts sampling edge*/ 2179a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE, 2189a0bf528SMauro Carvalho Chehab cfg->ts_sampling_edge ? 1 : 0); 2199a0bf528SMauro Carvalho Chehab /*Set ts clock freerun*/ 2209a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_TS_CLK_FREERUN, 2219a0bf528SMauro Carvalho Chehab cfg->ts_clk_gated ? 0 : 1); 2229a0bf528SMauro Carvalho Chehab 2239a0bf528SMauro Carvalho Chehab return 0; 2249a0bf528SMauro Carvalho Chehab } 2259a0bf528SMauro Carvalho Chehab 2269a0bf528SMauro Carvalho Chehab static int atbm8830_init(struct dvb_frontend *fe) 2279a0bf528SMauro Carvalho Chehab { 2289a0bf528SMauro Carvalho Chehab struct atbm_state *priv = fe->demodulator_priv; 2299a0bf528SMauro Carvalho Chehab const struct atbm8830_config *cfg = priv->config; 2309a0bf528SMauro Carvalho Chehab 2319a0bf528SMauro Carvalho Chehab /*Set oscillator frequency*/ 2329a0bf528SMauro Carvalho Chehab set_osc_freq(priv, cfg->osc_clk_freq); 2339a0bf528SMauro Carvalho Chehab 2349a0bf528SMauro Carvalho Chehab /*Set IF frequency*/ 2359a0bf528SMauro Carvalho Chehab set_if_freq(priv, cfg->if_freq); 2369a0bf528SMauro Carvalho Chehab 2379a0bf528SMauro Carvalho Chehab /*Set AGC Config*/ 2389a0bf528SMauro Carvalho Chehab set_agc_config(priv, cfg->agc_min, cfg->agc_max, 2399a0bf528SMauro Carvalho Chehab cfg->agc_hold_loop); 2409a0bf528SMauro Carvalho Chehab 2419a0bf528SMauro Carvalho Chehab /*Set static channel mode*/ 2429a0bf528SMauro Carvalho Chehab set_static_channel_mode(priv); 2439a0bf528SMauro Carvalho Chehab 2449a0bf528SMauro Carvalho Chehab set_ts_config(priv); 2459a0bf528SMauro Carvalho Chehab /*Turn off DSP reset*/ 2469a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x000A, 0); 2479a0bf528SMauro Carvalho Chehab 2489a0bf528SMauro Carvalho Chehab /*SW version test*/ 2499a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, 0x020C, 11); 2509a0bf528SMauro Carvalho Chehab 2519a0bf528SMauro Carvalho Chehab /* Run */ 2529a0bf528SMauro Carvalho Chehab atbm8830_write_reg(priv, REG_DEMOD_RUN, 1); 2539a0bf528SMauro Carvalho Chehab 2549a0bf528SMauro Carvalho Chehab return 0; 2559a0bf528SMauro Carvalho Chehab } 2569a0bf528SMauro Carvalho Chehab 2579a0bf528SMauro Carvalho Chehab 2589a0bf528SMauro Carvalho Chehab static void atbm8830_release(struct dvb_frontend *fe) 2599a0bf528SMauro Carvalho Chehab { 2609a0bf528SMauro Carvalho Chehab struct atbm_state *state = fe->demodulator_priv; 2619a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 2629a0bf528SMauro Carvalho Chehab 2639a0bf528SMauro Carvalho Chehab kfree(state); 2649a0bf528SMauro Carvalho Chehab } 2659a0bf528SMauro Carvalho Chehab 2669a0bf528SMauro Carvalho Chehab static int atbm8830_set_fe(struct dvb_frontend *fe) 2679a0bf528SMauro Carvalho Chehab { 2689a0bf528SMauro Carvalho Chehab struct atbm_state *priv = fe->demodulator_priv; 2699a0bf528SMauro Carvalho Chehab int i; 2709a0bf528SMauro Carvalho Chehab u8 locked = 0; 2719a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 2729a0bf528SMauro Carvalho Chehab 2739a0bf528SMauro Carvalho Chehab /* set frequency */ 2749a0bf528SMauro Carvalho Chehab if (fe->ops.tuner_ops.set_params) { 2759a0bf528SMauro Carvalho Chehab if (fe->ops.i2c_gate_ctrl) 2769a0bf528SMauro Carvalho Chehab fe->ops.i2c_gate_ctrl(fe, 1); 2779a0bf528SMauro Carvalho Chehab fe->ops.tuner_ops.set_params(fe); 2789a0bf528SMauro Carvalho Chehab if (fe->ops.i2c_gate_ctrl) 2799a0bf528SMauro Carvalho Chehab fe->ops.i2c_gate_ctrl(fe, 0); 2809a0bf528SMauro Carvalho Chehab } 2819a0bf528SMauro Carvalho Chehab 2829a0bf528SMauro Carvalho Chehab /* start auto lock */ 2839a0bf528SMauro Carvalho Chehab for (i = 0; i < 10; i++) { 2849a0bf528SMauro Carvalho Chehab mdelay(100); 2859a0bf528SMauro Carvalho Chehab dprintk("Try %d\n", i); 2869a0bf528SMauro Carvalho Chehab is_locked(priv, &locked); 2879a0bf528SMauro Carvalho Chehab if (locked != 0) { 2889a0bf528SMauro Carvalho Chehab dprintk("ATBM8830 locked!\n"); 2899a0bf528SMauro Carvalho Chehab break; 2909a0bf528SMauro Carvalho Chehab } 2919a0bf528SMauro Carvalho Chehab } 2929a0bf528SMauro Carvalho Chehab 2939a0bf528SMauro Carvalho Chehab return 0; 2949a0bf528SMauro Carvalho Chehab } 2959a0bf528SMauro Carvalho Chehab 2967e3e68bcSMauro Carvalho Chehab static int atbm8830_get_fe(struct dvb_frontend *fe, 2977e3e68bcSMauro Carvalho Chehab struct dtv_frontend_properties *c) 2989a0bf528SMauro Carvalho Chehab { 2999a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 3009a0bf528SMauro Carvalho Chehab 3019a0bf528SMauro Carvalho Chehab /* TODO: get real readings from device */ 3029a0bf528SMauro Carvalho Chehab /* inversion status */ 3039a0bf528SMauro Carvalho Chehab c->inversion = INVERSION_OFF; 3049a0bf528SMauro Carvalho Chehab 3059a0bf528SMauro Carvalho Chehab /* bandwidth */ 3069a0bf528SMauro Carvalho Chehab c->bandwidth_hz = 8000000; 3079a0bf528SMauro Carvalho Chehab 3089a0bf528SMauro Carvalho Chehab c->code_rate_HP = FEC_AUTO; 3099a0bf528SMauro Carvalho Chehab c->code_rate_LP = FEC_AUTO; 3109a0bf528SMauro Carvalho Chehab 3119a0bf528SMauro Carvalho Chehab c->modulation = QAM_AUTO; 3129a0bf528SMauro Carvalho Chehab 3139a0bf528SMauro Carvalho Chehab /* transmission mode */ 3149a0bf528SMauro Carvalho Chehab c->transmission_mode = TRANSMISSION_MODE_AUTO; 3159a0bf528SMauro Carvalho Chehab 3169a0bf528SMauro Carvalho Chehab /* guard interval */ 3179a0bf528SMauro Carvalho Chehab c->guard_interval = GUARD_INTERVAL_AUTO; 3189a0bf528SMauro Carvalho Chehab 3199a0bf528SMauro Carvalho Chehab /* hierarchy */ 3209a0bf528SMauro Carvalho Chehab c->hierarchy = HIERARCHY_NONE; 3219a0bf528SMauro Carvalho Chehab 3229a0bf528SMauro Carvalho Chehab return 0; 3239a0bf528SMauro Carvalho Chehab } 3249a0bf528SMauro Carvalho Chehab 3259a0bf528SMauro Carvalho Chehab static int atbm8830_get_tune_settings(struct dvb_frontend *fe, 3269a0bf528SMauro Carvalho Chehab struct dvb_frontend_tune_settings *fesettings) 3279a0bf528SMauro Carvalho Chehab { 3289a0bf528SMauro Carvalho Chehab fesettings->min_delay_ms = 0; 3299a0bf528SMauro Carvalho Chehab fesettings->step_size = 0; 3309a0bf528SMauro Carvalho Chehab fesettings->max_drift = 0; 3319a0bf528SMauro Carvalho Chehab return 0; 3329a0bf528SMauro Carvalho Chehab } 3339a0bf528SMauro Carvalho Chehab 3340df289a2SMauro Carvalho Chehab static int atbm8830_read_status(struct dvb_frontend *fe, 3350df289a2SMauro Carvalho Chehab enum fe_status *fe_status) 3369a0bf528SMauro Carvalho Chehab { 3379a0bf528SMauro Carvalho Chehab struct atbm_state *priv = fe->demodulator_priv; 3389a0bf528SMauro Carvalho Chehab u8 locked = 0; 3399a0bf528SMauro Carvalho Chehab u8 agc_locked = 0; 3409a0bf528SMauro Carvalho Chehab 3419a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 3429a0bf528SMauro Carvalho Chehab *fe_status = 0; 3439a0bf528SMauro Carvalho Chehab 3449a0bf528SMauro Carvalho Chehab is_locked(priv, &locked); 3459a0bf528SMauro Carvalho Chehab if (locked) { 3469a0bf528SMauro Carvalho Chehab *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | 3479a0bf528SMauro Carvalho Chehab FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; 3489a0bf528SMauro Carvalho Chehab } 3499a0bf528SMauro Carvalho Chehab dprintk("%s: fe_status=0x%x\n", __func__, *fe_status); 3509a0bf528SMauro Carvalho Chehab 3519a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked); 3529a0bf528SMauro Carvalho Chehab dprintk("AGC Lock: %d\n", agc_locked); 3539a0bf528SMauro Carvalho Chehab 3549a0bf528SMauro Carvalho Chehab return 0; 3559a0bf528SMauro Carvalho Chehab } 3569a0bf528SMauro Carvalho Chehab 3579a0bf528SMauro Carvalho Chehab static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber) 3589a0bf528SMauro Carvalho Chehab { 3599a0bf528SMauro Carvalho Chehab struct atbm_state *priv = fe->demodulator_priv; 3609a0bf528SMauro Carvalho Chehab u32 frame_err; 3619a0bf528SMauro Carvalho Chehab u8 t; 3629a0bf528SMauro Carvalho Chehab 3639a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 3649a0bf528SMauro Carvalho Chehab 3659a0bf528SMauro Carvalho Chehab atbm8830_reglatch_lock(priv, 1); 3669a0bf528SMauro Carvalho Chehab 3679a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t); 3689a0bf528SMauro Carvalho Chehab frame_err = t & 0x7F; 3699a0bf528SMauro Carvalho Chehab frame_err <<= 8; 3709a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t); 3719a0bf528SMauro Carvalho Chehab frame_err |= t; 3729a0bf528SMauro Carvalho Chehab 3739a0bf528SMauro Carvalho Chehab atbm8830_reglatch_lock(priv, 0); 3749a0bf528SMauro Carvalho Chehab 3759a0bf528SMauro Carvalho Chehab *ber = frame_err * 100 / 32767; 3769a0bf528SMauro Carvalho Chehab 3779a0bf528SMauro Carvalho Chehab dprintk("%s: ber=0x%x\n", __func__, *ber); 3789a0bf528SMauro Carvalho Chehab return 0; 3799a0bf528SMauro Carvalho Chehab } 3809a0bf528SMauro Carvalho Chehab 3819a0bf528SMauro Carvalho Chehab static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal) 3829a0bf528SMauro Carvalho Chehab { 3839a0bf528SMauro Carvalho Chehab struct atbm_state *priv = fe->demodulator_priv; 3849a0bf528SMauro Carvalho Chehab u32 pwm; 3859a0bf528SMauro Carvalho Chehab u8 t; 3869a0bf528SMauro Carvalho Chehab 3879a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 3889a0bf528SMauro Carvalho Chehab atbm8830_reglatch_lock(priv, 1); 3899a0bf528SMauro Carvalho Chehab 3909a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t); 3919a0bf528SMauro Carvalho Chehab pwm = t & 0x03; 3929a0bf528SMauro Carvalho Chehab pwm <<= 8; 3939a0bf528SMauro Carvalho Chehab atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t); 3949a0bf528SMauro Carvalho Chehab pwm |= t; 3959a0bf528SMauro Carvalho Chehab 3969a0bf528SMauro Carvalho Chehab atbm8830_reglatch_lock(priv, 0); 3979a0bf528SMauro Carvalho Chehab 3989a0bf528SMauro Carvalho Chehab dprintk("AGC PWM = 0x%02X\n", pwm); 3999a0bf528SMauro Carvalho Chehab pwm = 0x400 - pwm; 4009a0bf528SMauro Carvalho Chehab 4019a0bf528SMauro Carvalho Chehab *signal = pwm * 0x10000 / 0x400; 4029a0bf528SMauro Carvalho Chehab 4039a0bf528SMauro Carvalho Chehab return 0; 4049a0bf528SMauro Carvalho Chehab } 4059a0bf528SMauro Carvalho Chehab 4069a0bf528SMauro Carvalho Chehab static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr) 4079a0bf528SMauro Carvalho Chehab { 4089a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 4099a0bf528SMauro Carvalho Chehab *snr = 0; 4109a0bf528SMauro Carvalho Chehab return 0; 4119a0bf528SMauro Carvalho Chehab } 4129a0bf528SMauro Carvalho Chehab 4139a0bf528SMauro Carvalho Chehab static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 4149a0bf528SMauro Carvalho Chehab { 4159a0bf528SMauro Carvalho Chehab dprintk("%s\n", __func__); 4169a0bf528SMauro Carvalho Chehab *ucblocks = 0; 4179a0bf528SMauro Carvalho Chehab return 0; 4189a0bf528SMauro Carvalho Chehab } 4199a0bf528SMauro Carvalho Chehab 4209a0bf528SMauro Carvalho Chehab static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) 4219a0bf528SMauro Carvalho Chehab { 4229a0bf528SMauro Carvalho Chehab struct atbm_state *priv = fe->demodulator_priv; 4239a0bf528SMauro Carvalho Chehab 4249a0bf528SMauro Carvalho Chehab return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0); 4259a0bf528SMauro Carvalho Chehab } 4269a0bf528SMauro Carvalho Chehab 427bd336e63SMax Kellermann static const struct dvb_frontend_ops atbm8830_ops = { 4289a0bf528SMauro Carvalho Chehab .delsys = { SYS_DTMB }, 4299a0bf528SMauro Carvalho Chehab .info = { 4309a0bf528SMauro Carvalho Chehab .name = "AltoBeam ATBM8830/8831 DMB-TH", 4319a0bf528SMauro Carvalho Chehab .frequency_min = 474000000, 4329a0bf528SMauro Carvalho Chehab .frequency_max = 858000000, 4339a0bf528SMauro Carvalho Chehab .frequency_stepsize = 10000, 4349a0bf528SMauro Carvalho Chehab .caps = 4359a0bf528SMauro Carvalho Chehab FE_CAN_FEC_AUTO | 4369a0bf528SMauro Carvalho Chehab FE_CAN_QAM_AUTO | 4379a0bf528SMauro Carvalho Chehab FE_CAN_TRANSMISSION_MODE_AUTO | 4389a0bf528SMauro Carvalho Chehab FE_CAN_GUARD_INTERVAL_AUTO 4399a0bf528SMauro Carvalho Chehab }, 4409a0bf528SMauro Carvalho Chehab 4419a0bf528SMauro Carvalho Chehab .release = atbm8830_release, 4429a0bf528SMauro Carvalho Chehab 4439a0bf528SMauro Carvalho Chehab .init = atbm8830_init, 4449a0bf528SMauro Carvalho Chehab .sleep = NULL, 4459a0bf528SMauro Carvalho Chehab .write = NULL, 4469a0bf528SMauro Carvalho Chehab .i2c_gate_ctrl = atbm8830_i2c_gate_ctrl, 4479a0bf528SMauro Carvalho Chehab 4489a0bf528SMauro Carvalho Chehab .set_frontend = atbm8830_set_fe, 4499a0bf528SMauro Carvalho Chehab .get_frontend = atbm8830_get_fe, 4509a0bf528SMauro Carvalho Chehab .get_tune_settings = atbm8830_get_tune_settings, 4519a0bf528SMauro Carvalho Chehab 4529a0bf528SMauro Carvalho Chehab .read_status = atbm8830_read_status, 4539a0bf528SMauro Carvalho Chehab .read_ber = atbm8830_read_ber, 4549a0bf528SMauro Carvalho Chehab .read_signal_strength = atbm8830_read_signal_strength, 4559a0bf528SMauro Carvalho Chehab .read_snr = atbm8830_read_snr, 4569a0bf528SMauro Carvalho Chehab .read_ucblocks = atbm8830_read_ucblocks, 4579a0bf528SMauro Carvalho Chehab }; 4589a0bf528SMauro Carvalho Chehab 4599a0bf528SMauro Carvalho Chehab struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config, 4609a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c) 4619a0bf528SMauro Carvalho Chehab { 4629a0bf528SMauro Carvalho Chehab struct atbm_state *priv = NULL; 4639a0bf528SMauro Carvalho Chehab u8 data = 0; 4649a0bf528SMauro Carvalho Chehab 4659a0bf528SMauro Carvalho Chehab dprintk("%s()\n", __func__); 4669a0bf528SMauro Carvalho Chehab 4679a0bf528SMauro Carvalho Chehab if (config == NULL || i2c == NULL) 4689a0bf528SMauro Carvalho Chehab return NULL; 4699a0bf528SMauro Carvalho Chehab 4709a0bf528SMauro Carvalho Chehab priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL); 4719a0bf528SMauro Carvalho Chehab if (priv == NULL) 4729a0bf528SMauro Carvalho Chehab goto error_out; 4739a0bf528SMauro Carvalho Chehab 4749a0bf528SMauro Carvalho Chehab priv->config = config; 4759a0bf528SMauro Carvalho Chehab priv->i2c = i2c; 4769a0bf528SMauro Carvalho Chehab 4779a0bf528SMauro Carvalho Chehab /* check if the demod is there */ 4789a0bf528SMauro Carvalho Chehab if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) { 4799a0bf528SMauro Carvalho Chehab dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n", 4809a0bf528SMauro Carvalho Chehab __func__, priv->config->demod_address); 4819a0bf528SMauro Carvalho Chehab goto error_out; 4829a0bf528SMauro Carvalho Chehab } 4839a0bf528SMauro Carvalho Chehab dprintk("atbm8830 chip id: 0x%02X\n", data); 4849a0bf528SMauro Carvalho Chehab 4859a0bf528SMauro Carvalho Chehab memcpy(&priv->frontend.ops, &atbm8830_ops, 4869a0bf528SMauro Carvalho Chehab sizeof(struct dvb_frontend_ops)); 4879a0bf528SMauro Carvalho Chehab priv->frontend.demodulator_priv = priv; 4889a0bf528SMauro Carvalho Chehab 4899a0bf528SMauro Carvalho Chehab atbm8830_init(&priv->frontend); 4909a0bf528SMauro Carvalho Chehab 4919a0bf528SMauro Carvalho Chehab atbm8830_i2c_gate_ctrl(&priv->frontend, 1); 4929a0bf528SMauro Carvalho Chehab 4939a0bf528SMauro Carvalho Chehab return &priv->frontend; 4949a0bf528SMauro Carvalho Chehab 4959a0bf528SMauro Carvalho Chehab error_out: 4969a0bf528SMauro Carvalho Chehab dprintk("%s() error_out\n", __func__); 4979a0bf528SMauro Carvalho Chehab kfree(priv); 4989a0bf528SMauro Carvalho Chehab return NULL; 4999a0bf528SMauro Carvalho Chehab 5009a0bf528SMauro Carvalho Chehab } 5019a0bf528SMauro Carvalho Chehab EXPORT_SYMBOL(atbm8830_attach); 5029a0bf528SMauro Carvalho Chehab 5039a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver"); 5049a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>"); 5059a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL"); 506