xref: /openbmc/linux/drivers/mailbox/ti-msgmgr.c (revision aace66b170ce7feda2d1860a81eefff37fa9d1d2)
1*aace66b1SNishanth Menon /*
2*aace66b1SNishanth Menon  * Texas Instruments' Message Manager Driver
3*aace66b1SNishanth Menon  *
4*aace66b1SNishanth Menon  * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
5*aace66b1SNishanth Menon  *	Nishanth Menon
6*aace66b1SNishanth Menon  *
7*aace66b1SNishanth Menon  * This program is free software; you can redistribute it and/or modify
8*aace66b1SNishanth Menon  * it under the terms of the GNU General Public License version 2 as
9*aace66b1SNishanth Menon  * published by the Free Software Foundation.
10*aace66b1SNishanth Menon  *
11*aace66b1SNishanth Menon  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12*aace66b1SNishanth Menon  * kind, whether express or implied; without even the implied warranty
13*aace66b1SNishanth Menon  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*aace66b1SNishanth Menon  * GNU General Public License for more details.
15*aace66b1SNishanth Menon  */
16*aace66b1SNishanth Menon 
17*aace66b1SNishanth Menon #define pr_fmt(fmt) "%s: " fmt, __func__
18*aace66b1SNishanth Menon 
19*aace66b1SNishanth Menon #include <linux/device.h>
20*aace66b1SNishanth Menon #include <linux/interrupt.h>
21*aace66b1SNishanth Menon #include <linux/io.h>
22*aace66b1SNishanth Menon #include <linux/kernel.h>
23*aace66b1SNishanth Menon #include <linux/mailbox_controller.h>
24*aace66b1SNishanth Menon #include <linux/module.h>
25*aace66b1SNishanth Menon #include <linux/of_device.h>
26*aace66b1SNishanth Menon #include <linux/of.h>
27*aace66b1SNishanth Menon #include <linux/of_irq.h>
28*aace66b1SNishanth Menon #include <linux/platform_device.h>
29*aace66b1SNishanth Menon #include <linux/soc/ti/ti-msgmgr.h>
30*aace66b1SNishanth Menon 
31*aace66b1SNishanth Menon #define Q_DATA_OFFSET(proxy, queue, reg)	\
32*aace66b1SNishanth Menon 		     ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4))
33*aace66b1SNishanth Menon #define Q_STATE_OFFSET(queue)			((queue) * 0x4)
34*aace66b1SNishanth Menon #define Q_STATE_ENTRY_COUNT_MASK		(0xFFF000)
35*aace66b1SNishanth Menon 
36*aace66b1SNishanth Menon /**
37*aace66b1SNishanth Menon  * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
38*aace66b1SNishanth Menon  * @queue_id:	Queue Number for this path
39*aace66b1SNishanth Menon  * @proxy_id:	Proxy ID representing the processor in SoC
40*aace66b1SNishanth Menon  * @is_tx:	Is this a receive path?
41*aace66b1SNishanth Menon  */
42*aace66b1SNishanth Menon struct ti_msgmgr_valid_queue_desc {
43*aace66b1SNishanth Menon 	u8 queue_id;
44*aace66b1SNishanth Menon 	u8 proxy_id;
45*aace66b1SNishanth Menon 	bool is_tx;
46*aace66b1SNishanth Menon };
47*aace66b1SNishanth Menon 
48*aace66b1SNishanth Menon /**
49*aace66b1SNishanth Menon  * struct ti_msgmgr_desc - Description of message manager integration
50*aace66b1SNishanth Menon  * @queue_count:	Number of Queues
51*aace66b1SNishanth Menon  * @max_message_size:	Message size in bytes
52*aace66b1SNishanth Menon  * @max_messages:	Number of messages
53*aace66b1SNishanth Menon  * @q_slices:		Number of queue engines
54*aace66b1SNishanth Menon  * @q_proxies:		Number of queue proxies per page
55*aace66b1SNishanth Menon  * @data_first_reg:	First data register for proxy data region
56*aace66b1SNishanth Menon  * @data_last_reg:	Last data register for proxy data region
57*aace66b1SNishanth Menon  * @tx_polled:		Do I need to use polled mechanism for tx
58*aace66b1SNishanth Menon  * @tx_poll_timeout_ms: Timeout in ms if polled
59*aace66b1SNishanth Menon  * @valid_queues:	List of Valid queues that the processor can access
60*aace66b1SNishanth Menon  * @num_valid_queues:	Number of valid queues
61*aace66b1SNishanth Menon  *
62*aace66b1SNishanth Menon  * This structure is used in of match data to describe how integration
63*aace66b1SNishanth Menon  * for a specific compatible SoC is done.
64*aace66b1SNishanth Menon  */
65*aace66b1SNishanth Menon struct ti_msgmgr_desc {
66*aace66b1SNishanth Menon 	u8 queue_count;
67*aace66b1SNishanth Menon 	u8 max_message_size;
68*aace66b1SNishanth Menon 	u8 max_messages;
69*aace66b1SNishanth Menon 	u8 q_slices;
70*aace66b1SNishanth Menon 	u8 q_proxies;
71*aace66b1SNishanth Menon 	u8 data_first_reg;
72*aace66b1SNishanth Menon 	u8 data_last_reg;
73*aace66b1SNishanth Menon 	bool tx_polled;
74*aace66b1SNishanth Menon 	int tx_poll_timeout_ms;
75*aace66b1SNishanth Menon 	const struct ti_msgmgr_valid_queue_desc *valid_queues;
76*aace66b1SNishanth Menon 	int num_valid_queues;
77*aace66b1SNishanth Menon };
78*aace66b1SNishanth Menon 
79*aace66b1SNishanth Menon /**
80*aace66b1SNishanth Menon  * struct ti_queue_inst - Description of a queue instance
81*aace66b1SNishanth Menon  * @name:	Queue Name
82*aace66b1SNishanth Menon  * @queue_id:	Queue Identifier as mapped on SoC
83*aace66b1SNishanth Menon  * @proxy_id:	Proxy Identifier as mapped on SoC
84*aace66b1SNishanth Menon  * @irq:	IRQ for Rx Queue
85*aace66b1SNishanth Menon  * @is_tx:	'true' if transmit queue, else, 'false'
86*aace66b1SNishanth Menon  * @queue_buff_start: First register of Data Buffer
87*aace66b1SNishanth Menon  * @queue_buff_end: Last (or confirmation) register of Data buffer
88*aace66b1SNishanth Menon  * @queue_state: Queue status register
89*aace66b1SNishanth Menon  * @chan:	Mailbox channel
90*aace66b1SNishanth Menon  * @rx_buff:	Receive buffer pointer allocated at probe, max_message_size
91*aace66b1SNishanth Menon  */
92*aace66b1SNishanth Menon struct ti_queue_inst {
93*aace66b1SNishanth Menon 	char name[30];
94*aace66b1SNishanth Menon 	u8 queue_id;
95*aace66b1SNishanth Menon 	u8 proxy_id;
96*aace66b1SNishanth Menon 	int irq;
97*aace66b1SNishanth Menon 	bool is_tx;
98*aace66b1SNishanth Menon 	void __iomem *queue_buff_start;
99*aace66b1SNishanth Menon 	void __iomem *queue_buff_end;
100*aace66b1SNishanth Menon 	void __iomem *queue_state;
101*aace66b1SNishanth Menon 	struct mbox_chan *chan;
102*aace66b1SNishanth Menon 	u32 *rx_buff;
103*aace66b1SNishanth Menon };
104*aace66b1SNishanth Menon 
105*aace66b1SNishanth Menon /**
106*aace66b1SNishanth Menon  * struct ti_msgmgr_inst - Description of a Message Manager Instance
107*aace66b1SNishanth Menon  * @dev:	device pointer corresponding to the Message Manager instance
108*aace66b1SNishanth Menon  * @desc:	Description of the SoC integration
109*aace66b1SNishanth Menon  * @queue_proxy_region:	Queue proxy region where queue buffers are located
110*aace66b1SNishanth Menon  * @queue_state_debug_region:	Queue status register regions
111*aace66b1SNishanth Menon  * @num_valid_queues:	Number of valid queues defined for the processor
112*aace66b1SNishanth Menon  *		Note: other queues are probably reserved for other processors
113*aace66b1SNishanth Menon  *		in the SoC.
114*aace66b1SNishanth Menon  * @qinsts:	Array of valid Queue Instances for the Processor
115*aace66b1SNishanth Menon  * @mbox:	Mailbox Controller
116*aace66b1SNishanth Menon  * @chans:	Array for channels corresponding to the Queue Instances.
117*aace66b1SNishanth Menon  */
118*aace66b1SNishanth Menon struct ti_msgmgr_inst {
119*aace66b1SNishanth Menon 	struct device *dev;
120*aace66b1SNishanth Menon 	const struct ti_msgmgr_desc *desc;
121*aace66b1SNishanth Menon 	void __iomem *queue_proxy_region;
122*aace66b1SNishanth Menon 	void __iomem *queue_state_debug_region;
123*aace66b1SNishanth Menon 	u8 num_valid_queues;
124*aace66b1SNishanth Menon 	struct ti_queue_inst *qinsts;
125*aace66b1SNishanth Menon 	struct mbox_controller mbox;
126*aace66b1SNishanth Menon 	struct mbox_chan *chans;
127*aace66b1SNishanth Menon };
128*aace66b1SNishanth Menon 
129*aace66b1SNishanth Menon /**
130*aace66b1SNishanth Menon  * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages
131*aace66b1SNishanth Menon  * @qinst:	Queue instance for which we check the number of pending messages
132*aace66b1SNishanth Menon  *
133*aace66b1SNishanth Menon  * Return: number of messages pending in the queue (0 == no pending messages)
134*aace66b1SNishanth Menon  */
135*aace66b1SNishanth Menon static inline int ti_msgmgr_queue_get_num_messages(struct ti_queue_inst *qinst)
136*aace66b1SNishanth Menon {
137*aace66b1SNishanth Menon 	u32 val;
138*aace66b1SNishanth Menon 
139*aace66b1SNishanth Menon 	/*
140*aace66b1SNishanth Menon 	 * We cannot use relaxed operation here - update may happen
141*aace66b1SNishanth Menon 	 * real-time.
142*aace66b1SNishanth Menon 	 */
143*aace66b1SNishanth Menon 	val = readl(qinst->queue_state) & Q_STATE_ENTRY_COUNT_MASK;
144*aace66b1SNishanth Menon 	val >>= __ffs(Q_STATE_ENTRY_COUNT_MASK);
145*aace66b1SNishanth Menon 
146*aace66b1SNishanth Menon 	return val;
147*aace66b1SNishanth Menon }
148*aace66b1SNishanth Menon 
149*aace66b1SNishanth Menon /**
150*aace66b1SNishanth Menon  * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue
151*aace66b1SNishanth Menon  * @irq:	Interrupt number
152*aace66b1SNishanth Menon  * @p:		Channel Pointer
153*aace66b1SNishanth Menon  *
154*aace66b1SNishanth Menon  * Return: -EINVAL if there is no instance
155*aace66b1SNishanth Menon  * IRQ_NONE if the interrupt is not ours.
156*aace66b1SNishanth Menon  * IRQ_HANDLED if the rx interrupt was successfully handled.
157*aace66b1SNishanth Menon  */
158*aace66b1SNishanth Menon static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p)
159*aace66b1SNishanth Menon {
160*aace66b1SNishanth Menon 	struct mbox_chan *chan = p;
161*aace66b1SNishanth Menon 	struct device *dev = chan->mbox->dev;
162*aace66b1SNishanth Menon 	struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
163*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst = chan->con_priv;
164*aace66b1SNishanth Menon 	const struct ti_msgmgr_desc *desc;
165*aace66b1SNishanth Menon 	int msg_count, num_words;
166*aace66b1SNishanth Menon 	struct ti_msgmgr_message message;
167*aace66b1SNishanth Menon 	void __iomem *data_reg;
168*aace66b1SNishanth Menon 	u32 *word_data;
169*aace66b1SNishanth Menon 
170*aace66b1SNishanth Menon 	if (WARN_ON(!inst)) {
171*aace66b1SNishanth Menon 		dev_err(dev, "no platform drv data??\n");
172*aace66b1SNishanth Menon 		return -EINVAL;
173*aace66b1SNishanth Menon 	}
174*aace66b1SNishanth Menon 
175*aace66b1SNishanth Menon 	/* Do I have an invalid interrupt source? */
176*aace66b1SNishanth Menon 	if (qinst->is_tx) {
177*aace66b1SNishanth Menon 		dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n",
178*aace66b1SNishanth Menon 			qinst->name);
179*aace66b1SNishanth Menon 		return IRQ_NONE;
180*aace66b1SNishanth Menon 	}
181*aace66b1SNishanth Menon 
182*aace66b1SNishanth Menon 	/* Do I actually have messages to read? */
183*aace66b1SNishanth Menon 	msg_count = ti_msgmgr_queue_get_num_messages(qinst);
184*aace66b1SNishanth Menon 	if (!msg_count) {
185*aace66b1SNishanth Menon 		/* Shared IRQ? */
186*aace66b1SNishanth Menon 		dev_dbg(dev, "Spurious event - 0 pending data!\n");
187*aace66b1SNishanth Menon 		return IRQ_NONE;
188*aace66b1SNishanth Menon 	}
189*aace66b1SNishanth Menon 
190*aace66b1SNishanth Menon 	/*
191*aace66b1SNishanth Menon 	 * I have no idea about the protocol being used to communicate with the
192*aace66b1SNishanth Menon 	 * remote producer - 0 could be valid data, so I wont make a judgement
193*aace66b1SNishanth Menon 	 * of how many bytes I should be reading. Let the client figure this
194*aace66b1SNishanth Menon 	 * out.. I just read the full message and pass it on..
195*aace66b1SNishanth Menon 	 */
196*aace66b1SNishanth Menon 	desc = inst->desc;
197*aace66b1SNishanth Menon 	message.len = desc->max_message_size;
198*aace66b1SNishanth Menon 	message.buf = (u8 *)qinst->rx_buff;
199*aace66b1SNishanth Menon 
200*aace66b1SNishanth Menon 	/*
201*aace66b1SNishanth Menon 	 * NOTE about register access involved here:
202*aace66b1SNishanth Menon 	 * the hardware block is implemented with 32bit access operations and no
203*aace66b1SNishanth Menon 	 * support for data splitting.  We don't want the hardware to misbehave
204*aace66b1SNishanth Menon 	 * with sub 32bit access - For example: if the last register read is
205*aace66b1SNishanth Menon 	 * split into byte wise access, it can result in the queue getting
206*aace66b1SNishanth Menon 	 * stuck or indeterminate behavior. An out of order read operation may
207*aace66b1SNishanth Menon 	 * result in weird data results as well.
208*aace66b1SNishanth Menon 	 * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead
209*aace66b1SNishanth Menon 	 * we depend on readl for the purpose.
210*aace66b1SNishanth Menon 	 *
211*aace66b1SNishanth Menon 	 * Also note that the final register read automatically marks the
212*aace66b1SNishanth Menon 	 * queue message as read.
213*aace66b1SNishanth Menon 	 */
214*aace66b1SNishanth Menon 	for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff,
215*aace66b1SNishanth Menon 	     num_words = (desc->max_message_size / sizeof(u32));
216*aace66b1SNishanth Menon 	     num_words; num_words--, data_reg += sizeof(u32), word_data++)
217*aace66b1SNishanth Menon 		*word_data = readl(data_reg);
218*aace66b1SNishanth Menon 
219*aace66b1SNishanth Menon 	/*
220*aace66b1SNishanth Menon 	 * Last register read automatically clears the IRQ if only 1 message
221*aace66b1SNishanth Menon 	 * is pending - so send the data up the stack..
222*aace66b1SNishanth Menon 	 * NOTE: Client is expected to be as optimal as possible, since
223*aace66b1SNishanth Menon 	 * we invoke the handler in IRQ context.
224*aace66b1SNishanth Menon 	 */
225*aace66b1SNishanth Menon 	mbox_chan_received_data(chan, (void *)&message);
226*aace66b1SNishanth Menon 
227*aace66b1SNishanth Menon 	return IRQ_HANDLED;
228*aace66b1SNishanth Menon }
229*aace66b1SNishanth Menon 
230*aace66b1SNishanth Menon /**
231*aace66b1SNishanth Menon  * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages.
232*aace66b1SNishanth Menon  * @chan:	Channel Pointer
233*aace66b1SNishanth Menon  *
234*aace66b1SNishanth Menon  * Return: 'true' if there is pending rx data, 'false' if there is none.
235*aace66b1SNishanth Menon  */
236*aace66b1SNishanth Menon static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan)
237*aace66b1SNishanth Menon {
238*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst = chan->con_priv;
239*aace66b1SNishanth Menon 	int msg_count;
240*aace66b1SNishanth Menon 
241*aace66b1SNishanth Menon 	if (qinst->is_tx)
242*aace66b1SNishanth Menon 		return false;
243*aace66b1SNishanth Menon 
244*aace66b1SNishanth Menon 	msg_count = ti_msgmgr_queue_get_num_messages(qinst);
245*aace66b1SNishanth Menon 
246*aace66b1SNishanth Menon 	return msg_count ? true : false;
247*aace66b1SNishanth Menon }
248*aace66b1SNishanth Menon 
249*aace66b1SNishanth Menon /**
250*aace66b1SNishanth Menon  * ti_msgmgr_last_tx_done() - See if all the tx messages are sent
251*aace66b1SNishanth Menon  * @chan:	Channel pointer
252*aace66b1SNishanth Menon  *
253*aace66b1SNishanth Menon  * Return: 'true' is no pending tx data, 'false' if there are any.
254*aace66b1SNishanth Menon  */
255*aace66b1SNishanth Menon static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan)
256*aace66b1SNishanth Menon {
257*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst = chan->con_priv;
258*aace66b1SNishanth Menon 	int msg_count;
259*aace66b1SNishanth Menon 
260*aace66b1SNishanth Menon 	if (!qinst->is_tx)
261*aace66b1SNishanth Menon 		return false;
262*aace66b1SNishanth Menon 
263*aace66b1SNishanth Menon 	msg_count = ti_msgmgr_queue_get_num_messages(qinst);
264*aace66b1SNishanth Menon 
265*aace66b1SNishanth Menon 	/* if we have any messages pending.. */
266*aace66b1SNishanth Menon 	return msg_count ? false : true;
267*aace66b1SNishanth Menon }
268*aace66b1SNishanth Menon 
269*aace66b1SNishanth Menon /**
270*aace66b1SNishanth Menon  * ti_msgmgr_send_data() - Send data
271*aace66b1SNishanth Menon  * @chan:	Channel Pointer
272*aace66b1SNishanth Menon  * @data:	ti_msgmgr_message * Message Pointer
273*aace66b1SNishanth Menon  *
274*aace66b1SNishanth Menon  * Return: 0 if all goes good, else appropriate error messages.
275*aace66b1SNishanth Menon  */
276*aace66b1SNishanth Menon static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data)
277*aace66b1SNishanth Menon {
278*aace66b1SNishanth Menon 	struct device *dev = chan->mbox->dev;
279*aace66b1SNishanth Menon 	struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
280*aace66b1SNishanth Menon 	const struct ti_msgmgr_desc *desc;
281*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst = chan->con_priv;
282*aace66b1SNishanth Menon 	int num_words, trail_bytes;
283*aace66b1SNishanth Menon 	struct ti_msgmgr_message *message = data;
284*aace66b1SNishanth Menon 	void __iomem *data_reg;
285*aace66b1SNishanth Menon 	u32 *word_data;
286*aace66b1SNishanth Menon 
287*aace66b1SNishanth Menon 	if (WARN_ON(!inst)) {
288*aace66b1SNishanth Menon 		dev_err(dev, "no platform drv data??\n");
289*aace66b1SNishanth Menon 		return -EINVAL;
290*aace66b1SNishanth Menon 	}
291*aace66b1SNishanth Menon 	desc = inst->desc;
292*aace66b1SNishanth Menon 
293*aace66b1SNishanth Menon 	if (desc->max_message_size < message->len) {
294*aace66b1SNishanth Menon 		dev_err(dev, "Queue %s message length %d > max %d\n",
295*aace66b1SNishanth Menon 			qinst->name, message->len, desc->max_message_size);
296*aace66b1SNishanth Menon 		return -EINVAL;
297*aace66b1SNishanth Menon 	}
298*aace66b1SNishanth Menon 
299*aace66b1SNishanth Menon 	/* NOTE: Constraints similar to rx path exists here as well */
300*aace66b1SNishanth Menon 	for (data_reg = qinst->queue_buff_start,
301*aace66b1SNishanth Menon 	     num_words = message->len / sizeof(u32),
302*aace66b1SNishanth Menon 	     word_data = (u32 *)message->buf;
303*aace66b1SNishanth Menon 	     num_words; num_words--, data_reg += sizeof(u32), word_data++)
304*aace66b1SNishanth Menon 		writel(*word_data, data_reg);
305*aace66b1SNishanth Menon 
306*aace66b1SNishanth Menon 	trail_bytes = message->len % sizeof(u32);
307*aace66b1SNishanth Menon 	if (trail_bytes) {
308*aace66b1SNishanth Menon 		u32 data_trail = *word_data;
309*aace66b1SNishanth Menon 
310*aace66b1SNishanth Menon 		/* Ensure all unused data is 0 */
311*aace66b1SNishanth Menon 		data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes));
312*aace66b1SNishanth Menon 		writel(data_trail, data_reg);
313*aace66b1SNishanth Menon 		data_reg++;
314*aace66b1SNishanth Menon 	}
315*aace66b1SNishanth Menon 	/*
316*aace66b1SNishanth Menon 	 * 'data_reg' indicates next register to write. If we did not already
317*aace66b1SNishanth Menon 	 * write on tx complete reg(last reg), we must do so for transmit
318*aace66b1SNishanth Menon 	 */
319*aace66b1SNishanth Menon 	if (data_reg <= qinst->queue_buff_end)
320*aace66b1SNishanth Menon 		writel(0, qinst->queue_buff_end);
321*aace66b1SNishanth Menon 
322*aace66b1SNishanth Menon 	return 0;
323*aace66b1SNishanth Menon }
324*aace66b1SNishanth Menon 
325*aace66b1SNishanth Menon /**
326*aace66b1SNishanth Menon  * ti_msgmgr_queue_startup() - Startup queue
327*aace66b1SNishanth Menon  * @chan:	Channel pointer
328*aace66b1SNishanth Menon  *
329*aace66b1SNishanth Menon  * Return: 0 if all goes good, else return corresponding error message
330*aace66b1SNishanth Menon  */
331*aace66b1SNishanth Menon static int ti_msgmgr_queue_startup(struct mbox_chan *chan)
332*aace66b1SNishanth Menon {
333*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst = chan->con_priv;
334*aace66b1SNishanth Menon 	struct device *dev = chan->mbox->dev;
335*aace66b1SNishanth Menon 	int ret;
336*aace66b1SNishanth Menon 
337*aace66b1SNishanth Menon 	if (!qinst->is_tx) {
338*aace66b1SNishanth Menon 		/*
339*aace66b1SNishanth Menon 		 * With the expectation that the IRQ might be shared in SoC
340*aace66b1SNishanth Menon 		 */
341*aace66b1SNishanth Menon 		ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt,
342*aace66b1SNishanth Menon 				  IRQF_SHARED, qinst->name, chan);
343*aace66b1SNishanth Menon 		if (ret) {
344*aace66b1SNishanth Menon 			dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n",
345*aace66b1SNishanth Menon 				qinst->irq, qinst->name, ret);
346*aace66b1SNishanth Menon 			return ret;
347*aace66b1SNishanth Menon 		}
348*aace66b1SNishanth Menon 	}
349*aace66b1SNishanth Menon 
350*aace66b1SNishanth Menon 	return 0;
351*aace66b1SNishanth Menon }
352*aace66b1SNishanth Menon 
353*aace66b1SNishanth Menon /**
354*aace66b1SNishanth Menon  * ti_msgmgr_queue_shutdown() - Shutdown the queue
355*aace66b1SNishanth Menon  * @chan:	Channel pointer
356*aace66b1SNishanth Menon  */
357*aace66b1SNishanth Menon static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan)
358*aace66b1SNishanth Menon {
359*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst = chan->con_priv;
360*aace66b1SNishanth Menon 
361*aace66b1SNishanth Menon 	if (!qinst->is_tx)
362*aace66b1SNishanth Menon 		free_irq(qinst->irq, chan);
363*aace66b1SNishanth Menon }
364*aace66b1SNishanth Menon 
365*aace66b1SNishanth Menon /**
366*aace66b1SNishanth Menon  * ti_msgmgr_of_xlate() - Translation of phandle to queue
367*aace66b1SNishanth Menon  * @mbox:	Mailbox controller
368*aace66b1SNishanth Menon  * @p:		phandle pointer
369*aace66b1SNishanth Menon  *
370*aace66b1SNishanth Menon  * Return: Mailbox channel corresponding to the queue, else return error
371*aace66b1SNishanth Menon  * pointer.
372*aace66b1SNishanth Menon  */
373*aace66b1SNishanth Menon static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox,
374*aace66b1SNishanth Menon 					    const struct of_phandle_args *p)
375*aace66b1SNishanth Menon {
376*aace66b1SNishanth Menon 	struct ti_msgmgr_inst *inst;
377*aace66b1SNishanth Menon 	int req_qid, req_pid;
378*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst;
379*aace66b1SNishanth Menon 	int i;
380*aace66b1SNishanth Menon 
381*aace66b1SNishanth Menon 	inst = container_of(mbox, struct ti_msgmgr_inst, mbox);
382*aace66b1SNishanth Menon 	if (WARN_ON(!inst))
383*aace66b1SNishanth Menon 		return ERR_PTR(-EINVAL);
384*aace66b1SNishanth Menon 
385*aace66b1SNishanth Menon 	/* #mbox-cells is 2 */
386*aace66b1SNishanth Menon 	if (p->args_count != 2) {
387*aace66b1SNishanth Menon 		dev_err(inst->dev, "Invalid arguments in dt[%d] instead of 2\n",
388*aace66b1SNishanth Menon 			p->args_count);
389*aace66b1SNishanth Menon 		return ERR_PTR(-EINVAL);
390*aace66b1SNishanth Menon 	}
391*aace66b1SNishanth Menon 	req_qid = p->args[0];
392*aace66b1SNishanth Menon 	req_pid = p->args[1];
393*aace66b1SNishanth Menon 
394*aace66b1SNishanth Menon 	for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues;
395*aace66b1SNishanth Menon 	     i++, qinst++) {
396*aace66b1SNishanth Menon 		if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id)
397*aace66b1SNishanth Menon 			return qinst->chan;
398*aace66b1SNishanth Menon 	}
399*aace66b1SNishanth Menon 
400*aace66b1SNishanth Menon 	dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %s\n",
401*aace66b1SNishanth Menon 		req_qid, req_pid, p->np->name);
402*aace66b1SNishanth Menon 	return ERR_PTR(-ENOENT);
403*aace66b1SNishanth Menon }
404*aace66b1SNishanth Menon 
405*aace66b1SNishanth Menon /**
406*aace66b1SNishanth Menon  * ti_msgmgr_queue_setup() - Setup data structures for each queue instance
407*aace66b1SNishanth Menon  * @idx:	index of the queue
408*aace66b1SNishanth Menon  * @dev:	pointer to the message manager device
409*aace66b1SNishanth Menon  * @np:		pointer to the of node
410*aace66b1SNishanth Menon  * @inst:	Queue instance pointer
411*aace66b1SNishanth Menon  * @d:		Message Manager instance description data
412*aace66b1SNishanth Menon  * @qd:		Queue description data
413*aace66b1SNishanth Menon  * @qinst:	Queue instance pointer
414*aace66b1SNishanth Menon  * @chan:	pointer to mailbox channel
415*aace66b1SNishanth Menon  *
416*aace66b1SNishanth Menon  * Return: 0 if all went well, else return corresponding error
417*aace66b1SNishanth Menon  */
418*aace66b1SNishanth Menon static int ti_msgmgr_queue_setup(int idx, struct device *dev,
419*aace66b1SNishanth Menon 				 struct device_node *np,
420*aace66b1SNishanth Menon 				 struct ti_msgmgr_inst *inst,
421*aace66b1SNishanth Menon 				 const struct ti_msgmgr_desc *d,
422*aace66b1SNishanth Menon 				 const struct ti_msgmgr_valid_queue_desc *qd,
423*aace66b1SNishanth Menon 				 struct ti_queue_inst *qinst,
424*aace66b1SNishanth Menon 				 struct mbox_chan *chan)
425*aace66b1SNishanth Menon {
426*aace66b1SNishanth Menon 	qinst->proxy_id = qd->proxy_id;
427*aace66b1SNishanth Menon 	qinst->queue_id = qd->queue_id;
428*aace66b1SNishanth Menon 
429*aace66b1SNishanth Menon 	if (qinst->queue_id > d->queue_count) {
430*aace66b1SNishanth Menon 		dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n",
431*aace66b1SNishanth Menon 			idx, qinst->queue_id, d->queue_count);
432*aace66b1SNishanth Menon 		return -ERANGE;
433*aace66b1SNishanth Menon 	}
434*aace66b1SNishanth Menon 
435*aace66b1SNishanth Menon 	qinst->is_tx = qd->is_tx;
436*aace66b1SNishanth Menon 	snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d",
437*aace66b1SNishanth Menon 		 dev_name(dev), qinst->is_tx ? "tx" : "rx", qinst->queue_id,
438*aace66b1SNishanth Menon 		 qinst->proxy_id);
439*aace66b1SNishanth Menon 
440*aace66b1SNishanth Menon 	if (!qinst->is_tx) {
441*aace66b1SNishanth Menon 		char of_rx_irq_name[7];
442*aace66b1SNishanth Menon 
443*aace66b1SNishanth Menon 		snprintf(of_rx_irq_name, sizeof(of_rx_irq_name),
444*aace66b1SNishanth Menon 			 "rx_%03d", qinst->queue_id);
445*aace66b1SNishanth Menon 
446*aace66b1SNishanth Menon 		qinst->irq = of_irq_get_byname(np, of_rx_irq_name);
447*aace66b1SNishanth Menon 		if (qinst->irq < 0) {
448*aace66b1SNishanth Menon 			dev_crit(dev,
449*aace66b1SNishanth Menon 				 "[%d]QID %d PID %d:No IRQ[%s]: %d\n",
450*aace66b1SNishanth Menon 				 idx, qinst->queue_id, qinst->proxy_id,
451*aace66b1SNishanth Menon 				 of_rx_irq_name, qinst->irq);
452*aace66b1SNishanth Menon 			return qinst->irq;
453*aace66b1SNishanth Menon 		}
454*aace66b1SNishanth Menon 		/* Allocate usage buffer for rx */
455*aace66b1SNishanth Menon 		qinst->rx_buff = devm_kzalloc(dev,
456*aace66b1SNishanth Menon 					      d->max_message_size, GFP_KERNEL);
457*aace66b1SNishanth Menon 		if (!qinst->rx_buff)
458*aace66b1SNishanth Menon 			return -ENOMEM;
459*aace66b1SNishanth Menon 	}
460*aace66b1SNishanth Menon 
461*aace66b1SNishanth Menon 	qinst->queue_buff_start = inst->queue_proxy_region +
462*aace66b1SNishanth Menon 	    Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_first_reg);
463*aace66b1SNishanth Menon 	qinst->queue_buff_end = inst->queue_proxy_region +
464*aace66b1SNishanth Menon 	    Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_last_reg);
465*aace66b1SNishanth Menon 	qinst->queue_state = inst->queue_state_debug_region +
466*aace66b1SNishanth Menon 	    Q_STATE_OFFSET(qinst->queue_id);
467*aace66b1SNishanth Menon 	qinst->chan = chan;
468*aace66b1SNishanth Menon 
469*aace66b1SNishanth Menon 	chan->con_priv = qinst;
470*aace66b1SNishanth Menon 
471*aace66b1SNishanth Menon 	dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n",
472*aace66b1SNishanth Menon 		idx, qinst->queue_id, qinst->proxy_id, qinst->irq,
473*aace66b1SNishanth Menon 		qinst->queue_buff_start, qinst->queue_buff_end);
474*aace66b1SNishanth Menon 	return 0;
475*aace66b1SNishanth Menon }
476*aace66b1SNishanth Menon 
477*aace66b1SNishanth Menon /* Queue operations */
478*aace66b1SNishanth Menon static const struct mbox_chan_ops ti_msgmgr_chan_ops = {
479*aace66b1SNishanth Menon 	.startup = ti_msgmgr_queue_startup,
480*aace66b1SNishanth Menon 	.shutdown = ti_msgmgr_queue_shutdown,
481*aace66b1SNishanth Menon 	.peek_data = ti_msgmgr_queue_peek_data,
482*aace66b1SNishanth Menon 	.last_tx_done = ti_msgmgr_last_tx_done,
483*aace66b1SNishanth Menon 	.send_data = ti_msgmgr_send_data,
484*aace66b1SNishanth Menon };
485*aace66b1SNishanth Menon 
486*aace66b1SNishanth Menon /* Keystone K2G SoC integration details */
487*aace66b1SNishanth Menon static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = {
488*aace66b1SNishanth Menon 	{.queue_id = 0, .proxy_id = 0, .is_tx = true,},
489*aace66b1SNishanth Menon 	{.queue_id = 1, .proxy_id = 0, .is_tx = true,},
490*aace66b1SNishanth Menon 	{.queue_id = 2, .proxy_id = 0, .is_tx = true,},
491*aace66b1SNishanth Menon 	{.queue_id = 3, .proxy_id = 0, .is_tx = true,},
492*aace66b1SNishanth Menon 	{.queue_id = 5, .proxy_id = 2, .is_tx = false,},
493*aace66b1SNishanth Menon 	{.queue_id = 56, .proxy_id = 1, .is_tx = true,},
494*aace66b1SNishanth Menon 	{.queue_id = 57, .proxy_id = 2, .is_tx = false,},
495*aace66b1SNishanth Menon 	{.queue_id = 58, .proxy_id = 3, .is_tx = true,},
496*aace66b1SNishanth Menon 	{.queue_id = 59, .proxy_id = 4, .is_tx = true,},
497*aace66b1SNishanth Menon 	{.queue_id = 60, .proxy_id = 5, .is_tx = true,},
498*aace66b1SNishanth Menon 	{.queue_id = 61, .proxy_id = 6, .is_tx = true,},
499*aace66b1SNishanth Menon };
500*aace66b1SNishanth Menon 
501*aace66b1SNishanth Menon static const struct ti_msgmgr_desc k2g_desc = {
502*aace66b1SNishanth Menon 	.queue_count = 64,
503*aace66b1SNishanth Menon 	.max_message_size = 64,
504*aace66b1SNishanth Menon 	.max_messages = 128,
505*aace66b1SNishanth Menon 	.q_slices = 1,
506*aace66b1SNishanth Menon 	.q_proxies = 1,
507*aace66b1SNishanth Menon 	.data_first_reg = 16,
508*aace66b1SNishanth Menon 	.data_last_reg = 31,
509*aace66b1SNishanth Menon 	.tx_polled = false,
510*aace66b1SNishanth Menon 	.valid_queues = k2g_valid_queues,
511*aace66b1SNishanth Menon 	.num_valid_queues = ARRAY_SIZE(k2g_valid_queues),
512*aace66b1SNishanth Menon };
513*aace66b1SNishanth Menon 
514*aace66b1SNishanth Menon static const struct of_device_id ti_msgmgr_of_match[] = {
515*aace66b1SNishanth Menon 	{.compatible = "ti,k2g-message-manager", .data = &k2g_desc},
516*aace66b1SNishanth Menon 	{ /* Sentinel */ }
517*aace66b1SNishanth Menon };
518*aace66b1SNishanth Menon MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match);
519*aace66b1SNishanth Menon 
520*aace66b1SNishanth Menon static int ti_msgmgr_probe(struct platform_device *pdev)
521*aace66b1SNishanth Menon {
522*aace66b1SNishanth Menon 	struct device *dev = &pdev->dev;
523*aace66b1SNishanth Menon 	const struct of_device_id *of_id;
524*aace66b1SNishanth Menon 	struct device_node *np;
525*aace66b1SNishanth Menon 	struct resource *res;
526*aace66b1SNishanth Menon 	const struct ti_msgmgr_desc *desc;
527*aace66b1SNishanth Menon 	struct ti_msgmgr_inst *inst;
528*aace66b1SNishanth Menon 	struct ti_queue_inst *qinst;
529*aace66b1SNishanth Menon 	struct mbox_controller *mbox;
530*aace66b1SNishanth Menon 	struct mbox_chan *chans;
531*aace66b1SNishanth Menon 	int queue_count;
532*aace66b1SNishanth Menon 	int i;
533*aace66b1SNishanth Menon 	int ret = -EINVAL;
534*aace66b1SNishanth Menon 	const struct ti_msgmgr_valid_queue_desc *queue_desc;
535*aace66b1SNishanth Menon 
536*aace66b1SNishanth Menon 	if (!dev->of_node) {
537*aace66b1SNishanth Menon 		dev_err(dev, "no OF information\n");
538*aace66b1SNishanth Menon 		return -EINVAL;
539*aace66b1SNishanth Menon 	}
540*aace66b1SNishanth Menon 	np = dev->of_node;
541*aace66b1SNishanth Menon 
542*aace66b1SNishanth Menon 	of_id = of_match_device(ti_msgmgr_of_match, dev);
543*aace66b1SNishanth Menon 	if (!of_id) {
544*aace66b1SNishanth Menon 		dev_err(dev, "OF data missing\n");
545*aace66b1SNishanth Menon 		return -EINVAL;
546*aace66b1SNishanth Menon 	}
547*aace66b1SNishanth Menon 	desc = of_id->data;
548*aace66b1SNishanth Menon 
549*aace66b1SNishanth Menon 	inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL);
550*aace66b1SNishanth Menon 	if (!inst)
551*aace66b1SNishanth Menon 		return -ENOMEM;
552*aace66b1SNishanth Menon 
553*aace66b1SNishanth Menon 	inst->dev = dev;
554*aace66b1SNishanth Menon 	inst->desc = desc;
555*aace66b1SNishanth Menon 
556*aace66b1SNishanth Menon 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
557*aace66b1SNishanth Menon 					   "queue_proxy_region");
558*aace66b1SNishanth Menon 	inst->queue_proxy_region = devm_ioremap_resource(dev, res);
559*aace66b1SNishanth Menon 	if (IS_ERR(inst->queue_proxy_region))
560*aace66b1SNishanth Menon 		return PTR_ERR(inst->queue_proxy_region);
561*aace66b1SNishanth Menon 
562*aace66b1SNishanth Menon 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
563*aace66b1SNishanth Menon 					   "queue_state_debug_region");
564*aace66b1SNishanth Menon 	inst->queue_state_debug_region = devm_ioremap_resource(dev, res);
565*aace66b1SNishanth Menon 	if (IS_ERR(inst->queue_state_debug_region))
566*aace66b1SNishanth Menon 		return PTR_ERR(inst->queue_state_debug_region);
567*aace66b1SNishanth Menon 
568*aace66b1SNishanth Menon 	dev_dbg(dev, "proxy region=%p, queue_state=%p\n",
569*aace66b1SNishanth Menon 		inst->queue_proxy_region, inst->queue_state_debug_region);
570*aace66b1SNishanth Menon 
571*aace66b1SNishanth Menon 	queue_count = desc->num_valid_queues;
572*aace66b1SNishanth Menon 	if (!queue_count || queue_count > desc->queue_count) {
573*aace66b1SNishanth Menon 		dev_crit(dev, "Invalid Number of queues %d. Max %d\n",
574*aace66b1SNishanth Menon 			 queue_count, desc->queue_count);
575*aace66b1SNishanth Menon 		return -ERANGE;
576*aace66b1SNishanth Menon 	}
577*aace66b1SNishanth Menon 	inst->num_valid_queues = queue_count;
578*aace66b1SNishanth Menon 
579*aace66b1SNishanth Menon 	qinst = devm_kzalloc(dev, sizeof(*qinst) * queue_count, GFP_KERNEL);
580*aace66b1SNishanth Menon 	if (!qinst)
581*aace66b1SNishanth Menon 		return -ENOMEM;
582*aace66b1SNishanth Menon 	inst->qinsts = qinst;
583*aace66b1SNishanth Menon 
584*aace66b1SNishanth Menon 	chans = devm_kzalloc(dev, sizeof(*chans) * queue_count, GFP_KERNEL);
585*aace66b1SNishanth Menon 	if (!chans)
586*aace66b1SNishanth Menon 		return -ENOMEM;
587*aace66b1SNishanth Menon 	inst->chans = chans;
588*aace66b1SNishanth Menon 
589*aace66b1SNishanth Menon 	for (i = 0, queue_desc = desc->valid_queues;
590*aace66b1SNishanth Menon 	     i < queue_count; i++, qinst++, chans++, queue_desc++) {
591*aace66b1SNishanth Menon 		ret = ti_msgmgr_queue_setup(i, dev, np, inst,
592*aace66b1SNishanth Menon 					    desc, queue_desc, qinst, chans);
593*aace66b1SNishanth Menon 		if (ret)
594*aace66b1SNishanth Menon 			return ret;
595*aace66b1SNishanth Menon 	}
596*aace66b1SNishanth Menon 
597*aace66b1SNishanth Menon 	mbox = &inst->mbox;
598*aace66b1SNishanth Menon 	mbox->dev = dev;
599*aace66b1SNishanth Menon 	mbox->ops = &ti_msgmgr_chan_ops;
600*aace66b1SNishanth Menon 	mbox->chans = inst->chans;
601*aace66b1SNishanth Menon 	mbox->num_chans = inst->num_valid_queues;
602*aace66b1SNishanth Menon 	mbox->txdone_irq = false;
603*aace66b1SNishanth Menon 	mbox->txdone_poll = desc->tx_polled;
604*aace66b1SNishanth Menon 	if (desc->tx_polled)
605*aace66b1SNishanth Menon 		mbox->txpoll_period = desc->tx_poll_timeout_ms;
606*aace66b1SNishanth Menon 	mbox->of_xlate = ti_msgmgr_of_xlate;
607*aace66b1SNishanth Menon 
608*aace66b1SNishanth Menon 	platform_set_drvdata(pdev, inst);
609*aace66b1SNishanth Menon 	ret = mbox_controller_register(mbox);
610*aace66b1SNishanth Menon 	if (ret)
611*aace66b1SNishanth Menon 		dev_err(dev, "Failed to register mbox_controller(%d)\n", ret);
612*aace66b1SNishanth Menon 
613*aace66b1SNishanth Menon 	return ret;
614*aace66b1SNishanth Menon }
615*aace66b1SNishanth Menon 
616*aace66b1SNishanth Menon static int ti_msgmgr_remove(struct platform_device *pdev)
617*aace66b1SNishanth Menon {
618*aace66b1SNishanth Menon 	struct ti_msgmgr_inst *inst;
619*aace66b1SNishanth Menon 
620*aace66b1SNishanth Menon 	inst = platform_get_drvdata(pdev);
621*aace66b1SNishanth Menon 	mbox_controller_unregister(&inst->mbox);
622*aace66b1SNishanth Menon 
623*aace66b1SNishanth Menon 	return 0;
624*aace66b1SNishanth Menon }
625*aace66b1SNishanth Menon 
626*aace66b1SNishanth Menon static struct platform_driver ti_msgmgr_driver = {
627*aace66b1SNishanth Menon 	.probe = ti_msgmgr_probe,
628*aace66b1SNishanth Menon 	.remove = ti_msgmgr_remove,
629*aace66b1SNishanth Menon 	.driver = {
630*aace66b1SNishanth Menon 		   .name = "ti-msgmgr",
631*aace66b1SNishanth Menon 		   .of_match_table = of_match_ptr(ti_msgmgr_of_match),
632*aace66b1SNishanth Menon 	},
633*aace66b1SNishanth Menon };
634*aace66b1SNishanth Menon module_platform_driver(ti_msgmgr_driver);
635*aace66b1SNishanth Menon 
636*aace66b1SNishanth Menon MODULE_LICENSE("GPL v2");
637*aace66b1SNishanth Menon MODULE_DESCRIPTION("TI message manager driver");
638*aace66b1SNishanth Menon MODULE_AUTHOR("Nishanth Menon");
639*aace66b1SNishanth Menon MODULE_ALIAS("platform:ti-msgmgr");
640