14f0ceb87SNishanth Menon // SPDX-License-Identifier: GPL-2.0 2aace66b1SNishanth Menon /* 3aace66b1SNishanth Menon * Texas Instruments' Message Manager Driver 4aace66b1SNishanth Menon * 54f0ceb87SNishanth Menon * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ 6aace66b1SNishanth Menon * Nishanth Menon 7aace66b1SNishanth Menon */ 8aace66b1SNishanth Menon 9aace66b1SNishanth Menon #define pr_fmt(fmt) "%s: " fmt, __func__ 10aace66b1SNishanth Menon 11aace66b1SNishanth Menon #include <linux/device.h> 12aace66b1SNishanth Menon #include <linux/interrupt.h> 13aace66b1SNishanth Menon #include <linux/io.h> 14aace66b1SNishanth Menon #include <linux/kernel.h> 15aace66b1SNishanth Menon #include <linux/mailbox_controller.h> 16aace66b1SNishanth Menon #include <linux/module.h> 17aace66b1SNishanth Menon #include <linux/of_device.h> 18aace66b1SNishanth Menon #include <linux/of.h> 19aace66b1SNishanth Menon #include <linux/of_irq.h> 20aace66b1SNishanth Menon #include <linux/platform_device.h> 21aace66b1SNishanth Menon #include <linux/soc/ti/ti-msgmgr.h> 22aace66b1SNishanth Menon 23aace66b1SNishanth Menon #define Q_DATA_OFFSET(proxy, queue, reg) \ 24aace66b1SNishanth Menon ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4)) 25aace66b1SNishanth Menon #define Q_STATE_OFFSET(queue) ((queue) * 0x4) 26aace66b1SNishanth Menon #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000) 27aace66b1SNishanth Menon 28aace66b1SNishanth Menon /** 29aace66b1SNishanth Menon * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor 30aace66b1SNishanth Menon * @queue_id: Queue Number for this path 31aace66b1SNishanth Menon * @proxy_id: Proxy ID representing the processor in SoC 32aace66b1SNishanth Menon * @is_tx: Is this a receive path? 33aace66b1SNishanth Menon */ 34aace66b1SNishanth Menon struct ti_msgmgr_valid_queue_desc { 35aace66b1SNishanth Menon u8 queue_id; 36aace66b1SNishanth Menon u8 proxy_id; 37aace66b1SNishanth Menon bool is_tx; 38aace66b1SNishanth Menon }; 39aace66b1SNishanth Menon 40aace66b1SNishanth Menon /** 41aace66b1SNishanth Menon * struct ti_msgmgr_desc - Description of message manager integration 42aace66b1SNishanth Menon * @queue_count: Number of Queues 43aace66b1SNishanth Menon * @max_message_size: Message size in bytes 44aace66b1SNishanth Menon * @max_messages: Number of messages 45aace66b1SNishanth Menon * @data_first_reg: First data register for proxy data region 46aace66b1SNishanth Menon * @data_last_reg: Last data register for proxy data region 47*8e560862SNishanth Menon * @status_cnt_mask: Mask for getting the status value 48aace66b1SNishanth Menon * @tx_polled: Do I need to use polled mechanism for tx 49aace66b1SNishanth Menon * @tx_poll_timeout_ms: Timeout in ms if polled 50aace66b1SNishanth Menon * @valid_queues: List of Valid queues that the processor can access 51aace66b1SNishanth Menon * @num_valid_queues: Number of valid queues 52aace66b1SNishanth Menon * 53aace66b1SNishanth Menon * This structure is used in of match data to describe how integration 54aace66b1SNishanth Menon * for a specific compatible SoC is done. 55aace66b1SNishanth Menon */ 56aace66b1SNishanth Menon struct ti_msgmgr_desc { 57aace66b1SNishanth Menon u8 queue_count; 58aace66b1SNishanth Menon u8 max_message_size; 59aace66b1SNishanth Menon u8 max_messages; 60aace66b1SNishanth Menon u8 data_first_reg; 61aace66b1SNishanth Menon u8 data_last_reg; 62*8e560862SNishanth Menon u32 status_cnt_mask; 63aace66b1SNishanth Menon bool tx_polled; 64aace66b1SNishanth Menon int tx_poll_timeout_ms; 65aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *valid_queues; 66aace66b1SNishanth Menon int num_valid_queues; 67aace66b1SNishanth Menon }; 68aace66b1SNishanth Menon 69aace66b1SNishanth Menon /** 70aace66b1SNishanth Menon * struct ti_queue_inst - Description of a queue instance 71aace66b1SNishanth Menon * @name: Queue Name 72aace66b1SNishanth Menon * @queue_id: Queue Identifier as mapped on SoC 73aace66b1SNishanth Menon * @proxy_id: Proxy Identifier as mapped on SoC 74aace66b1SNishanth Menon * @irq: IRQ for Rx Queue 75aace66b1SNishanth Menon * @is_tx: 'true' if transmit queue, else, 'false' 76aace66b1SNishanth Menon * @queue_buff_start: First register of Data Buffer 77aace66b1SNishanth Menon * @queue_buff_end: Last (or confirmation) register of Data buffer 78aace66b1SNishanth Menon * @queue_state: Queue status register 79aace66b1SNishanth Menon * @chan: Mailbox channel 80aace66b1SNishanth Menon * @rx_buff: Receive buffer pointer allocated at probe, max_message_size 81aace66b1SNishanth Menon */ 82aace66b1SNishanth Menon struct ti_queue_inst { 83aace66b1SNishanth Menon char name[30]; 84aace66b1SNishanth Menon u8 queue_id; 85aace66b1SNishanth Menon u8 proxy_id; 86aace66b1SNishanth Menon int irq; 87aace66b1SNishanth Menon bool is_tx; 88aace66b1SNishanth Menon void __iomem *queue_buff_start; 89aace66b1SNishanth Menon void __iomem *queue_buff_end; 90aace66b1SNishanth Menon void __iomem *queue_state; 91aace66b1SNishanth Menon struct mbox_chan *chan; 92aace66b1SNishanth Menon u32 *rx_buff; 93aace66b1SNishanth Menon }; 94aace66b1SNishanth Menon 95aace66b1SNishanth Menon /** 96aace66b1SNishanth Menon * struct ti_msgmgr_inst - Description of a Message Manager Instance 97aace66b1SNishanth Menon * @dev: device pointer corresponding to the Message Manager instance 98aace66b1SNishanth Menon * @desc: Description of the SoC integration 99aace66b1SNishanth Menon * @queue_proxy_region: Queue proxy region where queue buffers are located 100aace66b1SNishanth Menon * @queue_state_debug_region: Queue status register regions 101aace66b1SNishanth Menon * @num_valid_queues: Number of valid queues defined for the processor 102aace66b1SNishanth Menon * Note: other queues are probably reserved for other processors 103aace66b1SNishanth Menon * in the SoC. 104aace66b1SNishanth Menon * @qinsts: Array of valid Queue Instances for the Processor 105aace66b1SNishanth Menon * @mbox: Mailbox Controller 106aace66b1SNishanth Menon * @chans: Array for channels corresponding to the Queue Instances. 107aace66b1SNishanth Menon */ 108aace66b1SNishanth Menon struct ti_msgmgr_inst { 109aace66b1SNishanth Menon struct device *dev; 110aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 111aace66b1SNishanth Menon void __iomem *queue_proxy_region; 112aace66b1SNishanth Menon void __iomem *queue_state_debug_region; 113aace66b1SNishanth Menon u8 num_valid_queues; 114aace66b1SNishanth Menon struct ti_queue_inst *qinsts; 115aace66b1SNishanth Menon struct mbox_controller mbox; 116aace66b1SNishanth Menon struct mbox_chan *chans; 117aace66b1SNishanth Menon }; 118aace66b1SNishanth Menon 119aace66b1SNishanth Menon /** 120aace66b1SNishanth Menon * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages 121*8e560862SNishanth Menon * @d: Description of message manager 122aace66b1SNishanth Menon * @qinst: Queue instance for which we check the number of pending messages 123aace66b1SNishanth Menon * 124aace66b1SNishanth Menon * Return: number of messages pending in the queue (0 == no pending messages) 125aace66b1SNishanth Menon */ 126*8e560862SNishanth Menon static inline int 127*8e560862SNishanth Menon ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d, 128*8e560862SNishanth Menon struct ti_queue_inst *qinst) 129aace66b1SNishanth Menon { 130aace66b1SNishanth Menon u32 val; 131*8e560862SNishanth Menon u32 status_cnt_mask = d->status_cnt_mask; 132aace66b1SNishanth Menon 133aace66b1SNishanth Menon /* 134aace66b1SNishanth Menon * We cannot use relaxed operation here - update may happen 135aace66b1SNishanth Menon * real-time. 136aace66b1SNishanth Menon */ 137*8e560862SNishanth Menon val = readl(qinst->queue_state) & status_cnt_mask; 138*8e560862SNishanth Menon val >>= __ffs(status_cnt_mask); 139aace66b1SNishanth Menon 140aace66b1SNishanth Menon return val; 141aace66b1SNishanth Menon } 142aace66b1SNishanth Menon 143aace66b1SNishanth Menon /** 144aace66b1SNishanth Menon * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue 145aace66b1SNishanth Menon * @irq: Interrupt number 146aace66b1SNishanth Menon * @p: Channel Pointer 147aace66b1SNishanth Menon * 148aace66b1SNishanth Menon * Return: -EINVAL if there is no instance 149aace66b1SNishanth Menon * IRQ_NONE if the interrupt is not ours. 150aace66b1SNishanth Menon * IRQ_HANDLED if the rx interrupt was successfully handled. 151aace66b1SNishanth Menon */ 152aace66b1SNishanth Menon static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) 153aace66b1SNishanth Menon { 154aace66b1SNishanth Menon struct mbox_chan *chan = p; 155aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 156aace66b1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 157aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 158aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 159aace66b1SNishanth Menon int msg_count, num_words; 160aace66b1SNishanth Menon struct ti_msgmgr_message message; 161aace66b1SNishanth Menon void __iomem *data_reg; 162aace66b1SNishanth Menon u32 *word_data; 163aace66b1SNishanth Menon 164aace66b1SNishanth Menon if (WARN_ON(!inst)) { 165aace66b1SNishanth Menon dev_err(dev, "no platform drv data??\n"); 166aace66b1SNishanth Menon return -EINVAL; 167aace66b1SNishanth Menon } 168aace66b1SNishanth Menon 169aace66b1SNishanth Menon /* Do I have an invalid interrupt source? */ 170aace66b1SNishanth Menon if (qinst->is_tx) { 171aace66b1SNishanth Menon dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n", 172aace66b1SNishanth Menon qinst->name); 173aace66b1SNishanth Menon return IRQ_NONE; 174aace66b1SNishanth Menon } 175aace66b1SNishanth Menon 176*8e560862SNishanth Menon desc = inst->desc; 177aace66b1SNishanth Menon /* Do I actually have messages to read? */ 178*8e560862SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 179aace66b1SNishanth Menon if (!msg_count) { 180aace66b1SNishanth Menon /* Shared IRQ? */ 181aace66b1SNishanth Menon dev_dbg(dev, "Spurious event - 0 pending data!\n"); 182aace66b1SNishanth Menon return IRQ_NONE; 183aace66b1SNishanth Menon } 184aace66b1SNishanth Menon 185aace66b1SNishanth Menon /* 186aace66b1SNishanth Menon * I have no idea about the protocol being used to communicate with the 187aace66b1SNishanth Menon * remote producer - 0 could be valid data, so I wont make a judgement 188aace66b1SNishanth Menon * of how many bytes I should be reading. Let the client figure this 189aace66b1SNishanth Menon * out.. I just read the full message and pass it on.. 190aace66b1SNishanth Menon */ 191aace66b1SNishanth Menon message.len = desc->max_message_size; 192aace66b1SNishanth Menon message.buf = (u8 *)qinst->rx_buff; 193aace66b1SNishanth Menon 194aace66b1SNishanth Menon /* 195aace66b1SNishanth Menon * NOTE about register access involved here: 196aace66b1SNishanth Menon * the hardware block is implemented with 32bit access operations and no 197aace66b1SNishanth Menon * support for data splitting. We don't want the hardware to misbehave 198aace66b1SNishanth Menon * with sub 32bit access - For example: if the last register read is 199aace66b1SNishanth Menon * split into byte wise access, it can result in the queue getting 200aace66b1SNishanth Menon * stuck or indeterminate behavior. An out of order read operation may 201aace66b1SNishanth Menon * result in weird data results as well. 202aace66b1SNishanth Menon * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead 203aace66b1SNishanth Menon * we depend on readl for the purpose. 204aace66b1SNishanth Menon * 205aace66b1SNishanth Menon * Also note that the final register read automatically marks the 206aace66b1SNishanth Menon * queue message as read. 207aace66b1SNishanth Menon */ 208aace66b1SNishanth Menon for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff, 209aace66b1SNishanth Menon num_words = (desc->max_message_size / sizeof(u32)); 210aace66b1SNishanth Menon num_words; num_words--, data_reg += sizeof(u32), word_data++) 211aace66b1SNishanth Menon *word_data = readl(data_reg); 212aace66b1SNishanth Menon 213aace66b1SNishanth Menon /* 214aace66b1SNishanth Menon * Last register read automatically clears the IRQ if only 1 message 215aace66b1SNishanth Menon * is pending - so send the data up the stack.. 216aace66b1SNishanth Menon * NOTE: Client is expected to be as optimal as possible, since 217aace66b1SNishanth Menon * we invoke the handler in IRQ context. 218aace66b1SNishanth Menon */ 219aace66b1SNishanth Menon mbox_chan_received_data(chan, (void *)&message); 220aace66b1SNishanth Menon 221aace66b1SNishanth Menon return IRQ_HANDLED; 222aace66b1SNishanth Menon } 223aace66b1SNishanth Menon 224aace66b1SNishanth Menon /** 225aace66b1SNishanth Menon * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages. 226aace66b1SNishanth Menon * @chan: Channel Pointer 227aace66b1SNishanth Menon * 228aace66b1SNishanth Menon * Return: 'true' if there is pending rx data, 'false' if there is none. 229aace66b1SNishanth Menon */ 230aace66b1SNishanth Menon static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) 231aace66b1SNishanth Menon { 232aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 233*8e560862SNishanth Menon struct device *dev = chan->mbox->dev; 234*8e560862SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 235aace66b1SNishanth Menon int msg_count; 236aace66b1SNishanth Menon 237aace66b1SNishanth Menon if (qinst->is_tx) 238aace66b1SNishanth Menon return false; 239aace66b1SNishanth Menon 240*8e560862SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(inst->desc, qinst); 241aace66b1SNishanth Menon 242aace66b1SNishanth Menon return msg_count ? true : false; 243aace66b1SNishanth Menon } 244aace66b1SNishanth Menon 245aace66b1SNishanth Menon /** 246aace66b1SNishanth Menon * ti_msgmgr_last_tx_done() - See if all the tx messages are sent 247aace66b1SNishanth Menon * @chan: Channel pointer 248aace66b1SNishanth Menon * 249aace66b1SNishanth Menon * Return: 'true' is no pending tx data, 'false' if there are any. 250aace66b1SNishanth Menon */ 251aace66b1SNishanth Menon static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan) 252aace66b1SNishanth Menon { 253aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 254*8e560862SNishanth Menon struct device *dev = chan->mbox->dev; 255*8e560862SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 256aace66b1SNishanth Menon int msg_count; 257aace66b1SNishanth Menon 258aace66b1SNishanth Menon if (!qinst->is_tx) 259aace66b1SNishanth Menon return false; 260aace66b1SNishanth Menon 261*8e560862SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(inst->desc, qinst); 262aace66b1SNishanth Menon 263aace66b1SNishanth Menon /* if we have any messages pending.. */ 264aace66b1SNishanth Menon return msg_count ? false : true; 265aace66b1SNishanth Menon } 266aace66b1SNishanth Menon 267aace66b1SNishanth Menon /** 268aace66b1SNishanth Menon * ti_msgmgr_send_data() - Send data 269aace66b1SNishanth Menon * @chan: Channel Pointer 270aace66b1SNishanth Menon * @data: ti_msgmgr_message * Message Pointer 271aace66b1SNishanth Menon * 272aace66b1SNishanth Menon * Return: 0 if all goes good, else appropriate error messages. 273aace66b1SNishanth Menon */ 274aace66b1SNishanth Menon static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) 275aace66b1SNishanth Menon { 276aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 277aace66b1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 278aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 279aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 280aace66b1SNishanth Menon int num_words, trail_bytes; 281aace66b1SNishanth Menon struct ti_msgmgr_message *message = data; 282aace66b1SNishanth Menon void __iomem *data_reg; 283aace66b1SNishanth Menon u32 *word_data; 284aace66b1SNishanth Menon 285aace66b1SNishanth Menon if (WARN_ON(!inst)) { 286aace66b1SNishanth Menon dev_err(dev, "no platform drv data??\n"); 287aace66b1SNishanth Menon return -EINVAL; 288aace66b1SNishanth Menon } 289aace66b1SNishanth Menon desc = inst->desc; 290aace66b1SNishanth Menon 291aace66b1SNishanth Menon if (desc->max_message_size < message->len) { 292ca64af43SNishanth Menon dev_err(dev, "Queue %s message length %zu > max %d\n", 293aace66b1SNishanth Menon qinst->name, message->len, desc->max_message_size); 294aace66b1SNishanth Menon return -EINVAL; 295aace66b1SNishanth Menon } 296aace66b1SNishanth Menon 297aace66b1SNishanth Menon /* NOTE: Constraints similar to rx path exists here as well */ 298aace66b1SNishanth Menon for (data_reg = qinst->queue_buff_start, 299aace66b1SNishanth Menon num_words = message->len / sizeof(u32), 300aace66b1SNishanth Menon word_data = (u32 *)message->buf; 301aace66b1SNishanth Menon num_words; num_words--, data_reg += sizeof(u32), word_data++) 302aace66b1SNishanth Menon writel(*word_data, data_reg); 303aace66b1SNishanth Menon 304aace66b1SNishanth Menon trail_bytes = message->len % sizeof(u32); 305aace66b1SNishanth Menon if (trail_bytes) { 306aace66b1SNishanth Menon u32 data_trail = *word_data; 307aace66b1SNishanth Menon 308aace66b1SNishanth Menon /* Ensure all unused data is 0 */ 309aace66b1SNishanth Menon data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes)); 310aace66b1SNishanth Menon writel(data_trail, data_reg); 311aace66b1SNishanth Menon data_reg++; 312aace66b1SNishanth Menon } 313aace66b1SNishanth Menon /* 314aace66b1SNishanth Menon * 'data_reg' indicates next register to write. If we did not already 315aace66b1SNishanth Menon * write on tx complete reg(last reg), we must do so for transmit 316aace66b1SNishanth Menon */ 317aace66b1SNishanth Menon if (data_reg <= qinst->queue_buff_end) 318aace66b1SNishanth Menon writel(0, qinst->queue_buff_end); 319aace66b1SNishanth Menon 320aace66b1SNishanth Menon return 0; 321aace66b1SNishanth Menon } 322aace66b1SNishanth Menon 323aace66b1SNishanth Menon /** 3245ab935e1SNishanth Menon * ti_msgmgr_queue_rx_irq_req() - RX IRQ request 3255ab935e1SNishanth Menon * @dev: device pointer 3265ab935e1SNishanth Menon * @qinst: Queue instance 3275ab935e1SNishanth Menon * @chan: Channel pointer 3285ab935e1SNishanth Menon */ 3295ab935e1SNishanth Menon static int ti_msgmgr_queue_rx_irq_req(struct device *dev, 3305ab935e1SNishanth Menon struct ti_queue_inst *qinst, 3315ab935e1SNishanth Menon struct mbox_chan *chan) 3325ab935e1SNishanth Menon { 3335ab935e1SNishanth Menon int ret = 0; 3345ab935e1SNishanth Menon char of_rx_irq_name[7]; 3355ab935e1SNishanth Menon struct device_node *np; 3365ab935e1SNishanth Menon 3375ab935e1SNishanth Menon snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), 3385ab935e1SNishanth Menon "rx_%03d", qinst->queue_id); 3395ab935e1SNishanth Menon 3405ab935e1SNishanth Menon /* Get the IRQ if not found */ 3415ab935e1SNishanth Menon if (qinst->irq < 0) { 3425ab935e1SNishanth Menon np = of_node_get(dev->of_node); 3435ab935e1SNishanth Menon if (!np) 3445ab935e1SNishanth Menon return -ENODATA; 3455ab935e1SNishanth Menon qinst->irq = of_irq_get_byname(np, of_rx_irq_name); 3465ab935e1SNishanth Menon of_node_put(np); 3475ab935e1SNishanth Menon 3485ab935e1SNishanth Menon if (qinst->irq < 0) { 3495ab935e1SNishanth Menon dev_err(dev, 3505ab935e1SNishanth Menon "QID %d PID %d:No IRQ[%s]: %d\n", 3515ab935e1SNishanth Menon qinst->queue_id, qinst->proxy_id, 3525ab935e1SNishanth Menon of_rx_irq_name, qinst->irq); 3535ab935e1SNishanth Menon return qinst->irq; 3545ab935e1SNishanth Menon } 3555ab935e1SNishanth Menon } 3565ab935e1SNishanth Menon 3575ab935e1SNishanth Menon /* With the expectation that the IRQ might be shared in SoC */ 3585ab935e1SNishanth Menon ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt, 3595ab935e1SNishanth Menon IRQF_SHARED, qinst->name, chan); 3605ab935e1SNishanth Menon if (ret) { 3615ab935e1SNishanth Menon dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n", 3625ab935e1SNishanth Menon qinst->irq, qinst->name, ret); 3635ab935e1SNishanth Menon } 3645ab935e1SNishanth Menon 3655ab935e1SNishanth Menon return ret; 3665ab935e1SNishanth Menon } 3675ab935e1SNishanth Menon 3685ab935e1SNishanth Menon /** 369aace66b1SNishanth Menon * ti_msgmgr_queue_startup() - Startup queue 370aace66b1SNishanth Menon * @chan: Channel pointer 371aace66b1SNishanth Menon * 372aace66b1SNishanth Menon * Return: 0 if all goes good, else return corresponding error message 373aace66b1SNishanth Menon */ 374aace66b1SNishanth Menon static int ti_msgmgr_queue_startup(struct mbox_chan *chan) 375aace66b1SNishanth Menon { 376aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 3775ab935e1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 3785ab935e1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 3795ab935e1SNishanth Menon const struct ti_msgmgr_desc *d = inst->desc; 380aace66b1SNishanth Menon int ret; 381aace66b1SNishanth Menon 382aace66b1SNishanth Menon if (!qinst->is_tx) { 3835ab935e1SNishanth Menon /* Allocate usage buffer for rx */ 3845ab935e1SNishanth Menon qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL); 3855ab935e1SNishanth Menon if (!qinst->rx_buff) 3865ab935e1SNishanth Menon return -ENOMEM; 3875ab935e1SNishanth Menon /* Request IRQ */ 3885ab935e1SNishanth Menon ret = ti_msgmgr_queue_rx_irq_req(dev, qinst, chan); 389aace66b1SNishanth Menon if (ret) { 3905ab935e1SNishanth Menon kfree(qinst->rx_buff); 391aace66b1SNishanth Menon return ret; 392aace66b1SNishanth Menon } 393aace66b1SNishanth Menon } 394aace66b1SNishanth Menon 395aace66b1SNishanth Menon return 0; 396aace66b1SNishanth Menon } 397aace66b1SNishanth Menon 398aace66b1SNishanth Menon /** 399aace66b1SNishanth Menon * ti_msgmgr_queue_shutdown() - Shutdown the queue 400aace66b1SNishanth Menon * @chan: Channel pointer 401aace66b1SNishanth Menon */ 402aace66b1SNishanth Menon static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan) 403aace66b1SNishanth Menon { 404aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 405aace66b1SNishanth Menon 4065ab935e1SNishanth Menon if (!qinst->is_tx) { 407aace66b1SNishanth Menon free_irq(qinst->irq, chan); 4085ab935e1SNishanth Menon kfree(qinst->rx_buff); 4095ab935e1SNishanth Menon } 410aace66b1SNishanth Menon } 411aace66b1SNishanth Menon 412aace66b1SNishanth Menon /** 413aace66b1SNishanth Menon * ti_msgmgr_of_xlate() - Translation of phandle to queue 414aace66b1SNishanth Menon * @mbox: Mailbox controller 415aace66b1SNishanth Menon * @p: phandle pointer 416aace66b1SNishanth Menon * 417aace66b1SNishanth Menon * Return: Mailbox channel corresponding to the queue, else return error 418aace66b1SNishanth Menon * pointer. 419aace66b1SNishanth Menon */ 420aace66b1SNishanth Menon static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox, 421aace66b1SNishanth Menon const struct of_phandle_args *p) 422aace66b1SNishanth Menon { 423aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 424aace66b1SNishanth Menon int req_qid, req_pid; 425aace66b1SNishanth Menon struct ti_queue_inst *qinst; 426aace66b1SNishanth Menon int i; 427aace66b1SNishanth Menon 428aace66b1SNishanth Menon inst = container_of(mbox, struct ti_msgmgr_inst, mbox); 429aace66b1SNishanth Menon if (WARN_ON(!inst)) 430aace66b1SNishanth Menon return ERR_PTR(-EINVAL); 431aace66b1SNishanth Menon 432aace66b1SNishanth Menon /* #mbox-cells is 2 */ 433aace66b1SNishanth Menon if (p->args_count != 2) { 434aace66b1SNishanth Menon dev_err(inst->dev, "Invalid arguments in dt[%d] instead of 2\n", 435aace66b1SNishanth Menon p->args_count); 436aace66b1SNishanth Menon return ERR_PTR(-EINVAL); 437aace66b1SNishanth Menon } 438aace66b1SNishanth Menon req_qid = p->args[0]; 439aace66b1SNishanth Menon req_pid = p->args[1]; 440aace66b1SNishanth Menon 441aace66b1SNishanth Menon for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; 442aace66b1SNishanth Menon i++, qinst++) { 443aace66b1SNishanth Menon if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id) 444aace66b1SNishanth Menon return qinst->chan; 445aace66b1SNishanth Menon } 446aace66b1SNishanth Menon 447aace66b1SNishanth Menon dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %s\n", 448aace66b1SNishanth Menon req_qid, req_pid, p->np->name); 449aace66b1SNishanth Menon return ERR_PTR(-ENOENT); 450aace66b1SNishanth Menon } 451aace66b1SNishanth Menon 452aace66b1SNishanth Menon /** 453aace66b1SNishanth Menon * ti_msgmgr_queue_setup() - Setup data structures for each queue instance 454aace66b1SNishanth Menon * @idx: index of the queue 455aace66b1SNishanth Menon * @dev: pointer to the message manager device 456aace66b1SNishanth Menon * @np: pointer to the of node 457aace66b1SNishanth Menon * @inst: Queue instance pointer 458aace66b1SNishanth Menon * @d: Message Manager instance description data 459aace66b1SNishanth Menon * @qd: Queue description data 460aace66b1SNishanth Menon * @qinst: Queue instance pointer 461aace66b1SNishanth Menon * @chan: pointer to mailbox channel 462aace66b1SNishanth Menon * 463aace66b1SNishanth Menon * Return: 0 if all went well, else return corresponding error 464aace66b1SNishanth Menon */ 465aace66b1SNishanth Menon static int ti_msgmgr_queue_setup(int idx, struct device *dev, 466aace66b1SNishanth Menon struct device_node *np, 467aace66b1SNishanth Menon struct ti_msgmgr_inst *inst, 468aace66b1SNishanth Menon const struct ti_msgmgr_desc *d, 469aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *qd, 470aace66b1SNishanth Menon struct ti_queue_inst *qinst, 471aace66b1SNishanth Menon struct mbox_chan *chan) 472aace66b1SNishanth Menon { 473aace66b1SNishanth Menon qinst->proxy_id = qd->proxy_id; 474aace66b1SNishanth Menon qinst->queue_id = qd->queue_id; 475aace66b1SNishanth Menon 476aace66b1SNishanth Menon if (qinst->queue_id > d->queue_count) { 477aace66b1SNishanth Menon dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n", 478aace66b1SNishanth Menon idx, qinst->queue_id, d->queue_count); 479aace66b1SNishanth Menon return -ERANGE; 480aace66b1SNishanth Menon } 481aace66b1SNishanth Menon 482aace66b1SNishanth Menon qinst->is_tx = qd->is_tx; 483aace66b1SNishanth Menon snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d", 484aace66b1SNishanth Menon dev_name(dev), qinst->is_tx ? "tx" : "rx", qinst->queue_id, 485aace66b1SNishanth Menon qinst->proxy_id); 486aace66b1SNishanth Menon 487aace66b1SNishanth Menon qinst->queue_buff_start = inst->queue_proxy_region + 488aace66b1SNishanth Menon Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_first_reg); 489aace66b1SNishanth Menon qinst->queue_buff_end = inst->queue_proxy_region + 490aace66b1SNishanth Menon Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_last_reg); 491aace66b1SNishanth Menon qinst->queue_state = inst->queue_state_debug_region + 492aace66b1SNishanth Menon Q_STATE_OFFSET(qinst->queue_id); 493aace66b1SNishanth Menon qinst->chan = chan; 494aace66b1SNishanth Menon 4955ab935e1SNishanth Menon /* Setup an error value for IRQ - Lazy allocation */ 4965ab935e1SNishanth Menon qinst->irq = -EINVAL; 4975ab935e1SNishanth Menon 498aace66b1SNishanth Menon chan->con_priv = qinst; 499aace66b1SNishanth Menon 500aace66b1SNishanth Menon dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n", 501aace66b1SNishanth Menon idx, qinst->queue_id, qinst->proxy_id, qinst->irq, 502aace66b1SNishanth Menon qinst->queue_buff_start, qinst->queue_buff_end); 503aace66b1SNishanth Menon return 0; 504aace66b1SNishanth Menon } 505aace66b1SNishanth Menon 506aace66b1SNishanth Menon /* Queue operations */ 507aace66b1SNishanth Menon static const struct mbox_chan_ops ti_msgmgr_chan_ops = { 508aace66b1SNishanth Menon .startup = ti_msgmgr_queue_startup, 509aace66b1SNishanth Menon .shutdown = ti_msgmgr_queue_shutdown, 510aace66b1SNishanth Menon .peek_data = ti_msgmgr_queue_peek_data, 511aace66b1SNishanth Menon .last_tx_done = ti_msgmgr_last_tx_done, 512aace66b1SNishanth Menon .send_data = ti_msgmgr_send_data, 513aace66b1SNishanth Menon }; 514aace66b1SNishanth Menon 515aace66b1SNishanth Menon /* Keystone K2G SoC integration details */ 516aace66b1SNishanth Menon static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = { 517aace66b1SNishanth Menon {.queue_id = 0, .proxy_id = 0, .is_tx = true,}, 518aace66b1SNishanth Menon {.queue_id = 1, .proxy_id = 0, .is_tx = true,}, 519aace66b1SNishanth Menon {.queue_id = 2, .proxy_id = 0, .is_tx = true,}, 520aace66b1SNishanth Menon {.queue_id = 3, .proxy_id = 0, .is_tx = true,}, 521aace66b1SNishanth Menon {.queue_id = 5, .proxy_id = 2, .is_tx = false,}, 522aace66b1SNishanth Menon {.queue_id = 56, .proxy_id = 1, .is_tx = true,}, 523aace66b1SNishanth Menon {.queue_id = 57, .proxy_id = 2, .is_tx = false,}, 524aace66b1SNishanth Menon {.queue_id = 58, .proxy_id = 3, .is_tx = true,}, 525aace66b1SNishanth Menon {.queue_id = 59, .proxy_id = 4, .is_tx = true,}, 526aace66b1SNishanth Menon {.queue_id = 60, .proxy_id = 5, .is_tx = true,}, 527aace66b1SNishanth Menon {.queue_id = 61, .proxy_id = 6, .is_tx = true,}, 528aace66b1SNishanth Menon }; 529aace66b1SNishanth Menon 530aace66b1SNishanth Menon static const struct ti_msgmgr_desc k2g_desc = { 531aace66b1SNishanth Menon .queue_count = 64, 532aace66b1SNishanth Menon .max_message_size = 64, 533aace66b1SNishanth Menon .max_messages = 128, 534aace66b1SNishanth Menon .data_first_reg = 16, 535aace66b1SNishanth Menon .data_last_reg = 31, 536*8e560862SNishanth Menon .status_cnt_mask = Q_STATE_ENTRY_COUNT_MASK, 537aace66b1SNishanth Menon .tx_polled = false, 538aace66b1SNishanth Menon .valid_queues = k2g_valid_queues, 539aace66b1SNishanth Menon .num_valid_queues = ARRAY_SIZE(k2g_valid_queues), 540aace66b1SNishanth Menon }; 541aace66b1SNishanth Menon 542aace66b1SNishanth Menon static const struct of_device_id ti_msgmgr_of_match[] = { 543aace66b1SNishanth Menon {.compatible = "ti,k2g-message-manager", .data = &k2g_desc}, 544aace66b1SNishanth Menon { /* Sentinel */ } 545aace66b1SNishanth Menon }; 546aace66b1SNishanth Menon MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match); 547aace66b1SNishanth Menon 548aace66b1SNishanth Menon static int ti_msgmgr_probe(struct platform_device *pdev) 549aace66b1SNishanth Menon { 550aace66b1SNishanth Menon struct device *dev = &pdev->dev; 551aace66b1SNishanth Menon const struct of_device_id *of_id; 552aace66b1SNishanth Menon struct device_node *np; 553aace66b1SNishanth Menon struct resource *res; 554aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 555aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 556aace66b1SNishanth Menon struct ti_queue_inst *qinst; 557aace66b1SNishanth Menon struct mbox_controller *mbox; 558aace66b1SNishanth Menon struct mbox_chan *chans; 559aace66b1SNishanth Menon int queue_count; 560aace66b1SNishanth Menon int i; 561aace66b1SNishanth Menon int ret = -EINVAL; 562aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *queue_desc; 563aace66b1SNishanth Menon 564aace66b1SNishanth Menon if (!dev->of_node) { 565aace66b1SNishanth Menon dev_err(dev, "no OF information\n"); 566aace66b1SNishanth Menon return -EINVAL; 567aace66b1SNishanth Menon } 568aace66b1SNishanth Menon np = dev->of_node; 569aace66b1SNishanth Menon 570aace66b1SNishanth Menon of_id = of_match_device(ti_msgmgr_of_match, dev); 571aace66b1SNishanth Menon if (!of_id) { 572aace66b1SNishanth Menon dev_err(dev, "OF data missing\n"); 573aace66b1SNishanth Menon return -EINVAL; 574aace66b1SNishanth Menon } 575aace66b1SNishanth Menon desc = of_id->data; 576aace66b1SNishanth Menon 577aace66b1SNishanth Menon inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL); 578aace66b1SNishanth Menon if (!inst) 579aace66b1SNishanth Menon return -ENOMEM; 580aace66b1SNishanth Menon 581aace66b1SNishanth Menon inst->dev = dev; 582aace66b1SNishanth Menon inst->desc = desc; 583aace66b1SNishanth Menon 584aace66b1SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 585aace66b1SNishanth Menon "queue_proxy_region"); 586aace66b1SNishanth Menon inst->queue_proxy_region = devm_ioremap_resource(dev, res); 587aace66b1SNishanth Menon if (IS_ERR(inst->queue_proxy_region)) 588aace66b1SNishanth Menon return PTR_ERR(inst->queue_proxy_region); 589aace66b1SNishanth Menon 590aace66b1SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 591aace66b1SNishanth Menon "queue_state_debug_region"); 592aace66b1SNishanth Menon inst->queue_state_debug_region = devm_ioremap_resource(dev, res); 593aace66b1SNishanth Menon if (IS_ERR(inst->queue_state_debug_region)) 594aace66b1SNishanth Menon return PTR_ERR(inst->queue_state_debug_region); 595aace66b1SNishanth Menon 596aace66b1SNishanth Menon dev_dbg(dev, "proxy region=%p, queue_state=%p\n", 597aace66b1SNishanth Menon inst->queue_proxy_region, inst->queue_state_debug_region); 598aace66b1SNishanth Menon 599aace66b1SNishanth Menon queue_count = desc->num_valid_queues; 600aace66b1SNishanth Menon if (!queue_count || queue_count > desc->queue_count) { 601aace66b1SNishanth Menon dev_crit(dev, "Invalid Number of queues %d. Max %d\n", 602aace66b1SNishanth Menon queue_count, desc->queue_count); 603aace66b1SNishanth Menon return -ERANGE; 604aace66b1SNishanth Menon } 605aace66b1SNishanth Menon inst->num_valid_queues = queue_count; 606aace66b1SNishanth Menon 607a86854d0SKees Cook qinst = devm_kcalloc(dev, queue_count, sizeof(*qinst), GFP_KERNEL); 608aace66b1SNishanth Menon if (!qinst) 609aace66b1SNishanth Menon return -ENOMEM; 610aace66b1SNishanth Menon inst->qinsts = qinst; 611aace66b1SNishanth Menon 612a86854d0SKees Cook chans = devm_kcalloc(dev, queue_count, sizeof(*chans), GFP_KERNEL); 613aace66b1SNishanth Menon if (!chans) 614aace66b1SNishanth Menon return -ENOMEM; 615aace66b1SNishanth Menon inst->chans = chans; 616aace66b1SNishanth Menon 617aace66b1SNishanth Menon for (i = 0, queue_desc = desc->valid_queues; 618aace66b1SNishanth Menon i < queue_count; i++, qinst++, chans++, queue_desc++) { 619aace66b1SNishanth Menon ret = ti_msgmgr_queue_setup(i, dev, np, inst, 620aace66b1SNishanth Menon desc, queue_desc, qinst, chans); 621aace66b1SNishanth Menon if (ret) 622aace66b1SNishanth Menon return ret; 623aace66b1SNishanth Menon } 624aace66b1SNishanth Menon 625aace66b1SNishanth Menon mbox = &inst->mbox; 626aace66b1SNishanth Menon mbox->dev = dev; 627aace66b1SNishanth Menon mbox->ops = &ti_msgmgr_chan_ops; 628aace66b1SNishanth Menon mbox->chans = inst->chans; 629aace66b1SNishanth Menon mbox->num_chans = inst->num_valid_queues; 630aace66b1SNishanth Menon mbox->txdone_irq = false; 631aace66b1SNishanth Menon mbox->txdone_poll = desc->tx_polled; 632aace66b1SNishanth Menon if (desc->tx_polled) 633aace66b1SNishanth Menon mbox->txpoll_period = desc->tx_poll_timeout_ms; 634aace66b1SNishanth Menon mbox->of_xlate = ti_msgmgr_of_xlate; 635aace66b1SNishanth Menon 636aace66b1SNishanth Menon platform_set_drvdata(pdev, inst); 637aace66b1SNishanth Menon ret = mbox_controller_register(mbox); 638aace66b1SNishanth Menon if (ret) 639aace66b1SNishanth Menon dev_err(dev, "Failed to register mbox_controller(%d)\n", ret); 640aace66b1SNishanth Menon 641aace66b1SNishanth Menon return ret; 642aace66b1SNishanth Menon } 643aace66b1SNishanth Menon 644aace66b1SNishanth Menon static int ti_msgmgr_remove(struct platform_device *pdev) 645aace66b1SNishanth Menon { 646aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 647aace66b1SNishanth Menon 648aace66b1SNishanth Menon inst = platform_get_drvdata(pdev); 649aace66b1SNishanth Menon mbox_controller_unregister(&inst->mbox); 650aace66b1SNishanth Menon 651aace66b1SNishanth Menon return 0; 652aace66b1SNishanth Menon } 653aace66b1SNishanth Menon 654aace66b1SNishanth Menon static struct platform_driver ti_msgmgr_driver = { 655aace66b1SNishanth Menon .probe = ti_msgmgr_probe, 656aace66b1SNishanth Menon .remove = ti_msgmgr_remove, 657aace66b1SNishanth Menon .driver = { 658aace66b1SNishanth Menon .name = "ti-msgmgr", 659aace66b1SNishanth Menon .of_match_table = of_match_ptr(ti_msgmgr_of_match), 660aace66b1SNishanth Menon }, 661aace66b1SNishanth Menon }; 662aace66b1SNishanth Menon module_platform_driver(ti_msgmgr_driver); 663aace66b1SNishanth Menon 664aace66b1SNishanth Menon MODULE_LICENSE("GPL v2"); 665aace66b1SNishanth Menon MODULE_DESCRIPTION("TI message manager driver"); 666aace66b1SNishanth Menon MODULE_AUTHOR("Nishanth Menon"); 667aace66b1SNishanth Menon MODULE_ALIAS("platform:ti-msgmgr"); 668