14f0ceb87SNishanth Menon // SPDX-License-Identifier: GPL-2.0 2aace66b1SNishanth Menon /* 3aace66b1SNishanth Menon * Texas Instruments' Message Manager Driver 4aace66b1SNishanth Menon * 54f0ceb87SNishanth Menon * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ 6aace66b1SNishanth Menon * Nishanth Menon 7aace66b1SNishanth Menon */ 8aace66b1SNishanth Menon 9aace66b1SNishanth Menon #define pr_fmt(fmt) "%s: " fmt, __func__ 10aace66b1SNishanth Menon 11aace66b1SNishanth Menon #include <linux/device.h> 12aace66b1SNishanth Menon #include <linux/interrupt.h> 13aace66b1SNishanth Menon #include <linux/io.h> 14aace66b1SNishanth Menon #include <linux/kernel.h> 15aace66b1SNishanth Menon #include <linux/mailbox_controller.h> 16aace66b1SNishanth Menon #include <linux/module.h> 17aace66b1SNishanth Menon #include <linux/of_device.h> 18aace66b1SNishanth Menon #include <linux/of.h> 19aace66b1SNishanth Menon #include <linux/of_irq.h> 20aace66b1SNishanth Menon #include <linux/platform_device.h> 21aace66b1SNishanth Menon #include <linux/soc/ti/ti-msgmgr.h> 22aace66b1SNishanth Menon 23aace66b1SNishanth Menon #define Q_DATA_OFFSET(proxy, queue, reg) \ 24aace66b1SNishanth Menon ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4)) 25aace66b1SNishanth Menon #define Q_STATE_OFFSET(queue) ((queue) * 0x4) 26aace66b1SNishanth Menon #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000) 27aace66b1SNishanth Menon 28aace66b1SNishanth Menon /** 29aace66b1SNishanth Menon * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor 30aace66b1SNishanth Menon * @queue_id: Queue Number for this path 31aace66b1SNishanth Menon * @proxy_id: Proxy ID representing the processor in SoC 32aace66b1SNishanth Menon * @is_tx: Is this a receive path? 33aace66b1SNishanth Menon */ 34aace66b1SNishanth Menon struct ti_msgmgr_valid_queue_desc { 35aace66b1SNishanth Menon u8 queue_id; 36aace66b1SNishanth Menon u8 proxy_id; 37aace66b1SNishanth Menon bool is_tx; 38aace66b1SNishanth Menon }; 39aace66b1SNishanth Menon 40aace66b1SNishanth Menon /** 41aace66b1SNishanth Menon * struct ti_msgmgr_desc - Description of message manager integration 42aace66b1SNishanth Menon * @queue_count: Number of Queues 43aace66b1SNishanth Menon * @max_message_size: Message size in bytes 44aace66b1SNishanth Menon * @max_messages: Number of messages 45aace66b1SNishanth Menon * @data_first_reg: First data register for proxy data region 46aace66b1SNishanth Menon * @data_last_reg: Last data register for proxy data region 47aace66b1SNishanth Menon * @tx_polled: Do I need to use polled mechanism for tx 48aace66b1SNishanth Menon * @tx_poll_timeout_ms: Timeout in ms if polled 49aace66b1SNishanth Menon * @valid_queues: List of Valid queues that the processor can access 50aace66b1SNishanth Menon * @num_valid_queues: Number of valid queues 51aace66b1SNishanth Menon * 52aace66b1SNishanth Menon * This structure is used in of match data to describe how integration 53aace66b1SNishanth Menon * for a specific compatible SoC is done. 54aace66b1SNishanth Menon */ 55aace66b1SNishanth Menon struct ti_msgmgr_desc { 56aace66b1SNishanth Menon u8 queue_count; 57aace66b1SNishanth Menon u8 max_message_size; 58aace66b1SNishanth Menon u8 max_messages; 59aace66b1SNishanth Menon u8 data_first_reg; 60aace66b1SNishanth Menon u8 data_last_reg; 61aace66b1SNishanth Menon bool tx_polled; 62aace66b1SNishanth Menon int tx_poll_timeout_ms; 63aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *valid_queues; 64aace66b1SNishanth Menon int num_valid_queues; 65aace66b1SNishanth Menon }; 66aace66b1SNishanth Menon 67aace66b1SNishanth Menon /** 68aace66b1SNishanth Menon * struct ti_queue_inst - Description of a queue instance 69aace66b1SNishanth Menon * @name: Queue Name 70aace66b1SNishanth Menon * @queue_id: Queue Identifier as mapped on SoC 71aace66b1SNishanth Menon * @proxy_id: Proxy Identifier as mapped on SoC 72aace66b1SNishanth Menon * @irq: IRQ for Rx Queue 73aace66b1SNishanth Menon * @is_tx: 'true' if transmit queue, else, 'false' 74aace66b1SNishanth Menon * @queue_buff_start: First register of Data Buffer 75aace66b1SNishanth Menon * @queue_buff_end: Last (or confirmation) register of Data buffer 76aace66b1SNishanth Menon * @queue_state: Queue status register 77aace66b1SNishanth Menon * @chan: Mailbox channel 78aace66b1SNishanth Menon * @rx_buff: Receive buffer pointer allocated at probe, max_message_size 79aace66b1SNishanth Menon */ 80aace66b1SNishanth Menon struct ti_queue_inst { 81aace66b1SNishanth Menon char name[30]; 82aace66b1SNishanth Menon u8 queue_id; 83aace66b1SNishanth Menon u8 proxy_id; 84aace66b1SNishanth Menon int irq; 85aace66b1SNishanth Menon bool is_tx; 86aace66b1SNishanth Menon void __iomem *queue_buff_start; 87aace66b1SNishanth Menon void __iomem *queue_buff_end; 88aace66b1SNishanth Menon void __iomem *queue_state; 89aace66b1SNishanth Menon struct mbox_chan *chan; 90aace66b1SNishanth Menon u32 *rx_buff; 91aace66b1SNishanth Menon }; 92aace66b1SNishanth Menon 93aace66b1SNishanth Menon /** 94aace66b1SNishanth Menon * struct ti_msgmgr_inst - Description of a Message Manager Instance 95aace66b1SNishanth Menon * @dev: device pointer corresponding to the Message Manager instance 96aace66b1SNishanth Menon * @desc: Description of the SoC integration 97aace66b1SNishanth Menon * @queue_proxy_region: Queue proxy region where queue buffers are located 98aace66b1SNishanth Menon * @queue_state_debug_region: Queue status register regions 99aace66b1SNishanth Menon * @num_valid_queues: Number of valid queues defined for the processor 100aace66b1SNishanth Menon * Note: other queues are probably reserved for other processors 101aace66b1SNishanth Menon * in the SoC. 102aace66b1SNishanth Menon * @qinsts: Array of valid Queue Instances for the Processor 103aace66b1SNishanth Menon * @mbox: Mailbox Controller 104aace66b1SNishanth Menon * @chans: Array for channels corresponding to the Queue Instances. 105aace66b1SNishanth Menon */ 106aace66b1SNishanth Menon struct ti_msgmgr_inst { 107aace66b1SNishanth Menon struct device *dev; 108aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 109aace66b1SNishanth Menon void __iomem *queue_proxy_region; 110aace66b1SNishanth Menon void __iomem *queue_state_debug_region; 111aace66b1SNishanth Menon u8 num_valid_queues; 112aace66b1SNishanth Menon struct ti_queue_inst *qinsts; 113aace66b1SNishanth Menon struct mbox_controller mbox; 114aace66b1SNishanth Menon struct mbox_chan *chans; 115aace66b1SNishanth Menon }; 116aace66b1SNishanth Menon 117aace66b1SNishanth Menon /** 118aace66b1SNishanth Menon * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages 119aace66b1SNishanth Menon * @qinst: Queue instance for which we check the number of pending messages 120aace66b1SNishanth Menon * 121aace66b1SNishanth Menon * Return: number of messages pending in the queue (0 == no pending messages) 122aace66b1SNishanth Menon */ 123aace66b1SNishanth Menon static inline int ti_msgmgr_queue_get_num_messages(struct ti_queue_inst *qinst) 124aace66b1SNishanth Menon { 125aace66b1SNishanth Menon u32 val; 126aace66b1SNishanth Menon 127aace66b1SNishanth Menon /* 128aace66b1SNishanth Menon * We cannot use relaxed operation here - update may happen 129aace66b1SNishanth Menon * real-time. 130aace66b1SNishanth Menon */ 131aace66b1SNishanth Menon val = readl(qinst->queue_state) & Q_STATE_ENTRY_COUNT_MASK; 132aace66b1SNishanth Menon val >>= __ffs(Q_STATE_ENTRY_COUNT_MASK); 133aace66b1SNishanth Menon 134aace66b1SNishanth Menon return val; 135aace66b1SNishanth Menon } 136aace66b1SNishanth Menon 137aace66b1SNishanth Menon /** 138aace66b1SNishanth Menon * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue 139aace66b1SNishanth Menon * @irq: Interrupt number 140aace66b1SNishanth Menon * @p: Channel Pointer 141aace66b1SNishanth Menon * 142aace66b1SNishanth Menon * Return: -EINVAL if there is no instance 143aace66b1SNishanth Menon * IRQ_NONE if the interrupt is not ours. 144aace66b1SNishanth Menon * IRQ_HANDLED if the rx interrupt was successfully handled. 145aace66b1SNishanth Menon */ 146aace66b1SNishanth Menon static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) 147aace66b1SNishanth Menon { 148aace66b1SNishanth Menon struct mbox_chan *chan = p; 149aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 150aace66b1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 151aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 152aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 153aace66b1SNishanth Menon int msg_count, num_words; 154aace66b1SNishanth Menon struct ti_msgmgr_message message; 155aace66b1SNishanth Menon void __iomem *data_reg; 156aace66b1SNishanth Menon u32 *word_data; 157aace66b1SNishanth Menon 158aace66b1SNishanth Menon if (WARN_ON(!inst)) { 159aace66b1SNishanth Menon dev_err(dev, "no platform drv data??\n"); 160aace66b1SNishanth Menon return -EINVAL; 161aace66b1SNishanth Menon } 162aace66b1SNishanth Menon 163aace66b1SNishanth Menon /* Do I have an invalid interrupt source? */ 164aace66b1SNishanth Menon if (qinst->is_tx) { 165aace66b1SNishanth Menon dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n", 166aace66b1SNishanth Menon qinst->name); 167aace66b1SNishanth Menon return IRQ_NONE; 168aace66b1SNishanth Menon } 169aace66b1SNishanth Menon 170aace66b1SNishanth Menon /* Do I actually have messages to read? */ 171aace66b1SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(qinst); 172aace66b1SNishanth Menon if (!msg_count) { 173aace66b1SNishanth Menon /* Shared IRQ? */ 174aace66b1SNishanth Menon dev_dbg(dev, "Spurious event - 0 pending data!\n"); 175aace66b1SNishanth Menon return IRQ_NONE; 176aace66b1SNishanth Menon } 177aace66b1SNishanth Menon 178aace66b1SNishanth Menon /* 179aace66b1SNishanth Menon * I have no idea about the protocol being used to communicate with the 180aace66b1SNishanth Menon * remote producer - 0 could be valid data, so I wont make a judgement 181aace66b1SNishanth Menon * of how many bytes I should be reading. Let the client figure this 182aace66b1SNishanth Menon * out.. I just read the full message and pass it on.. 183aace66b1SNishanth Menon */ 184aace66b1SNishanth Menon desc = inst->desc; 185aace66b1SNishanth Menon message.len = desc->max_message_size; 186aace66b1SNishanth Menon message.buf = (u8 *)qinst->rx_buff; 187aace66b1SNishanth Menon 188aace66b1SNishanth Menon /* 189aace66b1SNishanth Menon * NOTE about register access involved here: 190aace66b1SNishanth Menon * the hardware block is implemented with 32bit access operations and no 191aace66b1SNishanth Menon * support for data splitting. We don't want the hardware to misbehave 192aace66b1SNishanth Menon * with sub 32bit access - For example: if the last register read is 193aace66b1SNishanth Menon * split into byte wise access, it can result in the queue getting 194aace66b1SNishanth Menon * stuck or indeterminate behavior. An out of order read operation may 195aace66b1SNishanth Menon * result in weird data results as well. 196aace66b1SNishanth Menon * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead 197aace66b1SNishanth Menon * we depend on readl for the purpose. 198aace66b1SNishanth Menon * 199aace66b1SNishanth Menon * Also note that the final register read automatically marks the 200aace66b1SNishanth Menon * queue message as read. 201aace66b1SNishanth Menon */ 202aace66b1SNishanth Menon for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff, 203aace66b1SNishanth Menon num_words = (desc->max_message_size / sizeof(u32)); 204aace66b1SNishanth Menon num_words; num_words--, data_reg += sizeof(u32), word_data++) 205aace66b1SNishanth Menon *word_data = readl(data_reg); 206aace66b1SNishanth Menon 207aace66b1SNishanth Menon /* 208aace66b1SNishanth Menon * Last register read automatically clears the IRQ if only 1 message 209aace66b1SNishanth Menon * is pending - so send the data up the stack.. 210aace66b1SNishanth Menon * NOTE: Client is expected to be as optimal as possible, since 211aace66b1SNishanth Menon * we invoke the handler in IRQ context. 212aace66b1SNishanth Menon */ 213aace66b1SNishanth Menon mbox_chan_received_data(chan, (void *)&message); 214aace66b1SNishanth Menon 215aace66b1SNishanth Menon return IRQ_HANDLED; 216aace66b1SNishanth Menon } 217aace66b1SNishanth Menon 218aace66b1SNishanth Menon /** 219aace66b1SNishanth Menon * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages. 220aace66b1SNishanth Menon * @chan: Channel Pointer 221aace66b1SNishanth Menon * 222aace66b1SNishanth Menon * Return: 'true' if there is pending rx data, 'false' if there is none. 223aace66b1SNishanth Menon */ 224aace66b1SNishanth Menon static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) 225aace66b1SNishanth Menon { 226aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 227aace66b1SNishanth Menon int msg_count; 228aace66b1SNishanth Menon 229aace66b1SNishanth Menon if (qinst->is_tx) 230aace66b1SNishanth Menon return false; 231aace66b1SNishanth Menon 232aace66b1SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(qinst); 233aace66b1SNishanth Menon 234aace66b1SNishanth Menon return msg_count ? true : false; 235aace66b1SNishanth Menon } 236aace66b1SNishanth Menon 237aace66b1SNishanth Menon /** 238aace66b1SNishanth Menon * ti_msgmgr_last_tx_done() - See if all the tx messages are sent 239aace66b1SNishanth Menon * @chan: Channel pointer 240aace66b1SNishanth Menon * 241aace66b1SNishanth Menon * Return: 'true' is no pending tx data, 'false' if there are any. 242aace66b1SNishanth Menon */ 243aace66b1SNishanth Menon static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan) 244aace66b1SNishanth Menon { 245aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 246aace66b1SNishanth Menon int msg_count; 247aace66b1SNishanth Menon 248aace66b1SNishanth Menon if (!qinst->is_tx) 249aace66b1SNishanth Menon return false; 250aace66b1SNishanth Menon 251aace66b1SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(qinst); 252aace66b1SNishanth Menon 253aace66b1SNishanth Menon /* if we have any messages pending.. */ 254aace66b1SNishanth Menon return msg_count ? false : true; 255aace66b1SNishanth Menon } 256aace66b1SNishanth Menon 257aace66b1SNishanth Menon /** 258aace66b1SNishanth Menon * ti_msgmgr_send_data() - Send data 259aace66b1SNishanth Menon * @chan: Channel Pointer 260aace66b1SNishanth Menon * @data: ti_msgmgr_message * Message Pointer 261aace66b1SNishanth Menon * 262aace66b1SNishanth Menon * Return: 0 if all goes good, else appropriate error messages. 263aace66b1SNishanth Menon */ 264aace66b1SNishanth Menon static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) 265aace66b1SNishanth Menon { 266aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 267aace66b1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 268aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 269aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 270aace66b1SNishanth Menon int num_words, trail_bytes; 271aace66b1SNishanth Menon struct ti_msgmgr_message *message = data; 272aace66b1SNishanth Menon void __iomem *data_reg; 273aace66b1SNishanth Menon u32 *word_data; 274aace66b1SNishanth Menon 275aace66b1SNishanth Menon if (WARN_ON(!inst)) { 276aace66b1SNishanth Menon dev_err(dev, "no platform drv data??\n"); 277aace66b1SNishanth Menon return -EINVAL; 278aace66b1SNishanth Menon } 279aace66b1SNishanth Menon desc = inst->desc; 280aace66b1SNishanth Menon 281aace66b1SNishanth Menon if (desc->max_message_size < message->len) { 282ca64af43SNishanth Menon dev_err(dev, "Queue %s message length %zu > max %d\n", 283aace66b1SNishanth Menon qinst->name, message->len, desc->max_message_size); 284aace66b1SNishanth Menon return -EINVAL; 285aace66b1SNishanth Menon } 286aace66b1SNishanth Menon 287aace66b1SNishanth Menon /* NOTE: Constraints similar to rx path exists here as well */ 288aace66b1SNishanth Menon for (data_reg = qinst->queue_buff_start, 289aace66b1SNishanth Menon num_words = message->len / sizeof(u32), 290aace66b1SNishanth Menon word_data = (u32 *)message->buf; 291aace66b1SNishanth Menon num_words; num_words--, data_reg += sizeof(u32), word_data++) 292aace66b1SNishanth Menon writel(*word_data, data_reg); 293aace66b1SNishanth Menon 294aace66b1SNishanth Menon trail_bytes = message->len % sizeof(u32); 295aace66b1SNishanth Menon if (trail_bytes) { 296aace66b1SNishanth Menon u32 data_trail = *word_data; 297aace66b1SNishanth Menon 298aace66b1SNishanth Menon /* Ensure all unused data is 0 */ 299aace66b1SNishanth Menon data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes)); 300aace66b1SNishanth Menon writel(data_trail, data_reg); 301aace66b1SNishanth Menon data_reg++; 302aace66b1SNishanth Menon } 303aace66b1SNishanth Menon /* 304aace66b1SNishanth Menon * 'data_reg' indicates next register to write. If we did not already 305aace66b1SNishanth Menon * write on tx complete reg(last reg), we must do so for transmit 306aace66b1SNishanth Menon */ 307aace66b1SNishanth Menon if (data_reg <= qinst->queue_buff_end) 308aace66b1SNishanth Menon writel(0, qinst->queue_buff_end); 309aace66b1SNishanth Menon 310aace66b1SNishanth Menon return 0; 311aace66b1SNishanth Menon } 312aace66b1SNishanth Menon 313aace66b1SNishanth Menon /** 314*5ab935e1SNishanth Menon * ti_msgmgr_queue_rx_irq_req() - RX IRQ request 315*5ab935e1SNishanth Menon * @dev: device pointer 316*5ab935e1SNishanth Menon * @qinst: Queue instance 317*5ab935e1SNishanth Menon * @chan: Channel pointer 318*5ab935e1SNishanth Menon */ 319*5ab935e1SNishanth Menon static int ti_msgmgr_queue_rx_irq_req(struct device *dev, 320*5ab935e1SNishanth Menon struct ti_queue_inst *qinst, 321*5ab935e1SNishanth Menon struct mbox_chan *chan) 322*5ab935e1SNishanth Menon { 323*5ab935e1SNishanth Menon int ret = 0; 324*5ab935e1SNishanth Menon char of_rx_irq_name[7]; 325*5ab935e1SNishanth Menon struct device_node *np; 326*5ab935e1SNishanth Menon 327*5ab935e1SNishanth Menon snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), 328*5ab935e1SNishanth Menon "rx_%03d", qinst->queue_id); 329*5ab935e1SNishanth Menon 330*5ab935e1SNishanth Menon /* Get the IRQ if not found */ 331*5ab935e1SNishanth Menon if (qinst->irq < 0) { 332*5ab935e1SNishanth Menon np = of_node_get(dev->of_node); 333*5ab935e1SNishanth Menon if (!np) 334*5ab935e1SNishanth Menon return -ENODATA; 335*5ab935e1SNishanth Menon qinst->irq = of_irq_get_byname(np, of_rx_irq_name); 336*5ab935e1SNishanth Menon of_node_put(np); 337*5ab935e1SNishanth Menon 338*5ab935e1SNishanth Menon if (qinst->irq < 0) { 339*5ab935e1SNishanth Menon dev_err(dev, 340*5ab935e1SNishanth Menon "QID %d PID %d:No IRQ[%s]: %d\n", 341*5ab935e1SNishanth Menon qinst->queue_id, qinst->proxy_id, 342*5ab935e1SNishanth Menon of_rx_irq_name, qinst->irq); 343*5ab935e1SNishanth Menon return qinst->irq; 344*5ab935e1SNishanth Menon } 345*5ab935e1SNishanth Menon } 346*5ab935e1SNishanth Menon 347*5ab935e1SNishanth Menon /* With the expectation that the IRQ might be shared in SoC */ 348*5ab935e1SNishanth Menon ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt, 349*5ab935e1SNishanth Menon IRQF_SHARED, qinst->name, chan); 350*5ab935e1SNishanth Menon if (ret) { 351*5ab935e1SNishanth Menon dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n", 352*5ab935e1SNishanth Menon qinst->irq, qinst->name, ret); 353*5ab935e1SNishanth Menon } 354*5ab935e1SNishanth Menon 355*5ab935e1SNishanth Menon return ret; 356*5ab935e1SNishanth Menon } 357*5ab935e1SNishanth Menon 358*5ab935e1SNishanth Menon /** 359aace66b1SNishanth Menon * ti_msgmgr_queue_startup() - Startup queue 360aace66b1SNishanth Menon * @chan: Channel pointer 361aace66b1SNishanth Menon * 362aace66b1SNishanth Menon * Return: 0 if all goes good, else return corresponding error message 363aace66b1SNishanth Menon */ 364aace66b1SNishanth Menon static int ti_msgmgr_queue_startup(struct mbox_chan *chan) 365aace66b1SNishanth Menon { 366aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 367*5ab935e1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 368*5ab935e1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 369*5ab935e1SNishanth Menon const struct ti_msgmgr_desc *d = inst->desc; 370aace66b1SNishanth Menon int ret; 371aace66b1SNishanth Menon 372aace66b1SNishanth Menon if (!qinst->is_tx) { 373*5ab935e1SNishanth Menon /* Allocate usage buffer for rx */ 374*5ab935e1SNishanth Menon qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL); 375*5ab935e1SNishanth Menon if (!qinst->rx_buff) 376*5ab935e1SNishanth Menon return -ENOMEM; 377*5ab935e1SNishanth Menon /* Request IRQ */ 378*5ab935e1SNishanth Menon ret = ti_msgmgr_queue_rx_irq_req(dev, qinst, chan); 379aace66b1SNishanth Menon if (ret) { 380*5ab935e1SNishanth Menon kfree(qinst->rx_buff); 381aace66b1SNishanth Menon return ret; 382aace66b1SNishanth Menon } 383aace66b1SNishanth Menon } 384aace66b1SNishanth Menon 385aace66b1SNishanth Menon return 0; 386aace66b1SNishanth Menon } 387aace66b1SNishanth Menon 388aace66b1SNishanth Menon /** 389aace66b1SNishanth Menon * ti_msgmgr_queue_shutdown() - Shutdown the queue 390aace66b1SNishanth Menon * @chan: Channel pointer 391aace66b1SNishanth Menon */ 392aace66b1SNishanth Menon static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan) 393aace66b1SNishanth Menon { 394aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 395aace66b1SNishanth Menon 396*5ab935e1SNishanth Menon if (!qinst->is_tx) { 397aace66b1SNishanth Menon free_irq(qinst->irq, chan); 398*5ab935e1SNishanth Menon kfree(qinst->rx_buff); 399*5ab935e1SNishanth Menon } 400aace66b1SNishanth Menon } 401aace66b1SNishanth Menon 402aace66b1SNishanth Menon /** 403aace66b1SNishanth Menon * ti_msgmgr_of_xlate() - Translation of phandle to queue 404aace66b1SNishanth Menon * @mbox: Mailbox controller 405aace66b1SNishanth Menon * @p: phandle pointer 406aace66b1SNishanth Menon * 407aace66b1SNishanth Menon * Return: Mailbox channel corresponding to the queue, else return error 408aace66b1SNishanth Menon * pointer. 409aace66b1SNishanth Menon */ 410aace66b1SNishanth Menon static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox, 411aace66b1SNishanth Menon const struct of_phandle_args *p) 412aace66b1SNishanth Menon { 413aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 414aace66b1SNishanth Menon int req_qid, req_pid; 415aace66b1SNishanth Menon struct ti_queue_inst *qinst; 416aace66b1SNishanth Menon int i; 417aace66b1SNishanth Menon 418aace66b1SNishanth Menon inst = container_of(mbox, struct ti_msgmgr_inst, mbox); 419aace66b1SNishanth Menon if (WARN_ON(!inst)) 420aace66b1SNishanth Menon return ERR_PTR(-EINVAL); 421aace66b1SNishanth Menon 422aace66b1SNishanth Menon /* #mbox-cells is 2 */ 423aace66b1SNishanth Menon if (p->args_count != 2) { 424aace66b1SNishanth Menon dev_err(inst->dev, "Invalid arguments in dt[%d] instead of 2\n", 425aace66b1SNishanth Menon p->args_count); 426aace66b1SNishanth Menon return ERR_PTR(-EINVAL); 427aace66b1SNishanth Menon } 428aace66b1SNishanth Menon req_qid = p->args[0]; 429aace66b1SNishanth Menon req_pid = p->args[1]; 430aace66b1SNishanth Menon 431aace66b1SNishanth Menon for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; 432aace66b1SNishanth Menon i++, qinst++) { 433aace66b1SNishanth Menon if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id) 434aace66b1SNishanth Menon return qinst->chan; 435aace66b1SNishanth Menon } 436aace66b1SNishanth Menon 437aace66b1SNishanth Menon dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %s\n", 438aace66b1SNishanth Menon req_qid, req_pid, p->np->name); 439aace66b1SNishanth Menon return ERR_PTR(-ENOENT); 440aace66b1SNishanth Menon } 441aace66b1SNishanth Menon 442aace66b1SNishanth Menon /** 443aace66b1SNishanth Menon * ti_msgmgr_queue_setup() - Setup data structures for each queue instance 444aace66b1SNishanth Menon * @idx: index of the queue 445aace66b1SNishanth Menon * @dev: pointer to the message manager device 446aace66b1SNishanth Menon * @np: pointer to the of node 447aace66b1SNishanth Menon * @inst: Queue instance pointer 448aace66b1SNishanth Menon * @d: Message Manager instance description data 449aace66b1SNishanth Menon * @qd: Queue description data 450aace66b1SNishanth Menon * @qinst: Queue instance pointer 451aace66b1SNishanth Menon * @chan: pointer to mailbox channel 452aace66b1SNishanth Menon * 453aace66b1SNishanth Menon * Return: 0 if all went well, else return corresponding error 454aace66b1SNishanth Menon */ 455aace66b1SNishanth Menon static int ti_msgmgr_queue_setup(int idx, struct device *dev, 456aace66b1SNishanth Menon struct device_node *np, 457aace66b1SNishanth Menon struct ti_msgmgr_inst *inst, 458aace66b1SNishanth Menon const struct ti_msgmgr_desc *d, 459aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *qd, 460aace66b1SNishanth Menon struct ti_queue_inst *qinst, 461aace66b1SNishanth Menon struct mbox_chan *chan) 462aace66b1SNishanth Menon { 463aace66b1SNishanth Menon qinst->proxy_id = qd->proxy_id; 464aace66b1SNishanth Menon qinst->queue_id = qd->queue_id; 465aace66b1SNishanth Menon 466aace66b1SNishanth Menon if (qinst->queue_id > d->queue_count) { 467aace66b1SNishanth Menon dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n", 468aace66b1SNishanth Menon idx, qinst->queue_id, d->queue_count); 469aace66b1SNishanth Menon return -ERANGE; 470aace66b1SNishanth Menon } 471aace66b1SNishanth Menon 472aace66b1SNishanth Menon qinst->is_tx = qd->is_tx; 473aace66b1SNishanth Menon snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d", 474aace66b1SNishanth Menon dev_name(dev), qinst->is_tx ? "tx" : "rx", qinst->queue_id, 475aace66b1SNishanth Menon qinst->proxy_id); 476aace66b1SNishanth Menon 477aace66b1SNishanth Menon qinst->queue_buff_start = inst->queue_proxy_region + 478aace66b1SNishanth Menon Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_first_reg); 479aace66b1SNishanth Menon qinst->queue_buff_end = inst->queue_proxy_region + 480aace66b1SNishanth Menon Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_last_reg); 481aace66b1SNishanth Menon qinst->queue_state = inst->queue_state_debug_region + 482aace66b1SNishanth Menon Q_STATE_OFFSET(qinst->queue_id); 483aace66b1SNishanth Menon qinst->chan = chan; 484aace66b1SNishanth Menon 485*5ab935e1SNishanth Menon /* Setup an error value for IRQ - Lazy allocation */ 486*5ab935e1SNishanth Menon qinst->irq = -EINVAL; 487*5ab935e1SNishanth Menon 488aace66b1SNishanth Menon chan->con_priv = qinst; 489aace66b1SNishanth Menon 490aace66b1SNishanth Menon dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n", 491aace66b1SNishanth Menon idx, qinst->queue_id, qinst->proxy_id, qinst->irq, 492aace66b1SNishanth Menon qinst->queue_buff_start, qinst->queue_buff_end); 493aace66b1SNishanth Menon return 0; 494aace66b1SNishanth Menon } 495aace66b1SNishanth Menon 496aace66b1SNishanth Menon /* Queue operations */ 497aace66b1SNishanth Menon static const struct mbox_chan_ops ti_msgmgr_chan_ops = { 498aace66b1SNishanth Menon .startup = ti_msgmgr_queue_startup, 499aace66b1SNishanth Menon .shutdown = ti_msgmgr_queue_shutdown, 500aace66b1SNishanth Menon .peek_data = ti_msgmgr_queue_peek_data, 501aace66b1SNishanth Menon .last_tx_done = ti_msgmgr_last_tx_done, 502aace66b1SNishanth Menon .send_data = ti_msgmgr_send_data, 503aace66b1SNishanth Menon }; 504aace66b1SNishanth Menon 505aace66b1SNishanth Menon /* Keystone K2G SoC integration details */ 506aace66b1SNishanth Menon static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = { 507aace66b1SNishanth Menon {.queue_id = 0, .proxy_id = 0, .is_tx = true,}, 508aace66b1SNishanth Menon {.queue_id = 1, .proxy_id = 0, .is_tx = true,}, 509aace66b1SNishanth Menon {.queue_id = 2, .proxy_id = 0, .is_tx = true,}, 510aace66b1SNishanth Menon {.queue_id = 3, .proxy_id = 0, .is_tx = true,}, 511aace66b1SNishanth Menon {.queue_id = 5, .proxy_id = 2, .is_tx = false,}, 512aace66b1SNishanth Menon {.queue_id = 56, .proxy_id = 1, .is_tx = true,}, 513aace66b1SNishanth Menon {.queue_id = 57, .proxy_id = 2, .is_tx = false,}, 514aace66b1SNishanth Menon {.queue_id = 58, .proxy_id = 3, .is_tx = true,}, 515aace66b1SNishanth Menon {.queue_id = 59, .proxy_id = 4, .is_tx = true,}, 516aace66b1SNishanth Menon {.queue_id = 60, .proxy_id = 5, .is_tx = true,}, 517aace66b1SNishanth Menon {.queue_id = 61, .proxy_id = 6, .is_tx = true,}, 518aace66b1SNishanth Menon }; 519aace66b1SNishanth Menon 520aace66b1SNishanth Menon static const struct ti_msgmgr_desc k2g_desc = { 521aace66b1SNishanth Menon .queue_count = 64, 522aace66b1SNishanth Menon .max_message_size = 64, 523aace66b1SNishanth Menon .max_messages = 128, 524aace66b1SNishanth Menon .data_first_reg = 16, 525aace66b1SNishanth Menon .data_last_reg = 31, 526aace66b1SNishanth Menon .tx_polled = false, 527aace66b1SNishanth Menon .valid_queues = k2g_valid_queues, 528aace66b1SNishanth Menon .num_valid_queues = ARRAY_SIZE(k2g_valid_queues), 529aace66b1SNishanth Menon }; 530aace66b1SNishanth Menon 531aace66b1SNishanth Menon static const struct of_device_id ti_msgmgr_of_match[] = { 532aace66b1SNishanth Menon {.compatible = "ti,k2g-message-manager", .data = &k2g_desc}, 533aace66b1SNishanth Menon { /* Sentinel */ } 534aace66b1SNishanth Menon }; 535aace66b1SNishanth Menon MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match); 536aace66b1SNishanth Menon 537aace66b1SNishanth Menon static int ti_msgmgr_probe(struct platform_device *pdev) 538aace66b1SNishanth Menon { 539aace66b1SNishanth Menon struct device *dev = &pdev->dev; 540aace66b1SNishanth Menon const struct of_device_id *of_id; 541aace66b1SNishanth Menon struct device_node *np; 542aace66b1SNishanth Menon struct resource *res; 543aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 544aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 545aace66b1SNishanth Menon struct ti_queue_inst *qinst; 546aace66b1SNishanth Menon struct mbox_controller *mbox; 547aace66b1SNishanth Menon struct mbox_chan *chans; 548aace66b1SNishanth Menon int queue_count; 549aace66b1SNishanth Menon int i; 550aace66b1SNishanth Menon int ret = -EINVAL; 551aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *queue_desc; 552aace66b1SNishanth Menon 553aace66b1SNishanth Menon if (!dev->of_node) { 554aace66b1SNishanth Menon dev_err(dev, "no OF information\n"); 555aace66b1SNishanth Menon return -EINVAL; 556aace66b1SNishanth Menon } 557aace66b1SNishanth Menon np = dev->of_node; 558aace66b1SNishanth Menon 559aace66b1SNishanth Menon of_id = of_match_device(ti_msgmgr_of_match, dev); 560aace66b1SNishanth Menon if (!of_id) { 561aace66b1SNishanth Menon dev_err(dev, "OF data missing\n"); 562aace66b1SNishanth Menon return -EINVAL; 563aace66b1SNishanth Menon } 564aace66b1SNishanth Menon desc = of_id->data; 565aace66b1SNishanth Menon 566aace66b1SNishanth Menon inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL); 567aace66b1SNishanth Menon if (!inst) 568aace66b1SNishanth Menon return -ENOMEM; 569aace66b1SNishanth Menon 570aace66b1SNishanth Menon inst->dev = dev; 571aace66b1SNishanth Menon inst->desc = desc; 572aace66b1SNishanth Menon 573aace66b1SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 574aace66b1SNishanth Menon "queue_proxy_region"); 575aace66b1SNishanth Menon inst->queue_proxy_region = devm_ioremap_resource(dev, res); 576aace66b1SNishanth Menon if (IS_ERR(inst->queue_proxy_region)) 577aace66b1SNishanth Menon return PTR_ERR(inst->queue_proxy_region); 578aace66b1SNishanth Menon 579aace66b1SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 580aace66b1SNishanth Menon "queue_state_debug_region"); 581aace66b1SNishanth Menon inst->queue_state_debug_region = devm_ioremap_resource(dev, res); 582aace66b1SNishanth Menon if (IS_ERR(inst->queue_state_debug_region)) 583aace66b1SNishanth Menon return PTR_ERR(inst->queue_state_debug_region); 584aace66b1SNishanth Menon 585aace66b1SNishanth Menon dev_dbg(dev, "proxy region=%p, queue_state=%p\n", 586aace66b1SNishanth Menon inst->queue_proxy_region, inst->queue_state_debug_region); 587aace66b1SNishanth Menon 588aace66b1SNishanth Menon queue_count = desc->num_valid_queues; 589aace66b1SNishanth Menon if (!queue_count || queue_count > desc->queue_count) { 590aace66b1SNishanth Menon dev_crit(dev, "Invalid Number of queues %d. Max %d\n", 591aace66b1SNishanth Menon queue_count, desc->queue_count); 592aace66b1SNishanth Menon return -ERANGE; 593aace66b1SNishanth Menon } 594aace66b1SNishanth Menon inst->num_valid_queues = queue_count; 595aace66b1SNishanth Menon 596a86854d0SKees Cook qinst = devm_kcalloc(dev, queue_count, sizeof(*qinst), GFP_KERNEL); 597aace66b1SNishanth Menon if (!qinst) 598aace66b1SNishanth Menon return -ENOMEM; 599aace66b1SNishanth Menon inst->qinsts = qinst; 600aace66b1SNishanth Menon 601a86854d0SKees Cook chans = devm_kcalloc(dev, queue_count, sizeof(*chans), GFP_KERNEL); 602aace66b1SNishanth Menon if (!chans) 603aace66b1SNishanth Menon return -ENOMEM; 604aace66b1SNishanth Menon inst->chans = chans; 605aace66b1SNishanth Menon 606aace66b1SNishanth Menon for (i = 0, queue_desc = desc->valid_queues; 607aace66b1SNishanth Menon i < queue_count; i++, qinst++, chans++, queue_desc++) { 608aace66b1SNishanth Menon ret = ti_msgmgr_queue_setup(i, dev, np, inst, 609aace66b1SNishanth Menon desc, queue_desc, qinst, chans); 610aace66b1SNishanth Menon if (ret) 611aace66b1SNishanth Menon return ret; 612aace66b1SNishanth Menon } 613aace66b1SNishanth Menon 614aace66b1SNishanth Menon mbox = &inst->mbox; 615aace66b1SNishanth Menon mbox->dev = dev; 616aace66b1SNishanth Menon mbox->ops = &ti_msgmgr_chan_ops; 617aace66b1SNishanth Menon mbox->chans = inst->chans; 618aace66b1SNishanth Menon mbox->num_chans = inst->num_valid_queues; 619aace66b1SNishanth Menon mbox->txdone_irq = false; 620aace66b1SNishanth Menon mbox->txdone_poll = desc->tx_polled; 621aace66b1SNishanth Menon if (desc->tx_polled) 622aace66b1SNishanth Menon mbox->txpoll_period = desc->tx_poll_timeout_ms; 623aace66b1SNishanth Menon mbox->of_xlate = ti_msgmgr_of_xlate; 624aace66b1SNishanth Menon 625aace66b1SNishanth Menon platform_set_drvdata(pdev, inst); 626aace66b1SNishanth Menon ret = mbox_controller_register(mbox); 627aace66b1SNishanth Menon if (ret) 628aace66b1SNishanth Menon dev_err(dev, "Failed to register mbox_controller(%d)\n", ret); 629aace66b1SNishanth Menon 630aace66b1SNishanth Menon return ret; 631aace66b1SNishanth Menon } 632aace66b1SNishanth Menon 633aace66b1SNishanth Menon static int ti_msgmgr_remove(struct platform_device *pdev) 634aace66b1SNishanth Menon { 635aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 636aace66b1SNishanth Menon 637aace66b1SNishanth Menon inst = platform_get_drvdata(pdev); 638aace66b1SNishanth Menon mbox_controller_unregister(&inst->mbox); 639aace66b1SNishanth Menon 640aace66b1SNishanth Menon return 0; 641aace66b1SNishanth Menon } 642aace66b1SNishanth Menon 643aace66b1SNishanth Menon static struct platform_driver ti_msgmgr_driver = { 644aace66b1SNishanth Menon .probe = ti_msgmgr_probe, 645aace66b1SNishanth Menon .remove = ti_msgmgr_remove, 646aace66b1SNishanth Menon .driver = { 647aace66b1SNishanth Menon .name = "ti-msgmgr", 648aace66b1SNishanth Menon .of_match_table = of_match_ptr(ti_msgmgr_of_match), 649aace66b1SNishanth Menon }, 650aace66b1SNishanth Menon }; 651aace66b1SNishanth Menon module_platform_driver(ti_msgmgr_driver); 652aace66b1SNishanth Menon 653aace66b1SNishanth Menon MODULE_LICENSE("GPL v2"); 654aace66b1SNishanth Menon MODULE_DESCRIPTION("TI message manager driver"); 655aace66b1SNishanth Menon MODULE_AUTHOR("Nishanth Menon"); 656aace66b1SNishanth Menon MODULE_ALIAS("platform:ti-msgmgr"); 657