xref: /openbmc/linux/drivers/leds/leds-lp5521.c (revision ed5c2f5fd10dda07263f79f338a512c0f49f76f5)
12b27bdccSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2500fe141SSamu Onkalo /*
3500fe141SSamu Onkalo  * LP5521 LED chip driver.
4500fe141SSamu Onkalo  *
5500fe141SSamu Onkalo  * Copyright (C) 2010 Nokia Corporation
6a2387cb9SMilo(Woogyom) Kim  * Copyright (C) 2012 Texas Instruments
7500fe141SSamu Onkalo  *
8500fe141SSamu Onkalo  * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
9a2387cb9SMilo(Woogyom) Kim  *          Milo(Woogyom) Kim <milo.kim@ti.com>
10500fe141SSamu Onkalo  */
11500fe141SSamu Onkalo 
12500fe141SSamu Onkalo #include <linux/delay.h>
139ce7cb17SMilo(Woogyom) Kim #include <linux/firmware.h>
1479bcc10bSMilo(Woogyom) Kim #include <linux/i2c.h>
1579bcc10bSMilo(Woogyom) Kim #include <linux/leds.h>
1679bcc10bSMilo(Woogyom) Kim #include <linux/module.h>
1779bcc10bSMilo(Woogyom) Kim #include <linux/mutex.h>
1879bcc10bSMilo(Woogyom) Kim #include <linux/platform_data/leds-lp55xx.h>
1979bcc10bSMilo(Woogyom) Kim #include <linux/slab.h>
207542a04bSLinus Walleij #include <linux/of.h>
216a0c9a47SMilo(Woogyom) Kim 
226a0c9a47SMilo(Woogyom) Kim #include "leds-lp55xx-common.h"
23500fe141SSamu Onkalo 
2412f022d2SMilo(Woogyom) Kim #define LP5521_PROGRAM_LENGTH		32
2512f022d2SMilo(Woogyom) Kim #define LP5521_MAX_LEDS			3
2612f022d2SMilo(Woogyom) Kim #define LP5521_CMD_DIRECT		0x3F
27500fe141SSamu Onkalo 
28500fe141SSamu Onkalo /* Registers */
29500fe141SSamu Onkalo #define LP5521_REG_ENABLE		0x00
30500fe141SSamu Onkalo #define LP5521_REG_OP_MODE		0x01
31500fe141SSamu Onkalo #define LP5521_REG_R_PWM		0x02
32500fe141SSamu Onkalo #define LP5521_REG_G_PWM		0x03
33500fe141SSamu Onkalo #define LP5521_REG_B_PWM		0x04
34500fe141SSamu Onkalo #define LP5521_REG_R_CURRENT		0x05
35500fe141SSamu Onkalo #define LP5521_REG_G_CURRENT		0x06
36500fe141SSamu Onkalo #define LP5521_REG_B_CURRENT		0x07
37500fe141SSamu Onkalo #define LP5521_REG_CONFIG		0x08
38500fe141SSamu Onkalo #define LP5521_REG_STATUS		0x0C
39500fe141SSamu Onkalo #define LP5521_REG_RESET		0x0D
40500fe141SSamu Onkalo #define LP5521_REG_R_PROG_MEM		0x10
41500fe141SSamu Onkalo #define LP5521_REG_G_PROG_MEM		0x30
42500fe141SSamu Onkalo #define LP5521_REG_B_PROG_MEM		0x50
43500fe141SSamu Onkalo 
44500fe141SSamu Onkalo /* Base register to set LED current */
45500fe141SSamu Onkalo #define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
46500fe141SSamu Onkalo /* Base register to set the brightness */
47500fe141SSamu Onkalo #define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM
48500fe141SSamu Onkalo 
49500fe141SSamu Onkalo /* Bits in ENABLE register */
50500fe141SSamu Onkalo #define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
51500fe141SSamu Onkalo #define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
52500fe141SSamu Onkalo #define LP5521_EXEC_RUN			0x2A
5332a2f747SKim, Milo #define LP5521_ENABLE_DEFAULT	\
5432a2f747SKim, Milo 	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
5532a2f747SKim, Milo #define LP5521_ENABLE_RUN_PROGRAM	\
5632a2f747SKim, Milo 	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
57500fe141SSamu Onkalo 
5881f2a5b4SKim, Milo /* CONFIG register */
5981f2a5b4SKim, Milo #define LP5521_PWM_HF			0x40	/* PWM: 0 = 256Hz, 1 = 558Hz */
6081f2a5b4SKim, Milo #define LP5521_PWRSAVE_EN		0x20	/* 1 = Power save mode */
6181f2a5b4SKim, Milo #define LP5521_CP_MODE_OFF		0	/* Charge pump (CP) off */
6281f2a5b4SKim, Milo #define LP5521_CP_MODE_BYPASS		8	/* CP forced to bypass mode */
6381f2a5b4SKim, Milo #define LP5521_CP_MODE_1X5		0x10	/* CP forced to 1.5x mode */
6481f2a5b4SKim, Milo #define LP5521_CP_MODE_AUTO		0x18	/* Automatic mode selection */
6581f2a5b4SKim, Milo #define LP5521_R_TO_BATT		0x04	/* R out: 0 = CP, 1 = Vbat */
6681f2a5b4SKim, Milo #define LP5521_CLK_INT			0x01	/* Internal clock */
6781f2a5b4SKim, Milo #define LP5521_DEFAULT_CFG		\
6881f2a5b4SKim, Milo 	(LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)
6981f2a5b4SKim, Milo 
70500fe141SSamu Onkalo /* Status */
71500fe141SSamu Onkalo #define LP5521_EXT_CLK_USED		0x08
72500fe141SSamu Onkalo 
73b3c49c05SSrinidhi KASAGAR /* default R channel current register value */
74b3c49c05SSrinidhi KASAGAR #define LP5521_REG_R_CURR_DEFAULT	0xAF
75b3c49c05SSrinidhi KASAGAR 
7648068d5dSMilo(Woogyom) Kim /* Reset register value */
7748068d5dSMilo(Woogyom) Kim #define LP5521_RESET			0xFF
7848068d5dSMilo(Woogyom) Kim 
799ce7cb17SMilo(Woogyom) Kim /* Program Memory Operations */
809ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
819ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_G_M			0x0C
829ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_B_M			0x03
839ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_R			0x10
849ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_G			0x04
859ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_B			0x01
869ce7cb17SMilo(Woogyom) Kim 
879ce7cb17SMilo(Woogyom) Kim #define LP5521_R_IS_LOADING(mode)	\
889ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
899ce7cb17SMilo(Woogyom) Kim #define LP5521_G_IS_LOADING(mode)	\
909ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
919ce7cb17SMilo(Woogyom) Kim #define LP5521_B_IS_LOADING(mode)	\
929ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
939ce7cb17SMilo(Woogyom) Kim 
949ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_R_M			0x30	/* Enable Register */
959ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_G_M			0x0C
969ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_B_M			0x03
979ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_M			0x3F
989ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_R			0x20
999ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_G			0x08
1009ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_B			0x02
101500fe141SSamu Onkalo 
1029ce7cb17SMilo(Woogyom) Kim static inline void lp5521_wait_opmode_done(void)
1039ce7cb17SMilo(Woogyom) Kim {
1049ce7cb17SMilo(Woogyom) Kim 	/* operation mode change needs to be longer than 153 us */
1059ce7cb17SMilo(Woogyom) Kim 	usleep_range(200, 300);
1069ce7cb17SMilo(Woogyom) Kim }
1079ce7cb17SMilo(Woogyom) Kim 
10894482174SMilo(Woogyom) Kim static inline void lp5521_wait_enable_done(void)
10994482174SMilo(Woogyom) Kim {
11094482174SMilo(Woogyom) Kim 	/* it takes more 488 us to update ENABLE register */
11194482174SMilo(Woogyom) Kim 	usleep_range(500, 600);
11294482174SMilo(Woogyom) Kim }
11394482174SMilo(Woogyom) Kim 
114a96bfa13SMilo(Woogyom) Kim static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
115a96bfa13SMilo(Woogyom) Kim {
116a96bfa13SMilo(Woogyom) Kim 	led->led_current = led_current;
117a96bfa13SMilo(Woogyom) Kim 	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
118a96bfa13SMilo(Woogyom) Kim 		led_current);
119a96bfa13SMilo(Woogyom) Kim }
120a96bfa13SMilo(Woogyom) Kim 
1219ce7cb17SMilo(Woogyom) Kim static void lp5521_load_engine(struct lp55xx_chip *chip)
122500fe141SSamu Onkalo {
1239ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
124f01a59efSColin Ian King 	static const u8 mask[] = {
1259ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
1269ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
1279ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
1289ce7cb17SMilo(Woogyom) Kim 	};
129500fe141SSamu Onkalo 
130f01a59efSColin Ian King 	static const u8 val[] = {
1319ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
1329ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
1339ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
1349ce7cb17SMilo(Woogyom) Kim 	};
135500fe141SSamu Onkalo 
1369ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
137500fe141SSamu Onkalo 
1389ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
139500fe141SSamu Onkalo }
140500fe141SSamu Onkalo 
14128c9266bSMilo Kim static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
142500fe141SSamu Onkalo {
1439ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
1449ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
1459ce7cb17SMilo(Woogyom) Kim }
1469ce7cb17SMilo(Woogyom) Kim 
14728c9266bSMilo Kim static void lp5521_stop_engine(struct lp55xx_chip *chip)
14828c9266bSMilo Kim {
14928c9266bSMilo Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
150f01a59efSColin Ian King 	static const u8 mask[] = {
15128c9266bSMilo Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
15228c9266bSMilo Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
15328c9266bSMilo Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
15428c9266bSMilo Kim 	};
15528c9266bSMilo Kim 
15628c9266bSMilo Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
15728c9266bSMilo Kim 
15828c9266bSMilo Kim 	lp5521_wait_opmode_done();
15928c9266bSMilo Kim }
16028c9266bSMilo Kim 
1619ce7cb17SMilo(Woogyom) Kim static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
1629ce7cb17SMilo(Woogyom) Kim {
163500fe141SSamu Onkalo 	int ret;
164500fe141SSamu Onkalo 	u8 mode;
1659ce7cb17SMilo(Woogyom) Kim 	u8 exec;
166500fe141SSamu Onkalo 
1679ce7cb17SMilo(Woogyom) Kim 	/* stop engine */
1689ce7cb17SMilo(Woogyom) Kim 	if (!start) {
1699ce7cb17SMilo(Woogyom) Kim 		lp5521_stop_engine(chip);
1709ce7cb17SMilo(Woogyom) Kim 		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
1719ce7cb17SMilo(Woogyom) Kim 		lp5521_wait_opmode_done();
1729ce7cb17SMilo(Woogyom) Kim 		return;
1739ce7cb17SMilo(Woogyom) Kim 	}
1749ce7cb17SMilo(Woogyom) Kim 
1759ce7cb17SMilo(Woogyom) Kim 	/*
1769ce7cb17SMilo(Woogyom) Kim 	 * To run the engine,
1779ce7cb17SMilo(Woogyom) Kim 	 * operation mode and enable register should updated at the same time
1789ce7cb17SMilo(Woogyom) Kim 	 */
1799ce7cb17SMilo(Woogyom) Kim 
1809ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
1815bc9ad77SDan Carpenter 	if (ret)
1829ce7cb17SMilo(Woogyom) Kim 		return;
1835bc9ad77SDan Carpenter 
1849ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
1855bc9ad77SDan Carpenter 	if (ret)
1869ce7cb17SMilo(Woogyom) Kim 		return;
187500fe141SSamu Onkalo 
1889ce7cb17SMilo(Woogyom) Kim 	/* change operation mode to RUN only when each engine is loading */
1899ce7cb17SMilo(Woogyom) Kim 	if (LP5521_R_IS_LOADING(mode)) {
1909ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
1919ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
1929ce7cb17SMilo(Woogyom) Kim 	}
193500fe141SSamu Onkalo 
1949ce7cb17SMilo(Woogyom) Kim 	if (LP5521_G_IS_LOADING(mode)) {
1959ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
1969ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
1979ce7cb17SMilo(Woogyom) Kim 	}
198500fe141SSamu Onkalo 
1999ce7cb17SMilo(Woogyom) Kim 	if (LP5521_B_IS_LOADING(mode)) {
2009ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
2019ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
2029ce7cb17SMilo(Woogyom) Kim 	}
2039ce7cb17SMilo(Woogyom) Kim 
2049ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
2059ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
2069ce7cb17SMilo(Woogyom) Kim 
2079ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
2089ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
2099ce7cb17SMilo(Woogyom) Kim }
2109ce7cb17SMilo(Woogyom) Kim 
2119ce7cb17SMilo(Woogyom) Kim static int lp5521_update_program_memory(struct lp55xx_chip *chip,
2129ce7cb17SMilo(Woogyom) Kim 					const u8 *data, size_t size)
2139ce7cb17SMilo(Woogyom) Kim {
2149ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
2159ce7cb17SMilo(Woogyom) Kim 	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
216f01a59efSColin Ian King 	static const u8 addr[] = {
2179ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
2189ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
2199ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
2209ce7cb17SMilo(Woogyom) Kim 	};
2219ce7cb17SMilo(Woogyom) Kim 	unsigned cmd;
2229ce7cb17SMilo(Woogyom) Kim 	char c[3];
2239ce7cb17SMilo(Woogyom) Kim 	int nrchars;
2249ce7cb17SMilo(Woogyom) Kim 	int ret;
2251eca0b3aSMilo Kim 	int offset = 0;
2261eca0b3aSMilo Kim 	int i = 0;
2279ce7cb17SMilo(Woogyom) Kim 
2289ce7cb17SMilo(Woogyom) Kim 	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
2299ce7cb17SMilo(Woogyom) Kim 		/* separate sscanfs because length is working only for %s */
2309ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
2319ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2329ce7cb17SMilo(Woogyom) Kim 			goto err;
2339ce7cb17SMilo(Woogyom) Kim 
2349ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(c, "%2x", &cmd);
2359ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2369ce7cb17SMilo(Woogyom) Kim 			goto err;
2379ce7cb17SMilo(Woogyom) Kim 
2389ce7cb17SMilo(Woogyom) Kim 		pattern[i] = (u8)cmd;
2399ce7cb17SMilo(Woogyom) Kim 		offset += nrchars;
2409ce7cb17SMilo(Woogyom) Kim 		i++;
2419ce7cb17SMilo(Woogyom) Kim 	}
2429ce7cb17SMilo(Woogyom) Kim 
2439ce7cb17SMilo(Woogyom) Kim 	/* Each instruction is 16bit long. Check that length is even */
2449ce7cb17SMilo(Woogyom) Kim 	if (i % 2)
2459ce7cb17SMilo(Woogyom) Kim 		goto err;
2469ce7cb17SMilo(Woogyom) Kim 
2471eca0b3aSMilo Kim 	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
248c0e5e9b5SMilo Kim 		ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
249e70988d1SMilo Kim 		if (ret)
250c0e5e9b5SMilo Kim 			return -EINVAL;
251c0e5e9b5SMilo Kim 	}
252c0e5e9b5SMilo Kim 
253c0e5e9b5SMilo Kim 	return size;
2549ce7cb17SMilo(Woogyom) Kim 
2559ce7cb17SMilo(Woogyom) Kim err:
2569ce7cb17SMilo(Woogyom) Kim 	dev_err(&chip->cl->dev, "wrong pattern format\n");
2579ce7cb17SMilo(Woogyom) Kim 	return -EINVAL;
2589ce7cb17SMilo(Woogyom) Kim }
2599ce7cb17SMilo(Woogyom) Kim 
2609ce7cb17SMilo(Woogyom) Kim static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
2619ce7cb17SMilo(Woogyom) Kim {
2629ce7cb17SMilo(Woogyom) Kim 	const struct firmware *fw = chip->fw;
2639ce7cb17SMilo(Woogyom) Kim 
2649ce7cb17SMilo(Woogyom) Kim 	if (fw->size > LP5521_PROGRAM_LENGTH) {
2659ce7cb17SMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
2669ce7cb17SMilo(Woogyom) Kim 			fw->size);
2679ce7cb17SMilo(Woogyom) Kim 		return;
2689ce7cb17SMilo(Woogyom) Kim 	}
2699ce7cb17SMilo(Woogyom) Kim 
2709ce7cb17SMilo(Woogyom) Kim 	/*
271d1b7c934SStephen Boyd 	 * Program memory sequence
2729ce7cb17SMilo(Woogyom) Kim 	 *  1) set engine mode to "LOAD"
2739ce7cb17SMilo(Woogyom) Kim 	 *  2) write firmware data into program memory
2749ce7cb17SMilo(Woogyom) Kim 	 */
2759ce7cb17SMilo(Woogyom) Kim 
2769ce7cb17SMilo(Woogyom) Kim 	lp5521_load_engine(chip);
2779ce7cb17SMilo(Woogyom) Kim 	lp5521_update_program_memory(chip, fw->data, fw->size);
278500fe141SSamu Onkalo }
279500fe141SSamu Onkalo 
280ffbdccdbSMilo(Woogyom) Kim static int lp5521_post_init_device(struct lp55xx_chip *chip)
281500fe141SSamu Onkalo {
282500fe141SSamu Onkalo 	int ret;
28394482174SMilo(Woogyom) Kim 	u8 val;
284500fe141SSamu Onkalo 
28594482174SMilo(Woogyom) Kim 	/*
28694482174SMilo(Woogyom) Kim 	 * Make sure that the chip is reset by reading back the r channel
28794482174SMilo(Woogyom) Kim 	 * current reg. This is dummy read is required on some platforms -
28894482174SMilo(Woogyom) Kim 	 * otherwise further access to the R G B channels in the
28994482174SMilo(Woogyom) Kim 	 * LP5521_REG_ENABLE register will not have any effect - strange!
29094482174SMilo(Woogyom) Kim 	 */
291ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
29294482174SMilo(Woogyom) Kim 	if (ret) {
293ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "error in resetting chip\n");
29494482174SMilo(Woogyom) Kim 		return ret;
29594482174SMilo(Woogyom) Kim 	}
29694482174SMilo(Woogyom) Kim 	if (val != LP5521_REG_R_CURR_DEFAULT) {
297ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev,
29894482174SMilo(Woogyom) Kim 			"unexpected data in register (expected 0x%x got 0x%x)\n",
29994482174SMilo(Woogyom) Kim 			LP5521_REG_R_CURR_DEFAULT, val);
30094482174SMilo(Woogyom) Kim 		ret = -EINVAL;
30194482174SMilo(Woogyom) Kim 		return ret;
30294482174SMilo(Woogyom) Kim 	}
30394482174SMilo(Woogyom) Kim 	usleep_range(10000, 20000);
304500fe141SSamu Onkalo 
305500fe141SSamu Onkalo 	/* Set all PWMs to direct control mode */
306ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
307500fe141SSamu Onkalo 
30881f2a5b4SKim, Milo 	/* Update configuration for the clock setting */
30981f2a5b4SKim, Milo 	val = LP5521_DEFAULT_CFG;
31081f2a5b4SKim, Milo 	if (!lp55xx_is_extclk_used(chip))
31181f2a5b4SKim, Milo 		val |= LP5521_CLK_INT;
31281f2a5b4SKim, Milo 
313ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
31494482174SMilo(Woogyom) Kim 	if (ret)
31594482174SMilo(Woogyom) Kim 		return ret;
316500fe141SSamu Onkalo 
317500fe141SSamu Onkalo 	/* Initialize all channels PWM to zero -> leds off */
318ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
319ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
320ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
321500fe141SSamu Onkalo 
322500fe141SSamu Onkalo 	/* Set engines are set to run state when OP_MODE enables engines */
323ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
32494482174SMilo(Woogyom) Kim 	if (ret)
325500fe141SSamu Onkalo 		return ret;
32694482174SMilo(Woogyom) Kim 
32794482174SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
32894482174SMilo(Woogyom) Kim 
32994482174SMilo(Woogyom) Kim 	return 0;
330500fe141SSamu Onkalo }
331500fe141SSamu Onkalo 
3329ca3bd80SMilo(Woogyom) Kim static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
333500fe141SSamu Onkalo {
3349ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_platform_data *pdata = chip->pdata;
335500fe141SSamu Onkalo 	int ret;
336500fe141SSamu Onkalo 	u8 status;
337500fe141SSamu Onkalo 
3389ca3bd80SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
339500fe141SSamu Onkalo 	if (ret < 0)
340500fe141SSamu Onkalo 		return ret;
341500fe141SSamu Onkalo 
3429ca3bd80SMilo(Woogyom) Kim 	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
3439ca3bd80SMilo(Woogyom) Kim 		return 0;
3449ca3bd80SMilo(Woogyom) Kim 
345500fe141SSamu Onkalo 	/* Check that ext clock is really in use if requested */
346500fe141SSamu Onkalo 	if  ((status & LP5521_EXT_CLK_USED) == 0)
347500fe141SSamu Onkalo 		return -EIO;
3489ca3bd80SMilo(Woogyom) Kim 
349500fe141SSamu Onkalo 	return 0;
350500fe141SSamu Onkalo }
351500fe141SSamu Onkalo 
35200253ec2SDan Murphy static int lp5521_multicolor_brightness(struct lp55xx_led *led)
35300253ec2SDan Murphy {
35400253ec2SDan Murphy 	struct lp55xx_chip *chip = led->chip;
35500253ec2SDan Murphy 	int ret;
35600253ec2SDan Murphy 	int i;
35700253ec2SDan Murphy 
35800253ec2SDan Murphy 	mutex_lock(&chip->lock);
35900253ec2SDan Murphy 	for (i = 0; i < led->mc_cdev.num_colors; i++) {
36000253ec2SDan Murphy 		ret = lp55xx_write(chip,
36100253ec2SDan Murphy 				   LP5521_REG_LED_PWM_BASE +
36200253ec2SDan Murphy 				   led->mc_cdev.subled_info[i].channel,
36300253ec2SDan Murphy 				   led->mc_cdev.subled_info[i].brightness);
36400253ec2SDan Murphy 		if (ret)
36500253ec2SDan Murphy 			break;
36600253ec2SDan Murphy 	}
36700253ec2SDan Murphy 	mutex_unlock(&chip->lock);
36800253ec2SDan Murphy 	return ret;
36900253ec2SDan Murphy }
37000253ec2SDan Murphy 
37195b2af63SAndrew Lunn static int lp5521_led_brightness(struct lp55xx_led *led)
372500fe141SSamu Onkalo {
373a6e4679aSMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
37495b2af63SAndrew Lunn 	int ret;
375500fe141SSamu Onkalo 
376500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
37795b2af63SAndrew Lunn 	ret = lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
378500fe141SSamu Onkalo 		led->brightness);
379500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
38095b2af63SAndrew Lunn 
38195b2af63SAndrew Lunn 	return ret;
382500fe141SSamu Onkalo }
383500fe141SSamu Onkalo 
384c0e5e9b5SMilo Kim static ssize_t show_engine_mode(struct device *dev,
385c0e5e9b5SMilo Kim 				struct device_attribute *attr,
386c0e5e9b5SMilo Kim 				char *buf, int nr)
387c0e5e9b5SMilo Kim {
388c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
389c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
390c0e5e9b5SMilo Kim 	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
391c0e5e9b5SMilo Kim 
392c0e5e9b5SMilo Kim 	switch (mode) {
393c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_RUN:
394c0e5e9b5SMilo Kim 		return sprintf(buf, "run\n");
395c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_LOAD:
396c0e5e9b5SMilo Kim 		return sprintf(buf, "load\n");
397c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_DISABLED:
398c0e5e9b5SMilo Kim 	default:
399c0e5e9b5SMilo Kim 		return sprintf(buf, "disabled\n");
400c0e5e9b5SMilo Kim 	}
401c0e5e9b5SMilo Kim }
402c0e5e9b5SMilo Kim show_mode(1)
403c0e5e9b5SMilo Kim show_mode(2)
404c0e5e9b5SMilo Kim show_mode(3)
405c0e5e9b5SMilo Kim 
406c0e5e9b5SMilo Kim static ssize_t store_engine_mode(struct device *dev,
407c0e5e9b5SMilo Kim 				 struct device_attribute *attr,
408c0e5e9b5SMilo Kim 				 const char *buf, size_t len, int nr)
409c0e5e9b5SMilo Kim {
410c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
411c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
412c0e5e9b5SMilo Kim 	struct lp55xx_engine *engine = &chip->engines[nr - 1];
413c0e5e9b5SMilo Kim 
414c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
415c0e5e9b5SMilo Kim 
416c0e5e9b5SMilo Kim 	chip->engine_idx = nr;
417c0e5e9b5SMilo Kim 
418c0e5e9b5SMilo Kim 	if (!strncmp(buf, "run", 3)) {
419c0e5e9b5SMilo Kim 		lp5521_run_engine(chip, true);
420c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_RUN;
421c0e5e9b5SMilo Kim 	} else if (!strncmp(buf, "load", 4)) {
422c0e5e9b5SMilo Kim 		lp5521_stop_engine(chip);
423c0e5e9b5SMilo Kim 		lp5521_load_engine(chip);
424c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_LOAD;
425c0e5e9b5SMilo Kim 	} else if (!strncmp(buf, "disabled", 8)) {
426c0e5e9b5SMilo Kim 		lp5521_stop_engine(chip);
427c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_DISABLED;
428c0e5e9b5SMilo Kim 	}
429c0e5e9b5SMilo Kim 
430c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
431c0e5e9b5SMilo Kim 
432c0e5e9b5SMilo Kim 	return len;
433c0e5e9b5SMilo Kim }
434c0e5e9b5SMilo Kim store_mode(1)
435c0e5e9b5SMilo Kim store_mode(2)
436c0e5e9b5SMilo Kim store_mode(3)
437c0e5e9b5SMilo Kim 
438c0e5e9b5SMilo Kim static ssize_t store_engine_load(struct device *dev,
439c0e5e9b5SMilo Kim 			     struct device_attribute *attr,
440c0e5e9b5SMilo Kim 			     const char *buf, size_t len, int nr)
441c0e5e9b5SMilo Kim {
442c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
443c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
444e70988d1SMilo Kim 	int ret;
445c0e5e9b5SMilo Kim 
446c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
447c0e5e9b5SMilo Kim 
448c0e5e9b5SMilo Kim 	chip->engine_idx = nr;
449c0e5e9b5SMilo Kim 	lp5521_load_engine(chip);
450e70988d1SMilo Kim 	ret = lp5521_update_program_memory(chip, buf, len);
451c0e5e9b5SMilo Kim 
452c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
453c0e5e9b5SMilo Kim 
454e70988d1SMilo Kim 	return ret;
455c0e5e9b5SMilo Kim }
456c0e5e9b5SMilo Kim store_load(1)
457c0e5e9b5SMilo Kim store_load(2)
458c0e5e9b5SMilo Kim store_load(3)
459c0e5e9b5SMilo Kim 
460500fe141SSamu Onkalo static ssize_t lp5521_selftest(struct device *dev,
461500fe141SSamu Onkalo 			       struct device_attribute *attr,
462500fe141SSamu Onkalo 			       char *buf)
463500fe141SSamu Onkalo {
4649ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
4659ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
466500fe141SSamu Onkalo 	int ret;
467500fe141SSamu Onkalo 
468500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
469500fe141SSamu Onkalo 	ret = lp5521_run_selftest(chip, buf);
470500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
47124d32128SKim, Milo 
47224d32128SKim, Milo 	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
473500fe141SSamu Onkalo }
474500fe141SSamu Onkalo 
475500fe141SSamu Onkalo /* device attributes */
476c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
477c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
478c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
479c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
480c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
481c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
482c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
483500fe141SSamu Onkalo 
484500fe141SSamu Onkalo static struct attribute *lp5521_attributes[] = {
485c0e5e9b5SMilo Kim 	&dev_attr_engine1_mode.attr,
486c0e5e9b5SMilo Kim 	&dev_attr_engine2_mode.attr,
487c0e5e9b5SMilo Kim 	&dev_attr_engine3_mode.attr,
488c0e5e9b5SMilo Kim 	&dev_attr_engine1_load.attr,
489c0e5e9b5SMilo Kim 	&dev_attr_engine2_load.attr,
490c0e5e9b5SMilo Kim 	&dev_attr_engine3_load.attr,
491500fe141SSamu Onkalo 	&dev_attr_selftest.attr,
492500fe141SSamu Onkalo 	NULL
493500fe141SSamu Onkalo };
494500fe141SSamu Onkalo 
495500fe141SSamu Onkalo static const struct attribute_group lp5521_group = {
496500fe141SSamu Onkalo 	.attrs = lp5521_attributes,
497500fe141SSamu Onkalo };
498500fe141SSamu Onkalo 
49948068d5dSMilo(Woogyom) Kim /* Chip specific configurations */
50048068d5dSMilo(Woogyom) Kim static struct lp55xx_device_config lp5521_cfg = {
50148068d5dSMilo(Woogyom) Kim 	.reset = {
50248068d5dSMilo(Woogyom) Kim 		.addr = LP5521_REG_RESET,
50348068d5dSMilo(Woogyom) Kim 		.val  = LP5521_RESET,
50448068d5dSMilo(Woogyom) Kim 	},
505e3a700d8SMilo(Woogyom) Kim 	.enable = {
506e3a700d8SMilo(Woogyom) Kim 		.addr = LP5521_REG_ENABLE,
507e3a700d8SMilo(Woogyom) Kim 		.val  = LP5521_ENABLE_DEFAULT,
508e3a700d8SMilo(Woogyom) Kim 	},
5090e202346SMilo(Woogyom) Kim 	.max_channel  = LP5521_MAX_LEDS,
510ffbdccdbSMilo(Woogyom) Kim 	.post_init_device   = lp5521_post_init_device,
51195b2af63SAndrew Lunn 	.brightness_fn      = lp5521_led_brightness,
51200253ec2SDan Murphy 	.multicolor_brightness_fn = lp5521_multicolor_brightness,
513a96bfa13SMilo(Woogyom) Kim 	.set_led_current    = lp5521_set_led_current,
5149ce7cb17SMilo(Woogyom) Kim 	.firmware_cb        = lp5521_firmware_loaded,
5159ce7cb17SMilo(Woogyom) Kim 	.run_engine         = lp5521_run_engine,
516e73c0ce6SMilo(Woogyom) Kim 	.dev_attr_group     = &lp5521_group,
51748068d5dSMilo(Woogyom) Kim };
51848068d5dSMilo(Woogyom) Kim 
51998ea1ea2SBill Pemberton static int lp5521_probe(struct i2c_client *client,
520500fe141SSamu Onkalo 			const struct i2c_device_id *id)
521500fe141SSamu Onkalo {
5221904f83dSMilo(Woogyom) Kim 	int ret;
5236a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_chip *chip;
5246a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_led *led;
525ed133352SMilo Kim 	struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev);
5268853c95eSMarek Behún 	struct device_node *np = dev_of_node(&client->dev);
527500fe141SSamu Onkalo 
52892a81562SDan Murphy 	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
52992a81562SDan Murphy 	if (!chip)
53092a81562SDan Murphy 		return -ENOMEM;
53192a81562SDan Murphy 
53292a81562SDan Murphy 	chip->cfg = &lp5521_cfg;
53392a81562SDan Murphy 
534ed133352SMilo Kim 	if (!pdata) {
5357542a04bSLinus Walleij 		if (np) {
53692a81562SDan Murphy 			pdata = lp55xx_of_populate_pdata(&client->dev, np,
53792a81562SDan Murphy 							 chip);
538ed133352SMilo Kim 			if (IS_ERR(pdata))
539ed133352SMilo Kim 				return PTR_ERR(pdata);
5407542a04bSLinus Walleij 		} else {
541500fe141SSamu Onkalo 			dev_err(&client->dev, "no platform data\n");
542e430dc00SBryan Wu 			return -EINVAL;
543500fe141SSamu Onkalo 		}
5447542a04bSLinus Walleij 	}
545500fe141SSamu Onkalo 
546a86854d0SKees Cook 	led = devm_kcalloc(&client->dev,
547a86854d0SKees Cook 			pdata->num_channels, sizeof(*led), GFP_KERNEL);
5486a0c9a47SMilo(Woogyom) Kim 	if (!led)
5496a0c9a47SMilo(Woogyom) Kim 		return -ENOMEM;
5506a0c9a47SMilo(Woogyom) Kim 
5516a0c9a47SMilo(Woogyom) Kim 	chip->cl = client;
5526a0c9a47SMilo(Woogyom) Kim 	chip->pdata = pdata;
5536a0c9a47SMilo(Woogyom) Kim 
5546a0c9a47SMilo(Woogyom) Kim 	mutex_init(&chip->lock);
5556a0c9a47SMilo(Woogyom) Kim 
5566a0c9a47SMilo(Woogyom) Kim 	i2c_set_clientdata(client, led);
557500fe141SSamu Onkalo 
55822ebeb48SMilo(Woogyom) Kim 	ret = lp55xx_init_device(chip);
559944f7b1dSMilo(Woogyom) Kim 	if (ret)
560f6c64c6fSMilo(Woogyom) Kim 		goto err_init;
561500fe141SSamu Onkalo 
562500fe141SSamu Onkalo 	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
563500fe141SSamu Onkalo 
5649e9b3db1SMilo(Woogyom) Kim 	ret = lp55xx_register_leds(led, chip);
565f6524808SMilo(Woogyom) Kim 	if (ret)
566c732eaf0SDan Murphy 		goto err_out;
567500fe141SSamu Onkalo 
568e73c0ce6SMilo(Woogyom) Kim 	ret = lp55xx_register_sysfs(chip);
569500fe141SSamu Onkalo 	if (ret) {
570500fe141SSamu Onkalo 		dev_err(&client->dev, "registering sysfs failed\n");
571c732eaf0SDan Murphy 		goto err_out;
572500fe141SSamu Onkalo 	}
573e73c0ce6SMilo(Woogyom) Kim 
574e73c0ce6SMilo(Woogyom) Kim 	return 0;
575e73c0ce6SMilo(Woogyom) Kim 
576c732eaf0SDan Murphy err_out:
5776ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
578f6c64c6fSMilo(Woogyom) Kim err_init:
579500fe141SSamu Onkalo 	return ret;
580500fe141SSamu Onkalo }
581500fe141SSamu Onkalo 
582*ed5c2f5fSUwe Kleine-König static void lp5521_remove(struct i2c_client *client)
583500fe141SSamu Onkalo {
5846ce61762SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(client);
5856ce61762SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
586500fe141SSamu Onkalo 
58728c9266bSMilo Kim 	lp5521_stop_all_engines(chip);
58887cc4bdeSMilo(Woogyom) Kim 	lp55xx_unregister_sysfs(chip);
5896ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
590500fe141SSamu Onkalo }
591500fe141SSamu Onkalo 
592500fe141SSamu Onkalo static const struct i2c_device_id lp5521_id[] = {
593500fe141SSamu Onkalo 	{ "lp5521", 0 }, /* Three channel chip */
594500fe141SSamu Onkalo 	{ }
595500fe141SSamu Onkalo };
596500fe141SSamu Onkalo MODULE_DEVICE_TABLE(i2c, lp5521_id);
597500fe141SSamu Onkalo 
598b548a34bSAxel Lin #ifdef CONFIG_OF
599b548a34bSAxel Lin static const struct of_device_id of_lp5521_leds_match[] = {
600b548a34bSAxel Lin 	{ .compatible = "national,lp5521", },
601b548a34bSAxel Lin 	{},
602b548a34bSAxel Lin };
603b548a34bSAxel Lin 
604b548a34bSAxel Lin MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
605b548a34bSAxel Lin #endif
606500fe141SSamu Onkalo static struct i2c_driver lp5521_driver = {
607500fe141SSamu Onkalo 	.driver = {
608500fe141SSamu Onkalo 		.name	= "lp5521",
609b548a34bSAxel Lin 		.of_match_table = of_match_ptr(of_lp5521_leds_match),
610500fe141SSamu Onkalo 	},
611500fe141SSamu Onkalo 	.probe		= lp5521_probe,
612df07cf81SBill Pemberton 	.remove		= lp5521_remove,
613500fe141SSamu Onkalo 	.id_table	= lp5521_id,
614500fe141SSamu Onkalo };
615500fe141SSamu Onkalo 
61609a0d183SAxel Lin module_i2c_driver(lp5521_driver);
617500fe141SSamu Onkalo 
618500fe141SSamu Onkalo MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
619a2387cb9SMilo(Woogyom) Kim MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
620500fe141SSamu Onkalo MODULE_DESCRIPTION("LP5521 LED engine");
621500fe141SSamu Onkalo MODULE_LICENSE("GPL v2");
622