1500fe141SSamu Onkalo /* 2500fe141SSamu Onkalo * LP5521 LED chip driver. 3500fe141SSamu Onkalo * 4500fe141SSamu Onkalo * Copyright (C) 2010 Nokia Corporation 5a2387cb9SMilo(Woogyom) Kim * Copyright (C) 2012 Texas Instruments 6500fe141SSamu Onkalo * 7500fe141SSamu Onkalo * Contact: Samu Onkalo <samu.p.onkalo@nokia.com> 8a2387cb9SMilo(Woogyom) Kim * Milo(Woogyom) Kim <milo.kim@ti.com> 9500fe141SSamu Onkalo * 10500fe141SSamu Onkalo * This program is free software; you can redistribute it and/or 11500fe141SSamu Onkalo * modify it under the terms of the GNU General Public License 12500fe141SSamu Onkalo * version 2 as published by the Free Software Foundation. 13500fe141SSamu Onkalo * 14500fe141SSamu Onkalo * This program is distributed in the hope that it will be useful, but 15500fe141SSamu Onkalo * WITHOUT ANY WARRANTY; without even the implied warranty of 16500fe141SSamu Onkalo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17500fe141SSamu Onkalo * General Public License for more details. 18500fe141SSamu Onkalo * 19500fe141SSamu Onkalo * You should have received a copy of the GNU General Public License 20500fe141SSamu Onkalo * along with this program; if not, write to the Free Software 21500fe141SSamu Onkalo * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 22500fe141SSamu Onkalo * 02110-1301 USA 23500fe141SSamu Onkalo */ 24500fe141SSamu Onkalo 25500fe141SSamu Onkalo #include <linux/delay.h> 269ce7cb17SMilo(Woogyom) Kim #include <linux/firmware.h> 2779bcc10bSMilo(Woogyom) Kim #include <linux/i2c.h> 2879bcc10bSMilo(Woogyom) Kim #include <linux/leds.h> 2979bcc10bSMilo(Woogyom) Kim #include <linux/module.h> 3079bcc10bSMilo(Woogyom) Kim #include <linux/mutex.h> 3179bcc10bSMilo(Woogyom) Kim #include <linux/platform_data/leds-lp55xx.h> 3279bcc10bSMilo(Woogyom) Kim #include <linux/slab.h> 337542a04bSLinus Walleij #include <linux/of.h> 346a0c9a47SMilo(Woogyom) Kim 356a0c9a47SMilo(Woogyom) Kim #include "leds-lp55xx-common.h" 36500fe141SSamu Onkalo 3712f022d2SMilo(Woogyom) Kim #define LP5521_PROGRAM_LENGTH 32 3812f022d2SMilo(Woogyom) Kim #define LP5521_MAX_LEDS 3 3912f022d2SMilo(Woogyom) Kim #define LP5521_CMD_DIRECT 0x3F 40500fe141SSamu Onkalo 41500fe141SSamu Onkalo /* Registers */ 42500fe141SSamu Onkalo #define LP5521_REG_ENABLE 0x00 43500fe141SSamu Onkalo #define LP5521_REG_OP_MODE 0x01 44500fe141SSamu Onkalo #define LP5521_REG_R_PWM 0x02 45500fe141SSamu Onkalo #define LP5521_REG_G_PWM 0x03 46500fe141SSamu Onkalo #define LP5521_REG_B_PWM 0x04 47500fe141SSamu Onkalo #define LP5521_REG_R_CURRENT 0x05 48500fe141SSamu Onkalo #define LP5521_REG_G_CURRENT 0x06 49500fe141SSamu Onkalo #define LP5521_REG_B_CURRENT 0x07 50500fe141SSamu Onkalo #define LP5521_REG_CONFIG 0x08 51500fe141SSamu Onkalo #define LP5521_REG_STATUS 0x0C 52500fe141SSamu Onkalo #define LP5521_REG_RESET 0x0D 53500fe141SSamu Onkalo #define LP5521_REG_R_PROG_MEM 0x10 54500fe141SSamu Onkalo #define LP5521_REG_G_PROG_MEM 0x30 55500fe141SSamu Onkalo #define LP5521_REG_B_PROG_MEM 0x50 56500fe141SSamu Onkalo 57500fe141SSamu Onkalo /* Base register to set LED current */ 58500fe141SSamu Onkalo #define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT 59500fe141SSamu Onkalo /* Base register to set the brightness */ 60500fe141SSamu Onkalo #define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM 61500fe141SSamu Onkalo 62500fe141SSamu Onkalo /* Bits in ENABLE register */ 63500fe141SSamu Onkalo #define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */ 64500fe141SSamu Onkalo #define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */ 65500fe141SSamu Onkalo #define LP5521_EXEC_RUN 0x2A 6632a2f747SKim, Milo #define LP5521_ENABLE_DEFAULT \ 6732a2f747SKim, Milo (LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM) 6832a2f747SKim, Milo #define LP5521_ENABLE_RUN_PROGRAM \ 6932a2f747SKim, Milo (LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN) 70500fe141SSamu Onkalo 7181f2a5b4SKim, Milo /* CONFIG register */ 7281f2a5b4SKim, Milo #define LP5521_PWM_HF 0x40 /* PWM: 0 = 256Hz, 1 = 558Hz */ 7381f2a5b4SKim, Milo #define LP5521_PWRSAVE_EN 0x20 /* 1 = Power save mode */ 7481f2a5b4SKim, Milo #define LP5521_CP_MODE_OFF 0 /* Charge pump (CP) off */ 7581f2a5b4SKim, Milo #define LP5521_CP_MODE_BYPASS 8 /* CP forced to bypass mode */ 7681f2a5b4SKim, Milo #define LP5521_CP_MODE_1X5 0x10 /* CP forced to 1.5x mode */ 7781f2a5b4SKim, Milo #define LP5521_CP_MODE_AUTO 0x18 /* Automatic mode selection */ 7881f2a5b4SKim, Milo #define LP5521_R_TO_BATT 0x04 /* R out: 0 = CP, 1 = Vbat */ 7981f2a5b4SKim, Milo #define LP5521_CLK_INT 0x01 /* Internal clock */ 8081f2a5b4SKim, Milo #define LP5521_DEFAULT_CFG \ 8181f2a5b4SKim, Milo (LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO) 8281f2a5b4SKim, Milo 83500fe141SSamu Onkalo /* Status */ 84500fe141SSamu Onkalo #define LP5521_EXT_CLK_USED 0x08 85500fe141SSamu Onkalo 86b3c49c05SSrinidhi KASAGAR /* default R channel current register value */ 87b3c49c05SSrinidhi KASAGAR #define LP5521_REG_R_CURR_DEFAULT 0xAF 88b3c49c05SSrinidhi KASAGAR 8948068d5dSMilo(Woogyom) Kim /* Reset register value */ 9048068d5dSMilo(Woogyom) Kim #define LP5521_RESET 0xFF 9148068d5dSMilo(Woogyom) Kim 929ce7cb17SMilo(Woogyom) Kim /* Program Memory Operations */ 939ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_R_M 0x30 /* Operation Mode Register */ 949ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_G_M 0x0C 959ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_B_M 0x03 969ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_R 0x10 979ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_G 0x04 989ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_B 0x01 999ce7cb17SMilo(Woogyom) Kim 1009ce7cb17SMilo(Woogyom) Kim #define LP5521_R_IS_LOADING(mode) \ 1019ce7cb17SMilo(Woogyom) Kim ((mode & LP5521_MODE_R_M) == LP5521_LOAD_R) 1029ce7cb17SMilo(Woogyom) Kim #define LP5521_G_IS_LOADING(mode) \ 1039ce7cb17SMilo(Woogyom) Kim ((mode & LP5521_MODE_G_M) == LP5521_LOAD_G) 1049ce7cb17SMilo(Woogyom) Kim #define LP5521_B_IS_LOADING(mode) \ 1059ce7cb17SMilo(Woogyom) Kim ((mode & LP5521_MODE_B_M) == LP5521_LOAD_B) 1069ce7cb17SMilo(Woogyom) Kim 1079ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_R_M 0x30 /* Enable Register */ 1089ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_G_M 0x0C 1099ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_B_M 0x03 1109ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_M 0x3F 1119ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_R 0x20 1129ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_G 0x08 1139ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_B 0x02 114500fe141SSamu Onkalo 1159ce7cb17SMilo(Woogyom) Kim static inline void lp5521_wait_opmode_done(void) 1169ce7cb17SMilo(Woogyom) Kim { 1179ce7cb17SMilo(Woogyom) Kim /* operation mode change needs to be longer than 153 us */ 1189ce7cb17SMilo(Woogyom) Kim usleep_range(200, 300); 1199ce7cb17SMilo(Woogyom) Kim } 1209ce7cb17SMilo(Woogyom) Kim 12194482174SMilo(Woogyom) Kim static inline void lp5521_wait_enable_done(void) 12294482174SMilo(Woogyom) Kim { 12394482174SMilo(Woogyom) Kim /* it takes more 488 us to update ENABLE register */ 12494482174SMilo(Woogyom) Kim usleep_range(500, 600); 12594482174SMilo(Woogyom) Kim } 12694482174SMilo(Woogyom) Kim 127a96bfa13SMilo(Woogyom) Kim static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current) 128a96bfa13SMilo(Woogyom) Kim { 129a96bfa13SMilo(Woogyom) Kim led->led_current = led_current; 130a96bfa13SMilo(Woogyom) Kim lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr, 131a96bfa13SMilo(Woogyom) Kim led_current); 132a96bfa13SMilo(Woogyom) Kim } 133a96bfa13SMilo(Woogyom) Kim 1349ce7cb17SMilo(Woogyom) Kim static void lp5521_load_engine(struct lp55xx_chip *chip) 135500fe141SSamu Onkalo { 1369ce7cb17SMilo(Woogyom) Kim enum lp55xx_engine_index idx = chip->engine_idx; 1379ce7cb17SMilo(Woogyom) Kim u8 mask[] = { 1389ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_1] = LP5521_MODE_R_M, 1399ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_2] = LP5521_MODE_G_M, 1409ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_3] = LP5521_MODE_B_M, 1419ce7cb17SMilo(Woogyom) Kim }; 142500fe141SSamu Onkalo 1439ce7cb17SMilo(Woogyom) Kim u8 val[] = { 1449ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_1] = LP5521_LOAD_R, 1459ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_2] = LP5521_LOAD_G, 1469ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_3] = LP5521_LOAD_B, 1479ce7cb17SMilo(Woogyom) Kim }; 148500fe141SSamu Onkalo 1499ce7cb17SMilo(Woogyom) Kim lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]); 150500fe141SSamu Onkalo 1519ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 152500fe141SSamu Onkalo } 153500fe141SSamu Onkalo 15428c9266bSMilo Kim static void lp5521_stop_all_engines(struct lp55xx_chip *chip) 155500fe141SSamu Onkalo { 1569ce7cb17SMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_OP_MODE, 0); 1579ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 1589ce7cb17SMilo(Woogyom) Kim } 1599ce7cb17SMilo(Woogyom) Kim 16028c9266bSMilo Kim static void lp5521_stop_engine(struct lp55xx_chip *chip) 16128c9266bSMilo Kim { 16228c9266bSMilo Kim enum lp55xx_engine_index idx = chip->engine_idx; 16328c9266bSMilo Kim u8 mask[] = { 16428c9266bSMilo Kim [LP55XX_ENGINE_1] = LP5521_MODE_R_M, 16528c9266bSMilo Kim [LP55XX_ENGINE_2] = LP5521_MODE_G_M, 16628c9266bSMilo Kim [LP55XX_ENGINE_3] = LP5521_MODE_B_M, 16728c9266bSMilo Kim }; 16828c9266bSMilo Kim 16928c9266bSMilo Kim lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0); 17028c9266bSMilo Kim 17128c9266bSMilo Kim lp5521_wait_opmode_done(); 17228c9266bSMilo Kim } 17328c9266bSMilo Kim 1749ce7cb17SMilo(Woogyom) Kim static void lp5521_run_engine(struct lp55xx_chip *chip, bool start) 1759ce7cb17SMilo(Woogyom) Kim { 176500fe141SSamu Onkalo int ret; 177500fe141SSamu Onkalo u8 mode; 1789ce7cb17SMilo(Woogyom) Kim u8 exec; 179500fe141SSamu Onkalo 1809ce7cb17SMilo(Woogyom) Kim /* stop engine */ 1819ce7cb17SMilo(Woogyom) Kim if (!start) { 1829ce7cb17SMilo(Woogyom) Kim lp5521_stop_engine(chip); 1839ce7cb17SMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); 1849ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 1859ce7cb17SMilo(Woogyom) Kim return; 1869ce7cb17SMilo(Woogyom) Kim } 1879ce7cb17SMilo(Woogyom) Kim 1889ce7cb17SMilo(Woogyom) Kim /* 1899ce7cb17SMilo(Woogyom) Kim * To run the engine, 1909ce7cb17SMilo(Woogyom) Kim * operation mode and enable register should updated at the same time 1919ce7cb17SMilo(Woogyom) Kim */ 1929ce7cb17SMilo(Woogyom) Kim 1939ce7cb17SMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode); 1945bc9ad77SDan Carpenter if (ret) 1959ce7cb17SMilo(Woogyom) Kim return; 1965bc9ad77SDan Carpenter 1979ce7cb17SMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec); 1985bc9ad77SDan Carpenter if (ret) 1999ce7cb17SMilo(Woogyom) Kim return; 200500fe141SSamu Onkalo 2019ce7cb17SMilo(Woogyom) Kim /* change operation mode to RUN only when each engine is loading */ 2029ce7cb17SMilo(Woogyom) Kim if (LP5521_R_IS_LOADING(mode)) { 2039ce7cb17SMilo(Woogyom) Kim mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R; 2049ce7cb17SMilo(Woogyom) Kim exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R; 2059ce7cb17SMilo(Woogyom) Kim } 206500fe141SSamu Onkalo 2079ce7cb17SMilo(Woogyom) Kim if (LP5521_G_IS_LOADING(mode)) { 2089ce7cb17SMilo(Woogyom) Kim mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G; 2099ce7cb17SMilo(Woogyom) Kim exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G; 2109ce7cb17SMilo(Woogyom) Kim } 211500fe141SSamu Onkalo 2129ce7cb17SMilo(Woogyom) Kim if (LP5521_B_IS_LOADING(mode)) { 2139ce7cb17SMilo(Woogyom) Kim mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B; 2149ce7cb17SMilo(Woogyom) Kim exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B; 2159ce7cb17SMilo(Woogyom) Kim } 2169ce7cb17SMilo(Woogyom) Kim 2179ce7cb17SMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_OP_MODE, mode); 2189ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 2199ce7cb17SMilo(Woogyom) Kim 2209ce7cb17SMilo(Woogyom) Kim lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec); 2219ce7cb17SMilo(Woogyom) Kim lp5521_wait_enable_done(); 2229ce7cb17SMilo(Woogyom) Kim } 2239ce7cb17SMilo(Woogyom) Kim 2249ce7cb17SMilo(Woogyom) Kim static int lp5521_update_program_memory(struct lp55xx_chip *chip, 2259ce7cb17SMilo(Woogyom) Kim const u8 *data, size_t size) 2269ce7cb17SMilo(Woogyom) Kim { 2279ce7cb17SMilo(Woogyom) Kim enum lp55xx_engine_index idx = chip->engine_idx; 2289ce7cb17SMilo(Woogyom) Kim u8 pattern[LP5521_PROGRAM_LENGTH] = {0}; 2299ce7cb17SMilo(Woogyom) Kim u8 addr[] = { 2309ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM, 2319ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM, 2329ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM, 2339ce7cb17SMilo(Woogyom) Kim }; 2349ce7cb17SMilo(Woogyom) Kim unsigned cmd; 2359ce7cb17SMilo(Woogyom) Kim char c[3]; 2369ce7cb17SMilo(Woogyom) Kim int nrchars; 2379ce7cb17SMilo(Woogyom) Kim int ret; 2381eca0b3aSMilo Kim int offset = 0; 2391eca0b3aSMilo Kim int i = 0; 2409ce7cb17SMilo(Woogyom) Kim 2419ce7cb17SMilo(Woogyom) Kim while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) { 2429ce7cb17SMilo(Woogyom) Kim /* separate sscanfs because length is working only for %s */ 2439ce7cb17SMilo(Woogyom) Kim ret = sscanf(data + offset, "%2s%n ", c, &nrchars); 2449ce7cb17SMilo(Woogyom) Kim if (ret != 1) 2459ce7cb17SMilo(Woogyom) Kim goto err; 2469ce7cb17SMilo(Woogyom) Kim 2479ce7cb17SMilo(Woogyom) Kim ret = sscanf(c, "%2x", &cmd); 2489ce7cb17SMilo(Woogyom) Kim if (ret != 1) 2499ce7cb17SMilo(Woogyom) Kim goto err; 2509ce7cb17SMilo(Woogyom) Kim 2519ce7cb17SMilo(Woogyom) Kim pattern[i] = (u8)cmd; 2529ce7cb17SMilo(Woogyom) Kim offset += nrchars; 2539ce7cb17SMilo(Woogyom) Kim i++; 2549ce7cb17SMilo(Woogyom) Kim } 2559ce7cb17SMilo(Woogyom) Kim 2569ce7cb17SMilo(Woogyom) Kim /* Each instruction is 16bit long. Check that length is even */ 2579ce7cb17SMilo(Woogyom) Kim if (i % 2) 2589ce7cb17SMilo(Woogyom) Kim goto err; 2599ce7cb17SMilo(Woogyom) Kim 2601eca0b3aSMilo Kim for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) { 261c0e5e9b5SMilo Kim ret = lp55xx_write(chip, addr[idx] + i, pattern[i]); 262e70988d1SMilo Kim if (ret) 263c0e5e9b5SMilo Kim return -EINVAL; 264c0e5e9b5SMilo Kim } 265c0e5e9b5SMilo Kim 266c0e5e9b5SMilo Kim return size; 2679ce7cb17SMilo(Woogyom) Kim 2689ce7cb17SMilo(Woogyom) Kim err: 2699ce7cb17SMilo(Woogyom) Kim dev_err(&chip->cl->dev, "wrong pattern format\n"); 2709ce7cb17SMilo(Woogyom) Kim return -EINVAL; 2719ce7cb17SMilo(Woogyom) Kim } 2729ce7cb17SMilo(Woogyom) Kim 2739ce7cb17SMilo(Woogyom) Kim static void lp5521_firmware_loaded(struct lp55xx_chip *chip) 2749ce7cb17SMilo(Woogyom) Kim { 2759ce7cb17SMilo(Woogyom) Kim const struct firmware *fw = chip->fw; 2769ce7cb17SMilo(Woogyom) Kim 2779ce7cb17SMilo(Woogyom) Kim if (fw->size > LP5521_PROGRAM_LENGTH) { 2789ce7cb17SMilo(Woogyom) Kim dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", 2799ce7cb17SMilo(Woogyom) Kim fw->size); 2809ce7cb17SMilo(Woogyom) Kim return; 2819ce7cb17SMilo(Woogyom) Kim } 2829ce7cb17SMilo(Woogyom) Kim 2839ce7cb17SMilo(Woogyom) Kim /* 2849ce7cb17SMilo(Woogyom) Kim * Program momery sequence 2859ce7cb17SMilo(Woogyom) Kim * 1) set engine mode to "LOAD" 2869ce7cb17SMilo(Woogyom) Kim * 2) write firmware data into program memory 2879ce7cb17SMilo(Woogyom) Kim */ 2889ce7cb17SMilo(Woogyom) Kim 2899ce7cb17SMilo(Woogyom) Kim lp5521_load_engine(chip); 2909ce7cb17SMilo(Woogyom) Kim lp5521_update_program_memory(chip, fw->data, fw->size); 291500fe141SSamu Onkalo } 292500fe141SSamu Onkalo 293ffbdccdbSMilo(Woogyom) Kim static int lp5521_post_init_device(struct lp55xx_chip *chip) 294500fe141SSamu Onkalo { 295500fe141SSamu Onkalo int ret; 29694482174SMilo(Woogyom) Kim u8 val; 297500fe141SSamu Onkalo 29894482174SMilo(Woogyom) Kim /* 29994482174SMilo(Woogyom) Kim * Make sure that the chip is reset by reading back the r channel 30094482174SMilo(Woogyom) Kim * current reg. This is dummy read is required on some platforms - 30194482174SMilo(Woogyom) Kim * otherwise further access to the R G B channels in the 30294482174SMilo(Woogyom) Kim * LP5521_REG_ENABLE register will not have any effect - strange! 30394482174SMilo(Woogyom) Kim */ 304ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val); 30594482174SMilo(Woogyom) Kim if (ret) { 306ffbdccdbSMilo(Woogyom) Kim dev_err(&chip->cl->dev, "error in resetting chip\n"); 30794482174SMilo(Woogyom) Kim return ret; 30894482174SMilo(Woogyom) Kim } 30994482174SMilo(Woogyom) Kim if (val != LP5521_REG_R_CURR_DEFAULT) { 310ffbdccdbSMilo(Woogyom) Kim dev_err(&chip->cl->dev, 31194482174SMilo(Woogyom) Kim "unexpected data in register (expected 0x%x got 0x%x)\n", 31294482174SMilo(Woogyom) Kim LP5521_REG_R_CURR_DEFAULT, val); 31394482174SMilo(Woogyom) Kim ret = -EINVAL; 31494482174SMilo(Woogyom) Kim return ret; 31594482174SMilo(Woogyom) Kim } 31694482174SMilo(Woogyom) Kim usleep_range(10000, 20000); 317500fe141SSamu Onkalo 318500fe141SSamu Onkalo /* Set all PWMs to direct control mode */ 319ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); 320500fe141SSamu Onkalo 32181f2a5b4SKim, Milo /* Update configuration for the clock setting */ 32281f2a5b4SKim, Milo val = LP5521_DEFAULT_CFG; 32381f2a5b4SKim, Milo if (!lp55xx_is_extclk_used(chip)) 32481f2a5b4SKim, Milo val |= LP5521_CLK_INT; 32581f2a5b4SKim, Milo 326ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_write(chip, LP5521_REG_CONFIG, val); 32794482174SMilo(Woogyom) Kim if (ret) 32894482174SMilo(Woogyom) Kim return ret; 329500fe141SSamu Onkalo 330500fe141SSamu Onkalo /* Initialize all channels PWM to zero -> leds off */ 331ffbdccdbSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_R_PWM, 0); 332ffbdccdbSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_G_PWM, 0); 333ffbdccdbSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_B_PWM, 0); 334500fe141SSamu Onkalo 335500fe141SSamu Onkalo /* Set engines are set to run state when OP_MODE enables engines */ 336ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM); 33794482174SMilo(Woogyom) Kim if (ret) 338500fe141SSamu Onkalo return ret; 33994482174SMilo(Woogyom) Kim 34094482174SMilo(Woogyom) Kim lp5521_wait_enable_done(); 34194482174SMilo(Woogyom) Kim 34294482174SMilo(Woogyom) Kim return 0; 343500fe141SSamu Onkalo } 344500fe141SSamu Onkalo 3459ca3bd80SMilo(Woogyom) Kim static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf) 346500fe141SSamu Onkalo { 3479ca3bd80SMilo(Woogyom) Kim struct lp55xx_platform_data *pdata = chip->pdata; 348500fe141SSamu Onkalo int ret; 349500fe141SSamu Onkalo u8 status; 350500fe141SSamu Onkalo 3519ca3bd80SMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_STATUS, &status); 352500fe141SSamu Onkalo if (ret < 0) 353500fe141SSamu Onkalo return ret; 354500fe141SSamu Onkalo 3559ca3bd80SMilo(Woogyom) Kim if (pdata->clock_mode != LP55XX_CLOCK_EXT) 3569ca3bd80SMilo(Woogyom) Kim return 0; 3579ca3bd80SMilo(Woogyom) Kim 358500fe141SSamu Onkalo /* Check that ext clock is really in use if requested */ 359500fe141SSamu Onkalo if ((status & LP5521_EXT_CLK_USED) == 0) 360500fe141SSamu Onkalo return -EIO; 3619ca3bd80SMilo(Woogyom) Kim 362500fe141SSamu Onkalo return 0; 363500fe141SSamu Onkalo } 364500fe141SSamu Onkalo 365500fe141SSamu Onkalo static void lp5521_led_brightness_work(struct work_struct *work) 366500fe141SSamu Onkalo { 367a6e4679aSMilo(Woogyom) Kim struct lp55xx_led *led = container_of(work, struct lp55xx_led, 368500fe141SSamu Onkalo brightness_work); 369a6e4679aSMilo(Woogyom) Kim struct lp55xx_chip *chip = led->chip; 370500fe141SSamu Onkalo 371500fe141SSamu Onkalo mutex_lock(&chip->lock); 372a6e4679aSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr, 373500fe141SSamu Onkalo led->brightness); 374500fe141SSamu Onkalo mutex_unlock(&chip->lock); 375500fe141SSamu Onkalo } 376500fe141SSamu Onkalo 377c0e5e9b5SMilo Kim static ssize_t show_engine_mode(struct device *dev, 378c0e5e9b5SMilo Kim struct device_attribute *attr, 379c0e5e9b5SMilo Kim char *buf, int nr) 380c0e5e9b5SMilo Kim { 381c0e5e9b5SMilo Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 382c0e5e9b5SMilo Kim struct lp55xx_chip *chip = led->chip; 383c0e5e9b5SMilo Kim enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; 384c0e5e9b5SMilo Kim 385c0e5e9b5SMilo Kim switch (mode) { 386c0e5e9b5SMilo Kim case LP55XX_ENGINE_RUN: 387c0e5e9b5SMilo Kim return sprintf(buf, "run\n"); 388c0e5e9b5SMilo Kim case LP55XX_ENGINE_LOAD: 389c0e5e9b5SMilo Kim return sprintf(buf, "load\n"); 390c0e5e9b5SMilo Kim case LP55XX_ENGINE_DISABLED: 391c0e5e9b5SMilo Kim default: 392c0e5e9b5SMilo Kim return sprintf(buf, "disabled\n"); 393c0e5e9b5SMilo Kim } 394c0e5e9b5SMilo Kim } 395c0e5e9b5SMilo Kim show_mode(1) 396c0e5e9b5SMilo Kim show_mode(2) 397c0e5e9b5SMilo Kim show_mode(3) 398c0e5e9b5SMilo Kim 399c0e5e9b5SMilo Kim static ssize_t store_engine_mode(struct device *dev, 400c0e5e9b5SMilo Kim struct device_attribute *attr, 401c0e5e9b5SMilo Kim const char *buf, size_t len, int nr) 402c0e5e9b5SMilo Kim { 403c0e5e9b5SMilo Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 404c0e5e9b5SMilo Kim struct lp55xx_chip *chip = led->chip; 405c0e5e9b5SMilo Kim struct lp55xx_engine *engine = &chip->engines[nr - 1]; 406c0e5e9b5SMilo Kim 407c0e5e9b5SMilo Kim mutex_lock(&chip->lock); 408c0e5e9b5SMilo Kim 409c0e5e9b5SMilo Kim chip->engine_idx = nr; 410c0e5e9b5SMilo Kim 411c0e5e9b5SMilo Kim if (!strncmp(buf, "run", 3)) { 412c0e5e9b5SMilo Kim lp5521_run_engine(chip, true); 413c0e5e9b5SMilo Kim engine->mode = LP55XX_ENGINE_RUN; 414c0e5e9b5SMilo Kim } else if (!strncmp(buf, "load", 4)) { 415c0e5e9b5SMilo Kim lp5521_stop_engine(chip); 416c0e5e9b5SMilo Kim lp5521_load_engine(chip); 417c0e5e9b5SMilo Kim engine->mode = LP55XX_ENGINE_LOAD; 418c0e5e9b5SMilo Kim } else if (!strncmp(buf, "disabled", 8)) { 419c0e5e9b5SMilo Kim lp5521_stop_engine(chip); 420c0e5e9b5SMilo Kim engine->mode = LP55XX_ENGINE_DISABLED; 421c0e5e9b5SMilo Kim } 422c0e5e9b5SMilo Kim 423c0e5e9b5SMilo Kim mutex_unlock(&chip->lock); 424c0e5e9b5SMilo Kim 425c0e5e9b5SMilo Kim return len; 426c0e5e9b5SMilo Kim } 427c0e5e9b5SMilo Kim store_mode(1) 428c0e5e9b5SMilo Kim store_mode(2) 429c0e5e9b5SMilo Kim store_mode(3) 430c0e5e9b5SMilo Kim 431c0e5e9b5SMilo Kim static ssize_t store_engine_load(struct device *dev, 432c0e5e9b5SMilo Kim struct device_attribute *attr, 433c0e5e9b5SMilo Kim const char *buf, size_t len, int nr) 434c0e5e9b5SMilo Kim { 435c0e5e9b5SMilo Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 436c0e5e9b5SMilo Kim struct lp55xx_chip *chip = led->chip; 437e70988d1SMilo Kim int ret; 438c0e5e9b5SMilo Kim 439c0e5e9b5SMilo Kim mutex_lock(&chip->lock); 440c0e5e9b5SMilo Kim 441c0e5e9b5SMilo Kim chip->engine_idx = nr; 442c0e5e9b5SMilo Kim lp5521_load_engine(chip); 443e70988d1SMilo Kim ret = lp5521_update_program_memory(chip, buf, len); 444c0e5e9b5SMilo Kim 445c0e5e9b5SMilo Kim mutex_unlock(&chip->lock); 446c0e5e9b5SMilo Kim 447e70988d1SMilo Kim return ret; 448c0e5e9b5SMilo Kim } 449c0e5e9b5SMilo Kim store_load(1) 450c0e5e9b5SMilo Kim store_load(2) 451c0e5e9b5SMilo Kim store_load(3) 452c0e5e9b5SMilo Kim 453500fe141SSamu Onkalo static ssize_t lp5521_selftest(struct device *dev, 454500fe141SSamu Onkalo struct device_attribute *attr, 455500fe141SSamu Onkalo char *buf) 456500fe141SSamu Onkalo { 4579ca3bd80SMilo(Woogyom) Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 4589ca3bd80SMilo(Woogyom) Kim struct lp55xx_chip *chip = led->chip; 459500fe141SSamu Onkalo int ret; 460500fe141SSamu Onkalo 461500fe141SSamu Onkalo mutex_lock(&chip->lock); 462500fe141SSamu Onkalo ret = lp5521_run_selftest(chip, buf); 463500fe141SSamu Onkalo mutex_unlock(&chip->lock); 46424d32128SKim, Milo 46524d32128SKim, Milo return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK"); 466500fe141SSamu Onkalo } 467500fe141SSamu Onkalo 468500fe141SSamu Onkalo /* device attributes */ 469c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode); 470c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode); 471c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode); 472c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load); 473c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load); 474c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load); 475c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest); 476500fe141SSamu Onkalo 477500fe141SSamu Onkalo static struct attribute *lp5521_attributes[] = { 478c0e5e9b5SMilo Kim &dev_attr_engine1_mode.attr, 479c0e5e9b5SMilo Kim &dev_attr_engine2_mode.attr, 480c0e5e9b5SMilo Kim &dev_attr_engine3_mode.attr, 481c0e5e9b5SMilo Kim &dev_attr_engine1_load.attr, 482c0e5e9b5SMilo Kim &dev_attr_engine2_load.attr, 483c0e5e9b5SMilo Kim &dev_attr_engine3_load.attr, 484500fe141SSamu Onkalo &dev_attr_selftest.attr, 485500fe141SSamu Onkalo NULL 486500fe141SSamu Onkalo }; 487500fe141SSamu Onkalo 488500fe141SSamu Onkalo static const struct attribute_group lp5521_group = { 489500fe141SSamu Onkalo .attrs = lp5521_attributes, 490500fe141SSamu Onkalo }; 491500fe141SSamu Onkalo 49248068d5dSMilo(Woogyom) Kim /* Chip specific configurations */ 49348068d5dSMilo(Woogyom) Kim static struct lp55xx_device_config lp5521_cfg = { 49448068d5dSMilo(Woogyom) Kim .reset = { 49548068d5dSMilo(Woogyom) Kim .addr = LP5521_REG_RESET, 49648068d5dSMilo(Woogyom) Kim .val = LP5521_RESET, 49748068d5dSMilo(Woogyom) Kim }, 498e3a700d8SMilo(Woogyom) Kim .enable = { 499e3a700d8SMilo(Woogyom) Kim .addr = LP5521_REG_ENABLE, 500e3a700d8SMilo(Woogyom) Kim .val = LP5521_ENABLE_DEFAULT, 501e3a700d8SMilo(Woogyom) Kim }, 5020e202346SMilo(Woogyom) Kim .max_channel = LP5521_MAX_LEDS, 503ffbdccdbSMilo(Woogyom) Kim .post_init_device = lp5521_post_init_device, 504a6e4679aSMilo(Woogyom) Kim .brightness_work_fn = lp5521_led_brightness_work, 505a96bfa13SMilo(Woogyom) Kim .set_led_current = lp5521_set_led_current, 5069ce7cb17SMilo(Woogyom) Kim .firmware_cb = lp5521_firmware_loaded, 5079ce7cb17SMilo(Woogyom) Kim .run_engine = lp5521_run_engine, 508e73c0ce6SMilo(Woogyom) Kim .dev_attr_group = &lp5521_group, 50948068d5dSMilo(Woogyom) Kim }; 51048068d5dSMilo(Woogyom) Kim 51198ea1ea2SBill Pemberton static int lp5521_probe(struct i2c_client *client, 512500fe141SSamu Onkalo const struct i2c_device_id *id) 513500fe141SSamu Onkalo { 5141904f83dSMilo(Woogyom) Kim int ret; 5156a0c9a47SMilo(Woogyom) Kim struct lp55xx_chip *chip; 5166a0c9a47SMilo(Woogyom) Kim struct lp55xx_led *led; 517*ed133352SMilo Kim struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev); 5187542a04bSLinus Walleij struct device_node *np = client->dev.of_node; 519500fe141SSamu Onkalo 520*ed133352SMilo Kim if (!pdata) { 5217542a04bSLinus Walleij if (np) { 522*ed133352SMilo Kim pdata = lp55xx_of_populate_pdata(&client->dev, np); 523*ed133352SMilo Kim if (IS_ERR(pdata)) 524*ed133352SMilo Kim return PTR_ERR(pdata); 5257542a04bSLinus Walleij } else { 526500fe141SSamu Onkalo dev_err(&client->dev, "no platform data\n"); 527e430dc00SBryan Wu return -EINVAL; 528500fe141SSamu Onkalo } 5297542a04bSLinus Walleij } 530500fe141SSamu Onkalo 5316a0c9a47SMilo(Woogyom) Kim chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 5326a0c9a47SMilo(Woogyom) Kim if (!chip) 5336a0c9a47SMilo(Woogyom) Kim return -ENOMEM; 534500fe141SSamu Onkalo 5356a0c9a47SMilo(Woogyom) Kim led = devm_kzalloc(&client->dev, 5366a0c9a47SMilo(Woogyom) Kim sizeof(*led) * pdata->num_channels, GFP_KERNEL); 5376a0c9a47SMilo(Woogyom) Kim if (!led) 5386a0c9a47SMilo(Woogyom) Kim return -ENOMEM; 5396a0c9a47SMilo(Woogyom) Kim 5406a0c9a47SMilo(Woogyom) Kim chip->cl = client; 5416a0c9a47SMilo(Woogyom) Kim chip->pdata = pdata; 54248068d5dSMilo(Woogyom) Kim chip->cfg = &lp5521_cfg; 5436a0c9a47SMilo(Woogyom) Kim 5446a0c9a47SMilo(Woogyom) Kim mutex_init(&chip->lock); 5456a0c9a47SMilo(Woogyom) Kim 5466a0c9a47SMilo(Woogyom) Kim i2c_set_clientdata(client, led); 547500fe141SSamu Onkalo 54822ebeb48SMilo(Woogyom) Kim ret = lp55xx_init_device(chip); 549944f7b1dSMilo(Woogyom) Kim if (ret) 550f6c64c6fSMilo(Woogyom) Kim goto err_init; 551500fe141SSamu Onkalo 552500fe141SSamu Onkalo dev_info(&client->dev, "%s programmable led chip found\n", id->name); 553500fe141SSamu Onkalo 5549e9b3db1SMilo(Woogyom) Kim ret = lp55xx_register_leds(led, chip); 555f6524808SMilo(Woogyom) Kim if (ret) 5569e9b3db1SMilo(Woogyom) Kim goto err_register_leds; 557500fe141SSamu Onkalo 558e73c0ce6SMilo(Woogyom) Kim ret = lp55xx_register_sysfs(chip); 559500fe141SSamu Onkalo if (ret) { 560500fe141SSamu Onkalo dev_err(&client->dev, "registering sysfs failed\n"); 561e73c0ce6SMilo(Woogyom) Kim goto err_register_sysfs; 562500fe141SSamu Onkalo } 563e73c0ce6SMilo(Woogyom) Kim 564e73c0ce6SMilo(Woogyom) Kim return 0; 565e73c0ce6SMilo(Woogyom) Kim 566e73c0ce6SMilo(Woogyom) Kim err_register_sysfs: 567c3a68ebfSMilo(Woogyom) Kim lp55xx_unregister_leds(led, chip); 5689e9b3db1SMilo(Woogyom) Kim err_register_leds: 5696ce61762SMilo(Woogyom) Kim lp55xx_deinit_device(chip); 570f6c64c6fSMilo(Woogyom) Kim err_init: 571500fe141SSamu Onkalo return ret; 572500fe141SSamu Onkalo } 573500fe141SSamu Onkalo 574678e8a6bSBill Pemberton static int lp5521_remove(struct i2c_client *client) 575500fe141SSamu Onkalo { 5766ce61762SMilo(Woogyom) Kim struct lp55xx_led *led = i2c_get_clientdata(client); 5776ce61762SMilo(Woogyom) Kim struct lp55xx_chip *chip = led->chip; 578500fe141SSamu Onkalo 57928c9266bSMilo Kim lp5521_stop_all_engines(chip); 58087cc4bdeSMilo(Woogyom) Kim lp55xx_unregister_sysfs(chip); 581c3a68ebfSMilo(Woogyom) Kim lp55xx_unregister_leds(led, chip); 5826ce61762SMilo(Woogyom) Kim lp55xx_deinit_device(chip); 583500fe141SSamu Onkalo 584500fe141SSamu Onkalo return 0; 585500fe141SSamu Onkalo } 586500fe141SSamu Onkalo 587500fe141SSamu Onkalo static const struct i2c_device_id lp5521_id[] = { 588500fe141SSamu Onkalo { "lp5521", 0 }, /* Three channel chip */ 589500fe141SSamu Onkalo { } 590500fe141SSamu Onkalo }; 591500fe141SSamu Onkalo MODULE_DEVICE_TABLE(i2c, lp5521_id); 592500fe141SSamu Onkalo 593b548a34bSAxel Lin #ifdef CONFIG_OF 594b548a34bSAxel Lin static const struct of_device_id of_lp5521_leds_match[] = { 595b548a34bSAxel Lin { .compatible = "national,lp5521", }, 596b548a34bSAxel Lin {}, 597b548a34bSAxel Lin }; 598b548a34bSAxel Lin 599b548a34bSAxel Lin MODULE_DEVICE_TABLE(of, of_lp5521_leds_match); 600b548a34bSAxel Lin #endif 601500fe141SSamu Onkalo static struct i2c_driver lp5521_driver = { 602500fe141SSamu Onkalo .driver = { 603500fe141SSamu Onkalo .name = "lp5521", 604b548a34bSAxel Lin .of_match_table = of_match_ptr(of_lp5521_leds_match), 605500fe141SSamu Onkalo }, 606500fe141SSamu Onkalo .probe = lp5521_probe, 607df07cf81SBill Pemberton .remove = lp5521_remove, 608500fe141SSamu Onkalo .id_table = lp5521_id, 609500fe141SSamu Onkalo }; 610500fe141SSamu Onkalo 61109a0d183SAxel Lin module_i2c_driver(lp5521_driver); 612500fe141SSamu Onkalo 613500fe141SSamu Onkalo MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo"); 614a2387cb9SMilo(Woogyom) Kim MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>"); 615500fe141SSamu Onkalo MODULE_DESCRIPTION("LP5521 LED engine"); 616500fe141SSamu Onkalo MODULE_LICENSE("GPL v2"); 617