xref: /openbmc/linux/drivers/leds/leds-lp5521.c (revision 79bcc10b8cf3db99958743ecb174e7637e1dd932)
1500fe141SSamu Onkalo /*
2500fe141SSamu Onkalo  * LP5521 LED chip driver.
3500fe141SSamu Onkalo  *
4500fe141SSamu Onkalo  * Copyright (C) 2010 Nokia Corporation
5500fe141SSamu Onkalo  *
6500fe141SSamu Onkalo  * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
7500fe141SSamu Onkalo  *
8500fe141SSamu Onkalo  * This program is free software; you can redistribute it and/or
9500fe141SSamu Onkalo  * modify it under the terms of the GNU General Public License
10500fe141SSamu Onkalo  * version 2 as published by the Free Software Foundation.
11500fe141SSamu Onkalo  *
12500fe141SSamu Onkalo  * This program is distributed in the hope that it will be useful, but
13500fe141SSamu Onkalo  * WITHOUT ANY WARRANTY; without even the implied warranty of
14500fe141SSamu Onkalo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
15500fe141SSamu Onkalo  * General Public License for more details.
16500fe141SSamu Onkalo  *
17500fe141SSamu Onkalo  * You should have received a copy of the GNU General Public License
18500fe141SSamu Onkalo  * along with this program; if not, write to the Free Software
19500fe141SSamu Onkalo  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20500fe141SSamu Onkalo  * 02110-1301 USA
21500fe141SSamu Onkalo  */
22500fe141SSamu Onkalo 
23500fe141SSamu Onkalo #include <linux/delay.h>
249ce7cb17SMilo(Woogyom) Kim #include <linux/firmware.h>
25*79bcc10bSMilo(Woogyom) Kim #include <linux/i2c.h>
26*79bcc10bSMilo(Woogyom) Kim #include <linux/init.h>
27*79bcc10bSMilo(Woogyom) Kim #include <linux/leds.h>
28*79bcc10bSMilo(Woogyom) Kim #include <linux/module.h>
29*79bcc10bSMilo(Woogyom) Kim #include <linux/mutex.h>
30*79bcc10bSMilo(Woogyom) Kim #include <linux/platform_data/leds-lp55xx.h>
31*79bcc10bSMilo(Woogyom) Kim #include <linux/slab.h>
326a0c9a47SMilo(Woogyom) Kim 
336a0c9a47SMilo(Woogyom) Kim #include "leds-lp55xx-common.h"
34500fe141SSamu Onkalo 
3512f022d2SMilo(Woogyom) Kim #define LP5521_PROGRAM_LENGTH		32
3612f022d2SMilo(Woogyom) Kim #define LP5521_MAX_LEDS			3
3712f022d2SMilo(Woogyom) Kim #define LP5521_CMD_DIRECT		0x3F
38500fe141SSamu Onkalo 
39500fe141SSamu Onkalo /* Registers */
40500fe141SSamu Onkalo #define LP5521_REG_ENABLE		0x00
41500fe141SSamu Onkalo #define LP5521_REG_OP_MODE		0x01
42500fe141SSamu Onkalo #define LP5521_REG_R_PWM		0x02
43500fe141SSamu Onkalo #define LP5521_REG_G_PWM		0x03
44500fe141SSamu Onkalo #define LP5521_REG_B_PWM		0x04
45500fe141SSamu Onkalo #define LP5521_REG_R_CURRENT		0x05
46500fe141SSamu Onkalo #define LP5521_REG_G_CURRENT		0x06
47500fe141SSamu Onkalo #define LP5521_REG_B_CURRENT		0x07
48500fe141SSamu Onkalo #define LP5521_REG_CONFIG		0x08
49500fe141SSamu Onkalo #define LP5521_REG_STATUS		0x0C
50500fe141SSamu Onkalo #define LP5521_REG_RESET		0x0D
51500fe141SSamu Onkalo #define LP5521_REG_R_PROG_MEM		0x10
52500fe141SSamu Onkalo #define LP5521_REG_G_PROG_MEM		0x30
53500fe141SSamu Onkalo #define LP5521_REG_B_PROG_MEM		0x50
54500fe141SSamu Onkalo 
55500fe141SSamu Onkalo /* Base register to set LED current */
56500fe141SSamu Onkalo #define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
57500fe141SSamu Onkalo /* Base register to set the brightness */
58500fe141SSamu Onkalo #define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM
59500fe141SSamu Onkalo 
60500fe141SSamu Onkalo /* Bits in ENABLE register */
61500fe141SSamu Onkalo #define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
62500fe141SSamu Onkalo #define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
63500fe141SSamu Onkalo #define LP5521_EXEC_RUN			0x2A
6432a2f747SKim, Milo #define LP5521_ENABLE_DEFAULT	\
6532a2f747SKim, Milo 	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
6632a2f747SKim, Milo #define LP5521_ENABLE_RUN_PROGRAM	\
6732a2f747SKim, Milo 	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
68500fe141SSamu Onkalo 
69500fe141SSamu Onkalo /* Status */
70500fe141SSamu Onkalo #define LP5521_EXT_CLK_USED		0x08
71500fe141SSamu Onkalo 
72b3c49c05SSrinidhi KASAGAR /* default R channel current register value */
73b3c49c05SSrinidhi KASAGAR #define LP5521_REG_R_CURR_DEFAULT	0xAF
74b3c49c05SSrinidhi KASAGAR 
7548068d5dSMilo(Woogyom) Kim /* Reset register value */
7648068d5dSMilo(Woogyom) Kim #define LP5521_RESET			0xFF
7748068d5dSMilo(Woogyom) Kim 
789ce7cb17SMilo(Woogyom) Kim /* Program Memory Operations */
799ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
809ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_G_M			0x0C
819ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_B_M			0x03
829ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_R			0x10
839ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_G			0x04
849ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_B			0x01
859ce7cb17SMilo(Woogyom) Kim 
869ce7cb17SMilo(Woogyom) Kim #define LP5521_R_IS_LOADING(mode)	\
879ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
889ce7cb17SMilo(Woogyom) Kim #define LP5521_G_IS_LOADING(mode)	\
899ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
909ce7cb17SMilo(Woogyom) Kim #define LP5521_B_IS_LOADING(mode)	\
919ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
929ce7cb17SMilo(Woogyom) Kim 
939ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_R_M			0x30	/* Enable Register */
949ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_G_M			0x0C
959ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_B_M			0x03
969ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_M			0x3F
979ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_R			0x20
989ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_G			0x08
999ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_B			0x02
100500fe141SSamu Onkalo 
1019ce7cb17SMilo(Woogyom) Kim static inline void lp5521_wait_opmode_done(void)
1029ce7cb17SMilo(Woogyom) Kim {
1039ce7cb17SMilo(Woogyom) Kim 	/* operation mode change needs to be longer than 153 us */
1049ce7cb17SMilo(Woogyom) Kim 	usleep_range(200, 300);
1059ce7cb17SMilo(Woogyom) Kim }
1069ce7cb17SMilo(Woogyom) Kim 
10794482174SMilo(Woogyom) Kim static inline void lp5521_wait_enable_done(void)
10894482174SMilo(Woogyom) Kim {
10994482174SMilo(Woogyom) Kim 	/* it takes more 488 us to update ENABLE register */
11094482174SMilo(Woogyom) Kim 	usleep_range(500, 600);
11194482174SMilo(Woogyom) Kim }
11294482174SMilo(Woogyom) Kim 
113a96bfa13SMilo(Woogyom) Kim static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
114a96bfa13SMilo(Woogyom) Kim {
115a96bfa13SMilo(Woogyom) Kim 	led->led_current = led_current;
116a96bfa13SMilo(Woogyom) Kim 	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
117a96bfa13SMilo(Woogyom) Kim 		led_current);
118a96bfa13SMilo(Woogyom) Kim }
119a96bfa13SMilo(Woogyom) Kim 
1209ce7cb17SMilo(Woogyom) Kim static void lp5521_load_engine(struct lp55xx_chip *chip)
121500fe141SSamu Onkalo {
1229ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
1239ce7cb17SMilo(Woogyom) Kim 	u8 mask[] = {
1249ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
1259ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
1269ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
1279ce7cb17SMilo(Woogyom) Kim 	};
128500fe141SSamu Onkalo 
1299ce7cb17SMilo(Woogyom) Kim 	u8 val[] = {
1309ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
1319ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
1329ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
1339ce7cb17SMilo(Woogyom) Kim 	};
134500fe141SSamu Onkalo 
1359ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
136500fe141SSamu Onkalo 
1379ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
138500fe141SSamu Onkalo }
139500fe141SSamu Onkalo 
1409ce7cb17SMilo(Woogyom) Kim static void lp5521_stop_engine(struct lp55xx_chip *chip)
141500fe141SSamu Onkalo {
1429ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
1439ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
1449ce7cb17SMilo(Woogyom) Kim }
1459ce7cb17SMilo(Woogyom) Kim 
1469ce7cb17SMilo(Woogyom) Kim static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
1479ce7cb17SMilo(Woogyom) Kim {
148500fe141SSamu Onkalo 	int ret;
149500fe141SSamu Onkalo 	u8 mode;
1509ce7cb17SMilo(Woogyom) Kim 	u8 exec;
151500fe141SSamu Onkalo 
1529ce7cb17SMilo(Woogyom) Kim 	/* stop engine */
1539ce7cb17SMilo(Woogyom) Kim 	if (!start) {
1549ce7cb17SMilo(Woogyom) Kim 		lp5521_stop_engine(chip);
1559ce7cb17SMilo(Woogyom) Kim 		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
1569ce7cb17SMilo(Woogyom) Kim 		lp5521_wait_opmode_done();
1579ce7cb17SMilo(Woogyom) Kim 		return;
1589ce7cb17SMilo(Woogyom) Kim 	}
1599ce7cb17SMilo(Woogyom) Kim 
1609ce7cb17SMilo(Woogyom) Kim 	/*
1619ce7cb17SMilo(Woogyom) Kim 	 * To run the engine,
1629ce7cb17SMilo(Woogyom) Kim 	 * operation mode and enable register should updated at the same time
1639ce7cb17SMilo(Woogyom) Kim 	 */
1649ce7cb17SMilo(Woogyom) Kim 
1659ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
1665bc9ad77SDan Carpenter 	if (ret)
1679ce7cb17SMilo(Woogyom) Kim 		return;
1685bc9ad77SDan Carpenter 
1699ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
1705bc9ad77SDan Carpenter 	if (ret)
1719ce7cb17SMilo(Woogyom) Kim 		return;
172500fe141SSamu Onkalo 
1739ce7cb17SMilo(Woogyom) Kim 	/* change operation mode to RUN only when each engine is loading */
1749ce7cb17SMilo(Woogyom) Kim 	if (LP5521_R_IS_LOADING(mode)) {
1759ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
1769ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
1779ce7cb17SMilo(Woogyom) Kim 	}
178500fe141SSamu Onkalo 
1799ce7cb17SMilo(Woogyom) Kim 	if (LP5521_G_IS_LOADING(mode)) {
1809ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
1819ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
1829ce7cb17SMilo(Woogyom) Kim 	}
183500fe141SSamu Onkalo 
1849ce7cb17SMilo(Woogyom) Kim 	if (LP5521_B_IS_LOADING(mode)) {
1859ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
1869ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
1879ce7cb17SMilo(Woogyom) Kim 	}
1889ce7cb17SMilo(Woogyom) Kim 
1899ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
1909ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
1919ce7cb17SMilo(Woogyom) Kim 
1929ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
1939ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
1949ce7cb17SMilo(Woogyom) Kim }
1959ce7cb17SMilo(Woogyom) Kim 
1969ce7cb17SMilo(Woogyom) Kim static int lp5521_update_program_memory(struct lp55xx_chip *chip,
1979ce7cb17SMilo(Woogyom) Kim 					const u8 *data, size_t size)
1989ce7cb17SMilo(Woogyom) Kim {
1999ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
2009ce7cb17SMilo(Woogyom) Kim 	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
2019ce7cb17SMilo(Woogyom) Kim 	u8 addr[] = {
2029ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
2039ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
2049ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
2059ce7cb17SMilo(Woogyom) Kim 	};
2069ce7cb17SMilo(Woogyom) Kim 	unsigned cmd;
2079ce7cb17SMilo(Woogyom) Kim 	char c[3];
2089ce7cb17SMilo(Woogyom) Kim 	int program_size;
2099ce7cb17SMilo(Woogyom) Kim 	int nrchars;
2109ce7cb17SMilo(Woogyom) Kim 	int offset = 0;
2119ce7cb17SMilo(Woogyom) Kim 	int ret;
2129ce7cb17SMilo(Woogyom) Kim 	int i;
2139ce7cb17SMilo(Woogyom) Kim 
2149ce7cb17SMilo(Woogyom) Kim 	/* clear program memory before updating */
2159ce7cb17SMilo(Woogyom) Kim 	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++)
2169ce7cb17SMilo(Woogyom) Kim 		lp55xx_write(chip, addr[idx] + i, 0);
2179ce7cb17SMilo(Woogyom) Kim 
2189ce7cb17SMilo(Woogyom) Kim 	i = 0;
2199ce7cb17SMilo(Woogyom) Kim 	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
2209ce7cb17SMilo(Woogyom) Kim 		/* separate sscanfs because length is working only for %s */
2219ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
2229ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2239ce7cb17SMilo(Woogyom) Kim 			goto err;
2249ce7cb17SMilo(Woogyom) Kim 
2259ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(c, "%2x", &cmd);
2269ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2279ce7cb17SMilo(Woogyom) Kim 			goto err;
2289ce7cb17SMilo(Woogyom) Kim 
2299ce7cb17SMilo(Woogyom) Kim 		pattern[i] = (u8)cmd;
2309ce7cb17SMilo(Woogyom) Kim 		offset += nrchars;
2319ce7cb17SMilo(Woogyom) Kim 		i++;
2329ce7cb17SMilo(Woogyom) Kim 	}
2339ce7cb17SMilo(Woogyom) Kim 
2349ce7cb17SMilo(Woogyom) Kim 	/* Each instruction is 16bit long. Check that length is even */
2359ce7cb17SMilo(Woogyom) Kim 	if (i % 2)
2369ce7cb17SMilo(Woogyom) Kim 		goto err;
2379ce7cb17SMilo(Woogyom) Kim 
2389ce7cb17SMilo(Woogyom) Kim 	program_size = i;
2399ce7cb17SMilo(Woogyom) Kim 	for (i = 0; i < program_size; i++)
2409ce7cb17SMilo(Woogyom) Kim 		lp55xx_write(chip, addr[idx] + i, pattern[i]);
2419ce7cb17SMilo(Woogyom) Kim 
2429ce7cb17SMilo(Woogyom) Kim 	return 0;
2439ce7cb17SMilo(Woogyom) Kim 
2449ce7cb17SMilo(Woogyom) Kim err:
2459ce7cb17SMilo(Woogyom) Kim 	dev_err(&chip->cl->dev, "wrong pattern format\n");
2469ce7cb17SMilo(Woogyom) Kim 	return -EINVAL;
2479ce7cb17SMilo(Woogyom) Kim }
2489ce7cb17SMilo(Woogyom) Kim 
2499ce7cb17SMilo(Woogyom) Kim static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
2509ce7cb17SMilo(Woogyom) Kim {
2519ce7cb17SMilo(Woogyom) Kim 	const struct firmware *fw = chip->fw;
2529ce7cb17SMilo(Woogyom) Kim 
2539ce7cb17SMilo(Woogyom) Kim 	if (fw->size > LP5521_PROGRAM_LENGTH) {
2549ce7cb17SMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
2559ce7cb17SMilo(Woogyom) Kim 			fw->size);
2569ce7cb17SMilo(Woogyom) Kim 		return;
2579ce7cb17SMilo(Woogyom) Kim 	}
2589ce7cb17SMilo(Woogyom) Kim 
2599ce7cb17SMilo(Woogyom) Kim 	/*
2609ce7cb17SMilo(Woogyom) Kim 	 * Program momery sequence
2619ce7cb17SMilo(Woogyom) Kim 	 *  1) set engine mode to "LOAD"
2629ce7cb17SMilo(Woogyom) Kim 	 *  2) write firmware data into program memory
2639ce7cb17SMilo(Woogyom) Kim 	 */
2649ce7cb17SMilo(Woogyom) Kim 
2659ce7cb17SMilo(Woogyom) Kim 	lp5521_load_engine(chip);
2669ce7cb17SMilo(Woogyom) Kim 	lp5521_update_program_memory(chip, fw->data, fw->size);
267500fe141SSamu Onkalo }
268500fe141SSamu Onkalo 
269ffbdccdbSMilo(Woogyom) Kim static int lp5521_post_init_device(struct lp55xx_chip *chip)
270500fe141SSamu Onkalo {
271500fe141SSamu Onkalo 	int ret;
27294482174SMilo(Woogyom) Kim 	u8 val;
273500fe141SSamu Onkalo 
27494482174SMilo(Woogyom) Kim 	/*
27594482174SMilo(Woogyom) Kim 	 * Make sure that the chip is reset by reading back the r channel
27694482174SMilo(Woogyom) Kim 	 * current reg. This is dummy read is required on some platforms -
27794482174SMilo(Woogyom) Kim 	 * otherwise further access to the R G B channels in the
27894482174SMilo(Woogyom) Kim 	 * LP5521_REG_ENABLE register will not have any effect - strange!
27994482174SMilo(Woogyom) Kim 	 */
280ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
28194482174SMilo(Woogyom) Kim 	if (ret) {
282ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "error in resetting chip\n");
28394482174SMilo(Woogyom) Kim 		return ret;
28494482174SMilo(Woogyom) Kim 	}
28594482174SMilo(Woogyom) Kim 	if (val != LP5521_REG_R_CURR_DEFAULT) {
286ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev,
28794482174SMilo(Woogyom) Kim 			"unexpected data in register (expected 0x%x got 0x%x)\n",
28894482174SMilo(Woogyom) Kim 			LP5521_REG_R_CURR_DEFAULT, val);
28994482174SMilo(Woogyom) Kim 		ret = -EINVAL;
29094482174SMilo(Woogyom) Kim 		return ret;
29194482174SMilo(Woogyom) Kim 	}
29294482174SMilo(Woogyom) Kim 	usleep_range(10000, 20000);
293500fe141SSamu Onkalo 
294500fe141SSamu Onkalo 	/* Set all PWMs to direct control mode */
295ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
296500fe141SSamu Onkalo 
297ffbdccdbSMilo(Woogyom) Kim 	val = chip->pdata->update_config ?
2983b49aacdSKim, Milo 		: (LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO | LP5521_R_TO_BATT);
299ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
30094482174SMilo(Woogyom) Kim 	if (ret)
30194482174SMilo(Woogyom) Kim 		return ret;
302500fe141SSamu Onkalo 
303500fe141SSamu Onkalo 	/* Initialize all channels PWM to zero -> leds off */
304ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
305ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
306ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
307500fe141SSamu Onkalo 
308500fe141SSamu Onkalo 	/* Set engines are set to run state when OP_MODE enables engines */
309ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
31094482174SMilo(Woogyom) Kim 	if (ret)
311500fe141SSamu Onkalo 		return ret;
31294482174SMilo(Woogyom) Kim 
31394482174SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
31494482174SMilo(Woogyom) Kim 
31594482174SMilo(Woogyom) Kim 	return 0;
316500fe141SSamu Onkalo }
317500fe141SSamu Onkalo 
3189ca3bd80SMilo(Woogyom) Kim static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
319500fe141SSamu Onkalo {
3209ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_platform_data *pdata = chip->pdata;
321500fe141SSamu Onkalo 	int ret;
322500fe141SSamu Onkalo 	u8 status;
323500fe141SSamu Onkalo 
3249ca3bd80SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
325500fe141SSamu Onkalo 	if (ret < 0)
326500fe141SSamu Onkalo 		return ret;
327500fe141SSamu Onkalo 
3289ca3bd80SMilo(Woogyom) Kim 	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
3299ca3bd80SMilo(Woogyom) Kim 		return 0;
3309ca3bd80SMilo(Woogyom) Kim 
331500fe141SSamu Onkalo 	/* Check that ext clock is really in use if requested */
332500fe141SSamu Onkalo 	if  ((status & LP5521_EXT_CLK_USED) == 0)
333500fe141SSamu Onkalo 		return -EIO;
3349ca3bd80SMilo(Woogyom) Kim 
335500fe141SSamu Onkalo 	return 0;
336500fe141SSamu Onkalo }
337500fe141SSamu Onkalo 
338500fe141SSamu Onkalo static void lp5521_led_brightness_work(struct work_struct *work)
339500fe141SSamu Onkalo {
340a6e4679aSMilo(Woogyom) Kim 	struct lp55xx_led *led = container_of(work, struct lp55xx_led,
341500fe141SSamu Onkalo 					      brightness_work);
342a6e4679aSMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
343500fe141SSamu Onkalo 
344500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
345a6e4679aSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
346500fe141SSamu Onkalo 		led->brightness);
347500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
348500fe141SSamu Onkalo }
349500fe141SSamu Onkalo 
350500fe141SSamu Onkalo static ssize_t lp5521_selftest(struct device *dev,
351500fe141SSamu Onkalo 			       struct device_attribute *attr,
352500fe141SSamu Onkalo 			       char *buf)
353500fe141SSamu Onkalo {
3549ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
3559ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
356500fe141SSamu Onkalo 	int ret;
357500fe141SSamu Onkalo 
358500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
359500fe141SSamu Onkalo 	ret = lp5521_run_selftest(chip, buf);
360500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
361500fe141SSamu Onkalo 	return sprintf(buf, "%s\n", ret ? "FAIL" : "OK");
362500fe141SSamu Onkalo }
363500fe141SSamu Onkalo 
364500fe141SSamu Onkalo /* device attributes */
365500fe141SSamu Onkalo static DEVICE_ATTR(selftest, S_IRUGO, lp5521_selftest, NULL);
366500fe141SSamu Onkalo 
367500fe141SSamu Onkalo static struct attribute *lp5521_attributes[] = {
368500fe141SSamu Onkalo 	&dev_attr_selftest.attr,
369500fe141SSamu Onkalo 	NULL
370500fe141SSamu Onkalo };
371500fe141SSamu Onkalo 
372500fe141SSamu Onkalo static const struct attribute_group lp5521_group = {
373500fe141SSamu Onkalo 	.attrs = lp5521_attributes,
374500fe141SSamu Onkalo };
375500fe141SSamu Onkalo 
37648068d5dSMilo(Woogyom) Kim /* Chip specific configurations */
37748068d5dSMilo(Woogyom) Kim static struct lp55xx_device_config lp5521_cfg = {
37848068d5dSMilo(Woogyom) Kim 	.reset = {
37948068d5dSMilo(Woogyom) Kim 		.addr = LP5521_REG_RESET,
38048068d5dSMilo(Woogyom) Kim 		.val  = LP5521_RESET,
38148068d5dSMilo(Woogyom) Kim 	},
382e3a700d8SMilo(Woogyom) Kim 	.enable = {
383e3a700d8SMilo(Woogyom) Kim 		.addr = LP5521_REG_ENABLE,
384e3a700d8SMilo(Woogyom) Kim 		.val  = LP5521_ENABLE_DEFAULT,
385e3a700d8SMilo(Woogyom) Kim 	},
3860e202346SMilo(Woogyom) Kim 	.max_channel  = LP5521_MAX_LEDS,
387ffbdccdbSMilo(Woogyom) Kim 	.post_init_device   = lp5521_post_init_device,
388a6e4679aSMilo(Woogyom) Kim 	.brightness_work_fn = lp5521_led_brightness_work,
389a96bfa13SMilo(Woogyom) Kim 	.set_led_current    = lp5521_set_led_current,
3909ce7cb17SMilo(Woogyom) Kim 	.firmware_cb        = lp5521_firmware_loaded,
3919ce7cb17SMilo(Woogyom) Kim 	.run_engine         = lp5521_run_engine,
392e73c0ce6SMilo(Woogyom) Kim 	.dev_attr_group     = &lp5521_group,
39348068d5dSMilo(Woogyom) Kim };
39448068d5dSMilo(Woogyom) Kim 
39598ea1ea2SBill Pemberton static int lp5521_probe(struct i2c_client *client,
396500fe141SSamu Onkalo 			const struct i2c_device_id *id)
397500fe141SSamu Onkalo {
3981904f83dSMilo(Woogyom) Kim 	int ret;
3996a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_chip *chip;
4006a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_led *led;
4016a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_platform_data *pdata = client->dev.platform_data;
402500fe141SSamu Onkalo 
4036a0c9a47SMilo(Woogyom) Kim 	if (!pdata) {
404500fe141SSamu Onkalo 		dev_err(&client->dev, "no platform data\n");
405e430dc00SBryan Wu 		return -EINVAL;
406500fe141SSamu Onkalo 	}
407500fe141SSamu Onkalo 
4086a0c9a47SMilo(Woogyom) Kim 	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
4096a0c9a47SMilo(Woogyom) Kim 	if (!chip)
4106a0c9a47SMilo(Woogyom) Kim 		return -ENOMEM;
411500fe141SSamu Onkalo 
4126a0c9a47SMilo(Woogyom) Kim 	led = devm_kzalloc(&client->dev,
4136a0c9a47SMilo(Woogyom) Kim 			sizeof(*led) * pdata->num_channels, GFP_KERNEL);
4146a0c9a47SMilo(Woogyom) Kim 	if (!led)
4156a0c9a47SMilo(Woogyom) Kim 		return -ENOMEM;
4166a0c9a47SMilo(Woogyom) Kim 
4176a0c9a47SMilo(Woogyom) Kim 	chip->cl = client;
4186a0c9a47SMilo(Woogyom) Kim 	chip->pdata = pdata;
41948068d5dSMilo(Woogyom) Kim 	chip->cfg = &lp5521_cfg;
4206a0c9a47SMilo(Woogyom) Kim 
4216a0c9a47SMilo(Woogyom) Kim 	mutex_init(&chip->lock);
4226a0c9a47SMilo(Woogyom) Kim 
4236a0c9a47SMilo(Woogyom) Kim 	i2c_set_clientdata(client, led);
424500fe141SSamu Onkalo 
42522ebeb48SMilo(Woogyom) Kim 	ret = lp55xx_init_device(chip);
426944f7b1dSMilo(Woogyom) Kim 	if (ret)
427f6c64c6fSMilo(Woogyom) Kim 		goto err_init;
428500fe141SSamu Onkalo 
429500fe141SSamu Onkalo 	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
430500fe141SSamu Onkalo 
4319e9b3db1SMilo(Woogyom) Kim 	ret = lp55xx_register_leds(led, chip);
432f6524808SMilo(Woogyom) Kim 	if (ret)
4339e9b3db1SMilo(Woogyom) Kim 		goto err_register_leds;
434500fe141SSamu Onkalo 
435e73c0ce6SMilo(Woogyom) Kim 	ret = lp55xx_register_sysfs(chip);
436500fe141SSamu Onkalo 	if (ret) {
437500fe141SSamu Onkalo 		dev_err(&client->dev, "registering sysfs failed\n");
438e73c0ce6SMilo(Woogyom) Kim 		goto err_register_sysfs;
439500fe141SSamu Onkalo 	}
440e73c0ce6SMilo(Woogyom) Kim 
441e73c0ce6SMilo(Woogyom) Kim 	return 0;
442e73c0ce6SMilo(Woogyom) Kim 
443e73c0ce6SMilo(Woogyom) Kim err_register_sysfs:
444c3a68ebfSMilo(Woogyom) Kim 	lp55xx_unregister_leds(led, chip);
4459e9b3db1SMilo(Woogyom) Kim err_register_leds:
4466ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
447f6c64c6fSMilo(Woogyom) Kim err_init:
448500fe141SSamu Onkalo 	return ret;
449500fe141SSamu Onkalo }
450500fe141SSamu Onkalo 
451678e8a6bSBill Pemberton static int lp5521_remove(struct i2c_client *client)
452500fe141SSamu Onkalo {
4536ce61762SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(client);
4546ce61762SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
455500fe141SSamu Onkalo 
45687cc4bdeSMilo(Woogyom) Kim 	lp5521_stop_engine(chip);
45787cc4bdeSMilo(Woogyom) Kim 	lp55xx_unregister_sysfs(chip);
458c3a68ebfSMilo(Woogyom) Kim 	lp55xx_unregister_leds(led, chip);
4596ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
460500fe141SSamu Onkalo 
461500fe141SSamu Onkalo 	return 0;
462500fe141SSamu Onkalo }
463500fe141SSamu Onkalo 
464500fe141SSamu Onkalo static const struct i2c_device_id lp5521_id[] = {
465500fe141SSamu Onkalo 	{ "lp5521", 0 }, /* Three channel chip */
466500fe141SSamu Onkalo 	{ }
467500fe141SSamu Onkalo };
468500fe141SSamu Onkalo MODULE_DEVICE_TABLE(i2c, lp5521_id);
469500fe141SSamu Onkalo 
470500fe141SSamu Onkalo static struct i2c_driver lp5521_driver = {
471500fe141SSamu Onkalo 	.driver = {
472500fe141SSamu Onkalo 		.name	= "lp5521",
473500fe141SSamu Onkalo 	},
474500fe141SSamu Onkalo 	.probe		= lp5521_probe,
475df07cf81SBill Pemberton 	.remove		= lp5521_remove,
476500fe141SSamu Onkalo 	.id_table	= lp5521_id,
477500fe141SSamu Onkalo };
478500fe141SSamu Onkalo 
47909a0d183SAxel Lin module_i2c_driver(lp5521_driver);
480500fe141SSamu Onkalo 
481500fe141SSamu Onkalo MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
482500fe141SSamu Onkalo MODULE_DESCRIPTION("LP5521 LED engine");
483500fe141SSamu Onkalo MODULE_LICENSE("GPL v2");
484