1*2b27bdccSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2500fe141SSamu Onkalo /* 3500fe141SSamu Onkalo * LP5521 LED chip driver. 4500fe141SSamu Onkalo * 5500fe141SSamu Onkalo * Copyright (C) 2010 Nokia Corporation 6a2387cb9SMilo(Woogyom) Kim * Copyright (C) 2012 Texas Instruments 7500fe141SSamu Onkalo * 8500fe141SSamu Onkalo * Contact: Samu Onkalo <samu.p.onkalo@nokia.com> 9a2387cb9SMilo(Woogyom) Kim * Milo(Woogyom) Kim <milo.kim@ti.com> 10500fe141SSamu Onkalo */ 11500fe141SSamu Onkalo 12500fe141SSamu Onkalo #include <linux/delay.h> 139ce7cb17SMilo(Woogyom) Kim #include <linux/firmware.h> 1479bcc10bSMilo(Woogyom) Kim #include <linux/i2c.h> 1579bcc10bSMilo(Woogyom) Kim #include <linux/leds.h> 1679bcc10bSMilo(Woogyom) Kim #include <linux/module.h> 1779bcc10bSMilo(Woogyom) Kim #include <linux/mutex.h> 1879bcc10bSMilo(Woogyom) Kim #include <linux/platform_data/leds-lp55xx.h> 1979bcc10bSMilo(Woogyom) Kim #include <linux/slab.h> 207542a04bSLinus Walleij #include <linux/of.h> 216a0c9a47SMilo(Woogyom) Kim 226a0c9a47SMilo(Woogyom) Kim #include "leds-lp55xx-common.h" 23500fe141SSamu Onkalo 2412f022d2SMilo(Woogyom) Kim #define LP5521_PROGRAM_LENGTH 32 2512f022d2SMilo(Woogyom) Kim #define LP5521_MAX_LEDS 3 2612f022d2SMilo(Woogyom) Kim #define LP5521_CMD_DIRECT 0x3F 27500fe141SSamu Onkalo 28500fe141SSamu Onkalo /* Registers */ 29500fe141SSamu Onkalo #define LP5521_REG_ENABLE 0x00 30500fe141SSamu Onkalo #define LP5521_REG_OP_MODE 0x01 31500fe141SSamu Onkalo #define LP5521_REG_R_PWM 0x02 32500fe141SSamu Onkalo #define LP5521_REG_G_PWM 0x03 33500fe141SSamu Onkalo #define LP5521_REG_B_PWM 0x04 34500fe141SSamu Onkalo #define LP5521_REG_R_CURRENT 0x05 35500fe141SSamu Onkalo #define LP5521_REG_G_CURRENT 0x06 36500fe141SSamu Onkalo #define LP5521_REG_B_CURRENT 0x07 37500fe141SSamu Onkalo #define LP5521_REG_CONFIG 0x08 38500fe141SSamu Onkalo #define LP5521_REG_STATUS 0x0C 39500fe141SSamu Onkalo #define LP5521_REG_RESET 0x0D 40500fe141SSamu Onkalo #define LP5521_REG_R_PROG_MEM 0x10 41500fe141SSamu Onkalo #define LP5521_REG_G_PROG_MEM 0x30 42500fe141SSamu Onkalo #define LP5521_REG_B_PROG_MEM 0x50 43500fe141SSamu Onkalo 44500fe141SSamu Onkalo /* Base register to set LED current */ 45500fe141SSamu Onkalo #define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT 46500fe141SSamu Onkalo /* Base register to set the brightness */ 47500fe141SSamu Onkalo #define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM 48500fe141SSamu Onkalo 49500fe141SSamu Onkalo /* Bits in ENABLE register */ 50500fe141SSamu Onkalo #define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */ 51500fe141SSamu Onkalo #define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */ 52500fe141SSamu Onkalo #define LP5521_EXEC_RUN 0x2A 5332a2f747SKim, Milo #define LP5521_ENABLE_DEFAULT \ 5432a2f747SKim, Milo (LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM) 5532a2f747SKim, Milo #define LP5521_ENABLE_RUN_PROGRAM \ 5632a2f747SKim, Milo (LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN) 57500fe141SSamu Onkalo 5881f2a5b4SKim, Milo /* CONFIG register */ 5981f2a5b4SKim, Milo #define LP5521_PWM_HF 0x40 /* PWM: 0 = 256Hz, 1 = 558Hz */ 6081f2a5b4SKim, Milo #define LP5521_PWRSAVE_EN 0x20 /* 1 = Power save mode */ 6181f2a5b4SKim, Milo #define LP5521_CP_MODE_OFF 0 /* Charge pump (CP) off */ 6281f2a5b4SKim, Milo #define LP5521_CP_MODE_BYPASS 8 /* CP forced to bypass mode */ 6381f2a5b4SKim, Milo #define LP5521_CP_MODE_1X5 0x10 /* CP forced to 1.5x mode */ 6481f2a5b4SKim, Milo #define LP5521_CP_MODE_AUTO 0x18 /* Automatic mode selection */ 6581f2a5b4SKim, Milo #define LP5521_R_TO_BATT 0x04 /* R out: 0 = CP, 1 = Vbat */ 6681f2a5b4SKim, Milo #define LP5521_CLK_INT 0x01 /* Internal clock */ 6781f2a5b4SKim, Milo #define LP5521_DEFAULT_CFG \ 6881f2a5b4SKim, Milo (LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO) 6981f2a5b4SKim, Milo 70500fe141SSamu Onkalo /* Status */ 71500fe141SSamu Onkalo #define LP5521_EXT_CLK_USED 0x08 72500fe141SSamu Onkalo 73b3c49c05SSrinidhi KASAGAR /* default R channel current register value */ 74b3c49c05SSrinidhi KASAGAR #define LP5521_REG_R_CURR_DEFAULT 0xAF 75b3c49c05SSrinidhi KASAGAR 7648068d5dSMilo(Woogyom) Kim /* Reset register value */ 7748068d5dSMilo(Woogyom) Kim #define LP5521_RESET 0xFF 7848068d5dSMilo(Woogyom) Kim 799ce7cb17SMilo(Woogyom) Kim /* Program Memory Operations */ 809ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_R_M 0x30 /* Operation Mode Register */ 819ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_G_M 0x0C 829ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_B_M 0x03 839ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_R 0x10 849ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_G 0x04 859ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_B 0x01 869ce7cb17SMilo(Woogyom) Kim 879ce7cb17SMilo(Woogyom) Kim #define LP5521_R_IS_LOADING(mode) \ 889ce7cb17SMilo(Woogyom) Kim ((mode & LP5521_MODE_R_M) == LP5521_LOAD_R) 899ce7cb17SMilo(Woogyom) Kim #define LP5521_G_IS_LOADING(mode) \ 909ce7cb17SMilo(Woogyom) Kim ((mode & LP5521_MODE_G_M) == LP5521_LOAD_G) 919ce7cb17SMilo(Woogyom) Kim #define LP5521_B_IS_LOADING(mode) \ 929ce7cb17SMilo(Woogyom) Kim ((mode & LP5521_MODE_B_M) == LP5521_LOAD_B) 939ce7cb17SMilo(Woogyom) Kim 949ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_R_M 0x30 /* Enable Register */ 959ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_G_M 0x0C 969ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_B_M 0x03 979ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_M 0x3F 989ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_R 0x20 999ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_G 0x08 1009ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_B 0x02 101500fe141SSamu Onkalo 1029ce7cb17SMilo(Woogyom) Kim static inline void lp5521_wait_opmode_done(void) 1039ce7cb17SMilo(Woogyom) Kim { 1049ce7cb17SMilo(Woogyom) Kim /* operation mode change needs to be longer than 153 us */ 1059ce7cb17SMilo(Woogyom) Kim usleep_range(200, 300); 1069ce7cb17SMilo(Woogyom) Kim } 1079ce7cb17SMilo(Woogyom) Kim 10894482174SMilo(Woogyom) Kim static inline void lp5521_wait_enable_done(void) 10994482174SMilo(Woogyom) Kim { 11094482174SMilo(Woogyom) Kim /* it takes more 488 us to update ENABLE register */ 11194482174SMilo(Woogyom) Kim usleep_range(500, 600); 11294482174SMilo(Woogyom) Kim } 11394482174SMilo(Woogyom) Kim 114a96bfa13SMilo(Woogyom) Kim static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current) 115a96bfa13SMilo(Woogyom) Kim { 116a96bfa13SMilo(Woogyom) Kim led->led_current = led_current; 117a96bfa13SMilo(Woogyom) Kim lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr, 118a96bfa13SMilo(Woogyom) Kim led_current); 119a96bfa13SMilo(Woogyom) Kim } 120a96bfa13SMilo(Woogyom) Kim 1219ce7cb17SMilo(Woogyom) Kim static void lp5521_load_engine(struct lp55xx_chip *chip) 122500fe141SSamu Onkalo { 1239ce7cb17SMilo(Woogyom) Kim enum lp55xx_engine_index idx = chip->engine_idx; 124f01a59efSColin Ian King static const u8 mask[] = { 1259ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_1] = LP5521_MODE_R_M, 1269ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_2] = LP5521_MODE_G_M, 1279ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_3] = LP5521_MODE_B_M, 1289ce7cb17SMilo(Woogyom) Kim }; 129500fe141SSamu Onkalo 130f01a59efSColin Ian King static const u8 val[] = { 1319ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_1] = LP5521_LOAD_R, 1329ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_2] = LP5521_LOAD_G, 1339ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_3] = LP5521_LOAD_B, 1349ce7cb17SMilo(Woogyom) Kim }; 135500fe141SSamu Onkalo 1369ce7cb17SMilo(Woogyom) Kim lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]); 137500fe141SSamu Onkalo 1389ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 139500fe141SSamu Onkalo } 140500fe141SSamu Onkalo 14128c9266bSMilo Kim static void lp5521_stop_all_engines(struct lp55xx_chip *chip) 142500fe141SSamu Onkalo { 1439ce7cb17SMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_OP_MODE, 0); 1449ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 1459ce7cb17SMilo(Woogyom) Kim } 1469ce7cb17SMilo(Woogyom) Kim 14728c9266bSMilo Kim static void lp5521_stop_engine(struct lp55xx_chip *chip) 14828c9266bSMilo Kim { 14928c9266bSMilo Kim enum lp55xx_engine_index idx = chip->engine_idx; 150f01a59efSColin Ian King static const u8 mask[] = { 15128c9266bSMilo Kim [LP55XX_ENGINE_1] = LP5521_MODE_R_M, 15228c9266bSMilo Kim [LP55XX_ENGINE_2] = LP5521_MODE_G_M, 15328c9266bSMilo Kim [LP55XX_ENGINE_3] = LP5521_MODE_B_M, 15428c9266bSMilo Kim }; 15528c9266bSMilo Kim 15628c9266bSMilo Kim lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0); 15728c9266bSMilo Kim 15828c9266bSMilo Kim lp5521_wait_opmode_done(); 15928c9266bSMilo Kim } 16028c9266bSMilo Kim 1619ce7cb17SMilo(Woogyom) Kim static void lp5521_run_engine(struct lp55xx_chip *chip, bool start) 1629ce7cb17SMilo(Woogyom) Kim { 163500fe141SSamu Onkalo int ret; 164500fe141SSamu Onkalo u8 mode; 1659ce7cb17SMilo(Woogyom) Kim u8 exec; 166500fe141SSamu Onkalo 1679ce7cb17SMilo(Woogyom) Kim /* stop engine */ 1689ce7cb17SMilo(Woogyom) Kim if (!start) { 1699ce7cb17SMilo(Woogyom) Kim lp5521_stop_engine(chip); 1709ce7cb17SMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); 1719ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 1729ce7cb17SMilo(Woogyom) Kim return; 1739ce7cb17SMilo(Woogyom) Kim } 1749ce7cb17SMilo(Woogyom) Kim 1759ce7cb17SMilo(Woogyom) Kim /* 1769ce7cb17SMilo(Woogyom) Kim * To run the engine, 1779ce7cb17SMilo(Woogyom) Kim * operation mode and enable register should updated at the same time 1789ce7cb17SMilo(Woogyom) Kim */ 1799ce7cb17SMilo(Woogyom) Kim 1809ce7cb17SMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode); 1815bc9ad77SDan Carpenter if (ret) 1829ce7cb17SMilo(Woogyom) Kim return; 1835bc9ad77SDan Carpenter 1849ce7cb17SMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec); 1855bc9ad77SDan Carpenter if (ret) 1869ce7cb17SMilo(Woogyom) Kim return; 187500fe141SSamu Onkalo 1889ce7cb17SMilo(Woogyom) Kim /* change operation mode to RUN only when each engine is loading */ 1899ce7cb17SMilo(Woogyom) Kim if (LP5521_R_IS_LOADING(mode)) { 1909ce7cb17SMilo(Woogyom) Kim mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R; 1919ce7cb17SMilo(Woogyom) Kim exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R; 1929ce7cb17SMilo(Woogyom) Kim } 193500fe141SSamu Onkalo 1949ce7cb17SMilo(Woogyom) Kim if (LP5521_G_IS_LOADING(mode)) { 1959ce7cb17SMilo(Woogyom) Kim mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G; 1969ce7cb17SMilo(Woogyom) Kim exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G; 1979ce7cb17SMilo(Woogyom) Kim } 198500fe141SSamu Onkalo 1999ce7cb17SMilo(Woogyom) Kim if (LP5521_B_IS_LOADING(mode)) { 2009ce7cb17SMilo(Woogyom) Kim mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B; 2019ce7cb17SMilo(Woogyom) Kim exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B; 2029ce7cb17SMilo(Woogyom) Kim } 2039ce7cb17SMilo(Woogyom) Kim 2049ce7cb17SMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_OP_MODE, mode); 2059ce7cb17SMilo(Woogyom) Kim lp5521_wait_opmode_done(); 2069ce7cb17SMilo(Woogyom) Kim 2079ce7cb17SMilo(Woogyom) Kim lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec); 2089ce7cb17SMilo(Woogyom) Kim lp5521_wait_enable_done(); 2099ce7cb17SMilo(Woogyom) Kim } 2109ce7cb17SMilo(Woogyom) Kim 2119ce7cb17SMilo(Woogyom) Kim static int lp5521_update_program_memory(struct lp55xx_chip *chip, 2129ce7cb17SMilo(Woogyom) Kim const u8 *data, size_t size) 2139ce7cb17SMilo(Woogyom) Kim { 2149ce7cb17SMilo(Woogyom) Kim enum lp55xx_engine_index idx = chip->engine_idx; 2159ce7cb17SMilo(Woogyom) Kim u8 pattern[LP5521_PROGRAM_LENGTH] = {0}; 216f01a59efSColin Ian King static const u8 addr[] = { 2179ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM, 2189ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM, 2199ce7cb17SMilo(Woogyom) Kim [LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM, 2209ce7cb17SMilo(Woogyom) Kim }; 2219ce7cb17SMilo(Woogyom) Kim unsigned cmd; 2229ce7cb17SMilo(Woogyom) Kim char c[3]; 2239ce7cb17SMilo(Woogyom) Kim int nrchars; 2249ce7cb17SMilo(Woogyom) Kim int ret; 2251eca0b3aSMilo Kim int offset = 0; 2261eca0b3aSMilo Kim int i = 0; 2279ce7cb17SMilo(Woogyom) Kim 2289ce7cb17SMilo(Woogyom) Kim while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) { 2299ce7cb17SMilo(Woogyom) Kim /* separate sscanfs because length is working only for %s */ 2309ce7cb17SMilo(Woogyom) Kim ret = sscanf(data + offset, "%2s%n ", c, &nrchars); 2319ce7cb17SMilo(Woogyom) Kim if (ret != 1) 2329ce7cb17SMilo(Woogyom) Kim goto err; 2339ce7cb17SMilo(Woogyom) Kim 2349ce7cb17SMilo(Woogyom) Kim ret = sscanf(c, "%2x", &cmd); 2359ce7cb17SMilo(Woogyom) Kim if (ret != 1) 2369ce7cb17SMilo(Woogyom) Kim goto err; 2379ce7cb17SMilo(Woogyom) Kim 2389ce7cb17SMilo(Woogyom) Kim pattern[i] = (u8)cmd; 2399ce7cb17SMilo(Woogyom) Kim offset += nrchars; 2409ce7cb17SMilo(Woogyom) Kim i++; 2419ce7cb17SMilo(Woogyom) Kim } 2429ce7cb17SMilo(Woogyom) Kim 2439ce7cb17SMilo(Woogyom) Kim /* Each instruction is 16bit long. Check that length is even */ 2449ce7cb17SMilo(Woogyom) Kim if (i % 2) 2459ce7cb17SMilo(Woogyom) Kim goto err; 2469ce7cb17SMilo(Woogyom) Kim 2471eca0b3aSMilo Kim for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) { 248c0e5e9b5SMilo Kim ret = lp55xx_write(chip, addr[idx] + i, pattern[i]); 249e70988d1SMilo Kim if (ret) 250c0e5e9b5SMilo Kim return -EINVAL; 251c0e5e9b5SMilo Kim } 252c0e5e9b5SMilo Kim 253c0e5e9b5SMilo Kim return size; 2549ce7cb17SMilo(Woogyom) Kim 2559ce7cb17SMilo(Woogyom) Kim err: 2569ce7cb17SMilo(Woogyom) Kim dev_err(&chip->cl->dev, "wrong pattern format\n"); 2579ce7cb17SMilo(Woogyom) Kim return -EINVAL; 2589ce7cb17SMilo(Woogyom) Kim } 2599ce7cb17SMilo(Woogyom) Kim 2609ce7cb17SMilo(Woogyom) Kim static void lp5521_firmware_loaded(struct lp55xx_chip *chip) 2619ce7cb17SMilo(Woogyom) Kim { 2629ce7cb17SMilo(Woogyom) Kim const struct firmware *fw = chip->fw; 2639ce7cb17SMilo(Woogyom) Kim 2649ce7cb17SMilo(Woogyom) Kim if (fw->size > LP5521_PROGRAM_LENGTH) { 2659ce7cb17SMilo(Woogyom) Kim dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", 2669ce7cb17SMilo(Woogyom) Kim fw->size); 2679ce7cb17SMilo(Woogyom) Kim return; 2689ce7cb17SMilo(Woogyom) Kim } 2699ce7cb17SMilo(Woogyom) Kim 2709ce7cb17SMilo(Woogyom) Kim /* 271d1b7c934SStephen Boyd * Program memory sequence 2729ce7cb17SMilo(Woogyom) Kim * 1) set engine mode to "LOAD" 2739ce7cb17SMilo(Woogyom) Kim * 2) write firmware data into program memory 2749ce7cb17SMilo(Woogyom) Kim */ 2759ce7cb17SMilo(Woogyom) Kim 2769ce7cb17SMilo(Woogyom) Kim lp5521_load_engine(chip); 2779ce7cb17SMilo(Woogyom) Kim lp5521_update_program_memory(chip, fw->data, fw->size); 278500fe141SSamu Onkalo } 279500fe141SSamu Onkalo 280ffbdccdbSMilo(Woogyom) Kim static int lp5521_post_init_device(struct lp55xx_chip *chip) 281500fe141SSamu Onkalo { 282500fe141SSamu Onkalo int ret; 28394482174SMilo(Woogyom) Kim u8 val; 284500fe141SSamu Onkalo 28594482174SMilo(Woogyom) Kim /* 28694482174SMilo(Woogyom) Kim * Make sure that the chip is reset by reading back the r channel 28794482174SMilo(Woogyom) Kim * current reg. This is dummy read is required on some platforms - 28894482174SMilo(Woogyom) Kim * otherwise further access to the R G B channels in the 28994482174SMilo(Woogyom) Kim * LP5521_REG_ENABLE register will not have any effect - strange! 29094482174SMilo(Woogyom) Kim */ 291ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val); 29294482174SMilo(Woogyom) Kim if (ret) { 293ffbdccdbSMilo(Woogyom) Kim dev_err(&chip->cl->dev, "error in resetting chip\n"); 29494482174SMilo(Woogyom) Kim return ret; 29594482174SMilo(Woogyom) Kim } 29694482174SMilo(Woogyom) Kim if (val != LP5521_REG_R_CURR_DEFAULT) { 297ffbdccdbSMilo(Woogyom) Kim dev_err(&chip->cl->dev, 29894482174SMilo(Woogyom) Kim "unexpected data in register (expected 0x%x got 0x%x)\n", 29994482174SMilo(Woogyom) Kim LP5521_REG_R_CURR_DEFAULT, val); 30094482174SMilo(Woogyom) Kim ret = -EINVAL; 30194482174SMilo(Woogyom) Kim return ret; 30294482174SMilo(Woogyom) Kim } 30394482174SMilo(Woogyom) Kim usleep_range(10000, 20000); 304500fe141SSamu Onkalo 305500fe141SSamu Onkalo /* Set all PWMs to direct control mode */ 306ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); 307500fe141SSamu Onkalo 30881f2a5b4SKim, Milo /* Update configuration for the clock setting */ 30981f2a5b4SKim, Milo val = LP5521_DEFAULT_CFG; 31081f2a5b4SKim, Milo if (!lp55xx_is_extclk_used(chip)) 31181f2a5b4SKim, Milo val |= LP5521_CLK_INT; 31281f2a5b4SKim, Milo 313ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_write(chip, LP5521_REG_CONFIG, val); 31494482174SMilo(Woogyom) Kim if (ret) 31594482174SMilo(Woogyom) Kim return ret; 316500fe141SSamu Onkalo 317500fe141SSamu Onkalo /* Initialize all channels PWM to zero -> leds off */ 318ffbdccdbSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_R_PWM, 0); 319ffbdccdbSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_G_PWM, 0); 320ffbdccdbSMilo(Woogyom) Kim lp55xx_write(chip, LP5521_REG_B_PWM, 0); 321500fe141SSamu Onkalo 322500fe141SSamu Onkalo /* Set engines are set to run state when OP_MODE enables engines */ 323ffbdccdbSMilo(Woogyom) Kim ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM); 32494482174SMilo(Woogyom) Kim if (ret) 325500fe141SSamu Onkalo return ret; 32694482174SMilo(Woogyom) Kim 32794482174SMilo(Woogyom) Kim lp5521_wait_enable_done(); 32894482174SMilo(Woogyom) Kim 32994482174SMilo(Woogyom) Kim return 0; 330500fe141SSamu Onkalo } 331500fe141SSamu Onkalo 3329ca3bd80SMilo(Woogyom) Kim static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf) 333500fe141SSamu Onkalo { 3349ca3bd80SMilo(Woogyom) Kim struct lp55xx_platform_data *pdata = chip->pdata; 335500fe141SSamu Onkalo int ret; 336500fe141SSamu Onkalo u8 status; 337500fe141SSamu Onkalo 3389ca3bd80SMilo(Woogyom) Kim ret = lp55xx_read(chip, LP5521_REG_STATUS, &status); 339500fe141SSamu Onkalo if (ret < 0) 340500fe141SSamu Onkalo return ret; 341500fe141SSamu Onkalo 3429ca3bd80SMilo(Woogyom) Kim if (pdata->clock_mode != LP55XX_CLOCK_EXT) 3439ca3bd80SMilo(Woogyom) Kim return 0; 3449ca3bd80SMilo(Woogyom) Kim 345500fe141SSamu Onkalo /* Check that ext clock is really in use if requested */ 346500fe141SSamu Onkalo if ((status & LP5521_EXT_CLK_USED) == 0) 347500fe141SSamu Onkalo return -EIO; 3489ca3bd80SMilo(Woogyom) Kim 349500fe141SSamu Onkalo return 0; 350500fe141SSamu Onkalo } 351500fe141SSamu Onkalo 35295b2af63SAndrew Lunn static int lp5521_led_brightness(struct lp55xx_led *led) 353500fe141SSamu Onkalo { 354a6e4679aSMilo(Woogyom) Kim struct lp55xx_chip *chip = led->chip; 35595b2af63SAndrew Lunn int ret; 356500fe141SSamu Onkalo 357500fe141SSamu Onkalo mutex_lock(&chip->lock); 35895b2af63SAndrew Lunn ret = lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr, 359500fe141SSamu Onkalo led->brightness); 360500fe141SSamu Onkalo mutex_unlock(&chip->lock); 36195b2af63SAndrew Lunn 36295b2af63SAndrew Lunn return ret; 363500fe141SSamu Onkalo } 364500fe141SSamu Onkalo 365c0e5e9b5SMilo Kim static ssize_t show_engine_mode(struct device *dev, 366c0e5e9b5SMilo Kim struct device_attribute *attr, 367c0e5e9b5SMilo Kim char *buf, int nr) 368c0e5e9b5SMilo Kim { 369c0e5e9b5SMilo Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 370c0e5e9b5SMilo Kim struct lp55xx_chip *chip = led->chip; 371c0e5e9b5SMilo Kim enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; 372c0e5e9b5SMilo Kim 373c0e5e9b5SMilo Kim switch (mode) { 374c0e5e9b5SMilo Kim case LP55XX_ENGINE_RUN: 375c0e5e9b5SMilo Kim return sprintf(buf, "run\n"); 376c0e5e9b5SMilo Kim case LP55XX_ENGINE_LOAD: 377c0e5e9b5SMilo Kim return sprintf(buf, "load\n"); 378c0e5e9b5SMilo Kim case LP55XX_ENGINE_DISABLED: 379c0e5e9b5SMilo Kim default: 380c0e5e9b5SMilo Kim return sprintf(buf, "disabled\n"); 381c0e5e9b5SMilo Kim } 382c0e5e9b5SMilo Kim } 383c0e5e9b5SMilo Kim show_mode(1) 384c0e5e9b5SMilo Kim show_mode(2) 385c0e5e9b5SMilo Kim show_mode(3) 386c0e5e9b5SMilo Kim 387c0e5e9b5SMilo Kim static ssize_t store_engine_mode(struct device *dev, 388c0e5e9b5SMilo Kim struct device_attribute *attr, 389c0e5e9b5SMilo Kim const char *buf, size_t len, int nr) 390c0e5e9b5SMilo Kim { 391c0e5e9b5SMilo Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 392c0e5e9b5SMilo Kim struct lp55xx_chip *chip = led->chip; 393c0e5e9b5SMilo Kim struct lp55xx_engine *engine = &chip->engines[nr - 1]; 394c0e5e9b5SMilo Kim 395c0e5e9b5SMilo Kim mutex_lock(&chip->lock); 396c0e5e9b5SMilo Kim 397c0e5e9b5SMilo Kim chip->engine_idx = nr; 398c0e5e9b5SMilo Kim 399c0e5e9b5SMilo Kim if (!strncmp(buf, "run", 3)) { 400c0e5e9b5SMilo Kim lp5521_run_engine(chip, true); 401c0e5e9b5SMilo Kim engine->mode = LP55XX_ENGINE_RUN; 402c0e5e9b5SMilo Kim } else if (!strncmp(buf, "load", 4)) { 403c0e5e9b5SMilo Kim lp5521_stop_engine(chip); 404c0e5e9b5SMilo Kim lp5521_load_engine(chip); 405c0e5e9b5SMilo Kim engine->mode = LP55XX_ENGINE_LOAD; 406c0e5e9b5SMilo Kim } else if (!strncmp(buf, "disabled", 8)) { 407c0e5e9b5SMilo Kim lp5521_stop_engine(chip); 408c0e5e9b5SMilo Kim engine->mode = LP55XX_ENGINE_DISABLED; 409c0e5e9b5SMilo Kim } 410c0e5e9b5SMilo Kim 411c0e5e9b5SMilo Kim mutex_unlock(&chip->lock); 412c0e5e9b5SMilo Kim 413c0e5e9b5SMilo Kim return len; 414c0e5e9b5SMilo Kim } 415c0e5e9b5SMilo Kim store_mode(1) 416c0e5e9b5SMilo Kim store_mode(2) 417c0e5e9b5SMilo Kim store_mode(3) 418c0e5e9b5SMilo Kim 419c0e5e9b5SMilo Kim static ssize_t store_engine_load(struct device *dev, 420c0e5e9b5SMilo Kim struct device_attribute *attr, 421c0e5e9b5SMilo Kim const char *buf, size_t len, int nr) 422c0e5e9b5SMilo Kim { 423c0e5e9b5SMilo Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 424c0e5e9b5SMilo Kim struct lp55xx_chip *chip = led->chip; 425e70988d1SMilo Kim int ret; 426c0e5e9b5SMilo Kim 427c0e5e9b5SMilo Kim mutex_lock(&chip->lock); 428c0e5e9b5SMilo Kim 429c0e5e9b5SMilo Kim chip->engine_idx = nr; 430c0e5e9b5SMilo Kim lp5521_load_engine(chip); 431e70988d1SMilo Kim ret = lp5521_update_program_memory(chip, buf, len); 432c0e5e9b5SMilo Kim 433c0e5e9b5SMilo Kim mutex_unlock(&chip->lock); 434c0e5e9b5SMilo Kim 435e70988d1SMilo Kim return ret; 436c0e5e9b5SMilo Kim } 437c0e5e9b5SMilo Kim store_load(1) 438c0e5e9b5SMilo Kim store_load(2) 439c0e5e9b5SMilo Kim store_load(3) 440c0e5e9b5SMilo Kim 441500fe141SSamu Onkalo static ssize_t lp5521_selftest(struct device *dev, 442500fe141SSamu Onkalo struct device_attribute *attr, 443500fe141SSamu Onkalo char *buf) 444500fe141SSamu Onkalo { 4459ca3bd80SMilo(Woogyom) Kim struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); 4469ca3bd80SMilo(Woogyom) Kim struct lp55xx_chip *chip = led->chip; 447500fe141SSamu Onkalo int ret; 448500fe141SSamu Onkalo 449500fe141SSamu Onkalo mutex_lock(&chip->lock); 450500fe141SSamu Onkalo ret = lp5521_run_selftest(chip, buf); 451500fe141SSamu Onkalo mutex_unlock(&chip->lock); 45224d32128SKim, Milo 45324d32128SKim, Milo return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK"); 454500fe141SSamu Onkalo } 455500fe141SSamu Onkalo 456500fe141SSamu Onkalo /* device attributes */ 457c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode); 458c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode); 459c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode); 460c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load); 461c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load); 462c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load); 463c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest); 464500fe141SSamu Onkalo 465500fe141SSamu Onkalo static struct attribute *lp5521_attributes[] = { 466c0e5e9b5SMilo Kim &dev_attr_engine1_mode.attr, 467c0e5e9b5SMilo Kim &dev_attr_engine2_mode.attr, 468c0e5e9b5SMilo Kim &dev_attr_engine3_mode.attr, 469c0e5e9b5SMilo Kim &dev_attr_engine1_load.attr, 470c0e5e9b5SMilo Kim &dev_attr_engine2_load.attr, 471c0e5e9b5SMilo Kim &dev_attr_engine3_load.attr, 472500fe141SSamu Onkalo &dev_attr_selftest.attr, 473500fe141SSamu Onkalo NULL 474500fe141SSamu Onkalo }; 475500fe141SSamu Onkalo 476500fe141SSamu Onkalo static const struct attribute_group lp5521_group = { 477500fe141SSamu Onkalo .attrs = lp5521_attributes, 478500fe141SSamu Onkalo }; 479500fe141SSamu Onkalo 48048068d5dSMilo(Woogyom) Kim /* Chip specific configurations */ 48148068d5dSMilo(Woogyom) Kim static struct lp55xx_device_config lp5521_cfg = { 48248068d5dSMilo(Woogyom) Kim .reset = { 48348068d5dSMilo(Woogyom) Kim .addr = LP5521_REG_RESET, 48448068d5dSMilo(Woogyom) Kim .val = LP5521_RESET, 48548068d5dSMilo(Woogyom) Kim }, 486e3a700d8SMilo(Woogyom) Kim .enable = { 487e3a700d8SMilo(Woogyom) Kim .addr = LP5521_REG_ENABLE, 488e3a700d8SMilo(Woogyom) Kim .val = LP5521_ENABLE_DEFAULT, 489e3a700d8SMilo(Woogyom) Kim }, 4900e202346SMilo(Woogyom) Kim .max_channel = LP5521_MAX_LEDS, 491ffbdccdbSMilo(Woogyom) Kim .post_init_device = lp5521_post_init_device, 49295b2af63SAndrew Lunn .brightness_fn = lp5521_led_brightness, 493a96bfa13SMilo(Woogyom) Kim .set_led_current = lp5521_set_led_current, 4949ce7cb17SMilo(Woogyom) Kim .firmware_cb = lp5521_firmware_loaded, 4959ce7cb17SMilo(Woogyom) Kim .run_engine = lp5521_run_engine, 496e73c0ce6SMilo(Woogyom) Kim .dev_attr_group = &lp5521_group, 49748068d5dSMilo(Woogyom) Kim }; 49848068d5dSMilo(Woogyom) Kim 49998ea1ea2SBill Pemberton static int lp5521_probe(struct i2c_client *client, 500500fe141SSamu Onkalo const struct i2c_device_id *id) 501500fe141SSamu Onkalo { 5021904f83dSMilo(Woogyom) Kim int ret; 5036a0c9a47SMilo(Woogyom) Kim struct lp55xx_chip *chip; 5046a0c9a47SMilo(Woogyom) Kim struct lp55xx_led *led; 505ed133352SMilo Kim struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev); 5067542a04bSLinus Walleij struct device_node *np = client->dev.of_node; 507500fe141SSamu Onkalo 508ed133352SMilo Kim if (!pdata) { 5097542a04bSLinus Walleij if (np) { 510ed133352SMilo Kim pdata = lp55xx_of_populate_pdata(&client->dev, np); 511ed133352SMilo Kim if (IS_ERR(pdata)) 512ed133352SMilo Kim return PTR_ERR(pdata); 5137542a04bSLinus Walleij } else { 514500fe141SSamu Onkalo dev_err(&client->dev, "no platform data\n"); 515e430dc00SBryan Wu return -EINVAL; 516500fe141SSamu Onkalo } 5177542a04bSLinus Walleij } 518500fe141SSamu Onkalo 5196a0c9a47SMilo(Woogyom) Kim chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 5206a0c9a47SMilo(Woogyom) Kim if (!chip) 5216a0c9a47SMilo(Woogyom) Kim return -ENOMEM; 522500fe141SSamu Onkalo 523a86854d0SKees Cook led = devm_kcalloc(&client->dev, 524a86854d0SKees Cook pdata->num_channels, sizeof(*led), GFP_KERNEL); 5256a0c9a47SMilo(Woogyom) Kim if (!led) 5266a0c9a47SMilo(Woogyom) Kim return -ENOMEM; 5276a0c9a47SMilo(Woogyom) Kim 5286a0c9a47SMilo(Woogyom) Kim chip->cl = client; 5296a0c9a47SMilo(Woogyom) Kim chip->pdata = pdata; 53048068d5dSMilo(Woogyom) Kim chip->cfg = &lp5521_cfg; 5316a0c9a47SMilo(Woogyom) Kim 5326a0c9a47SMilo(Woogyom) Kim mutex_init(&chip->lock); 5336a0c9a47SMilo(Woogyom) Kim 5346a0c9a47SMilo(Woogyom) Kim i2c_set_clientdata(client, led); 535500fe141SSamu Onkalo 53622ebeb48SMilo(Woogyom) Kim ret = lp55xx_init_device(chip); 537944f7b1dSMilo(Woogyom) Kim if (ret) 538f6c64c6fSMilo(Woogyom) Kim goto err_init; 539500fe141SSamu Onkalo 540500fe141SSamu Onkalo dev_info(&client->dev, "%s programmable led chip found\n", id->name); 541500fe141SSamu Onkalo 5429e9b3db1SMilo(Woogyom) Kim ret = lp55xx_register_leds(led, chip); 543f6524808SMilo(Woogyom) Kim if (ret) 5449e9b3db1SMilo(Woogyom) Kim goto err_register_leds; 545500fe141SSamu Onkalo 546e73c0ce6SMilo(Woogyom) Kim ret = lp55xx_register_sysfs(chip); 547500fe141SSamu Onkalo if (ret) { 548500fe141SSamu Onkalo dev_err(&client->dev, "registering sysfs failed\n"); 549e73c0ce6SMilo(Woogyom) Kim goto err_register_sysfs; 550500fe141SSamu Onkalo } 551e73c0ce6SMilo(Woogyom) Kim 552e73c0ce6SMilo(Woogyom) Kim return 0; 553e73c0ce6SMilo(Woogyom) Kim 554e73c0ce6SMilo(Woogyom) Kim err_register_sysfs: 555c3a68ebfSMilo(Woogyom) Kim lp55xx_unregister_leds(led, chip); 5569e9b3db1SMilo(Woogyom) Kim err_register_leds: 5576ce61762SMilo(Woogyom) Kim lp55xx_deinit_device(chip); 558f6c64c6fSMilo(Woogyom) Kim err_init: 559500fe141SSamu Onkalo return ret; 560500fe141SSamu Onkalo } 561500fe141SSamu Onkalo 562678e8a6bSBill Pemberton static int lp5521_remove(struct i2c_client *client) 563500fe141SSamu Onkalo { 5646ce61762SMilo(Woogyom) Kim struct lp55xx_led *led = i2c_get_clientdata(client); 5656ce61762SMilo(Woogyom) Kim struct lp55xx_chip *chip = led->chip; 566500fe141SSamu Onkalo 56728c9266bSMilo Kim lp5521_stop_all_engines(chip); 56887cc4bdeSMilo(Woogyom) Kim lp55xx_unregister_sysfs(chip); 569c3a68ebfSMilo(Woogyom) Kim lp55xx_unregister_leds(led, chip); 5706ce61762SMilo(Woogyom) Kim lp55xx_deinit_device(chip); 571500fe141SSamu Onkalo 572500fe141SSamu Onkalo return 0; 573500fe141SSamu Onkalo } 574500fe141SSamu Onkalo 575500fe141SSamu Onkalo static const struct i2c_device_id lp5521_id[] = { 576500fe141SSamu Onkalo { "lp5521", 0 }, /* Three channel chip */ 577500fe141SSamu Onkalo { } 578500fe141SSamu Onkalo }; 579500fe141SSamu Onkalo MODULE_DEVICE_TABLE(i2c, lp5521_id); 580500fe141SSamu Onkalo 581b548a34bSAxel Lin #ifdef CONFIG_OF 582b548a34bSAxel Lin static const struct of_device_id of_lp5521_leds_match[] = { 583b548a34bSAxel Lin { .compatible = "national,lp5521", }, 584b548a34bSAxel Lin {}, 585b548a34bSAxel Lin }; 586b548a34bSAxel Lin 587b548a34bSAxel Lin MODULE_DEVICE_TABLE(of, of_lp5521_leds_match); 588b548a34bSAxel Lin #endif 589500fe141SSamu Onkalo static struct i2c_driver lp5521_driver = { 590500fe141SSamu Onkalo .driver = { 591500fe141SSamu Onkalo .name = "lp5521", 592b548a34bSAxel Lin .of_match_table = of_match_ptr(of_lp5521_leds_match), 593500fe141SSamu Onkalo }, 594500fe141SSamu Onkalo .probe = lp5521_probe, 595df07cf81SBill Pemberton .remove = lp5521_remove, 596500fe141SSamu Onkalo .id_table = lp5521_id, 597500fe141SSamu Onkalo }; 598500fe141SSamu Onkalo 59909a0d183SAxel Lin module_i2c_driver(lp5521_driver); 600500fe141SSamu Onkalo 601500fe141SSamu Onkalo MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo"); 602a2387cb9SMilo(Woogyom) Kim MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>"); 603500fe141SSamu Onkalo MODULE_DESCRIPTION("LP5521 LED engine"); 604500fe141SSamu Onkalo MODULE_LICENSE("GPL v2"); 605