xref: /openbmc/linux/drivers/leds/leds-lp5521.c (revision 28c9266b38a00a07497daad0237f7fa154652ece)
1500fe141SSamu Onkalo /*
2500fe141SSamu Onkalo  * LP5521 LED chip driver.
3500fe141SSamu Onkalo  *
4500fe141SSamu Onkalo  * Copyright (C) 2010 Nokia Corporation
5a2387cb9SMilo(Woogyom) Kim  * Copyright (C) 2012 Texas Instruments
6500fe141SSamu Onkalo  *
7500fe141SSamu Onkalo  * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
8a2387cb9SMilo(Woogyom) Kim  *          Milo(Woogyom) Kim <milo.kim@ti.com>
9500fe141SSamu Onkalo  *
10500fe141SSamu Onkalo  * This program is free software; you can redistribute it and/or
11500fe141SSamu Onkalo  * modify it under the terms of the GNU General Public License
12500fe141SSamu Onkalo  * version 2 as published by the Free Software Foundation.
13500fe141SSamu Onkalo  *
14500fe141SSamu Onkalo  * This program is distributed in the hope that it will be useful, but
15500fe141SSamu Onkalo  * WITHOUT ANY WARRANTY; without even the implied warranty of
16500fe141SSamu Onkalo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
17500fe141SSamu Onkalo  * General Public License for more details.
18500fe141SSamu Onkalo  *
19500fe141SSamu Onkalo  * You should have received a copy of the GNU General Public License
20500fe141SSamu Onkalo  * along with this program; if not, write to the Free Software
21500fe141SSamu Onkalo  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22500fe141SSamu Onkalo  * 02110-1301 USA
23500fe141SSamu Onkalo  */
24500fe141SSamu Onkalo 
25500fe141SSamu Onkalo #include <linux/delay.h>
269ce7cb17SMilo(Woogyom) Kim #include <linux/firmware.h>
2779bcc10bSMilo(Woogyom) Kim #include <linux/i2c.h>
2879bcc10bSMilo(Woogyom) Kim #include <linux/init.h>
2979bcc10bSMilo(Woogyom) Kim #include <linux/leds.h>
3079bcc10bSMilo(Woogyom) Kim #include <linux/module.h>
3179bcc10bSMilo(Woogyom) Kim #include <linux/mutex.h>
3279bcc10bSMilo(Woogyom) Kim #include <linux/platform_data/leds-lp55xx.h>
3379bcc10bSMilo(Woogyom) Kim #include <linux/slab.h>
347542a04bSLinus Walleij #include <linux/of.h>
356a0c9a47SMilo(Woogyom) Kim 
366a0c9a47SMilo(Woogyom) Kim #include "leds-lp55xx-common.h"
37500fe141SSamu Onkalo 
3812f022d2SMilo(Woogyom) Kim #define LP5521_PROGRAM_LENGTH		32
3912f022d2SMilo(Woogyom) Kim #define LP5521_MAX_LEDS			3
4012f022d2SMilo(Woogyom) Kim #define LP5521_CMD_DIRECT		0x3F
41500fe141SSamu Onkalo 
42500fe141SSamu Onkalo /* Registers */
43500fe141SSamu Onkalo #define LP5521_REG_ENABLE		0x00
44500fe141SSamu Onkalo #define LP5521_REG_OP_MODE		0x01
45500fe141SSamu Onkalo #define LP5521_REG_R_PWM		0x02
46500fe141SSamu Onkalo #define LP5521_REG_G_PWM		0x03
47500fe141SSamu Onkalo #define LP5521_REG_B_PWM		0x04
48500fe141SSamu Onkalo #define LP5521_REG_R_CURRENT		0x05
49500fe141SSamu Onkalo #define LP5521_REG_G_CURRENT		0x06
50500fe141SSamu Onkalo #define LP5521_REG_B_CURRENT		0x07
51500fe141SSamu Onkalo #define LP5521_REG_CONFIG		0x08
52500fe141SSamu Onkalo #define LP5521_REG_STATUS		0x0C
53500fe141SSamu Onkalo #define LP5521_REG_RESET		0x0D
54500fe141SSamu Onkalo #define LP5521_REG_R_PROG_MEM		0x10
55500fe141SSamu Onkalo #define LP5521_REG_G_PROG_MEM		0x30
56500fe141SSamu Onkalo #define LP5521_REG_B_PROG_MEM		0x50
57500fe141SSamu Onkalo 
58500fe141SSamu Onkalo /* Base register to set LED current */
59500fe141SSamu Onkalo #define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
60500fe141SSamu Onkalo /* Base register to set the brightness */
61500fe141SSamu Onkalo #define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM
62500fe141SSamu Onkalo 
63500fe141SSamu Onkalo /* Bits in ENABLE register */
64500fe141SSamu Onkalo #define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
65500fe141SSamu Onkalo #define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
66500fe141SSamu Onkalo #define LP5521_EXEC_RUN			0x2A
6732a2f747SKim, Milo #define LP5521_ENABLE_DEFAULT	\
6832a2f747SKim, Milo 	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
6932a2f747SKim, Milo #define LP5521_ENABLE_RUN_PROGRAM	\
7032a2f747SKim, Milo 	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
71500fe141SSamu Onkalo 
7281f2a5b4SKim, Milo /* CONFIG register */
7381f2a5b4SKim, Milo #define LP5521_PWM_HF			0x40	/* PWM: 0 = 256Hz, 1 = 558Hz */
7481f2a5b4SKim, Milo #define LP5521_PWRSAVE_EN		0x20	/* 1 = Power save mode */
7581f2a5b4SKim, Milo #define LP5521_CP_MODE_OFF		0	/* Charge pump (CP) off */
7681f2a5b4SKim, Milo #define LP5521_CP_MODE_BYPASS		8	/* CP forced to bypass mode */
7781f2a5b4SKim, Milo #define LP5521_CP_MODE_1X5		0x10	/* CP forced to 1.5x mode */
7881f2a5b4SKim, Milo #define LP5521_CP_MODE_AUTO		0x18	/* Automatic mode selection */
7981f2a5b4SKim, Milo #define LP5521_R_TO_BATT		0x04	/* R out: 0 = CP, 1 = Vbat */
8081f2a5b4SKim, Milo #define LP5521_CLK_INT			0x01	/* Internal clock */
8181f2a5b4SKim, Milo #define LP5521_DEFAULT_CFG		\
8281f2a5b4SKim, Milo 	(LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)
8381f2a5b4SKim, Milo 
84500fe141SSamu Onkalo /* Status */
85500fe141SSamu Onkalo #define LP5521_EXT_CLK_USED		0x08
86500fe141SSamu Onkalo 
87b3c49c05SSrinidhi KASAGAR /* default R channel current register value */
88b3c49c05SSrinidhi KASAGAR #define LP5521_REG_R_CURR_DEFAULT	0xAF
89b3c49c05SSrinidhi KASAGAR 
9048068d5dSMilo(Woogyom) Kim /* Reset register value */
9148068d5dSMilo(Woogyom) Kim #define LP5521_RESET			0xFF
9248068d5dSMilo(Woogyom) Kim 
939ce7cb17SMilo(Woogyom) Kim /* Program Memory Operations */
949ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
959ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_G_M			0x0C
969ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_B_M			0x03
979ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_R			0x10
989ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_G			0x04
999ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_B			0x01
1009ce7cb17SMilo(Woogyom) Kim 
1019ce7cb17SMilo(Woogyom) Kim #define LP5521_R_IS_LOADING(mode)	\
1029ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
1039ce7cb17SMilo(Woogyom) Kim #define LP5521_G_IS_LOADING(mode)	\
1049ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
1059ce7cb17SMilo(Woogyom) Kim #define LP5521_B_IS_LOADING(mode)	\
1069ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
1079ce7cb17SMilo(Woogyom) Kim 
1089ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_R_M			0x30	/* Enable Register */
1099ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_G_M			0x0C
1109ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_B_M			0x03
1119ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_M			0x3F
1129ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_R			0x20
1139ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_G			0x08
1149ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_B			0x02
115500fe141SSamu Onkalo 
1169ce7cb17SMilo(Woogyom) Kim static inline void lp5521_wait_opmode_done(void)
1179ce7cb17SMilo(Woogyom) Kim {
1189ce7cb17SMilo(Woogyom) Kim 	/* operation mode change needs to be longer than 153 us */
1199ce7cb17SMilo(Woogyom) Kim 	usleep_range(200, 300);
1209ce7cb17SMilo(Woogyom) Kim }
1219ce7cb17SMilo(Woogyom) Kim 
12294482174SMilo(Woogyom) Kim static inline void lp5521_wait_enable_done(void)
12394482174SMilo(Woogyom) Kim {
12494482174SMilo(Woogyom) Kim 	/* it takes more 488 us to update ENABLE register */
12594482174SMilo(Woogyom) Kim 	usleep_range(500, 600);
12694482174SMilo(Woogyom) Kim }
12794482174SMilo(Woogyom) Kim 
128a96bfa13SMilo(Woogyom) Kim static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
129a96bfa13SMilo(Woogyom) Kim {
130a96bfa13SMilo(Woogyom) Kim 	led->led_current = led_current;
131a96bfa13SMilo(Woogyom) Kim 	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
132a96bfa13SMilo(Woogyom) Kim 		led_current);
133a96bfa13SMilo(Woogyom) Kim }
134a96bfa13SMilo(Woogyom) Kim 
1359ce7cb17SMilo(Woogyom) Kim static void lp5521_load_engine(struct lp55xx_chip *chip)
136500fe141SSamu Onkalo {
1379ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
1389ce7cb17SMilo(Woogyom) Kim 	u8 mask[] = {
1399ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
1409ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
1419ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
1429ce7cb17SMilo(Woogyom) Kim 	};
143500fe141SSamu Onkalo 
1449ce7cb17SMilo(Woogyom) Kim 	u8 val[] = {
1459ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
1469ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
1479ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
1489ce7cb17SMilo(Woogyom) Kim 	};
149500fe141SSamu Onkalo 
1509ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
151500fe141SSamu Onkalo 
1529ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
153500fe141SSamu Onkalo }
154500fe141SSamu Onkalo 
155*28c9266bSMilo Kim static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
156500fe141SSamu Onkalo {
1579ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
1589ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
1599ce7cb17SMilo(Woogyom) Kim }
1609ce7cb17SMilo(Woogyom) Kim 
161*28c9266bSMilo Kim static void lp5521_stop_engine(struct lp55xx_chip *chip)
162*28c9266bSMilo Kim {
163*28c9266bSMilo Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
164*28c9266bSMilo Kim 	u8 mask[] = {
165*28c9266bSMilo Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
166*28c9266bSMilo Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
167*28c9266bSMilo Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
168*28c9266bSMilo Kim 	};
169*28c9266bSMilo Kim 
170*28c9266bSMilo Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
171*28c9266bSMilo Kim 
172*28c9266bSMilo Kim 	lp5521_wait_opmode_done();
173*28c9266bSMilo Kim }
174*28c9266bSMilo Kim 
1759ce7cb17SMilo(Woogyom) Kim static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
1769ce7cb17SMilo(Woogyom) Kim {
177500fe141SSamu Onkalo 	int ret;
178500fe141SSamu Onkalo 	u8 mode;
1799ce7cb17SMilo(Woogyom) Kim 	u8 exec;
180500fe141SSamu Onkalo 
1819ce7cb17SMilo(Woogyom) Kim 	/* stop engine */
1829ce7cb17SMilo(Woogyom) Kim 	if (!start) {
1839ce7cb17SMilo(Woogyom) Kim 		lp5521_stop_engine(chip);
1849ce7cb17SMilo(Woogyom) Kim 		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
1859ce7cb17SMilo(Woogyom) Kim 		lp5521_wait_opmode_done();
1869ce7cb17SMilo(Woogyom) Kim 		return;
1879ce7cb17SMilo(Woogyom) Kim 	}
1889ce7cb17SMilo(Woogyom) Kim 
1899ce7cb17SMilo(Woogyom) Kim 	/*
1909ce7cb17SMilo(Woogyom) Kim 	 * To run the engine,
1919ce7cb17SMilo(Woogyom) Kim 	 * operation mode and enable register should updated at the same time
1929ce7cb17SMilo(Woogyom) Kim 	 */
1939ce7cb17SMilo(Woogyom) Kim 
1949ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
1955bc9ad77SDan Carpenter 	if (ret)
1969ce7cb17SMilo(Woogyom) Kim 		return;
1975bc9ad77SDan Carpenter 
1989ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
1995bc9ad77SDan Carpenter 	if (ret)
2009ce7cb17SMilo(Woogyom) Kim 		return;
201500fe141SSamu Onkalo 
2029ce7cb17SMilo(Woogyom) Kim 	/* change operation mode to RUN only when each engine is loading */
2039ce7cb17SMilo(Woogyom) Kim 	if (LP5521_R_IS_LOADING(mode)) {
2049ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
2059ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
2069ce7cb17SMilo(Woogyom) Kim 	}
207500fe141SSamu Onkalo 
2089ce7cb17SMilo(Woogyom) Kim 	if (LP5521_G_IS_LOADING(mode)) {
2099ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
2109ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
2119ce7cb17SMilo(Woogyom) Kim 	}
212500fe141SSamu Onkalo 
2139ce7cb17SMilo(Woogyom) Kim 	if (LP5521_B_IS_LOADING(mode)) {
2149ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
2159ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
2169ce7cb17SMilo(Woogyom) Kim 	}
2179ce7cb17SMilo(Woogyom) Kim 
2189ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
2199ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
2209ce7cb17SMilo(Woogyom) Kim 
2219ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
2229ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
2239ce7cb17SMilo(Woogyom) Kim }
2249ce7cb17SMilo(Woogyom) Kim 
2259ce7cb17SMilo(Woogyom) Kim static int lp5521_update_program_memory(struct lp55xx_chip *chip,
2269ce7cb17SMilo(Woogyom) Kim 					const u8 *data, size_t size)
2279ce7cb17SMilo(Woogyom) Kim {
2289ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
2299ce7cb17SMilo(Woogyom) Kim 	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
2309ce7cb17SMilo(Woogyom) Kim 	u8 addr[] = {
2319ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
2329ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
2339ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
2349ce7cb17SMilo(Woogyom) Kim 	};
2359ce7cb17SMilo(Woogyom) Kim 	unsigned cmd;
2369ce7cb17SMilo(Woogyom) Kim 	char c[3];
2379ce7cb17SMilo(Woogyom) Kim 	int nrchars;
2389ce7cb17SMilo(Woogyom) Kim 	int ret;
2391eca0b3aSMilo Kim 	int offset = 0;
2401eca0b3aSMilo Kim 	int i = 0;
2419ce7cb17SMilo(Woogyom) Kim 
2429ce7cb17SMilo(Woogyom) Kim 	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
2439ce7cb17SMilo(Woogyom) Kim 		/* separate sscanfs because length is working only for %s */
2449ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
2459ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2469ce7cb17SMilo(Woogyom) Kim 			goto err;
2479ce7cb17SMilo(Woogyom) Kim 
2489ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(c, "%2x", &cmd);
2499ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2509ce7cb17SMilo(Woogyom) Kim 			goto err;
2519ce7cb17SMilo(Woogyom) Kim 
2529ce7cb17SMilo(Woogyom) Kim 		pattern[i] = (u8)cmd;
2539ce7cb17SMilo(Woogyom) Kim 		offset += nrchars;
2549ce7cb17SMilo(Woogyom) Kim 		i++;
2559ce7cb17SMilo(Woogyom) Kim 	}
2569ce7cb17SMilo(Woogyom) Kim 
2579ce7cb17SMilo(Woogyom) Kim 	/* Each instruction is 16bit long. Check that length is even */
2589ce7cb17SMilo(Woogyom) Kim 	if (i % 2)
2599ce7cb17SMilo(Woogyom) Kim 		goto err;
2609ce7cb17SMilo(Woogyom) Kim 
261c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
262c0e5e9b5SMilo Kim 
2631eca0b3aSMilo Kim 	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
264c0e5e9b5SMilo Kim 		ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
265c0e5e9b5SMilo Kim 		if (ret) {
266c0e5e9b5SMilo Kim 			mutex_unlock(&chip->lock);
267c0e5e9b5SMilo Kim 			return -EINVAL;
268c0e5e9b5SMilo Kim 		}
269c0e5e9b5SMilo Kim 	}
270c0e5e9b5SMilo Kim 
271c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
272c0e5e9b5SMilo Kim 
273c0e5e9b5SMilo Kim 	return size;
2749ce7cb17SMilo(Woogyom) Kim 
2759ce7cb17SMilo(Woogyom) Kim err:
2769ce7cb17SMilo(Woogyom) Kim 	dev_err(&chip->cl->dev, "wrong pattern format\n");
2779ce7cb17SMilo(Woogyom) Kim 	return -EINVAL;
2789ce7cb17SMilo(Woogyom) Kim }
2799ce7cb17SMilo(Woogyom) Kim 
2809ce7cb17SMilo(Woogyom) Kim static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
2819ce7cb17SMilo(Woogyom) Kim {
2829ce7cb17SMilo(Woogyom) Kim 	const struct firmware *fw = chip->fw;
2839ce7cb17SMilo(Woogyom) Kim 
2849ce7cb17SMilo(Woogyom) Kim 	if (fw->size > LP5521_PROGRAM_LENGTH) {
2859ce7cb17SMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
2869ce7cb17SMilo(Woogyom) Kim 			fw->size);
2879ce7cb17SMilo(Woogyom) Kim 		return;
2889ce7cb17SMilo(Woogyom) Kim 	}
2899ce7cb17SMilo(Woogyom) Kim 
2909ce7cb17SMilo(Woogyom) Kim 	/*
2919ce7cb17SMilo(Woogyom) Kim 	 * Program momery sequence
2929ce7cb17SMilo(Woogyom) Kim 	 *  1) set engine mode to "LOAD"
2939ce7cb17SMilo(Woogyom) Kim 	 *  2) write firmware data into program memory
2949ce7cb17SMilo(Woogyom) Kim 	 */
2959ce7cb17SMilo(Woogyom) Kim 
2969ce7cb17SMilo(Woogyom) Kim 	lp5521_load_engine(chip);
2979ce7cb17SMilo(Woogyom) Kim 	lp5521_update_program_memory(chip, fw->data, fw->size);
298500fe141SSamu Onkalo }
299500fe141SSamu Onkalo 
300ffbdccdbSMilo(Woogyom) Kim static int lp5521_post_init_device(struct lp55xx_chip *chip)
301500fe141SSamu Onkalo {
302500fe141SSamu Onkalo 	int ret;
30394482174SMilo(Woogyom) Kim 	u8 val;
304500fe141SSamu Onkalo 
30594482174SMilo(Woogyom) Kim 	/*
30694482174SMilo(Woogyom) Kim 	 * Make sure that the chip is reset by reading back the r channel
30794482174SMilo(Woogyom) Kim 	 * current reg. This is dummy read is required on some platforms -
30894482174SMilo(Woogyom) Kim 	 * otherwise further access to the R G B channels in the
30994482174SMilo(Woogyom) Kim 	 * LP5521_REG_ENABLE register will not have any effect - strange!
31094482174SMilo(Woogyom) Kim 	 */
311ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
31294482174SMilo(Woogyom) Kim 	if (ret) {
313ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "error in resetting chip\n");
31494482174SMilo(Woogyom) Kim 		return ret;
31594482174SMilo(Woogyom) Kim 	}
31694482174SMilo(Woogyom) Kim 	if (val != LP5521_REG_R_CURR_DEFAULT) {
317ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev,
31894482174SMilo(Woogyom) Kim 			"unexpected data in register (expected 0x%x got 0x%x)\n",
31994482174SMilo(Woogyom) Kim 			LP5521_REG_R_CURR_DEFAULT, val);
32094482174SMilo(Woogyom) Kim 		ret = -EINVAL;
32194482174SMilo(Woogyom) Kim 		return ret;
32294482174SMilo(Woogyom) Kim 	}
32394482174SMilo(Woogyom) Kim 	usleep_range(10000, 20000);
324500fe141SSamu Onkalo 
325500fe141SSamu Onkalo 	/* Set all PWMs to direct control mode */
326ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
327500fe141SSamu Onkalo 
32881f2a5b4SKim, Milo 	/* Update configuration for the clock setting */
32981f2a5b4SKim, Milo 	val = LP5521_DEFAULT_CFG;
33081f2a5b4SKim, Milo 	if (!lp55xx_is_extclk_used(chip))
33181f2a5b4SKim, Milo 		val |= LP5521_CLK_INT;
33281f2a5b4SKim, Milo 
333ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
33494482174SMilo(Woogyom) Kim 	if (ret)
33594482174SMilo(Woogyom) Kim 		return ret;
336500fe141SSamu Onkalo 
337500fe141SSamu Onkalo 	/* Initialize all channels PWM to zero -> leds off */
338ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
339ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
340ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
341500fe141SSamu Onkalo 
342500fe141SSamu Onkalo 	/* Set engines are set to run state when OP_MODE enables engines */
343ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
34494482174SMilo(Woogyom) Kim 	if (ret)
345500fe141SSamu Onkalo 		return ret;
34694482174SMilo(Woogyom) Kim 
34794482174SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
34894482174SMilo(Woogyom) Kim 
34994482174SMilo(Woogyom) Kim 	return 0;
350500fe141SSamu Onkalo }
351500fe141SSamu Onkalo 
3529ca3bd80SMilo(Woogyom) Kim static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
353500fe141SSamu Onkalo {
3549ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_platform_data *pdata = chip->pdata;
355500fe141SSamu Onkalo 	int ret;
356500fe141SSamu Onkalo 	u8 status;
357500fe141SSamu Onkalo 
3589ca3bd80SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
359500fe141SSamu Onkalo 	if (ret < 0)
360500fe141SSamu Onkalo 		return ret;
361500fe141SSamu Onkalo 
3629ca3bd80SMilo(Woogyom) Kim 	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
3639ca3bd80SMilo(Woogyom) Kim 		return 0;
3649ca3bd80SMilo(Woogyom) Kim 
365500fe141SSamu Onkalo 	/* Check that ext clock is really in use if requested */
366500fe141SSamu Onkalo 	if  ((status & LP5521_EXT_CLK_USED) == 0)
367500fe141SSamu Onkalo 		return -EIO;
3689ca3bd80SMilo(Woogyom) Kim 
369500fe141SSamu Onkalo 	return 0;
370500fe141SSamu Onkalo }
371500fe141SSamu Onkalo 
372500fe141SSamu Onkalo static void lp5521_led_brightness_work(struct work_struct *work)
373500fe141SSamu Onkalo {
374a6e4679aSMilo(Woogyom) Kim 	struct lp55xx_led *led = container_of(work, struct lp55xx_led,
375500fe141SSamu Onkalo 					      brightness_work);
376a6e4679aSMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
377500fe141SSamu Onkalo 
378500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
379a6e4679aSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
380500fe141SSamu Onkalo 		led->brightness);
381500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
382500fe141SSamu Onkalo }
383500fe141SSamu Onkalo 
384c0e5e9b5SMilo Kim static ssize_t show_engine_mode(struct device *dev,
385c0e5e9b5SMilo Kim 				struct device_attribute *attr,
386c0e5e9b5SMilo Kim 				char *buf, int nr)
387c0e5e9b5SMilo Kim {
388c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
389c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
390c0e5e9b5SMilo Kim 	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
391c0e5e9b5SMilo Kim 
392c0e5e9b5SMilo Kim 	switch (mode) {
393c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_RUN:
394c0e5e9b5SMilo Kim 		return sprintf(buf, "run\n");
395c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_LOAD:
396c0e5e9b5SMilo Kim 		return sprintf(buf, "load\n");
397c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_DISABLED:
398c0e5e9b5SMilo Kim 	default:
399c0e5e9b5SMilo Kim 		return sprintf(buf, "disabled\n");
400c0e5e9b5SMilo Kim 	}
401c0e5e9b5SMilo Kim }
402c0e5e9b5SMilo Kim show_mode(1)
403c0e5e9b5SMilo Kim show_mode(2)
404c0e5e9b5SMilo Kim show_mode(3)
405c0e5e9b5SMilo Kim 
406c0e5e9b5SMilo Kim static ssize_t store_engine_mode(struct device *dev,
407c0e5e9b5SMilo Kim 				 struct device_attribute *attr,
408c0e5e9b5SMilo Kim 				 const char *buf, size_t len, int nr)
409c0e5e9b5SMilo Kim {
410c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
411c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
412c0e5e9b5SMilo Kim 	struct lp55xx_engine *engine = &chip->engines[nr - 1];
413c0e5e9b5SMilo Kim 
414c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
415c0e5e9b5SMilo Kim 
416c0e5e9b5SMilo Kim 	chip->engine_idx = nr;
417c0e5e9b5SMilo Kim 
418c0e5e9b5SMilo Kim 	if (!strncmp(buf, "run", 3)) {
419c0e5e9b5SMilo Kim 		lp5521_run_engine(chip, true);
420c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_RUN;
421c0e5e9b5SMilo Kim 	} else if (!strncmp(buf, "load", 4)) {
422c0e5e9b5SMilo Kim 		lp5521_stop_engine(chip);
423c0e5e9b5SMilo Kim 		lp5521_load_engine(chip);
424c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_LOAD;
425c0e5e9b5SMilo Kim 	} else if (!strncmp(buf, "disabled", 8)) {
426c0e5e9b5SMilo Kim 		lp5521_stop_engine(chip);
427c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_DISABLED;
428c0e5e9b5SMilo Kim 	}
429c0e5e9b5SMilo Kim 
430c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
431c0e5e9b5SMilo Kim 
432c0e5e9b5SMilo Kim 	return len;
433c0e5e9b5SMilo Kim }
434c0e5e9b5SMilo Kim store_mode(1)
435c0e5e9b5SMilo Kim store_mode(2)
436c0e5e9b5SMilo Kim store_mode(3)
437c0e5e9b5SMilo Kim 
438c0e5e9b5SMilo Kim static ssize_t store_engine_load(struct device *dev,
439c0e5e9b5SMilo Kim 			     struct device_attribute *attr,
440c0e5e9b5SMilo Kim 			     const char *buf, size_t len, int nr)
441c0e5e9b5SMilo Kim {
442c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
443c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
444c0e5e9b5SMilo Kim 
445c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
446c0e5e9b5SMilo Kim 
447c0e5e9b5SMilo Kim 	chip->engine_idx = nr;
448c0e5e9b5SMilo Kim 	lp5521_load_engine(chip);
449c0e5e9b5SMilo Kim 
450c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
451c0e5e9b5SMilo Kim 
452c0e5e9b5SMilo Kim 	return lp5521_update_program_memory(chip, buf, len);
453c0e5e9b5SMilo Kim }
454c0e5e9b5SMilo Kim store_load(1)
455c0e5e9b5SMilo Kim store_load(2)
456c0e5e9b5SMilo Kim store_load(3)
457c0e5e9b5SMilo Kim 
458500fe141SSamu Onkalo static ssize_t lp5521_selftest(struct device *dev,
459500fe141SSamu Onkalo 			       struct device_attribute *attr,
460500fe141SSamu Onkalo 			       char *buf)
461500fe141SSamu Onkalo {
4629ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
4639ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
464500fe141SSamu Onkalo 	int ret;
465500fe141SSamu Onkalo 
466500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
467500fe141SSamu Onkalo 	ret = lp5521_run_selftest(chip, buf);
468500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
46924d32128SKim, Milo 
47024d32128SKim, Milo 	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
471500fe141SSamu Onkalo }
472500fe141SSamu Onkalo 
473500fe141SSamu Onkalo /* device attributes */
474c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
475c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
476c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
477c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
478c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
479c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
480c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
481500fe141SSamu Onkalo 
482500fe141SSamu Onkalo static struct attribute *lp5521_attributes[] = {
483c0e5e9b5SMilo Kim 	&dev_attr_engine1_mode.attr,
484c0e5e9b5SMilo Kim 	&dev_attr_engine2_mode.attr,
485c0e5e9b5SMilo Kim 	&dev_attr_engine3_mode.attr,
486c0e5e9b5SMilo Kim 	&dev_attr_engine1_load.attr,
487c0e5e9b5SMilo Kim 	&dev_attr_engine2_load.attr,
488c0e5e9b5SMilo Kim 	&dev_attr_engine3_load.attr,
489500fe141SSamu Onkalo 	&dev_attr_selftest.attr,
490500fe141SSamu Onkalo 	NULL
491500fe141SSamu Onkalo };
492500fe141SSamu Onkalo 
493500fe141SSamu Onkalo static const struct attribute_group lp5521_group = {
494500fe141SSamu Onkalo 	.attrs = lp5521_attributes,
495500fe141SSamu Onkalo };
496500fe141SSamu Onkalo 
49748068d5dSMilo(Woogyom) Kim /* Chip specific configurations */
49848068d5dSMilo(Woogyom) Kim static struct lp55xx_device_config lp5521_cfg = {
49948068d5dSMilo(Woogyom) Kim 	.reset = {
50048068d5dSMilo(Woogyom) Kim 		.addr = LP5521_REG_RESET,
50148068d5dSMilo(Woogyom) Kim 		.val  = LP5521_RESET,
50248068d5dSMilo(Woogyom) Kim 	},
503e3a700d8SMilo(Woogyom) Kim 	.enable = {
504e3a700d8SMilo(Woogyom) Kim 		.addr = LP5521_REG_ENABLE,
505e3a700d8SMilo(Woogyom) Kim 		.val  = LP5521_ENABLE_DEFAULT,
506e3a700d8SMilo(Woogyom) Kim 	},
5070e202346SMilo(Woogyom) Kim 	.max_channel  = LP5521_MAX_LEDS,
508ffbdccdbSMilo(Woogyom) Kim 	.post_init_device   = lp5521_post_init_device,
509a6e4679aSMilo(Woogyom) Kim 	.brightness_work_fn = lp5521_led_brightness_work,
510a96bfa13SMilo(Woogyom) Kim 	.set_led_current    = lp5521_set_led_current,
5119ce7cb17SMilo(Woogyom) Kim 	.firmware_cb        = lp5521_firmware_loaded,
5129ce7cb17SMilo(Woogyom) Kim 	.run_engine         = lp5521_run_engine,
513e73c0ce6SMilo(Woogyom) Kim 	.dev_attr_group     = &lp5521_group,
51448068d5dSMilo(Woogyom) Kim };
51548068d5dSMilo(Woogyom) Kim 
51698ea1ea2SBill Pemberton static int lp5521_probe(struct i2c_client *client,
517500fe141SSamu Onkalo 			const struct i2c_device_id *id)
518500fe141SSamu Onkalo {
5191904f83dSMilo(Woogyom) Kim 	int ret;
5206a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_chip *chip;
5216a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_led *led;
5227542a04bSLinus Walleij 	struct lp55xx_platform_data *pdata;
5237542a04bSLinus Walleij 	struct device_node *np = client->dev.of_node;
524500fe141SSamu Onkalo 
52587aae1eaSJingoo Han 	if (!dev_get_platdata(&client->dev)) {
5267542a04bSLinus Walleij 		if (np) {
5277542a04bSLinus Walleij 			ret = lp55xx_of_populate_pdata(&client->dev, np);
5287542a04bSLinus Walleij 			if (ret < 0)
5297542a04bSLinus Walleij 				return ret;
5307542a04bSLinus Walleij 		} else {
531500fe141SSamu Onkalo 			dev_err(&client->dev, "no platform data\n");
532e430dc00SBryan Wu 			return -EINVAL;
533500fe141SSamu Onkalo 		}
5347542a04bSLinus Walleij 	}
53587aae1eaSJingoo Han 	pdata = dev_get_platdata(&client->dev);
536500fe141SSamu Onkalo 
5376a0c9a47SMilo(Woogyom) Kim 	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
5386a0c9a47SMilo(Woogyom) Kim 	if (!chip)
5396a0c9a47SMilo(Woogyom) Kim 		return -ENOMEM;
540500fe141SSamu Onkalo 
5416a0c9a47SMilo(Woogyom) Kim 	led = devm_kzalloc(&client->dev,
5426a0c9a47SMilo(Woogyom) Kim 			sizeof(*led) * pdata->num_channels, GFP_KERNEL);
5436a0c9a47SMilo(Woogyom) Kim 	if (!led)
5446a0c9a47SMilo(Woogyom) Kim 		return -ENOMEM;
5456a0c9a47SMilo(Woogyom) Kim 
5466a0c9a47SMilo(Woogyom) Kim 	chip->cl = client;
5476a0c9a47SMilo(Woogyom) Kim 	chip->pdata = pdata;
54848068d5dSMilo(Woogyom) Kim 	chip->cfg = &lp5521_cfg;
5496a0c9a47SMilo(Woogyom) Kim 
5506a0c9a47SMilo(Woogyom) Kim 	mutex_init(&chip->lock);
5516a0c9a47SMilo(Woogyom) Kim 
5526a0c9a47SMilo(Woogyom) Kim 	i2c_set_clientdata(client, led);
553500fe141SSamu Onkalo 
55422ebeb48SMilo(Woogyom) Kim 	ret = lp55xx_init_device(chip);
555944f7b1dSMilo(Woogyom) Kim 	if (ret)
556f6c64c6fSMilo(Woogyom) Kim 		goto err_init;
557500fe141SSamu Onkalo 
558500fe141SSamu Onkalo 	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
559500fe141SSamu Onkalo 
5609e9b3db1SMilo(Woogyom) Kim 	ret = lp55xx_register_leds(led, chip);
561f6524808SMilo(Woogyom) Kim 	if (ret)
5629e9b3db1SMilo(Woogyom) Kim 		goto err_register_leds;
563500fe141SSamu Onkalo 
564e73c0ce6SMilo(Woogyom) Kim 	ret = lp55xx_register_sysfs(chip);
565500fe141SSamu Onkalo 	if (ret) {
566500fe141SSamu Onkalo 		dev_err(&client->dev, "registering sysfs failed\n");
567e73c0ce6SMilo(Woogyom) Kim 		goto err_register_sysfs;
568500fe141SSamu Onkalo 	}
569e73c0ce6SMilo(Woogyom) Kim 
570e73c0ce6SMilo(Woogyom) Kim 	return 0;
571e73c0ce6SMilo(Woogyom) Kim 
572e73c0ce6SMilo(Woogyom) Kim err_register_sysfs:
573c3a68ebfSMilo(Woogyom) Kim 	lp55xx_unregister_leds(led, chip);
5749e9b3db1SMilo(Woogyom) Kim err_register_leds:
5756ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
576f6c64c6fSMilo(Woogyom) Kim err_init:
577500fe141SSamu Onkalo 	return ret;
578500fe141SSamu Onkalo }
579500fe141SSamu Onkalo 
580678e8a6bSBill Pemberton static int lp5521_remove(struct i2c_client *client)
581500fe141SSamu Onkalo {
5826ce61762SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(client);
5836ce61762SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
584500fe141SSamu Onkalo 
585*28c9266bSMilo Kim 	lp5521_stop_all_engines(chip);
58687cc4bdeSMilo(Woogyom) Kim 	lp55xx_unregister_sysfs(chip);
587c3a68ebfSMilo(Woogyom) Kim 	lp55xx_unregister_leds(led, chip);
5886ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
589500fe141SSamu Onkalo 
590500fe141SSamu Onkalo 	return 0;
591500fe141SSamu Onkalo }
592500fe141SSamu Onkalo 
593500fe141SSamu Onkalo static const struct i2c_device_id lp5521_id[] = {
594500fe141SSamu Onkalo 	{ "lp5521", 0 }, /* Three channel chip */
595500fe141SSamu Onkalo 	{ }
596500fe141SSamu Onkalo };
597500fe141SSamu Onkalo MODULE_DEVICE_TABLE(i2c, lp5521_id);
598500fe141SSamu Onkalo 
599b548a34bSAxel Lin #ifdef CONFIG_OF
600b548a34bSAxel Lin static const struct of_device_id of_lp5521_leds_match[] = {
601b548a34bSAxel Lin 	{ .compatible = "national,lp5521", },
602b548a34bSAxel Lin 	{},
603b548a34bSAxel Lin };
604b548a34bSAxel Lin 
605b548a34bSAxel Lin MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
606b548a34bSAxel Lin #endif
607500fe141SSamu Onkalo static struct i2c_driver lp5521_driver = {
608500fe141SSamu Onkalo 	.driver = {
609500fe141SSamu Onkalo 		.name	= "lp5521",
610b548a34bSAxel Lin 		.of_match_table = of_match_ptr(of_lp5521_leds_match),
611500fe141SSamu Onkalo 	},
612500fe141SSamu Onkalo 	.probe		= lp5521_probe,
613df07cf81SBill Pemberton 	.remove		= lp5521_remove,
614500fe141SSamu Onkalo 	.id_table	= lp5521_id,
615500fe141SSamu Onkalo };
616500fe141SSamu Onkalo 
61709a0d183SAxel Lin module_i2c_driver(lp5521_driver);
618500fe141SSamu Onkalo 
619500fe141SSamu Onkalo MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
620a2387cb9SMilo(Woogyom) Kim MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
621500fe141SSamu Onkalo MODULE_DESCRIPTION("LP5521 LED engine");
622500fe141SSamu Onkalo MODULE_LICENSE("GPL v2");
623