xref: /openbmc/linux/drivers/leds/leds-lp5521.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
12b27bdccSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2500fe141SSamu Onkalo /*
3500fe141SSamu Onkalo  * LP5521 LED chip driver.
4500fe141SSamu Onkalo  *
5500fe141SSamu Onkalo  * Copyright (C) 2010 Nokia Corporation
6a2387cb9SMilo(Woogyom) Kim  * Copyright (C) 2012 Texas Instruments
7500fe141SSamu Onkalo  *
8500fe141SSamu Onkalo  * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
9a2387cb9SMilo(Woogyom) Kim  *          Milo(Woogyom) Kim <milo.kim@ti.com>
10500fe141SSamu Onkalo  */
11500fe141SSamu Onkalo 
12500fe141SSamu Onkalo #include <linux/delay.h>
139ce7cb17SMilo(Woogyom) Kim #include <linux/firmware.h>
1479bcc10bSMilo(Woogyom) Kim #include <linux/i2c.h>
1579bcc10bSMilo(Woogyom) Kim #include <linux/leds.h>
1679bcc10bSMilo(Woogyom) Kim #include <linux/module.h>
1779bcc10bSMilo(Woogyom) Kim #include <linux/mutex.h>
1879bcc10bSMilo(Woogyom) Kim #include <linux/platform_data/leds-lp55xx.h>
1979bcc10bSMilo(Woogyom) Kim #include <linux/slab.h>
207542a04bSLinus Walleij #include <linux/of.h>
216a0c9a47SMilo(Woogyom) Kim 
226a0c9a47SMilo(Woogyom) Kim #include "leds-lp55xx-common.h"
23500fe141SSamu Onkalo 
2412f022d2SMilo(Woogyom) Kim #define LP5521_PROGRAM_LENGTH		32
2512f022d2SMilo(Woogyom) Kim #define LP5521_MAX_LEDS			3
2612f022d2SMilo(Woogyom) Kim #define LP5521_CMD_DIRECT		0x3F
27500fe141SSamu Onkalo 
28500fe141SSamu Onkalo /* Registers */
29500fe141SSamu Onkalo #define LP5521_REG_ENABLE		0x00
30500fe141SSamu Onkalo #define LP5521_REG_OP_MODE		0x01
31500fe141SSamu Onkalo #define LP5521_REG_R_PWM		0x02
32500fe141SSamu Onkalo #define LP5521_REG_G_PWM		0x03
33500fe141SSamu Onkalo #define LP5521_REG_B_PWM		0x04
34500fe141SSamu Onkalo #define LP5521_REG_R_CURRENT		0x05
35500fe141SSamu Onkalo #define LP5521_REG_G_CURRENT		0x06
36500fe141SSamu Onkalo #define LP5521_REG_B_CURRENT		0x07
37500fe141SSamu Onkalo #define LP5521_REG_CONFIG		0x08
38500fe141SSamu Onkalo #define LP5521_REG_STATUS		0x0C
39500fe141SSamu Onkalo #define LP5521_REG_RESET		0x0D
40500fe141SSamu Onkalo #define LP5521_REG_R_PROG_MEM		0x10
41500fe141SSamu Onkalo #define LP5521_REG_G_PROG_MEM		0x30
42500fe141SSamu Onkalo #define LP5521_REG_B_PROG_MEM		0x50
43500fe141SSamu Onkalo 
44500fe141SSamu Onkalo /* Base register to set LED current */
45500fe141SSamu Onkalo #define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
46500fe141SSamu Onkalo /* Base register to set the brightness */
47500fe141SSamu Onkalo #define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM
48500fe141SSamu Onkalo 
49500fe141SSamu Onkalo /* Bits in ENABLE register */
50500fe141SSamu Onkalo #define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
51500fe141SSamu Onkalo #define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
52500fe141SSamu Onkalo #define LP5521_EXEC_RUN			0x2A
5332a2f747SKim, Milo #define LP5521_ENABLE_DEFAULT	\
5432a2f747SKim, Milo 	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
5532a2f747SKim, Milo #define LP5521_ENABLE_RUN_PROGRAM	\
5632a2f747SKim, Milo 	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
57500fe141SSamu Onkalo 
5881f2a5b4SKim, Milo /* CONFIG register */
5981f2a5b4SKim, Milo #define LP5521_PWM_HF			0x40	/* PWM: 0 = 256Hz, 1 = 558Hz */
6081f2a5b4SKim, Milo #define LP5521_PWRSAVE_EN		0x20	/* 1 = Power save mode */
6154a7bef5SMaarten Zanders #define LP5521_CP_MODE_MASK		0x18	/* Charge pump mode */
6254a7bef5SMaarten Zanders #define LP5521_CP_MODE_SHIFT		3
6381f2a5b4SKim, Milo #define LP5521_R_TO_BATT		0x04	/* R out: 0 = CP, 1 = Vbat */
6481f2a5b4SKim, Milo #define LP5521_CLK_INT			0x01	/* Internal clock */
6554a7bef5SMaarten Zanders #define LP5521_DEFAULT_CFG		(LP5521_PWM_HF | LP5521_PWRSAVE_EN)
6681f2a5b4SKim, Milo 
67500fe141SSamu Onkalo /* Status */
68500fe141SSamu Onkalo #define LP5521_EXT_CLK_USED		0x08
69500fe141SSamu Onkalo 
70b3c49c05SSrinidhi KASAGAR /* default R channel current register value */
71b3c49c05SSrinidhi KASAGAR #define LP5521_REG_R_CURR_DEFAULT	0xAF
72b3c49c05SSrinidhi KASAGAR 
7348068d5dSMilo(Woogyom) Kim /* Reset register value */
7448068d5dSMilo(Woogyom) Kim #define LP5521_RESET			0xFF
7548068d5dSMilo(Woogyom) Kim 
769ce7cb17SMilo(Woogyom) Kim /* Program Memory Operations */
779ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
789ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_G_M			0x0C
799ce7cb17SMilo(Woogyom) Kim #define LP5521_MODE_B_M			0x03
809ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_R			0x10
819ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_G			0x04
829ce7cb17SMilo(Woogyom) Kim #define LP5521_LOAD_B			0x01
839ce7cb17SMilo(Woogyom) Kim 
849ce7cb17SMilo(Woogyom) Kim #define LP5521_R_IS_LOADING(mode)	\
859ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
869ce7cb17SMilo(Woogyom) Kim #define LP5521_G_IS_LOADING(mode)	\
879ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
889ce7cb17SMilo(Woogyom) Kim #define LP5521_B_IS_LOADING(mode)	\
899ce7cb17SMilo(Woogyom) Kim 	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
909ce7cb17SMilo(Woogyom) Kim 
919ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_R_M			0x30	/* Enable Register */
929ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_G_M			0x0C
939ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_B_M			0x03
949ce7cb17SMilo(Woogyom) Kim #define LP5521_EXEC_M			0x3F
959ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_R			0x20
969ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_G			0x08
979ce7cb17SMilo(Woogyom) Kim #define LP5521_RUN_B			0x02
98500fe141SSamu Onkalo 
lp5521_wait_opmode_done(void)999ce7cb17SMilo(Woogyom) Kim static inline void lp5521_wait_opmode_done(void)
1009ce7cb17SMilo(Woogyom) Kim {
1019ce7cb17SMilo(Woogyom) Kim 	/* operation mode change needs to be longer than 153 us */
1029ce7cb17SMilo(Woogyom) Kim 	usleep_range(200, 300);
1039ce7cb17SMilo(Woogyom) Kim }
1049ce7cb17SMilo(Woogyom) Kim 
lp5521_wait_enable_done(void)10594482174SMilo(Woogyom) Kim static inline void lp5521_wait_enable_done(void)
10694482174SMilo(Woogyom) Kim {
10794482174SMilo(Woogyom) Kim 	/* it takes more 488 us to update ENABLE register */
10894482174SMilo(Woogyom) Kim 	usleep_range(500, 600);
10994482174SMilo(Woogyom) Kim }
11094482174SMilo(Woogyom) Kim 
lp5521_set_led_current(struct lp55xx_led * led,u8 led_current)111a96bfa13SMilo(Woogyom) Kim static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
112a96bfa13SMilo(Woogyom) Kim {
113a96bfa13SMilo(Woogyom) Kim 	led->led_current = led_current;
114a96bfa13SMilo(Woogyom) Kim 	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
115a96bfa13SMilo(Woogyom) Kim 		led_current);
116a96bfa13SMilo(Woogyom) Kim }
117a96bfa13SMilo(Woogyom) Kim 
lp5521_load_engine(struct lp55xx_chip * chip)1189ce7cb17SMilo(Woogyom) Kim static void lp5521_load_engine(struct lp55xx_chip *chip)
119500fe141SSamu Onkalo {
1209ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
121f01a59efSColin Ian King 	static const u8 mask[] = {
1229ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
1239ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
1249ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
1259ce7cb17SMilo(Woogyom) Kim 	};
126500fe141SSamu Onkalo 
127f01a59efSColin Ian King 	static const u8 val[] = {
1289ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
1299ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
1309ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
1319ce7cb17SMilo(Woogyom) Kim 	};
132500fe141SSamu Onkalo 
1339ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
134500fe141SSamu Onkalo 
1359ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
136500fe141SSamu Onkalo }
137500fe141SSamu Onkalo 
lp5521_stop_all_engines(struct lp55xx_chip * chip)13828c9266bSMilo Kim static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
139500fe141SSamu Onkalo {
1409ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
1419ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
1429ce7cb17SMilo(Woogyom) Kim }
1439ce7cb17SMilo(Woogyom) Kim 
lp5521_stop_engine(struct lp55xx_chip * chip)14428c9266bSMilo Kim static void lp5521_stop_engine(struct lp55xx_chip *chip)
14528c9266bSMilo Kim {
14628c9266bSMilo Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
147f01a59efSColin Ian King 	static const u8 mask[] = {
14828c9266bSMilo Kim 		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
14928c9266bSMilo Kim 		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
15028c9266bSMilo Kim 		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
15128c9266bSMilo Kim 	};
15228c9266bSMilo Kim 
15328c9266bSMilo Kim 	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
15428c9266bSMilo Kim 
15528c9266bSMilo Kim 	lp5521_wait_opmode_done();
15628c9266bSMilo Kim }
15728c9266bSMilo Kim 
lp5521_run_engine(struct lp55xx_chip * chip,bool start)1589ce7cb17SMilo(Woogyom) Kim static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
1599ce7cb17SMilo(Woogyom) Kim {
160500fe141SSamu Onkalo 	int ret;
161500fe141SSamu Onkalo 	u8 mode;
1629ce7cb17SMilo(Woogyom) Kim 	u8 exec;
163500fe141SSamu Onkalo 
1649ce7cb17SMilo(Woogyom) Kim 	/* stop engine */
1659ce7cb17SMilo(Woogyom) Kim 	if (!start) {
1669ce7cb17SMilo(Woogyom) Kim 		lp5521_stop_engine(chip);
1679ce7cb17SMilo(Woogyom) Kim 		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
1689ce7cb17SMilo(Woogyom) Kim 		lp5521_wait_opmode_done();
1699ce7cb17SMilo(Woogyom) Kim 		return;
1709ce7cb17SMilo(Woogyom) Kim 	}
1719ce7cb17SMilo(Woogyom) Kim 
1729ce7cb17SMilo(Woogyom) Kim 	/*
1739ce7cb17SMilo(Woogyom) Kim 	 * To run the engine,
1749ce7cb17SMilo(Woogyom) Kim 	 * operation mode and enable register should updated at the same time
1759ce7cb17SMilo(Woogyom) Kim 	 */
1769ce7cb17SMilo(Woogyom) Kim 
1779ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
1785bc9ad77SDan Carpenter 	if (ret)
1799ce7cb17SMilo(Woogyom) Kim 		return;
1805bc9ad77SDan Carpenter 
1819ce7cb17SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
1825bc9ad77SDan Carpenter 	if (ret)
1839ce7cb17SMilo(Woogyom) Kim 		return;
184500fe141SSamu Onkalo 
1859ce7cb17SMilo(Woogyom) Kim 	/* change operation mode to RUN only when each engine is loading */
1869ce7cb17SMilo(Woogyom) Kim 	if (LP5521_R_IS_LOADING(mode)) {
1879ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
1889ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
1899ce7cb17SMilo(Woogyom) Kim 	}
190500fe141SSamu Onkalo 
1919ce7cb17SMilo(Woogyom) Kim 	if (LP5521_G_IS_LOADING(mode)) {
1929ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
1939ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
1949ce7cb17SMilo(Woogyom) Kim 	}
195500fe141SSamu Onkalo 
1969ce7cb17SMilo(Woogyom) Kim 	if (LP5521_B_IS_LOADING(mode)) {
1979ce7cb17SMilo(Woogyom) Kim 		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
1989ce7cb17SMilo(Woogyom) Kim 		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
1999ce7cb17SMilo(Woogyom) Kim 	}
2009ce7cb17SMilo(Woogyom) Kim 
2019ce7cb17SMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
2029ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_opmode_done();
2039ce7cb17SMilo(Woogyom) Kim 
2049ce7cb17SMilo(Woogyom) Kim 	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
2059ce7cb17SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
2069ce7cb17SMilo(Woogyom) Kim }
2079ce7cb17SMilo(Woogyom) Kim 
lp5521_update_program_memory(struct lp55xx_chip * chip,const u8 * data,size_t size)2089ce7cb17SMilo(Woogyom) Kim static int lp5521_update_program_memory(struct lp55xx_chip *chip,
2099ce7cb17SMilo(Woogyom) Kim 					const u8 *data, size_t size)
2109ce7cb17SMilo(Woogyom) Kim {
2119ce7cb17SMilo(Woogyom) Kim 	enum lp55xx_engine_index idx = chip->engine_idx;
2129ce7cb17SMilo(Woogyom) Kim 	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
213f01a59efSColin Ian King 	static const u8 addr[] = {
2149ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
2159ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
2169ce7cb17SMilo(Woogyom) Kim 		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
2179ce7cb17SMilo(Woogyom) Kim 	};
2189ce7cb17SMilo(Woogyom) Kim 	unsigned cmd;
2199ce7cb17SMilo(Woogyom) Kim 	char c[3];
2209ce7cb17SMilo(Woogyom) Kim 	int nrchars;
2219ce7cb17SMilo(Woogyom) Kim 	int ret;
2221eca0b3aSMilo Kim 	int offset = 0;
2231eca0b3aSMilo Kim 	int i = 0;
2249ce7cb17SMilo(Woogyom) Kim 
2259ce7cb17SMilo(Woogyom) Kim 	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
2269ce7cb17SMilo(Woogyom) Kim 		/* separate sscanfs because length is working only for %s */
2279ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
2289ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2299ce7cb17SMilo(Woogyom) Kim 			goto err;
2309ce7cb17SMilo(Woogyom) Kim 
2319ce7cb17SMilo(Woogyom) Kim 		ret = sscanf(c, "%2x", &cmd);
2329ce7cb17SMilo(Woogyom) Kim 		if (ret != 1)
2339ce7cb17SMilo(Woogyom) Kim 			goto err;
2349ce7cb17SMilo(Woogyom) Kim 
2359ce7cb17SMilo(Woogyom) Kim 		pattern[i] = (u8)cmd;
2369ce7cb17SMilo(Woogyom) Kim 		offset += nrchars;
2379ce7cb17SMilo(Woogyom) Kim 		i++;
2389ce7cb17SMilo(Woogyom) Kim 	}
2399ce7cb17SMilo(Woogyom) Kim 
2409ce7cb17SMilo(Woogyom) Kim 	/* Each instruction is 16bit long. Check that length is even */
2419ce7cb17SMilo(Woogyom) Kim 	if (i % 2)
2429ce7cb17SMilo(Woogyom) Kim 		goto err;
2439ce7cb17SMilo(Woogyom) Kim 
2441eca0b3aSMilo Kim 	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
245c0e5e9b5SMilo Kim 		ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
246e70988d1SMilo Kim 		if (ret)
247c0e5e9b5SMilo Kim 			return -EINVAL;
248c0e5e9b5SMilo Kim 	}
249c0e5e9b5SMilo Kim 
250c0e5e9b5SMilo Kim 	return size;
2519ce7cb17SMilo(Woogyom) Kim 
2529ce7cb17SMilo(Woogyom) Kim err:
2539ce7cb17SMilo(Woogyom) Kim 	dev_err(&chip->cl->dev, "wrong pattern format\n");
2549ce7cb17SMilo(Woogyom) Kim 	return -EINVAL;
2559ce7cb17SMilo(Woogyom) Kim }
2569ce7cb17SMilo(Woogyom) Kim 
lp5521_firmware_loaded(struct lp55xx_chip * chip)2579ce7cb17SMilo(Woogyom) Kim static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
2589ce7cb17SMilo(Woogyom) Kim {
2599ce7cb17SMilo(Woogyom) Kim 	const struct firmware *fw = chip->fw;
2609ce7cb17SMilo(Woogyom) Kim 
2619ce7cb17SMilo(Woogyom) Kim 	if (fw->size > LP5521_PROGRAM_LENGTH) {
2629ce7cb17SMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
2639ce7cb17SMilo(Woogyom) Kim 			fw->size);
2649ce7cb17SMilo(Woogyom) Kim 		return;
2659ce7cb17SMilo(Woogyom) Kim 	}
2669ce7cb17SMilo(Woogyom) Kim 
2679ce7cb17SMilo(Woogyom) Kim 	/*
268d1b7c934SStephen Boyd 	 * Program memory sequence
2699ce7cb17SMilo(Woogyom) Kim 	 *  1) set engine mode to "LOAD"
2709ce7cb17SMilo(Woogyom) Kim 	 *  2) write firmware data into program memory
2719ce7cb17SMilo(Woogyom) Kim 	 */
2729ce7cb17SMilo(Woogyom) Kim 
2739ce7cb17SMilo(Woogyom) Kim 	lp5521_load_engine(chip);
2749ce7cb17SMilo(Woogyom) Kim 	lp5521_update_program_memory(chip, fw->data, fw->size);
275500fe141SSamu Onkalo }
276500fe141SSamu Onkalo 
lp5521_post_init_device(struct lp55xx_chip * chip)277ffbdccdbSMilo(Woogyom) Kim static int lp5521_post_init_device(struct lp55xx_chip *chip)
278500fe141SSamu Onkalo {
279500fe141SSamu Onkalo 	int ret;
28094482174SMilo(Woogyom) Kim 	u8 val;
281500fe141SSamu Onkalo 
28294482174SMilo(Woogyom) Kim 	/*
28394482174SMilo(Woogyom) Kim 	 * Make sure that the chip is reset by reading back the r channel
28494482174SMilo(Woogyom) Kim 	 * current reg. This is dummy read is required on some platforms -
28594482174SMilo(Woogyom) Kim 	 * otherwise further access to the R G B channels in the
28694482174SMilo(Woogyom) Kim 	 * LP5521_REG_ENABLE register will not have any effect - strange!
28794482174SMilo(Woogyom) Kim 	 */
288ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
28994482174SMilo(Woogyom) Kim 	if (ret) {
290ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev, "error in resetting chip\n");
29194482174SMilo(Woogyom) Kim 		return ret;
29294482174SMilo(Woogyom) Kim 	}
29394482174SMilo(Woogyom) Kim 	if (val != LP5521_REG_R_CURR_DEFAULT) {
294ffbdccdbSMilo(Woogyom) Kim 		dev_err(&chip->cl->dev,
29594482174SMilo(Woogyom) Kim 			"unexpected data in register (expected 0x%x got 0x%x)\n",
29694482174SMilo(Woogyom) Kim 			LP5521_REG_R_CURR_DEFAULT, val);
29794482174SMilo(Woogyom) Kim 		ret = -EINVAL;
29894482174SMilo(Woogyom) Kim 		return ret;
29994482174SMilo(Woogyom) Kim 	}
30094482174SMilo(Woogyom) Kim 	usleep_range(10000, 20000);
301500fe141SSamu Onkalo 
302500fe141SSamu Onkalo 	/* Set all PWMs to direct control mode */
303ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
304500fe141SSamu Onkalo 
30581f2a5b4SKim, Milo 	/* Update configuration for the clock setting */
30681f2a5b4SKim, Milo 	val = LP5521_DEFAULT_CFG;
30781f2a5b4SKim, Milo 	if (!lp55xx_is_extclk_used(chip))
30881f2a5b4SKim, Milo 		val |= LP5521_CLK_INT;
30981f2a5b4SKim, Milo 
31054a7bef5SMaarten Zanders 	val |= (chip->pdata->charge_pump_mode << LP5521_CP_MODE_SHIFT) & LP5521_CP_MODE_MASK;
31154a7bef5SMaarten Zanders 
312ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
31394482174SMilo(Woogyom) Kim 	if (ret)
31494482174SMilo(Woogyom) Kim 		return ret;
315500fe141SSamu Onkalo 
316500fe141SSamu Onkalo 	/* Initialize all channels PWM to zero -> leds off */
317ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
318ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
319ffbdccdbSMilo(Woogyom) Kim 	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
320500fe141SSamu Onkalo 
321500fe141SSamu Onkalo 	/* Set engines are set to run state when OP_MODE enables engines */
322ffbdccdbSMilo(Woogyom) Kim 	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
32394482174SMilo(Woogyom) Kim 	if (ret)
324500fe141SSamu Onkalo 		return ret;
32594482174SMilo(Woogyom) Kim 
32694482174SMilo(Woogyom) Kim 	lp5521_wait_enable_done();
32794482174SMilo(Woogyom) Kim 
32894482174SMilo(Woogyom) Kim 	return 0;
329500fe141SSamu Onkalo }
330500fe141SSamu Onkalo 
lp5521_run_selftest(struct lp55xx_chip * chip,char * buf)3319ca3bd80SMilo(Woogyom) Kim static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
332500fe141SSamu Onkalo {
3339ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_platform_data *pdata = chip->pdata;
334500fe141SSamu Onkalo 	int ret;
335500fe141SSamu Onkalo 	u8 status;
336500fe141SSamu Onkalo 
3379ca3bd80SMilo(Woogyom) Kim 	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
338500fe141SSamu Onkalo 	if (ret < 0)
339500fe141SSamu Onkalo 		return ret;
340500fe141SSamu Onkalo 
3419ca3bd80SMilo(Woogyom) Kim 	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
3429ca3bd80SMilo(Woogyom) Kim 		return 0;
3439ca3bd80SMilo(Woogyom) Kim 
344500fe141SSamu Onkalo 	/* Check that ext clock is really in use if requested */
345500fe141SSamu Onkalo 	if  ((status & LP5521_EXT_CLK_USED) == 0)
346500fe141SSamu Onkalo 		return -EIO;
3479ca3bd80SMilo(Woogyom) Kim 
348500fe141SSamu Onkalo 	return 0;
349500fe141SSamu Onkalo }
350500fe141SSamu Onkalo 
lp5521_multicolor_brightness(struct lp55xx_led * led)35100253ec2SDan Murphy static int lp5521_multicolor_brightness(struct lp55xx_led *led)
35200253ec2SDan Murphy {
35300253ec2SDan Murphy 	struct lp55xx_chip *chip = led->chip;
35400253ec2SDan Murphy 	int ret;
35500253ec2SDan Murphy 	int i;
35600253ec2SDan Murphy 
35700253ec2SDan Murphy 	mutex_lock(&chip->lock);
35800253ec2SDan Murphy 	for (i = 0; i < led->mc_cdev.num_colors; i++) {
35900253ec2SDan Murphy 		ret = lp55xx_write(chip,
36000253ec2SDan Murphy 				   LP5521_REG_LED_PWM_BASE +
36100253ec2SDan Murphy 				   led->mc_cdev.subled_info[i].channel,
36200253ec2SDan Murphy 				   led->mc_cdev.subled_info[i].brightness);
36300253ec2SDan Murphy 		if (ret)
36400253ec2SDan Murphy 			break;
36500253ec2SDan Murphy 	}
36600253ec2SDan Murphy 	mutex_unlock(&chip->lock);
36700253ec2SDan Murphy 	return ret;
36800253ec2SDan Murphy }
36900253ec2SDan Murphy 
lp5521_led_brightness(struct lp55xx_led * led)37095b2af63SAndrew Lunn static int lp5521_led_brightness(struct lp55xx_led *led)
371500fe141SSamu Onkalo {
372a6e4679aSMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
37395b2af63SAndrew Lunn 	int ret;
374500fe141SSamu Onkalo 
375500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
37695b2af63SAndrew Lunn 	ret = lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
377500fe141SSamu Onkalo 		led->brightness);
378500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
37995b2af63SAndrew Lunn 
38095b2af63SAndrew Lunn 	return ret;
381500fe141SSamu Onkalo }
382500fe141SSamu Onkalo 
show_engine_mode(struct device * dev,struct device_attribute * attr,char * buf,int nr)383c0e5e9b5SMilo Kim static ssize_t show_engine_mode(struct device *dev,
384c0e5e9b5SMilo Kim 				struct device_attribute *attr,
385c0e5e9b5SMilo Kim 				char *buf, int nr)
386c0e5e9b5SMilo Kim {
387c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
388c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
389c0e5e9b5SMilo Kim 	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
390c0e5e9b5SMilo Kim 
391c0e5e9b5SMilo Kim 	switch (mode) {
392c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_RUN:
393c0e5e9b5SMilo Kim 		return sprintf(buf, "run\n");
394c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_LOAD:
395c0e5e9b5SMilo Kim 		return sprintf(buf, "load\n");
396c0e5e9b5SMilo Kim 	case LP55XX_ENGINE_DISABLED:
397c0e5e9b5SMilo Kim 	default:
398c0e5e9b5SMilo Kim 		return sprintf(buf, "disabled\n");
399c0e5e9b5SMilo Kim 	}
400c0e5e9b5SMilo Kim }
401c0e5e9b5SMilo Kim show_mode(1)
402c0e5e9b5SMilo Kim show_mode(2)
403c0e5e9b5SMilo Kim show_mode(3)
404c0e5e9b5SMilo Kim 
store_engine_mode(struct device * dev,struct device_attribute * attr,const char * buf,size_t len,int nr)405c0e5e9b5SMilo Kim static ssize_t store_engine_mode(struct device *dev,
406c0e5e9b5SMilo Kim 				 struct device_attribute *attr,
407c0e5e9b5SMilo Kim 				 const char *buf, size_t len, int nr)
408c0e5e9b5SMilo Kim {
409c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
410c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
411c0e5e9b5SMilo Kim 	struct lp55xx_engine *engine = &chip->engines[nr - 1];
412c0e5e9b5SMilo Kim 
413c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
414c0e5e9b5SMilo Kim 
415c0e5e9b5SMilo Kim 	chip->engine_idx = nr;
416c0e5e9b5SMilo Kim 
417c0e5e9b5SMilo Kim 	if (!strncmp(buf, "run", 3)) {
418c0e5e9b5SMilo Kim 		lp5521_run_engine(chip, true);
419c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_RUN;
420c0e5e9b5SMilo Kim 	} else if (!strncmp(buf, "load", 4)) {
421c0e5e9b5SMilo Kim 		lp5521_stop_engine(chip);
422c0e5e9b5SMilo Kim 		lp5521_load_engine(chip);
423c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_LOAD;
424c0e5e9b5SMilo Kim 	} else if (!strncmp(buf, "disabled", 8)) {
425c0e5e9b5SMilo Kim 		lp5521_stop_engine(chip);
426c0e5e9b5SMilo Kim 		engine->mode = LP55XX_ENGINE_DISABLED;
427c0e5e9b5SMilo Kim 	}
428c0e5e9b5SMilo Kim 
429c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
430c0e5e9b5SMilo Kim 
431c0e5e9b5SMilo Kim 	return len;
432c0e5e9b5SMilo Kim }
433c0e5e9b5SMilo Kim store_mode(1)
434c0e5e9b5SMilo Kim store_mode(2)
435c0e5e9b5SMilo Kim store_mode(3)
436c0e5e9b5SMilo Kim 
store_engine_load(struct device * dev,struct device_attribute * attr,const char * buf,size_t len,int nr)437c0e5e9b5SMilo Kim static ssize_t store_engine_load(struct device *dev,
438c0e5e9b5SMilo Kim 			     struct device_attribute *attr,
439c0e5e9b5SMilo Kim 			     const char *buf, size_t len, int nr)
440c0e5e9b5SMilo Kim {
441c0e5e9b5SMilo Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
442c0e5e9b5SMilo Kim 	struct lp55xx_chip *chip = led->chip;
443e70988d1SMilo Kim 	int ret;
444c0e5e9b5SMilo Kim 
445c0e5e9b5SMilo Kim 	mutex_lock(&chip->lock);
446c0e5e9b5SMilo Kim 
447c0e5e9b5SMilo Kim 	chip->engine_idx = nr;
448c0e5e9b5SMilo Kim 	lp5521_load_engine(chip);
449e70988d1SMilo Kim 	ret = lp5521_update_program_memory(chip, buf, len);
450c0e5e9b5SMilo Kim 
451c0e5e9b5SMilo Kim 	mutex_unlock(&chip->lock);
452c0e5e9b5SMilo Kim 
453e70988d1SMilo Kim 	return ret;
454c0e5e9b5SMilo Kim }
455c0e5e9b5SMilo Kim store_load(1)
456c0e5e9b5SMilo Kim store_load(2)
457c0e5e9b5SMilo Kim store_load(3)
458c0e5e9b5SMilo Kim 
lp5521_selftest(struct device * dev,struct device_attribute * attr,char * buf)459500fe141SSamu Onkalo static ssize_t lp5521_selftest(struct device *dev,
460500fe141SSamu Onkalo 			       struct device_attribute *attr,
461500fe141SSamu Onkalo 			       char *buf)
462500fe141SSamu Onkalo {
4639ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
4649ca3bd80SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
465500fe141SSamu Onkalo 	int ret;
466500fe141SSamu Onkalo 
467500fe141SSamu Onkalo 	mutex_lock(&chip->lock);
468500fe141SSamu Onkalo 	ret = lp5521_run_selftest(chip, buf);
469500fe141SSamu Onkalo 	mutex_unlock(&chip->lock);
47024d32128SKim, Milo 
4713f6fb1cfSye xingchen 	return sysfs_emit(buf, "%s\n", ret ? "FAIL" : "OK");
472500fe141SSamu Onkalo }
473500fe141SSamu Onkalo 
474500fe141SSamu Onkalo /* device attributes */
475c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
476c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
477c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
478c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
479c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
480c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
481c0e5e9b5SMilo Kim static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
482500fe141SSamu Onkalo 
483500fe141SSamu Onkalo static struct attribute *lp5521_attributes[] = {
484c0e5e9b5SMilo Kim 	&dev_attr_engine1_mode.attr,
485c0e5e9b5SMilo Kim 	&dev_attr_engine2_mode.attr,
486c0e5e9b5SMilo Kim 	&dev_attr_engine3_mode.attr,
487c0e5e9b5SMilo Kim 	&dev_attr_engine1_load.attr,
488c0e5e9b5SMilo Kim 	&dev_attr_engine2_load.attr,
489c0e5e9b5SMilo Kim 	&dev_attr_engine3_load.attr,
490500fe141SSamu Onkalo 	&dev_attr_selftest.attr,
491500fe141SSamu Onkalo 	NULL
492500fe141SSamu Onkalo };
493500fe141SSamu Onkalo 
494500fe141SSamu Onkalo static const struct attribute_group lp5521_group = {
495500fe141SSamu Onkalo 	.attrs = lp5521_attributes,
496500fe141SSamu Onkalo };
497500fe141SSamu Onkalo 
49848068d5dSMilo(Woogyom) Kim /* Chip specific configurations */
49948068d5dSMilo(Woogyom) Kim static struct lp55xx_device_config lp5521_cfg = {
50048068d5dSMilo(Woogyom) Kim 	.reset = {
50148068d5dSMilo(Woogyom) Kim 		.addr = LP5521_REG_RESET,
50248068d5dSMilo(Woogyom) Kim 		.val  = LP5521_RESET,
50348068d5dSMilo(Woogyom) Kim 	},
504e3a700d8SMilo(Woogyom) Kim 	.enable = {
505e3a700d8SMilo(Woogyom) Kim 		.addr = LP5521_REG_ENABLE,
506e3a700d8SMilo(Woogyom) Kim 		.val  = LP5521_ENABLE_DEFAULT,
507e3a700d8SMilo(Woogyom) Kim 	},
5080e202346SMilo(Woogyom) Kim 	.max_channel  = LP5521_MAX_LEDS,
509ffbdccdbSMilo(Woogyom) Kim 	.post_init_device   = lp5521_post_init_device,
51095b2af63SAndrew Lunn 	.brightness_fn      = lp5521_led_brightness,
51100253ec2SDan Murphy 	.multicolor_brightness_fn = lp5521_multicolor_brightness,
512a96bfa13SMilo(Woogyom) Kim 	.set_led_current    = lp5521_set_led_current,
5139ce7cb17SMilo(Woogyom) Kim 	.firmware_cb        = lp5521_firmware_loaded,
5149ce7cb17SMilo(Woogyom) Kim 	.run_engine         = lp5521_run_engine,
515e73c0ce6SMilo(Woogyom) Kim 	.dev_attr_group     = &lp5521_group,
51648068d5dSMilo(Woogyom) Kim };
51748068d5dSMilo(Woogyom) Kim 
lp5521_probe(struct i2c_client * client)5184a37cff2SUwe Kleine-König static int lp5521_probe(struct i2c_client *client)
519500fe141SSamu Onkalo {
5204a37cff2SUwe Kleine-König 	const struct i2c_device_id *id = i2c_client_get_device_id(client);
5211904f83dSMilo(Woogyom) Kim 	int ret;
5226a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_chip *chip;
5236a0c9a47SMilo(Woogyom) Kim 	struct lp55xx_led *led;
524ed133352SMilo Kim 	struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev);
5258853c95eSMarek Behún 	struct device_node *np = dev_of_node(&client->dev);
526500fe141SSamu Onkalo 
52792a81562SDan Murphy 	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
52892a81562SDan Murphy 	if (!chip)
52992a81562SDan Murphy 		return -ENOMEM;
53092a81562SDan Murphy 
53192a81562SDan Murphy 	chip->cfg = &lp5521_cfg;
53292a81562SDan Murphy 
533ed133352SMilo Kim 	if (!pdata) {
5347542a04bSLinus Walleij 		if (np) {
53592a81562SDan Murphy 			pdata = lp55xx_of_populate_pdata(&client->dev, np,
53692a81562SDan Murphy 							 chip);
537ed133352SMilo Kim 			if (IS_ERR(pdata))
538ed133352SMilo Kim 				return PTR_ERR(pdata);
5397542a04bSLinus Walleij 		} else {
540500fe141SSamu Onkalo 			dev_err(&client->dev, "no platform data\n");
541e430dc00SBryan Wu 			return -EINVAL;
542500fe141SSamu Onkalo 		}
5437542a04bSLinus Walleij 	}
544500fe141SSamu Onkalo 
545a86854d0SKees Cook 	led = devm_kcalloc(&client->dev,
546a86854d0SKees Cook 			pdata->num_channels, sizeof(*led), GFP_KERNEL);
5476a0c9a47SMilo(Woogyom) Kim 	if (!led)
5486a0c9a47SMilo(Woogyom) Kim 		return -ENOMEM;
5496a0c9a47SMilo(Woogyom) Kim 
5506a0c9a47SMilo(Woogyom) Kim 	chip->cl = client;
5516a0c9a47SMilo(Woogyom) Kim 	chip->pdata = pdata;
5526a0c9a47SMilo(Woogyom) Kim 
5536a0c9a47SMilo(Woogyom) Kim 	mutex_init(&chip->lock);
5546a0c9a47SMilo(Woogyom) Kim 
5556a0c9a47SMilo(Woogyom) Kim 	i2c_set_clientdata(client, led);
556500fe141SSamu Onkalo 
55722ebeb48SMilo(Woogyom) Kim 	ret = lp55xx_init_device(chip);
558944f7b1dSMilo(Woogyom) Kim 	if (ret)
559f6c64c6fSMilo(Woogyom) Kim 		goto err_init;
560500fe141SSamu Onkalo 
561500fe141SSamu Onkalo 	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
562500fe141SSamu Onkalo 
5639e9b3db1SMilo(Woogyom) Kim 	ret = lp55xx_register_leds(led, chip);
564f6524808SMilo(Woogyom) Kim 	if (ret)
565c732eaf0SDan Murphy 		goto err_out;
566500fe141SSamu Onkalo 
567e73c0ce6SMilo(Woogyom) Kim 	ret = lp55xx_register_sysfs(chip);
568500fe141SSamu Onkalo 	if (ret) {
569500fe141SSamu Onkalo 		dev_err(&client->dev, "registering sysfs failed\n");
570c732eaf0SDan Murphy 		goto err_out;
571500fe141SSamu Onkalo 	}
572e73c0ce6SMilo(Woogyom) Kim 
573e73c0ce6SMilo(Woogyom) Kim 	return 0;
574e73c0ce6SMilo(Woogyom) Kim 
575c732eaf0SDan Murphy err_out:
5766ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
577f6c64c6fSMilo(Woogyom) Kim err_init:
578500fe141SSamu Onkalo 	return ret;
579500fe141SSamu Onkalo }
580500fe141SSamu Onkalo 
lp5521_remove(struct i2c_client * client)581ed5c2f5fSUwe Kleine-König static void lp5521_remove(struct i2c_client *client)
582500fe141SSamu Onkalo {
5836ce61762SMilo(Woogyom) Kim 	struct lp55xx_led *led = i2c_get_clientdata(client);
5846ce61762SMilo(Woogyom) Kim 	struct lp55xx_chip *chip = led->chip;
585500fe141SSamu Onkalo 
58628c9266bSMilo Kim 	lp5521_stop_all_engines(chip);
58787cc4bdeSMilo(Woogyom) Kim 	lp55xx_unregister_sysfs(chip);
5886ce61762SMilo(Woogyom) Kim 	lp55xx_deinit_device(chip);
589500fe141SSamu Onkalo }
590500fe141SSamu Onkalo 
591500fe141SSamu Onkalo static const struct i2c_device_id lp5521_id[] = {
592500fe141SSamu Onkalo 	{ "lp5521", 0 }, /* Three channel chip */
593500fe141SSamu Onkalo 	{ }
594500fe141SSamu Onkalo };
595500fe141SSamu Onkalo MODULE_DEVICE_TABLE(i2c, lp5521_id);
596500fe141SSamu Onkalo 
597b548a34bSAxel Lin static const struct of_device_id of_lp5521_leds_match[] = {
598b548a34bSAxel Lin 	{ .compatible = "national,lp5521", },
599b548a34bSAxel Lin 	{},
600b548a34bSAxel Lin };
601b548a34bSAxel Lin 
602b548a34bSAxel Lin MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
603*3d590af8SZhu Wang 
604500fe141SSamu Onkalo static struct i2c_driver lp5521_driver = {
605500fe141SSamu Onkalo 	.driver = {
606500fe141SSamu Onkalo 		.name	= "lp5521",
607*3d590af8SZhu Wang 		.of_match_table = of_lp5521_leds_match,
608500fe141SSamu Onkalo 	},
609d9ff8a8eSUwe Kleine-König 	.probe		= lp5521_probe,
610df07cf81SBill Pemberton 	.remove		= lp5521_remove,
611500fe141SSamu Onkalo 	.id_table	= lp5521_id,
612500fe141SSamu Onkalo };
613500fe141SSamu Onkalo 
61409a0d183SAxel Lin module_i2c_driver(lp5521_driver);
615500fe141SSamu Onkalo 
616500fe141SSamu Onkalo MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
617a2387cb9SMilo(Woogyom) Kim MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
618500fe141SSamu Onkalo MODULE_DESCRIPTION("LP5521 LED engine");
619500fe141SSamu Onkalo MODULE_LICENSE("GPL v2");
620