1 /* 2 * w6692.c mISDN driver for Winbond w6692 based cards 3 * 4 * Author Karsten Keil <kkeil@suse.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/delay.h> 28 #include <linux/mISDNhw.h> 29 #include <linux/slab.h> 30 #include "w6692.h" 31 32 #define W6692_REV "2.0" 33 34 #define DBUSY_TIMER_VALUE 80 35 36 enum { 37 W6692_ASUS, 38 W6692_WINBOND, 39 W6692_USR 40 }; 41 42 /* private data in the PCI devices list */ 43 struct w6692map { 44 u_int subtype; 45 char *name; 46 }; 47 48 static const struct w6692map w6692_map[] = 49 { 50 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 51 {W6692_WINBOND, "Winbond W6692"}, 52 {W6692_USR, "USR W6692"} 53 }; 54 55 #ifndef PCI_VENDOR_ID_USR 56 #define PCI_VENDOR_ID_USR 0x16ec 57 #define PCI_DEVICE_ID_USR_6692 0x3409 58 #endif 59 60 struct w6692_ch { 61 struct bchannel bch; 62 u32 addr; 63 struct timer_list timer; 64 u8 b_mode; 65 }; 66 67 struct w6692_hw { 68 struct list_head list; 69 struct pci_dev *pdev; 70 char name[MISDN_MAX_IDLEN]; 71 u32 irq; 72 u32 irqcnt; 73 u32 addr; 74 u32 fmask; /* feature mask - bit set per card nr */ 75 int subtype; 76 spinlock_t lock; /* hw lock */ 77 u8 imask; 78 u8 pctl; 79 u8 xaddr; 80 u8 xdata; 81 u8 state; 82 struct w6692_ch bc[2]; 83 struct dchannel dch; 84 char log[64]; 85 }; 86 87 static LIST_HEAD(Cards); 88 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 89 90 static int w6692_cnt; 91 static int debug; 92 static u32 led; 93 static u32 pots; 94 95 static void 96 _set_debug(struct w6692_hw *card) 97 { 98 card->dch.debug = debug; 99 card->bc[0].bch.debug = debug; 100 card->bc[1].bch.debug = debug; 101 } 102 103 static int 104 set_debug(const char *val, struct kernel_param *kp) 105 { 106 int ret; 107 struct w6692_hw *card; 108 109 ret = param_set_uint(val, kp); 110 if (!ret) { 111 read_lock(&card_lock); 112 list_for_each_entry(card, &Cards, list) 113 _set_debug(card); 114 read_unlock(&card_lock); 115 } 116 return ret; 117 } 118 119 MODULE_AUTHOR("Karsten Keil"); 120 MODULE_LICENSE("GPL v2"); 121 MODULE_VERSION(W6692_REV); 122 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 123 MODULE_PARM_DESC(debug, "W6692 debug mask"); 124 module_param(led, uint, S_IRUGO | S_IWUSR); 125 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 126 module_param(pots, uint, S_IRUGO | S_IWUSR); 127 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 128 129 static inline u8 130 ReadW6692(struct w6692_hw *card, u8 offset) 131 { 132 return inb(card->addr + offset); 133 } 134 135 static inline void 136 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 137 { 138 outb(value, card->addr + offset); 139 } 140 141 static inline u8 142 ReadW6692B(struct w6692_ch *bc, u8 offset) 143 { 144 return inb(bc->addr + offset); 145 } 146 147 static inline void 148 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 149 { 150 outb(value, bc->addr + offset); 151 } 152 153 static void 154 enable_hwirq(struct w6692_hw *card) 155 { 156 WriteW6692(card, W_IMASK, card->imask); 157 } 158 159 static void 160 disable_hwirq(struct w6692_hw *card) 161 { 162 WriteW6692(card, W_IMASK, 0xff); 163 } 164 165 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 166 167 static void 168 W6692Version(struct w6692_hw *card) 169 { 170 int val; 171 172 val = ReadW6692(card, W_D_RBCH); 173 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 174 W6692Ver[(val >> 6) & 3]); 175 } 176 177 static void 178 w6692_led_handler(struct w6692_hw *card, int on) 179 { 180 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 181 return; 182 if (on) { 183 card->xdata &= 0xfb; /* LED ON */ 184 WriteW6692(card, W_XDATA, card->xdata); 185 } else { 186 card->xdata |= 0x04; /* LED OFF */ 187 WriteW6692(card, W_XDATA, card->xdata); 188 } 189 } 190 191 static void 192 ph_command(struct w6692_hw *card, u8 cmd) 193 { 194 pr_debug("%s: ph_command %x\n", card->name, cmd); 195 WriteW6692(card, W_CIX, cmd); 196 } 197 198 static void 199 W6692_new_ph(struct w6692_hw *card) 200 { 201 if (card->state == W_L1CMD_RST) 202 ph_command(card, W_L1CMD_DRC); 203 schedule_event(&card->dch, FLG_PHCHANGE); 204 } 205 206 static void 207 W6692_ph_bh(struct dchannel *dch) 208 { 209 struct w6692_hw *card = dch->hw; 210 211 switch (card->state) { 212 case W_L1CMD_RST: 213 dch->state = 0; 214 l1_event(dch->l1, HW_RESET_IND); 215 break; 216 case W_L1IND_CD: 217 dch->state = 3; 218 l1_event(dch->l1, HW_DEACT_CNF); 219 break; 220 case W_L1IND_DRD: 221 dch->state = 3; 222 l1_event(dch->l1, HW_DEACT_IND); 223 break; 224 case W_L1IND_CE: 225 dch->state = 4; 226 l1_event(dch->l1, HW_POWERUP_IND); 227 break; 228 case W_L1IND_LD: 229 if (dch->state <= 5) { 230 dch->state = 5; 231 l1_event(dch->l1, ANYSIGNAL); 232 } else { 233 dch->state = 8; 234 l1_event(dch->l1, LOSTFRAMING); 235 } 236 break; 237 case W_L1IND_ARD: 238 dch->state = 6; 239 l1_event(dch->l1, INFO2); 240 break; 241 case W_L1IND_AI8: 242 dch->state = 7; 243 l1_event(dch->l1, INFO4_P8); 244 break; 245 case W_L1IND_AI10: 246 dch->state = 7; 247 l1_event(dch->l1, INFO4_P10); 248 break; 249 default: 250 pr_debug("%s: TE unknown state %02x dch state %02x\n", 251 card->name, card->state, dch->state); 252 break; 253 } 254 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 255 } 256 257 static void 258 W6692_empty_Dfifo(struct w6692_hw *card, int count) 259 { 260 struct dchannel *dch = &card->dch; 261 u8 *ptr; 262 263 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 264 if (!dch->rx_skb) { 265 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 266 if (!dch->rx_skb) { 267 pr_info("%s: D receive out of memory\n", card->name); 268 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 269 return; 270 } 271 } 272 if ((dch->rx_skb->len + count) >= dch->maxlen) { 273 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 274 dch->rx_skb->len + count); 275 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 276 return; 277 } 278 ptr = skb_put(dch->rx_skb, count); 279 insb(card->addr + W_D_RFIFO, ptr, count); 280 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 281 if (debug & DEBUG_HW_DFIFO) { 282 snprintf(card->log, 63, "D-recv %s %d ", 283 card->name, count); 284 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 285 } 286 } 287 288 static void 289 W6692_fill_Dfifo(struct w6692_hw *card) 290 { 291 struct dchannel *dch = &card->dch; 292 int count; 293 u8 *ptr; 294 u8 cmd = W_D_CMDR_XMS; 295 296 pr_debug("%s: fill_Dfifo\n", card->name); 297 if (!dch->tx_skb) 298 return; 299 count = dch->tx_skb->len - dch->tx_idx; 300 if (count <= 0) 301 return; 302 if (count > W_D_FIFO_THRESH) 303 count = W_D_FIFO_THRESH; 304 else 305 cmd |= W_D_CMDR_XME; 306 ptr = dch->tx_skb->data + dch->tx_idx; 307 dch->tx_idx += count; 308 outsb(card->addr + W_D_XFIFO, ptr, count); 309 WriteW6692(card, W_D_CMDR, cmd); 310 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 311 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 312 del_timer(&dch->timer); 313 } 314 init_timer(&dch->timer); 315 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000); 316 add_timer(&dch->timer); 317 if (debug & DEBUG_HW_DFIFO) { 318 snprintf(card->log, 63, "D-send %s %d ", 319 card->name, count); 320 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 321 } 322 } 323 324 static void 325 d_retransmit(struct w6692_hw *card) 326 { 327 struct dchannel *dch = &card->dch; 328 329 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 330 del_timer(&dch->timer); 331 #ifdef FIXME 332 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 333 dchannel_sched_event(dch, D_CLEARBUSY); 334 #endif 335 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 336 /* Restart frame */ 337 dch->tx_idx = 0; 338 W6692_fill_Dfifo(card); 339 } else if (dch->tx_skb) { /* should not happen */ 340 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 341 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 342 dch->tx_idx = 0; 343 W6692_fill_Dfifo(card); 344 } else { 345 pr_info("%s: XDU no TX_BUSY\n", card->name); 346 if (get_next_dframe(dch)) 347 W6692_fill_Dfifo(card); 348 } 349 } 350 351 static void 352 handle_rxD(struct w6692_hw *card) { 353 u8 stat; 354 int count; 355 356 stat = ReadW6692(card, W_D_RSTA); 357 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 358 if (stat & W_D_RSTA_RDOV) { 359 pr_debug("%s: D-channel RDOV\n", card->name); 360 #ifdef ERROR_STATISTIC 361 card->dch.err_rx++; 362 #endif 363 } 364 if (stat & W_D_RSTA_CRCE) { 365 pr_debug("%s: D-channel CRC error\n", card->name); 366 #ifdef ERROR_STATISTIC 367 card->dch.err_crc++; 368 #endif 369 } 370 if (stat & W_D_RSTA_RMB) { 371 pr_debug("%s: D-channel ABORT\n", card->name); 372 #ifdef ERROR_STATISTIC 373 card->dch.err_rx++; 374 #endif 375 } 376 if (card->dch.rx_skb) 377 dev_kfree_skb(card->dch.rx_skb); 378 card->dch.rx_skb = NULL; 379 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 380 } else { 381 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 382 if (count == 0) 383 count = W_D_FIFO_THRESH; 384 W6692_empty_Dfifo(card, count); 385 recv_Dchannel(&card->dch); 386 } 387 } 388 389 static void 390 handle_txD(struct w6692_hw *card) { 391 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 392 del_timer(&card->dch.timer); 393 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 394 W6692_fill_Dfifo(card); 395 } else { 396 if (card->dch.tx_skb) 397 dev_kfree_skb(card->dch.tx_skb); 398 if (get_next_dframe(&card->dch)) 399 W6692_fill_Dfifo(card); 400 } 401 } 402 403 static void 404 handle_statusD(struct w6692_hw *card) 405 { 406 struct dchannel *dch = &card->dch; 407 u8 exval, v1, cir; 408 409 exval = ReadW6692(card, W_D_EXIR); 410 411 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 412 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 413 /* Transmit underrun/collision */ 414 pr_debug("%s: D-channel underrun/collision\n", card->name); 415 #ifdef ERROR_STATISTIC 416 dch->err_tx++; 417 #endif 418 d_retransmit(card); 419 } 420 if (exval & W_D_EXI_RDOV) { /* RDOV */ 421 pr_debug("%s: D-channel RDOV\n", card->name); 422 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 423 } 424 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 425 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 426 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 427 v1 = ReadW6692(card, W_MOSR); 428 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 429 card->name, v1); 430 } 431 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 432 cir = ReadW6692(card, W_CIR); 433 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 434 if (cir & W_CIR_ICC) { 435 v1 = cir & W_CIR_COD_MASK; 436 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 437 dch->state, v1); 438 card->state = v1; 439 if (card->fmask & led) { 440 switch (v1) { 441 case W_L1IND_AI8: 442 case W_L1IND_AI10: 443 w6692_led_handler(card, 1); 444 break; 445 default: 446 w6692_led_handler(card, 0); 447 break; 448 } 449 } 450 W6692_new_ph(card); 451 } 452 if (cir & W_CIR_SCC) { 453 v1 = ReadW6692(card, W_SQR); 454 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 455 } 456 } 457 if (exval & W_D_EXI_WEXP) 458 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 459 if (exval & W_D_EXI_TEXP) 460 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 461 } 462 463 static void 464 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 465 { 466 struct w6692_hw *card = wch->bch.hw; 467 u8 *ptr; 468 469 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 470 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 471 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 472 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 473 if (wch->bch.rx_skb) 474 skb_trim(wch->bch.rx_skb, 0); 475 return; 476 } 477 if (!wch->bch.rx_skb) { 478 wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC); 479 if (unlikely(!wch->bch.rx_skb)) { 480 pr_info("%s: B receive out of memory\n", card->name); 481 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 482 W_B_CMDR_RACT); 483 return; 484 } 485 } 486 if (wch->bch.rx_skb->len + count > wch->bch.maxlen) { 487 pr_debug("%s: empty_Bfifo incoming packet too large\n", 488 card->name); 489 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 490 skb_trim(wch->bch.rx_skb, 0); 491 return; 492 } 493 ptr = skb_put(wch->bch.rx_skb, count); 494 insb(wch->addr + W_B_RFIFO, ptr, count); 495 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 496 if (debug & DEBUG_HW_DFIFO) { 497 snprintf(card->log, 63, "B%1d-recv %s %d ", 498 wch->bch.nr, card->name, count); 499 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 500 } 501 } 502 503 static void 504 W6692_fill_Bfifo(struct w6692_ch *wch) 505 { 506 struct w6692_hw *card = wch->bch.hw; 507 int count; 508 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 509 510 pr_debug("%s: fill Bfifo\n", card->name); 511 if (!wch->bch.tx_skb) 512 return; 513 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 514 if (count <= 0) 515 return; 516 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 517 if (count > W_B_FIFO_THRESH) 518 count = W_B_FIFO_THRESH; 519 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 520 cmd |= W_B_CMDR_XME; 521 522 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 523 count, wch->bch.tx_idx); 524 wch->bch.tx_idx += count; 525 outsb(wch->addr + W_B_XFIFO, ptr, count); 526 WriteW6692B(wch, W_B_CMDR, cmd); 527 if (debug & DEBUG_HW_DFIFO) { 528 snprintf(card->log, 63, "B%1d-send %s %d ", 529 wch->bch.nr, card->name, count); 530 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 531 } 532 } 533 534 #if 0 535 static int 536 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 537 { 538 struct w6692_hw *card = wch->bch.hw; 539 u16 *vol = (u16 *)skb->data; 540 u8 val; 541 542 if ((!(card->fmask & pots)) || 543 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 544 return -ENODEV; 545 if (skb->len < 2) 546 return -EINVAL; 547 if (*vol > 7) 548 return -EINVAL; 549 val = *vol & 7; 550 val = 7 - val; 551 if (mic) { 552 val <<= 3; 553 card->xaddr &= 0xc7; 554 } else { 555 card->xaddr &= 0xf8; 556 } 557 card->xaddr |= val; 558 WriteW6692(card, W_XADDR, card->xaddr); 559 return 0; 560 } 561 562 static int 563 enable_pots(struct w6692_ch *wch) 564 { 565 struct w6692_hw *card = wch->bch.hw; 566 567 if ((!(card->fmask & pots)) || 568 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 569 return -ENODEV; 570 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 571 WriteW6692B(wch, W_B_MODE, wch->b_mode); 572 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 573 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 574 WriteW6692(card, W_PCTL, card->pctl); 575 return 0; 576 } 577 #endif 578 579 static int 580 disable_pots(struct w6692_ch *wch) 581 { 582 struct w6692_hw *card = wch->bch.hw; 583 584 if (!(card->fmask & pots)) 585 return -ENODEV; 586 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 587 WriteW6692B(wch, W_B_MODE, wch->b_mode); 588 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 589 W_B_CMDR_XRST); 590 return 0; 591 } 592 593 static int 594 w6692_mode(struct w6692_ch *wch, u32 pr) 595 { 596 struct w6692_hw *card; 597 598 card = wch->bch.hw; 599 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 600 wch->bch.nr, wch->bch.state, pr); 601 switch (pr) { 602 case ISDN_P_NONE: 603 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 604 disable_pots(wch); 605 wch->b_mode = 0; 606 mISDN_clear_bchannel(&wch->bch); 607 WriteW6692B(wch, W_B_MODE, wch->b_mode); 608 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 609 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 610 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 611 break; 612 case ISDN_P_B_RAW: 613 wch->b_mode = W_B_MODE_MMS; 614 WriteW6692B(wch, W_B_MODE, wch->b_mode); 615 WriteW6692B(wch, W_B_EXIM, 0); 616 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 617 W_B_CMDR_XRST); 618 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 619 break; 620 case ISDN_P_B_HDLC: 621 wch->b_mode = W_B_MODE_ITF; 622 WriteW6692B(wch, W_B_MODE, wch->b_mode); 623 WriteW6692B(wch, W_B_ADM1, 0xff); 624 WriteW6692B(wch, W_B_ADM2, 0xff); 625 WriteW6692B(wch, W_B_EXIM, 0); 626 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 627 W_B_CMDR_XRST); 628 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 629 break; 630 default: 631 pr_info("%s: protocol %x not known\n", card->name, pr); 632 return -ENOPROTOOPT; 633 } 634 wch->bch.state = pr; 635 return 0; 636 } 637 638 static void 639 send_next(struct w6692_ch *wch) 640 { 641 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) { 642 W6692_fill_Bfifo(wch); 643 } else { 644 if (wch->bch.tx_skb) 645 dev_kfree_skb(wch->bch.tx_skb); 646 if (get_next_bframe(&wch->bch)) 647 W6692_fill_Bfifo(wch); 648 } 649 } 650 651 static void 652 W6692B_interrupt(struct w6692_hw *card, int ch) 653 { 654 struct w6692_ch *wch = &card->bc[ch]; 655 int count; 656 u8 stat, star = 0; 657 658 stat = ReadW6692B(wch, W_B_EXIR); 659 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 660 if (stat & W_B_EXI_RME) { 661 star = ReadW6692B(wch, W_B_STAR); 662 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 663 if ((star & W_B_STAR_RDOV) && 664 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 665 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 666 wch->bch.nr, wch->bch.state); 667 #ifdef ERROR_STATISTIC 668 wch->bch.err_rdo++; 669 #endif 670 } 671 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 672 if (star & W_B_STAR_CRCE) { 673 pr_debug("%s: B%d CRC error\n", 674 card->name, wch->bch.nr); 675 #ifdef ERROR_STATISTIC 676 wch->bch.err_crc++; 677 #endif 678 } 679 if (star & W_B_STAR_RMB) { 680 pr_debug("%s: B%d message abort\n", 681 card->name, wch->bch.nr); 682 #ifdef ERROR_STATISTIC 683 wch->bch.err_inv++; 684 #endif 685 } 686 } 687 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 688 W_B_CMDR_RRST | W_B_CMDR_RACT); 689 if (wch->bch.rx_skb) 690 skb_trim(wch->bch.rx_skb, 0); 691 } else { 692 count = ReadW6692B(wch, W_B_RBCL) & 693 (W_B_FIFO_THRESH - 1); 694 if (count == 0) 695 count = W_B_FIFO_THRESH; 696 W6692_empty_Bfifo(wch, count); 697 recv_Bchannel(&wch->bch, 0); 698 } 699 } 700 if (stat & W_B_EXI_RMR) { 701 if (!(stat & W_B_EXI_RME)) 702 star = ReadW6692B(wch, W_B_STAR); 703 if (star & W_B_STAR_RDOV) { 704 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 705 wch->bch.nr, wch->bch.state); 706 #ifdef ERROR_STATISTIC 707 wch->bch.err_rdo++; 708 #endif 709 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 710 W_B_CMDR_RRST | W_B_CMDR_RACT); 711 } else { 712 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 713 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) && 714 wch->bch.rx_skb && (wch->bch.rx_skb->len > 0)) 715 recv_Bchannel(&wch->bch, 0); 716 } 717 } 718 if (stat & W_B_EXI_RDOV) { 719 /* only if it is not handled yet */ 720 if (!(star & W_B_STAR_RDOV)) { 721 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 722 wch->bch.nr, wch->bch.state); 723 #ifdef ERROR_STATISTIC 724 wch->bch.err_rdo++; 725 #endif 726 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 727 W_B_CMDR_RRST | W_B_CMDR_RACT); 728 } 729 } 730 if (stat & W_B_EXI_XFR) { 731 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 732 star = ReadW6692B(wch, W_B_STAR); 733 pr_debug("%s: B%d star %02x\n", card->name, 734 wch->bch.nr, star); 735 } 736 if (star & W_B_STAR_XDOW) { 737 pr_debug("%s: B%d XDOW proto=%x\n", card->name, 738 wch->bch.nr, wch->bch.state); 739 #ifdef ERROR_STATISTIC 740 wch->bch.err_xdu++; 741 #endif 742 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 743 W_B_CMDR_RACT); 744 /* resend */ 745 if (wch->bch.tx_skb) { 746 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 747 wch->bch.tx_idx = 0; 748 } 749 } 750 send_next(wch); 751 if (stat & W_B_EXI_XDUN) 752 return; /* handle XDOW only once */ 753 } 754 if (stat & W_B_EXI_XDUN) { 755 pr_debug("%s: B%d XDUN proto=%x\n", card->name, 756 wch->bch.nr, wch->bch.state); 757 #ifdef ERROR_STATISTIC 758 wch->bch.err_xdu++; 759 #endif 760 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT); 761 /* resend */ 762 if (wch->bch.tx_skb) { 763 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 764 wch->bch.tx_idx = 0; 765 } 766 send_next(wch); 767 } 768 } 769 770 static irqreturn_t 771 w6692_irq(int intno, void *dev_id) 772 { 773 struct w6692_hw *card = dev_id; 774 u8 ista; 775 776 spin_lock(&card->lock); 777 ista = ReadW6692(card, W_ISTA); 778 if ((ista | card->imask) == card->imask) { 779 /* possible a shared IRQ reqest */ 780 spin_unlock(&card->lock); 781 return IRQ_NONE; 782 } 783 card->irqcnt++; 784 pr_debug("%s: ista %02x\n", card->name, ista); 785 ista &= ~card->imask; 786 if (ista & W_INT_B1_EXI) 787 W6692B_interrupt(card, 0); 788 if (ista & W_INT_B2_EXI) 789 W6692B_interrupt(card, 1); 790 if (ista & W_INT_D_RME) 791 handle_rxD(card); 792 if (ista & W_INT_D_RMR) 793 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 794 if (ista & W_INT_D_XFR) 795 handle_txD(card); 796 if (ista & W_INT_D_EXI) 797 handle_statusD(card); 798 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 799 pr_debug("%s: W6692 spurious XINT!\n", card->name); 800 /* End IRQ Handler */ 801 spin_unlock(&card->lock); 802 return IRQ_HANDLED; 803 } 804 805 static void 806 dbusy_timer_handler(struct dchannel *dch) 807 { 808 struct w6692_hw *card = dch->hw; 809 int rbch, star; 810 u_long flags; 811 812 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 813 spin_lock_irqsave(&card->lock, flags); 814 rbch = ReadW6692(card, W_D_RBCH); 815 star = ReadW6692(card, W_D_STAR); 816 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 817 card->name, rbch, star); 818 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 819 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 820 else { 821 /* discard frame; reset transceiver */ 822 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 823 if (dch->tx_idx) 824 dch->tx_idx = 0; 825 else 826 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 827 card->name); 828 /* Transmitter reset */ 829 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 830 } 831 spin_unlock_irqrestore(&card->lock, flags); 832 } 833 } 834 835 void initW6692(struct w6692_hw *card) 836 { 837 u8 val; 838 839 card->dch.timer.function = (void *)dbusy_timer_handler; 840 card->dch.timer.data = (u_long)&card->dch; 841 init_timer(&card->dch.timer); 842 w6692_mode(&card->bc[0], ISDN_P_NONE); 843 w6692_mode(&card->bc[1], ISDN_P_NONE); 844 WriteW6692(card, W_D_CTL, 0x00); 845 disable_hwirq(card); 846 WriteW6692(card, W_D_SAM, 0xff); 847 WriteW6692(card, W_D_TAM, 0xff); 848 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 849 card->state = W_L1CMD_RST; 850 ph_command(card, W_L1CMD_RST); 851 ph_command(card, W_L1CMD_ECK); 852 /* enable all IRQ but extern */ 853 card->imask = 0x18; 854 WriteW6692(card, W_D_EXIM, 0x00); 855 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 856 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 857 /* Reset D-chan receiver and transmitter */ 858 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 859 /* Reset B-chan receiver and transmitter */ 860 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 861 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 862 /* enable peripheral */ 863 if (card->subtype == W6692_USR) { 864 /* seems that USR implemented some power control features 865 * Pin 79 is connected to the oscilator circuit so we 866 * have to handle it here 867 */ 868 card->pctl = 0x80; 869 card->xdata = 0; 870 WriteW6692(card, W_PCTL, card->pctl); 871 WriteW6692(card, W_XDATA, card->xdata); 872 } else { 873 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 874 W_PCTL_OE1 | W_PCTL_OE0; 875 card->xaddr = 0x00;/* all sw off */ 876 if (card->fmask & pots) 877 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 878 if (card->fmask & led) 879 card->xdata |= 0x04; /* LED OFF */ 880 if ((card->fmask & pots) || (card->fmask & led)) { 881 WriteW6692(card, W_PCTL, card->pctl); 882 WriteW6692(card, W_XADDR, card->xaddr); 883 WriteW6692(card, W_XDATA, card->xdata); 884 val = ReadW6692(card, W_XADDR); 885 if (debug & DEBUG_HW) 886 pr_notice("%s: W_XADDR=%02x\n", 887 card->name, val); 888 } 889 } 890 } 891 892 static void 893 reset_w6692(struct w6692_hw *card) 894 { 895 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 896 mdelay(10); 897 WriteW6692(card, W_D_CTL, 0); 898 } 899 900 static int 901 init_card(struct w6692_hw *card) 902 { 903 int cnt = 3; 904 u_long flags; 905 906 spin_lock_irqsave(&card->lock, flags); 907 disable_hwirq(card); 908 spin_unlock_irqrestore(&card->lock, flags); 909 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 910 pr_info("%s: couldn't get interrupt %d\n", card->name, 911 card->irq); 912 return -EIO; 913 } 914 while (cnt--) { 915 spin_lock_irqsave(&card->lock, flags); 916 initW6692(card); 917 enable_hwirq(card); 918 spin_unlock_irqrestore(&card->lock, flags); 919 /* Timeout 10ms */ 920 msleep_interruptible(10); 921 if (debug & DEBUG_HW) 922 pr_notice("%s: IRQ %d count %d\n", card->name, 923 card->irq, card->irqcnt); 924 if (!card->irqcnt) { 925 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 926 card->name, card->irq, 3 - cnt); 927 reset_w6692(card); 928 } else 929 return 0; 930 } 931 free_irq(card->irq, card); 932 return -EIO; 933 } 934 935 static int 936 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 937 { 938 struct bchannel *bch = container_of(ch, struct bchannel, ch); 939 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 940 struct w6692_hw *card = bch->hw; 941 int ret = -EINVAL; 942 struct mISDNhead *hh = mISDN_HEAD_P(skb); 943 unsigned long flags; 944 945 switch (hh->prim) { 946 case PH_DATA_REQ: 947 spin_lock_irqsave(&card->lock, flags); 948 ret = bchannel_senddata(bch, skb); 949 if (ret > 0) { /* direct TX */ 950 ret = 0; 951 W6692_fill_Bfifo(bc); 952 } 953 spin_unlock_irqrestore(&card->lock, flags); 954 return ret; 955 case PH_ACTIVATE_REQ: 956 spin_lock_irqsave(&card->lock, flags); 957 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 958 ret = w6692_mode(bc, ch->protocol); 959 else 960 ret = 0; 961 spin_unlock_irqrestore(&card->lock, flags); 962 if (!ret) 963 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 964 NULL, GFP_KERNEL); 965 break; 966 case PH_DEACTIVATE_REQ: 967 spin_lock_irqsave(&card->lock, flags); 968 mISDN_clear_bchannel(bch); 969 w6692_mode(bc, ISDN_P_NONE); 970 spin_unlock_irqrestore(&card->lock, flags); 971 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 972 NULL, GFP_KERNEL); 973 ret = 0; 974 break; 975 default: 976 pr_info("%s: %s unknown prim(%x,%x)\n", 977 card->name, __func__, hh->prim, hh->id); 978 ret = -EINVAL; 979 } 980 if (!ret) 981 dev_kfree_skb(skb); 982 return ret; 983 } 984 985 static int 986 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 987 { 988 int ret = 0; 989 990 switch (cq->op) { 991 case MISDN_CTRL_GETOP: 992 cq->op = 0; 993 break; 994 /* Nothing implemented yet */ 995 case MISDN_CTRL_FILL_EMPTY: 996 default: 997 pr_info("%s: unknown Op %x\n", __func__, cq->op); 998 ret = -EINVAL; 999 break; 1000 } 1001 return ret; 1002 } 1003 1004 static int 1005 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 1006 { 1007 struct bchannel *bch; 1008 1009 if (rq->adr.channel == 0 || rq->adr.channel > 2) 1010 return -EINVAL; 1011 if (rq->protocol == ISDN_P_NONE) 1012 return -EINVAL; 1013 bch = &card->bc[rq->adr.channel - 1].bch; 1014 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1015 return -EBUSY; /* b-channel can be only open once */ 1016 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); 1017 bch->ch.protocol = rq->protocol; 1018 rq->ch = &bch->ch; 1019 return 0; 1020 } 1021 1022 static int 1023 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1024 { 1025 int ret = 0; 1026 1027 switch (cq->op) { 1028 case MISDN_CTRL_GETOP: 1029 cq->op = MISDN_CTRL_L1_TIMER3; 1030 break; 1031 case MISDN_CTRL_L1_TIMER3: 1032 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); 1033 break; 1034 default: 1035 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1036 ret = -EINVAL; 1037 break; 1038 } 1039 return ret; 1040 } 1041 1042 static int 1043 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1044 { 1045 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1046 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1047 struct w6692_hw *card = bch->hw; 1048 int ret = -EINVAL; 1049 u_long flags; 1050 1051 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1052 switch (cmd) { 1053 case CLOSE_CHANNEL: 1054 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1055 spin_lock_irqsave(&card->lock, flags); 1056 mISDN_freebchannel(bch); 1057 w6692_mode(bc, ISDN_P_NONE); 1058 spin_unlock_irqrestore(&card->lock, flags); 1059 ch->protocol = ISDN_P_NONE; 1060 ch->peer = NULL; 1061 module_put(THIS_MODULE); 1062 ret = 0; 1063 break; 1064 case CONTROL_CHANNEL: 1065 ret = channel_bctrl(bch, arg); 1066 break; 1067 default: 1068 pr_info("%s: %s unknown prim(%x)\n", 1069 card->name, __func__, cmd); 1070 } 1071 return ret; 1072 } 1073 1074 static int 1075 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1076 { 1077 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1078 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1079 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1080 int ret = -EINVAL; 1081 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1082 u32 id; 1083 u_long flags; 1084 1085 switch (hh->prim) { 1086 case PH_DATA_REQ: 1087 spin_lock_irqsave(&card->lock, flags); 1088 ret = dchannel_senddata(dch, skb); 1089 if (ret > 0) { /* direct TX */ 1090 id = hh->id; /* skb can be freed */ 1091 W6692_fill_Dfifo(card); 1092 ret = 0; 1093 spin_unlock_irqrestore(&card->lock, flags); 1094 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1095 } else 1096 spin_unlock_irqrestore(&card->lock, flags); 1097 return ret; 1098 case PH_ACTIVATE_REQ: 1099 ret = l1_event(dch->l1, hh->prim); 1100 break; 1101 case PH_DEACTIVATE_REQ: 1102 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1103 ret = l1_event(dch->l1, hh->prim); 1104 break; 1105 } 1106 1107 if (!ret) 1108 dev_kfree_skb(skb); 1109 return ret; 1110 } 1111 1112 static int 1113 w6692_l1callback(struct dchannel *dch, u32 cmd) 1114 { 1115 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1116 u_long flags; 1117 1118 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1119 switch (cmd) { 1120 case INFO3_P8: 1121 spin_lock_irqsave(&card->lock, flags); 1122 ph_command(card, W_L1CMD_AR8); 1123 spin_unlock_irqrestore(&card->lock, flags); 1124 break; 1125 case INFO3_P10: 1126 spin_lock_irqsave(&card->lock, flags); 1127 ph_command(card, W_L1CMD_AR10); 1128 spin_unlock_irqrestore(&card->lock, flags); 1129 break; 1130 case HW_RESET_REQ: 1131 spin_lock_irqsave(&card->lock, flags); 1132 if (card->state != W_L1IND_DRD) 1133 ph_command(card, W_L1CMD_RST); 1134 ph_command(card, W_L1CMD_ECK); 1135 spin_unlock_irqrestore(&card->lock, flags); 1136 break; 1137 case HW_DEACT_REQ: 1138 skb_queue_purge(&dch->squeue); 1139 if (dch->tx_skb) { 1140 dev_kfree_skb(dch->tx_skb); 1141 dch->tx_skb = NULL; 1142 } 1143 dch->tx_idx = 0; 1144 if (dch->rx_skb) { 1145 dev_kfree_skb(dch->rx_skb); 1146 dch->rx_skb = NULL; 1147 } 1148 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1149 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1150 del_timer(&dch->timer); 1151 break; 1152 case HW_POWERUP_REQ: 1153 spin_lock_irqsave(&card->lock, flags); 1154 ph_command(card, W_L1CMD_ECK); 1155 spin_unlock_irqrestore(&card->lock, flags); 1156 break; 1157 case PH_ACTIVATE_IND: 1158 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1159 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1160 GFP_ATOMIC); 1161 break; 1162 case PH_DEACTIVATE_IND: 1163 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1164 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1165 GFP_ATOMIC); 1166 break; 1167 default: 1168 pr_debug("%s: %s unknown command %x\n", card->name, 1169 __func__, cmd); 1170 return -1; 1171 } 1172 return 0; 1173 } 1174 1175 static int 1176 open_dchannel(struct w6692_hw *card, struct channel_req *rq) 1177 { 1178 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1179 card->dch.dev.id, __builtin_return_address(1)); 1180 if (rq->protocol != ISDN_P_TE_S0) 1181 return -EINVAL; 1182 if (rq->adr.channel == 1) 1183 /* E-Channel not supported */ 1184 return -EINVAL; 1185 rq->ch = &card->dch.dev.D; 1186 rq->ch->protocol = rq->protocol; 1187 if (card->dch.state == 7) 1188 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1189 0, NULL, GFP_KERNEL); 1190 return 0; 1191 } 1192 1193 static int 1194 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1195 { 1196 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1197 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1198 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1199 struct channel_req *rq; 1200 int err = 0; 1201 1202 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1203 switch (cmd) { 1204 case OPEN_CHANNEL: 1205 rq = arg; 1206 if (rq->protocol == ISDN_P_TE_S0) 1207 err = open_dchannel(card, rq); 1208 else 1209 err = open_bchannel(card, rq); 1210 if (err) 1211 break; 1212 if (!try_module_get(THIS_MODULE)) 1213 pr_info("%s: cannot get module\n", card->name); 1214 break; 1215 case CLOSE_CHANNEL: 1216 pr_debug("%s: dev(%d) close from %p\n", card->name, 1217 dch->dev.id, __builtin_return_address(0)); 1218 module_put(THIS_MODULE); 1219 break; 1220 case CONTROL_CHANNEL: 1221 err = channel_ctrl(card, arg); 1222 break; 1223 default: 1224 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1225 return -EINVAL; 1226 } 1227 return err; 1228 } 1229 1230 static int 1231 setup_w6692(struct w6692_hw *card) 1232 { 1233 u32 val; 1234 1235 if (!request_region(card->addr, 256, card->name)) { 1236 pr_info("%s: config port %x-%x already in use\n", card->name, 1237 card->addr, card->addr + 255); 1238 return -EIO; 1239 } 1240 W6692Version(card); 1241 card->bc[0].addr = card->addr; 1242 card->bc[1].addr = card->addr + 0x40; 1243 val = ReadW6692(card, W_ISTA); 1244 if (debug & DEBUG_HW) 1245 pr_notice("%s ISTA=%02x\n", card->name, val); 1246 val = ReadW6692(card, W_IMASK); 1247 if (debug & DEBUG_HW) 1248 pr_notice("%s IMASK=%02x\n", card->name, val); 1249 val = ReadW6692(card, W_D_EXIR); 1250 if (debug & DEBUG_HW) 1251 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1252 val = ReadW6692(card, W_D_EXIM); 1253 if (debug & DEBUG_HW) 1254 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1255 val = ReadW6692(card, W_D_RSTA); 1256 if (debug & DEBUG_HW) 1257 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1258 return 0; 1259 } 1260 1261 static void 1262 release_card(struct w6692_hw *card) 1263 { 1264 u_long flags; 1265 1266 spin_lock_irqsave(&card->lock, flags); 1267 disable_hwirq(card); 1268 w6692_mode(&card->bc[0], ISDN_P_NONE); 1269 w6692_mode(&card->bc[1], ISDN_P_NONE); 1270 if ((card->fmask & led) || card->subtype == W6692_USR) { 1271 card->xdata |= 0x04; /* LED OFF */ 1272 WriteW6692(card, W_XDATA, card->xdata); 1273 } 1274 spin_unlock_irqrestore(&card->lock, flags); 1275 free_irq(card->irq, card); 1276 l1_event(card->dch.l1, CLOSE_CHANNEL); 1277 mISDN_unregister_device(&card->dch.dev); 1278 release_region(card->addr, 256); 1279 mISDN_freebchannel(&card->bc[1].bch); 1280 mISDN_freebchannel(&card->bc[0].bch); 1281 mISDN_freedchannel(&card->dch); 1282 write_lock_irqsave(&card_lock, flags); 1283 list_del(&card->list); 1284 write_unlock_irqrestore(&card_lock, flags); 1285 pci_disable_device(card->pdev); 1286 pci_set_drvdata(card->pdev, NULL); 1287 kfree(card); 1288 } 1289 1290 static int 1291 setup_instance(struct w6692_hw *card) 1292 { 1293 int i, err; 1294 u_long flags; 1295 1296 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1297 write_lock_irqsave(&card_lock, flags); 1298 list_add_tail(&card->list, &Cards); 1299 write_unlock_irqrestore(&card_lock, flags); 1300 card->fmask = (1 << w6692_cnt); 1301 _set_debug(card); 1302 spin_lock_init(&card->lock); 1303 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1304 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1305 card->dch.dev.D.send = w6692_l2l1D; 1306 card->dch.dev.D.ctrl = w6692_dctrl; 1307 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1308 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1309 card->dch.hw = card; 1310 card->dch.dev.nrbchan = 2; 1311 for (i = 0; i < 2; i++) { 1312 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM); 1313 card->bc[i].bch.hw = card; 1314 card->bc[i].bch.nr = i + 1; 1315 card->bc[i].bch.ch.nr = i + 1; 1316 card->bc[i].bch.ch.send = w6692_l2l1B; 1317 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1318 set_channelmap(i + 1, card->dch.dev.channelmap); 1319 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1320 } 1321 err = setup_w6692(card); 1322 if (err) 1323 goto error_setup; 1324 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1325 card->name); 1326 if (err) 1327 goto error_reg; 1328 err = init_card(card); 1329 if (err) 1330 goto error_init; 1331 err = create_l1(&card->dch, w6692_l1callback); 1332 if (!err) { 1333 w6692_cnt++; 1334 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1335 return 0; 1336 } 1337 1338 free_irq(card->irq, card); 1339 error_init: 1340 mISDN_unregister_device(&card->dch.dev); 1341 error_reg: 1342 release_region(card->addr, 256); 1343 error_setup: 1344 mISDN_freebchannel(&card->bc[1].bch); 1345 mISDN_freebchannel(&card->bc[0].bch); 1346 mISDN_freedchannel(&card->dch); 1347 write_lock_irqsave(&card_lock, flags); 1348 list_del(&card->list); 1349 write_unlock_irqrestore(&card_lock, flags); 1350 kfree(card); 1351 return err; 1352 } 1353 1354 static int __devinit 1355 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1356 { 1357 int err = -ENOMEM; 1358 struct w6692_hw *card; 1359 struct w6692map *m = (struct w6692map *)ent->driver_data; 1360 1361 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1362 if (!card) { 1363 pr_info("No kmem for w6692 card\n"); 1364 return err; 1365 } 1366 card->pdev = pdev; 1367 card->subtype = m->subtype; 1368 err = pci_enable_device(pdev); 1369 if (err) { 1370 kfree(card); 1371 return err; 1372 } 1373 1374 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1375 m->name, pci_name(pdev)); 1376 1377 card->addr = pci_resource_start(pdev, 1); 1378 card->irq = pdev->irq; 1379 pci_set_drvdata(pdev, card); 1380 err = setup_instance(card); 1381 if (err) 1382 pci_set_drvdata(pdev, NULL); 1383 return err; 1384 } 1385 1386 static void __devexit 1387 w6692_remove_pci(struct pci_dev *pdev) 1388 { 1389 struct w6692_hw *card = pci_get_drvdata(pdev); 1390 1391 if (card) 1392 release_card(card); 1393 else 1394 if (debug) 1395 pr_notice("%s: drvdata already removed\n", __func__); 1396 } 1397 1398 static struct pci_device_id w6692_ids[] = { 1399 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1400 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1401 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1402 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1403 (ulong)&w6692_map[2]}, 1404 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1405 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1406 { } 1407 }; 1408 MODULE_DEVICE_TABLE(pci, w6692_ids); 1409 1410 static struct pci_driver w6692_driver = { 1411 .name = "w6692", 1412 .probe = w6692_probe, 1413 .remove = __devexit_p(w6692_remove_pci), 1414 .id_table = w6692_ids, 1415 }; 1416 1417 static int __init w6692_init(void) 1418 { 1419 int err; 1420 1421 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1422 1423 err = pci_register_driver(&w6692_driver); 1424 return err; 1425 } 1426 1427 static void __exit w6692_cleanup(void) 1428 { 1429 pci_unregister_driver(&w6692_driver); 1430 } 1431 1432 module_init(w6692_init); 1433 module_exit(w6692_cleanup); 1434