1 /* 2 * w6692.c mISDN driver for Winbond w6692 based cards 3 * 4 * Author Karsten Keil <kkeil@suse.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/delay.h> 28 #include <linux/mISDNhw.h> 29 #include <linux/slab.h> 30 #include "w6692.h" 31 32 #define W6692_REV "2.0" 33 34 #define DBUSY_TIMER_VALUE 80 35 36 enum { 37 W6692_ASUS, 38 W6692_WINBOND, 39 W6692_USR 40 }; 41 42 /* private data in the PCI devices list */ 43 struct w6692map { 44 u_int subtype; 45 char *name; 46 }; 47 48 static const struct w6692map w6692_map[] = 49 { 50 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 51 {W6692_WINBOND, "Winbond W6692"}, 52 {W6692_USR, "USR W6692"} 53 }; 54 55 #ifndef PCI_VENDOR_ID_USR 56 #define PCI_VENDOR_ID_USR 0x16ec 57 #define PCI_DEVICE_ID_USR_6692 0x3409 58 #endif 59 60 struct w6692_ch { 61 struct bchannel bch; 62 u32 addr; 63 struct timer_list timer; 64 u8 b_mode; 65 }; 66 67 struct w6692_hw { 68 struct list_head list; 69 struct pci_dev *pdev; 70 char name[MISDN_MAX_IDLEN]; 71 u32 irq; 72 u32 irqcnt; 73 u32 addr; 74 u32 fmask; /* feature mask - bit set per card nr */ 75 int subtype; 76 spinlock_t lock; /* hw lock */ 77 u8 imask; 78 u8 pctl; 79 u8 xaddr; 80 u8 xdata; 81 u8 state; 82 struct w6692_ch bc[2]; 83 struct dchannel dch; 84 char log[64]; 85 }; 86 87 static LIST_HEAD(Cards); 88 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 89 90 static int w6692_cnt; 91 static int debug; 92 static u32 led; 93 static u32 pots; 94 95 static void 96 _set_debug(struct w6692_hw *card) 97 { 98 card->dch.debug = debug; 99 card->bc[0].bch.debug = debug; 100 card->bc[1].bch.debug = debug; 101 } 102 103 static int 104 set_debug(const char *val, struct kernel_param *kp) 105 { 106 int ret; 107 struct w6692_hw *card; 108 109 ret = param_set_uint(val, kp); 110 if (!ret) { 111 read_lock(&card_lock); 112 list_for_each_entry(card, &Cards, list) 113 _set_debug(card); 114 read_unlock(&card_lock); 115 } 116 return ret; 117 } 118 119 MODULE_AUTHOR("Karsten Keil"); 120 MODULE_LICENSE("GPL v2"); 121 MODULE_VERSION(W6692_REV); 122 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 123 MODULE_PARM_DESC(debug, "W6692 debug mask"); 124 module_param(led, uint, S_IRUGO | S_IWUSR); 125 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 126 module_param(pots, uint, S_IRUGO | S_IWUSR); 127 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 128 129 static inline u8 130 ReadW6692(struct w6692_hw *card, u8 offset) 131 { 132 return inb(card->addr + offset); 133 } 134 135 static inline void 136 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 137 { 138 outb(value, card->addr + offset); 139 } 140 141 static inline u8 142 ReadW6692B(struct w6692_ch *bc, u8 offset) 143 { 144 return inb(bc->addr + offset); 145 } 146 147 static inline void 148 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 149 { 150 outb(value, bc->addr + offset); 151 } 152 153 static void 154 enable_hwirq(struct w6692_hw *card) 155 { 156 WriteW6692(card, W_IMASK, card->imask); 157 } 158 159 static void 160 disable_hwirq(struct w6692_hw *card) 161 { 162 WriteW6692(card, W_IMASK, 0xff); 163 } 164 165 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 166 167 static void 168 W6692Version(struct w6692_hw *card) 169 { 170 int val; 171 172 val = ReadW6692(card, W_D_RBCH); 173 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 174 W6692Ver[(val >> 6) & 3]); 175 } 176 177 static void 178 w6692_led_handler(struct w6692_hw *card, int on) 179 { 180 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 181 return; 182 if (on) { 183 card->xdata &= 0xfb; /* LED ON */ 184 WriteW6692(card, W_XDATA, card->xdata); 185 } else { 186 card->xdata |= 0x04; /* LED OFF */ 187 WriteW6692(card, W_XDATA, card->xdata); 188 } 189 } 190 191 static void 192 ph_command(struct w6692_hw *card, u8 cmd) 193 { 194 pr_debug("%s: ph_command %x\n", card->name, cmd); 195 WriteW6692(card, W_CIX, cmd); 196 } 197 198 static void 199 W6692_new_ph(struct w6692_hw *card) 200 { 201 if (card->state == W_L1CMD_RST) 202 ph_command(card, W_L1CMD_DRC); 203 schedule_event(&card->dch, FLG_PHCHANGE); 204 } 205 206 static void 207 W6692_ph_bh(struct dchannel *dch) 208 { 209 struct w6692_hw *card = dch->hw; 210 211 switch (card->state) { 212 case W_L1CMD_RST: 213 dch->state = 0; 214 l1_event(dch->l1, HW_RESET_IND); 215 break; 216 case W_L1IND_CD: 217 dch->state = 3; 218 l1_event(dch->l1, HW_DEACT_CNF); 219 break; 220 case W_L1IND_DRD: 221 dch->state = 3; 222 l1_event(dch->l1, HW_DEACT_IND); 223 break; 224 case W_L1IND_CE: 225 dch->state = 4; 226 l1_event(dch->l1, HW_POWERUP_IND); 227 break; 228 case W_L1IND_LD: 229 if (dch->state <= 5) { 230 dch->state = 5; 231 l1_event(dch->l1, ANYSIGNAL); 232 } else { 233 dch->state = 8; 234 l1_event(dch->l1, LOSTFRAMING); 235 } 236 break; 237 case W_L1IND_ARD: 238 dch->state = 6; 239 l1_event(dch->l1, INFO2); 240 break; 241 case W_L1IND_AI8: 242 dch->state = 7; 243 l1_event(dch->l1, INFO4_P8); 244 break; 245 case W_L1IND_AI10: 246 dch->state = 7; 247 l1_event(dch->l1, INFO4_P10); 248 break; 249 default: 250 pr_debug("%s: TE unknown state %02x dch state %02x\n", 251 card->name, card->state, dch->state); 252 break; 253 } 254 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 255 } 256 257 static void 258 W6692_empty_Dfifo(struct w6692_hw *card, int count) 259 { 260 struct dchannel *dch = &card->dch; 261 u8 *ptr; 262 263 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 264 if (!dch->rx_skb) { 265 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 266 if (!dch->rx_skb) { 267 pr_info("%s: D receive out of memory\n", card->name); 268 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 269 return; 270 } 271 } 272 if ((dch->rx_skb->len + count) >= dch->maxlen) { 273 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 274 dch->rx_skb->len + count); 275 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 276 return; 277 } 278 ptr = skb_put(dch->rx_skb, count); 279 insb(card->addr + W_D_RFIFO, ptr, count); 280 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 281 if (debug & DEBUG_HW_DFIFO) { 282 snprintf(card->log, 63, "D-recv %s %d ", 283 card->name, count); 284 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 285 } 286 } 287 288 static void 289 W6692_fill_Dfifo(struct w6692_hw *card) 290 { 291 struct dchannel *dch = &card->dch; 292 int count; 293 u8 *ptr; 294 u8 cmd = W_D_CMDR_XMS; 295 296 pr_debug("%s: fill_Dfifo\n", card->name); 297 if (!dch->tx_skb) 298 return; 299 count = dch->tx_skb->len - dch->tx_idx; 300 if (count <= 0) 301 return; 302 if (count > W_D_FIFO_THRESH) 303 count = W_D_FIFO_THRESH; 304 else 305 cmd |= W_D_CMDR_XME; 306 ptr = dch->tx_skb->data + dch->tx_idx; 307 dch->tx_idx += count; 308 outsb(card->addr + W_D_XFIFO, ptr, count); 309 WriteW6692(card, W_D_CMDR, cmd); 310 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 311 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 312 del_timer(&dch->timer); 313 } 314 init_timer(&dch->timer); 315 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000); 316 add_timer(&dch->timer); 317 if (debug & DEBUG_HW_DFIFO) { 318 snprintf(card->log, 63, "D-send %s %d ", 319 card->name, count); 320 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 321 } 322 } 323 324 static void 325 d_retransmit(struct w6692_hw *card) 326 { 327 struct dchannel *dch = &card->dch; 328 329 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 330 del_timer(&dch->timer); 331 #ifdef FIXME 332 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 333 dchannel_sched_event(dch, D_CLEARBUSY); 334 #endif 335 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 336 /* Restart frame */ 337 dch->tx_idx = 0; 338 W6692_fill_Dfifo(card); 339 } else if (dch->tx_skb) { /* should not happen */ 340 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 341 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 342 dch->tx_idx = 0; 343 W6692_fill_Dfifo(card); 344 } else { 345 pr_info("%s: XDU no TX_BUSY\n", card->name); 346 if (get_next_dframe(dch)) 347 W6692_fill_Dfifo(card); 348 } 349 } 350 351 static void 352 handle_rxD(struct w6692_hw *card) { 353 u8 stat; 354 int count; 355 356 stat = ReadW6692(card, W_D_RSTA); 357 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 358 if (stat & W_D_RSTA_RDOV) { 359 pr_debug("%s: D-channel RDOV\n", card->name); 360 #ifdef ERROR_STATISTIC 361 card->dch.err_rx++; 362 #endif 363 } 364 if (stat & W_D_RSTA_CRCE) { 365 pr_debug("%s: D-channel CRC error\n", card->name); 366 #ifdef ERROR_STATISTIC 367 card->dch.err_crc++; 368 #endif 369 } 370 if (stat & W_D_RSTA_RMB) { 371 pr_debug("%s: D-channel ABORT\n", card->name); 372 #ifdef ERROR_STATISTIC 373 card->dch.err_rx++; 374 #endif 375 } 376 if (card->dch.rx_skb) 377 dev_kfree_skb(card->dch.rx_skb); 378 card->dch.rx_skb = NULL; 379 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 380 } else { 381 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 382 if (count == 0) 383 count = W_D_FIFO_THRESH; 384 W6692_empty_Dfifo(card, count); 385 recv_Dchannel(&card->dch); 386 } 387 } 388 389 static void 390 handle_txD(struct w6692_hw *card) { 391 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 392 del_timer(&card->dch.timer); 393 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 394 W6692_fill_Dfifo(card); 395 } else { 396 if (card->dch.tx_skb) 397 dev_kfree_skb(card->dch.tx_skb); 398 if (get_next_dframe(&card->dch)) 399 W6692_fill_Dfifo(card); 400 } 401 } 402 403 static void 404 handle_statusD(struct w6692_hw *card) 405 { 406 struct dchannel *dch = &card->dch; 407 u8 exval, v1, cir; 408 409 exval = ReadW6692(card, W_D_EXIR); 410 411 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 412 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 413 /* Transmit underrun/collision */ 414 pr_debug("%s: D-channel underrun/collision\n", card->name); 415 #ifdef ERROR_STATISTIC 416 dch->err_tx++; 417 #endif 418 d_retransmit(card); 419 } 420 if (exval & W_D_EXI_RDOV) { /* RDOV */ 421 pr_debug("%s: D-channel RDOV\n", card->name); 422 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 423 } 424 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 425 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 426 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 427 v1 = ReadW6692(card, W_MOSR); 428 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 429 card->name, v1); 430 } 431 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 432 cir = ReadW6692(card, W_CIR); 433 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 434 if (cir & W_CIR_ICC) { 435 v1 = cir & W_CIR_COD_MASK; 436 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 437 dch->state, v1); 438 card->state = v1; 439 if (card->fmask & led) { 440 switch (v1) { 441 case W_L1IND_AI8: 442 case W_L1IND_AI10: 443 w6692_led_handler(card, 1); 444 break; 445 default: 446 w6692_led_handler(card, 0); 447 break; 448 } 449 } 450 W6692_new_ph(card); 451 } 452 if (cir & W_CIR_SCC) { 453 v1 = ReadW6692(card, W_SQR); 454 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 455 } 456 } 457 if (exval & W_D_EXI_WEXP) 458 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 459 if (exval & W_D_EXI_TEXP) 460 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 461 } 462 463 static void 464 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 465 { 466 struct w6692_hw *card = wch->bch.hw; 467 u8 *ptr; 468 int maxlen; 469 470 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 471 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 472 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 473 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 474 if (wch->bch.rx_skb) 475 skb_trim(wch->bch.rx_skb, 0); 476 return; 477 } 478 maxlen = bchannel_get_rxbuf(&wch->bch, count); 479 if (maxlen < 0) { 480 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 481 if (wch->bch.rx_skb) 482 skb_trim(wch->bch.rx_skb, 0); 483 pr_warning("%s.B%d: No bufferspace for %d bytes\n", 484 card->name, wch->bch.nr, count); 485 return; 486 } 487 ptr = skb_put(wch->bch.rx_skb, count); 488 insb(wch->addr + W_B_RFIFO, ptr, count); 489 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 490 if (debug & DEBUG_HW_DFIFO) { 491 snprintf(card->log, 63, "B%1d-recv %s %d ", 492 wch->bch.nr, card->name, count); 493 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 494 } 495 } 496 497 static void 498 W6692_fill_Bfifo(struct w6692_ch *wch) 499 { 500 struct w6692_hw *card = wch->bch.hw; 501 int count; 502 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 503 504 pr_debug("%s: fill Bfifo\n", card->name); 505 if (!wch->bch.tx_skb) 506 return; 507 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 508 if (count <= 0) 509 return; 510 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 511 if (count > W_B_FIFO_THRESH) 512 count = W_B_FIFO_THRESH; 513 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 514 cmd |= W_B_CMDR_XME; 515 516 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 517 count, wch->bch.tx_idx); 518 wch->bch.tx_idx += count; 519 outsb(wch->addr + W_B_XFIFO, ptr, count); 520 WriteW6692B(wch, W_B_CMDR, cmd); 521 if (debug & DEBUG_HW_DFIFO) { 522 snprintf(card->log, 63, "B%1d-send %s %d ", 523 wch->bch.nr, card->name, count); 524 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 525 } 526 } 527 528 #if 0 529 static int 530 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 531 { 532 struct w6692_hw *card = wch->bch.hw; 533 u16 *vol = (u16 *)skb->data; 534 u8 val; 535 536 if ((!(card->fmask & pots)) || 537 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 538 return -ENODEV; 539 if (skb->len < 2) 540 return -EINVAL; 541 if (*vol > 7) 542 return -EINVAL; 543 val = *vol & 7; 544 val = 7 - val; 545 if (mic) { 546 val <<= 3; 547 card->xaddr &= 0xc7; 548 } else { 549 card->xaddr &= 0xf8; 550 } 551 card->xaddr |= val; 552 WriteW6692(card, W_XADDR, card->xaddr); 553 return 0; 554 } 555 556 static int 557 enable_pots(struct w6692_ch *wch) 558 { 559 struct w6692_hw *card = wch->bch.hw; 560 561 if ((!(card->fmask & pots)) || 562 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 563 return -ENODEV; 564 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 565 WriteW6692B(wch, W_B_MODE, wch->b_mode); 566 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 567 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 568 WriteW6692(card, W_PCTL, card->pctl); 569 return 0; 570 } 571 #endif 572 573 static int 574 disable_pots(struct w6692_ch *wch) 575 { 576 struct w6692_hw *card = wch->bch.hw; 577 578 if (!(card->fmask & pots)) 579 return -ENODEV; 580 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 581 WriteW6692B(wch, W_B_MODE, wch->b_mode); 582 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 583 W_B_CMDR_XRST); 584 return 0; 585 } 586 587 static int 588 w6692_mode(struct w6692_ch *wch, u32 pr) 589 { 590 struct w6692_hw *card; 591 592 card = wch->bch.hw; 593 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 594 wch->bch.nr, wch->bch.state, pr); 595 switch (pr) { 596 case ISDN_P_NONE: 597 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 598 disable_pots(wch); 599 wch->b_mode = 0; 600 mISDN_clear_bchannel(&wch->bch); 601 WriteW6692B(wch, W_B_MODE, wch->b_mode); 602 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 603 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 604 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 605 break; 606 case ISDN_P_B_RAW: 607 wch->b_mode = W_B_MODE_MMS; 608 WriteW6692B(wch, W_B_MODE, wch->b_mode); 609 WriteW6692B(wch, W_B_EXIM, 0); 610 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 611 W_B_CMDR_XRST); 612 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 613 break; 614 case ISDN_P_B_HDLC: 615 wch->b_mode = W_B_MODE_ITF; 616 WriteW6692B(wch, W_B_MODE, wch->b_mode); 617 WriteW6692B(wch, W_B_ADM1, 0xff); 618 WriteW6692B(wch, W_B_ADM2, 0xff); 619 WriteW6692B(wch, W_B_EXIM, 0); 620 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 621 W_B_CMDR_XRST); 622 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 623 break; 624 default: 625 pr_info("%s: protocol %x not known\n", card->name, pr); 626 return -ENOPROTOOPT; 627 } 628 wch->bch.state = pr; 629 return 0; 630 } 631 632 static void 633 send_next(struct w6692_ch *wch) 634 { 635 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) { 636 W6692_fill_Bfifo(wch); 637 } else { 638 if (wch->bch.tx_skb) 639 dev_kfree_skb(wch->bch.tx_skb); 640 if (get_next_bframe(&wch->bch)) 641 W6692_fill_Bfifo(wch); 642 } 643 } 644 645 static void 646 W6692B_interrupt(struct w6692_hw *card, int ch) 647 { 648 struct w6692_ch *wch = &card->bc[ch]; 649 int count; 650 u8 stat, star = 0; 651 652 stat = ReadW6692B(wch, W_B_EXIR); 653 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 654 if (stat & W_B_EXI_RME) { 655 star = ReadW6692B(wch, W_B_STAR); 656 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 657 if ((star & W_B_STAR_RDOV) && 658 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 659 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 660 wch->bch.nr, wch->bch.state); 661 #ifdef ERROR_STATISTIC 662 wch->bch.err_rdo++; 663 #endif 664 } 665 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 666 if (star & W_B_STAR_CRCE) { 667 pr_debug("%s: B%d CRC error\n", 668 card->name, wch->bch.nr); 669 #ifdef ERROR_STATISTIC 670 wch->bch.err_crc++; 671 #endif 672 } 673 if (star & W_B_STAR_RMB) { 674 pr_debug("%s: B%d message abort\n", 675 card->name, wch->bch.nr); 676 #ifdef ERROR_STATISTIC 677 wch->bch.err_inv++; 678 #endif 679 } 680 } 681 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 682 W_B_CMDR_RRST | W_B_CMDR_RACT); 683 if (wch->bch.rx_skb) 684 skb_trim(wch->bch.rx_skb, 0); 685 } else { 686 count = ReadW6692B(wch, W_B_RBCL) & 687 (W_B_FIFO_THRESH - 1); 688 if (count == 0) 689 count = W_B_FIFO_THRESH; 690 W6692_empty_Bfifo(wch, count); 691 recv_Bchannel(&wch->bch, 0); 692 } 693 } 694 if (stat & W_B_EXI_RMR) { 695 if (!(stat & W_B_EXI_RME)) 696 star = ReadW6692B(wch, W_B_STAR); 697 if (star & W_B_STAR_RDOV) { 698 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 699 wch->bch.nr, wch->bch.state); 700 #ifdef ERROR_STATISTIC 701 wch->bch.err_rdo++; 702 #endif 703 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 704 W_B_CMDR_RRST | W_B_CMDR_RACT); 705 } else { 706 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 707 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) && 708 wch->bch.rx_skb && (wch->bch.rx_skb->len > 0)) 709 recv_Bchannel(&wch->bch, 0); 710 } 711 } 712 if (stat & W_B_EXI_RDOV) { 713 /* only if it is not handled yet */ 714 if (!(star & W_B_STAR_RDOV)) { 715 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 716 wch->bch.nr, wch->bch.state); 717 #ifdef ERROR_STATISTIC 718 wch->bch.err_rdo++; 719 #endif 720 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 721 W_B_CMDR_RRST | W_B_CMDR_RACT); 722 } 723 } 724 if (stat & W_B_EXI_XFR) { 725 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 726 star = ReadW6692B(wch, W_B_STAR); 727 pr_debug("%s: B%d star %02x\n", card->name, 728 wch->bch.nr, star); 729 } 730 if (star & W_B_STAR_XDOW) { 731 pr_debug("%s: B%d XDOW proto=%x\n", card->name, 732 wch->bch.nr, wch->bch.state); 733 #ifdef ERROR_STATISTIC 734 wch->bch.err_xdu++; 735 #endif 736 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 737 W_B_CMDR_RACT); 738 /* resend */ 739 if (wch->bch.tx_skb) { 740 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 741 wch->bch.tx_idx = 0; 742 } 743 } 744 send_next(wch); 745 if (stat & W_B_EXI_XDUN) 746 return; /* handle XDOW only once */ 747 } 748 if (stat & W_B_EXI_XDUN) { 749 pr_debug("%s: B%d XDUN proto=%x\n", card->name, 750 wch->bch.nr, wch->bch.state); 751 #ifdef ERROR_STATISTIC 752 wch->bch.err_xdu++; 753 #endif 754 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT); 755 /* resend */ 756 if (wch->bch.tx_skb) { 757 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 758 wch->bch.tx_idx = 0; 759 } 760 send_next(wch); 761 } 762 } 763 764 static irqreturn_t 765 w6692_irq(int intno, void *dev_id) 766 { 767 struct w6692_hw *card = dev_id; 768 u8 ista; 769 770 spin_lock(&card->lock); 771 ista = ReadW6692(card, W_ISTA); 772 if ((ista | card->imask) == card->imask) { 773 /* possible a shared IRQ reqest */ 774 spin_unlock(&card->lock); 775 return IRQ_NONE; 776 } 777 card->irqcnt++; 778 pr_debug("%s: ista %02x\n", card->name, ista); 779 ista &= ~card->imask; 780 if (ista & W_INT_B1_EXI) 781 W6692B_interrupt(card, 0); 782 if (ista & W_INT_B2_EXI) 783 W6692B_interrupt(card, 1); 784 if (ista & W_INT_D_RME) 785 handle_rxD(card); 786 if (ista & W_INT_D_RMR) 787 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 788 if (ista & W_INT_D_XFR) 789 handle_txD(card); 790 if (ista & W_INT_D_EXI) 791 handle_statusD(card); 792 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 793 pr_debug("%s: W6692 spurious XINT!\n", card->name); 794 /* End IRQ Handler */ 795 spin_unlock(&card->lock); 796 return IRQ_HANDLED; 797 } 798 799 static void 800 dbusy_timer_handler(struct dchannel *dch) 801 { 802 struct w6692_hw *card = dch->hw; 803 int rbch, star; 804 u_long flags; 805 806 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 807 spin_lock_irqsave(&card->lock, flags); 808 rbch = ReadW6692(card, W_D_RBCH); 809 star = ReadW6692(card, W_D_STAR); 810 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 811 card->name, rbch, star); 812 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 813 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 814 else { 815 /* discard frame; reset transceiver */ 816 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 817 if (dch->tx_idx) 818 dch->tx_idx = 0; 819 else 820 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 821 card->name); 822 /* Transmitter reset */ 823 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 824 } 825 spin_unlock_irqrestore(&card->lock, flags); 826 } 827 } 828 829 void initW6692(struct w6692_hw *card) 830 { 831 u8 val; 832 833 card->dch.timer.function = (void *)dbusy_timer_handler; 834 card->dch.timer.data = (u_long)&card->dch; 835 init_timer(&card->dch.timer); 836 w6692_mode(&card->bc[0], ISDN_P_NONE); 837 w6692_mode(&card->bc[1], ISDN_P_NONE); 838 WriteW6692(card, W_D_CTL, 0x00); 839 disable_hwirq(card); 840 WriteW6692(card, W_D_SAM, 0xff); 841 WriteW6692(card, W_D_TAM, 0xff); 842 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 843 card->state = W_L1CMD_RST; 844 ph_command(card, W_L1CMD_RST); 845 ph_command(card, W_L1CMD_ECK); 846 /* enable all IRQ but extern */ 847 card->imask = 0x18; 848 WriteW6692(card, W_D_EXIM, 0x00); 849 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 850 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 851 /* Reset D-chan receiver and transmitter */ 852 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 853 /* Reset B-chan receiver and transmitter */ 854 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 855 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 856 /* enable peripheral */ 857 if (card->subtype == W6692_USR) { 858 /* seems that USR implemented some power control features 859 * Pin 79 is connected to the oscilator circuit so we 860 * have to handle it here 861 */ 862 card->pctl = 0x80; 863 card->xdata = 0; 864 WriteW6692(card, W_PCTL, card->pctl); 865 WriteW6692(card, W_XDATA, card->xdata); 866 } else { 867 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 868 W_PCTL_OE1 | W_PCTL_OE0; 869 card->xaddr = 0x00;/* all sw off */ 870 if (card->fmask & pots) 871 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 872 if (card->fmask & led) 873 card->xdata |= 0x04; /* LED OFF */ 874 if ((card->fmask & pots) || (card->fmask & led)) { 875 WriteW6692(card, W_PCTL, card->pctl); 876 WriteW6692(card, W_XADDR, card->xaddr); 877 WriteW6692(card, W_XDATA, card->xdata); 878 val = ReadW6692(card, W_XADDR); 879 if (debug & DEBUG_HW) 880 pr_notice("%s: W_XADDR=%02x\n", 881 card->name, val); 882 } 883 } 884 } 885 886 static void 887 reset_w6692(struct w6692_hw *card) 888 { 889 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 890 mdelay(10); 891 WriteW6692(card, W_D_CTL, 0); 892 } 893 894 static int 895 init_card(struct w6692_hw *card) 896 { 897 int cnt = 3; 898 u_long flags; 899 900 spin_lock_irqsave(&card->lock, flags); 901 disable_hwirq(card); 902 spin_unlock_irqrestore(&card->lock, flags); 903 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 904 pr_info("%s: couldn't get interrupt %d\n", card->name, 905 card->irq); 906 return -EIO; 907 } 908 while (cnt--) { 909 spin_lock_irqsave(&card->lock, flags); 910 initW6692(card); 911 enable_hwirq(card); 912 spin_unlock_irqrestore(&card->lock, flags); 913 /* Timeout 10ms */ 914 msleep_interruptible(10); 915 if (debug & DEBUG_HW) 916 pr_notice("%s: IRQ %d count %d\n", card->name, 917 card->irq, card->irqcnt); 918 if (!card->irqcnt) { 919 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 920 card->name, card->irq, 3 - cnt); 921 reset_w6692(card); 922 } else 923 return 0; 924 } 925 free_irq(card->irq, card); 926 return -EIO; 927 } 928 929 static int 930 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 931 { 932 struct bchannel *bch = container_of(ch, struct bchannel, ch); 933 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 934 struct w6692_hw *card = bch->hw; 935 int ret = -EINVAL; 936 struct mISDNhead *hh = mISDN_HEAD_P(skb); 937 unsigned long flags; 938 939 switch (hh->prim) { 940 case PH_DATA_REQ: 941 spin_lock_irqsave(&card->lock, flags); 942 ret = bchannel_senddata(bch, skb); 943 if (ret > 0) { /* direct TX */ 944 ret = 0; 945 W6692_fill_Bfifo(bc); 946 } 947 spin_unlock_irqrestore(&card->lock, flags); 948 return ret; 949 case PH_ACTIVATE_REQ: 950 spin_lock_irqsave(&card->lock, flags); 951 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 952 ret = w6692_mode(bc, ch->protocol); 953 else 954 ret = 0; 955 spin_unlock_irqrestore(&card->lock, flags); 956 if (!ret) 957 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 958 NULL, GFP_KERNEL); 959 break; 960 case PH_DEACTIVATE_REQ: 961 spin_lock_irqsave(&card->lock, flags); 962 mISDN_clear_bchannel(bch); 963 w6692_mode(bc, ISDN_P_NONE); 964 spin_unlock_irqrestore(&card->lock, flags); 965 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 966 NULL, GFP_KERNEL); 967 ret = 0; 968 break; 969 default: 970 pr_info("%s: %s unknown prim(%x,%x)\n", 971 card->name, __func__, hh->prim, hh->id); 972 ret = -EINVAL; 973 } 974 if (!ret) 975 dev_kfree_skb(skb); 976 return ret; 977 } 978 979 static int 980 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 981 { 982 int ret = 0; 983 984 switch (cq->op) { 985 case MISDN_CTRL_GETOP: 986 cq->op = 0; 987 break; 988 /* Nothing implemented yet */ 989 case MISDN_CTRL_FILL_EMPTY: 990 default: 991 pr_info("%s: unknown Op %x\n", __func__, cq->op); 992 ret = -EINVAL; 993 break; 994 } 995 return ret; 996 } 997 998 static int 999 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 1000 { 1001 struct bchannel *bch; 1002 1003 if (rq->adr.channel == 0 || rq->adr.channel > 2) 1004 return -EINVAL; 1005 if (rq->protocol == ISDN_P_NONE) 1006 return -EINVAL; 1007 bch = &card->bc[rq->adr.channel - 1].bch; 1008 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1009 return -EBUSY; /* b-channel can be only open once */ 1010 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); 1011 bch->ch.protocol = rq->protocol; 1012 rq->ch = &bch->ch; 1013 return 0; 1014 } 1015 1016 static int 1017 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1018 { 1019 int ret = 0; 1020 1021 switch (cq->op) { 1022 case MISDN_CTRL_GETOP: 1023 cq->op = MISDN_CTRL_L1_TIMER3; 1024 break; 1025 case MISDN_CTRL_L1_TIMER3: 1026 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); 1027 break; 1028 default: 1029 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1030 ret = -EINVAL; 1031 break; 1032 } 1033 return ret; 1034 } 1035 1036 static int 1037 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1038 { 1039 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1040 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1041 struct w6692_hw *card = bch->hw; 1042 int ret = -EINVAL; 1043 u_long flags; 1044 1045 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1046 switch (cmd) { 1047 case CLOSE_CHANNEL: 1048 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1049 spin_lock_irqsave(&card->lock, flags); 1050 mISDN_freebchannel(bch); 1051 w6692_mode(bc, ISDN_P_NONE); 1052 spin_unlock_irqrestore(&card->lock, flags); 1053 ch->protocol = ISDN_P_NONE; 1054 ch->peer = NULL; 1055 module_put(THIS_MODULE); 1056 ret = 0; 1057 break; 1058 case CONTROL_CHANNEL: 1059 ret = channel_bctrl(bch, arg); 1060 break; 1061 default: 1062 pr_info("%s: %s unknown prim(%x)\n", 1063 card->name, __func__, cmd); 1064 } 1065 return ret; 1066 } 1067 1068 static int 1069 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1070 { 1071 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1072 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1073 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1074 int ret = -EINVAL; 1075 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1076 u32 id; 1077 u_long flags; 1078 1079 switch (hh->prim) { 1080 case PH_DATA_REQ: 1081 spin_lock_irqsave(&card->lock, flags); 1082 ret = dchannel_senddata(dch, skb); 1083 if (ret > 0) { /* direct TX */ 1084 id = hh->id; /* skb can be freed */ 1085 W6692_fill_Dfifo(card); 1086 ret = 0; 1087 spin_unlock_irqrestore(&card->lock, flags); 1088 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1089 } else 1090 spin_unlock_irqrestore(&card->lock, flags); 1091 return ret; 1092 case PH_ACTIVATE_REQ: 1093 ret = l1_event(dch->l1, hh->prim); 1094 break; 1095 case PH_DEACTIVATE_REQ: 1096 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1097 ret = l1_event(dch->l1, hh->prim); 1098 break; 1099 } 1100 1101 if (!ret) 1102 dev_kfree_skb(skb); 1103 return ret; 1104 } 1105 1106 static int 1107 w6692_l1callback(struct dchannel *dch, u32 cmd) 1108 { 1109 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1110 u_long flags; 1111 1112 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1113 switch (cmd) { 1114 case INFO3_P8: 1115 spin_lock_irqsave(&card->lock, flags); 1116 ph_command(card, W_L1CMD_AR8); 1117 spin_unlock_irqrestore(&card->lock, flags); 1118 break; 1119 case INFO3_P10: 1120 spin_lock_irqsave(&card->lock, flags); 1121 ph_command(card, W_L1CMD_AR10); 1122 spin_unlock_irqrestore(&card->lock, flags); 1123 break; 1124 case HW_RESET_REQ: 1125 spin_lock_irqsave(&card->lock, flags); 1126 if (card->state != W_L1IND_DRD) 1127 ph_command(card, W_L1CMD_RST); 1128 ph_command(card, W_L1CMD_ECK); 1129 spin_unlock_irqrestore(&card->lock, flags); 1130 break; 1131 case HW_DEACT_REQ: 1132 skb_queue_purge(&dch->squeue); 1133 if (dch->tx_skb) { 1134 dev_kfree_skb(dch->tx_skb); 1135 dch->tx_skb = NULL; 1136 } 1137 dch->tx_idx = 0; 1138 if (dch->rx_skb) { 1139 dev_kfree_skb(dch->rx_skb); 1140 dch->rx_skb = NULL; 1141 } 1142 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1143 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1144 del_timer(&dch->timer); 1145 break; 1146 case HW_POWERUP_REQ: 1147 spin_lock_irqsave(&card->lock, flags); 1148 ph_command(card, W_L1CMD_ECK); 1149 spin_unlock_irqrestore(&card->lock, flags); 1150 break; 1151 case PH_ACTIVATE_IND: 1152 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1153 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1154 GFP_ATOMIC); 1155 break; 1156 case PH_DEACTIVATE_IND: 1157 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1158 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1159 GFP_ATOMIC); 1160 break; 1161 default: 1162 pr_debug("%s: %s unknown command %x\n", card->name, 1163 __func__, cmd); 1164 return -1; 1165 } 1166 return 0; 1167 } 1168 1169 static int 1170 open_dchannel(struct w6692_hw *card, struct channel_req *rq) 1171 { 1172 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1173 card->dch.dev.id, __builtin_return_address(1)); 1174 if (rq->protocol != ISDN_P_TE_S0) 1175 return -EINVAL; 1176 if (rq->adr.channel == 1) 1177 /* E-Channel not supported */ 1178 return -EINVAL; 1179 rq->ch = &card->dch.dev.D; 1180 rq->ch->protocol = rq->protocol; 1181 if (card->dch.state == 7) 1182 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1183 0, NULL, GFP_KERNEL); 1184 return 0; 1185 } 1186 1187 static int 1188 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1189 { 1190 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1191 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1192 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1193 struct channel_req *rq; 1194 int err = 0; 1195 1196 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1197 switch (cmd) { 1198 case OPEN_CHANNEL: 1199 rq = arg; 1200 if (rq->protocol == ISDN_P_TE_S0) 1201 err = open_dchannel(card, rq); 1202 else 1203 err = open_bchannel(card, rq); 1204 if (err) 1205 break; 1206 if (!try_module_get(THIS_MODULE)) 1207 pr_info("%s: cannot get module\n", card->name); 1208 break; 1209 case CLOSE_CHANNEL: 1210 pr_debug("%s: dev(%d) close from %p\n", card->name, 1211 dch->dev.id, __builtin_return_address(0)); 1212 module_put(THIS_MODULE); 1213 break; 1214 case CONTROL_CHANNEL: 1215 err = channel_ctrl(card, arg); 1216 break; 1217 default: 1218 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1219 return -EINVAL; 1220 } 1221 return err; 1222 } 1223 1224 static int 1225 setup_w6692(struct w6692_hw *card) 1226 { 1227 u32 val; 1228 1229 if (!request_region(card->addr, 256, card->name)) { 1230 pr_info("%s: config port %x-%x already in use\n", card->name, 1231 card->addr, card->addr + 255); 1232 return -EIO; 1233 } 1234 W6692Version(card); 1235 card->bc[0].addr = card->addr; 1236 card->bc[1].addr = card->addr + 0x40; 1237 val = ReadW6692(card, W_ISTA); 1238 if (debug & DEBUG_HW) 1239 pr_notice("%s ISTA=%02x\n", card->name, val); 1240 val = ReadW6692(card, W_IMASK); 1241 if (debug & DEBUG_HW) 1242 pr_notice("%s IMASK=%02x\n", card->name, val); 1243 val = ReadW6692(card, W_D_EXIR); 1244 if (debug & DEBUG_HW) 1245 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1246 val = ReadW6692(card, W_D_EXIM); 1247 if (debug & DEBUG_HW) 1248 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1249 val = ReadW6692(card, W_D_RSTA); 1250 if (debug & DEBUG_HW) 1251 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1252 return 0; 1253 } 1254 1255 static void 1256 release_card(struct w6692_hw *card) 1257 { 1258 u_long flags; 1259 1260 spin_lock_irqsave(&card->lock, flags); 1261 disable_hwirq(card); 1262 w6692_mode(&card->bc[0], ISDN_P_NONE); 1263 w6692_mode(&card->bc[1], ISDN_P_NONE); 1264 if ((card->fmask & led) || card->subtype == W6692_USR) { 1265 card->xdata |= 0x04; /* LED OFF */ 1266 WriteW6692(card, W_XDATA, card->xdata); 1267 } 1268 spin_unlock_irqrestore(&card->lock, flags); 1269 free_irq(card->irq, card); 1270 l1_event(card->dch.l1, CLOSE_CHANNEL); 1271 mISDN_unregister_device(&card->dch.dev); 1272 release_region(card->addr, 256); 1273 mISDN_freebchannel(&card->bc[1].bch); 1274 mISDN_freebchannel(&card->bc[0].bch); 1275 mISDN_freedchannel(&card->dch); 1276 write_lock_irqsave(&card_lock, flags); 1277 list_del(&card->list); 1278 write_unlock_irqrestore(&card_lock, flags); 1279 pci_disable_device(card->pdev); 1280 pci_set_drvdata(card->pdev, NULL); 1281 kfree(card); 1282 } 1283 1284 static int 1285 setup_instance(struct w6692_hw *card) 1286 { 1287 int i, err; 1288 u_long flags; 1289 1290 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1291 write_lock_irqsave(&card_lock, flags); 1292 list_add_tail(&card->list, &Cards); 1293 write_unlock_irqrestore(&card_lock, flags); 1294 card->fmask = (1 << w6692_cnt); 1295 _set_debug(card); 1296 spin_lock_init(&card->lock); 1297 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1298 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1299 card->dch.dev.D.send = w6692_l2l1D; 1300 card->dch.dev.D.ctrl = w6692_dctrl; 1301 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1302 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1303 card->dch.hw = card; 1304 card->dch.dev.nrbchan = 2; 1305 for (i = 0; i < 2; i++) { 1306 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM); 1307 card->bc[i].bch.hw = card; 1308 card->bc[i].bch.nr = i + 1; 1309 card->bc[i].bch.ch.nr = i + 1; 1310 card->bc[i].bch.ch.send = w6692_l2l1B; 1311 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1312 set_channelmap(i + 1, card->dch.dev.channelmap); 1313 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1314 } 1315 err = setup_w6692(card); 1316 if (err) 1317 goto error_setup; 1318 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1319 card->name); 1320 if (err) 1321 goto error_reg; 1322 err = init_card(card); 1323 if (err) 1324 goto error_init; 1325 err = create_l1(&card->dch, w6692_l1callback); 1326 if (!err) { 1327 w6692_cnt++; 1328 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1329 return 0; 1330 } 1331 1332 free_irq(card->irq, card); 1333 error_init: 1334 mISDN_unregister_device(&card->dch.dev); 1335 error_reg: 1336 release_region(card->addr, 256); 1337 error_setup: 1338 mISDN_freebchannel(&card->bc[1].bch); 1339 mISDN_freebchannel(&card->bc[0].bch); 1340 mISDN_freedchannel(&card->dch); 1341 write_lock_irqsave(&card_lock, flags); 1342 list_del(&card->list); 1343 write_unlock_irqrestore(&card_lock, flags); 1344 kfree(card); 1345 return err; 1346 } 1347 1348 static int __devinit 1349 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1350 { 1351 int err = -ENOMEM; 1352 struct w6692_hw *card; 1353 struct w6692map *m = (struct w6692map *)ent->driver_data; 1354 1355 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1356 if (!card) { 1357 pr_info("No kmem for w6692 card\n"); 1358 return err; 1359 } 1360 card->pdev = pdev; 1361 card->subtype = m->subtype; 1362 err = pci_enable_device(pdev); 1363 if (err) { 1364 kfree(card); 1365 return err; 1366 } 1367 1368 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1369 m->name, pci_name(pdev)); 1370 1371 card->addr = pci_resource_start(pdev, 1); 1372 card->irq = pdev->irq; 1373 pci_set_drvdata(pdev, card); 1374 err = setup_instance(card); 1375 if (err) 1376 pci_set_drvdata(pdev, NULL); 1377 return err; 1378 } 1379 1380 static void __devexit 1381 w6692_remove_pci(struct pci_dev *pdev) 1382 { 1383 struct w6692_hw *card = pci_get_drvdata(pdev); 1384 1385 if (card) 1386 release_card(card); 1387 else 1388 if (debug) 1389 pr_notice("%s: drvdata already removed\n", __func__); 1390 } 1391 1392 static struct pci_device_id w6692_ids[] = { 1393 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1394 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1395 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1396 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1397 (ulong)&w6692_map[2]}, 1398 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1399 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1400 { } 1401 }; 1402 MODULE_DEVICE_TABLE(pci, w6692_ids); 1403 1404 static struct pci_driver w6692_driver = { 1405 .name = "w6692", 1406 .probe = w6692_probe, 1407 .remove = __devexit_p(w6692_remove_pci), 1408 .id_table = w6692_ids, 1409 }; 1410 1411 static int __init w6692_init(void) 1412 { 1413 int err; 1414 1415 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1416 1417 err = pci_register_driver(&w6692_driver); 1418 return err; 1419 } 1420 1421 static void __exit w6692_cleanup(void) 1422 { 1423 pci_unregister_driver(&w6692_driver); 1424 } 1425 1426 module_init(w6692_init); 1427 module_exit(w6692_cleanup); 1428