xref: /openbmc/linux/drivers/irqchip/irq-imx-irqsteer.c (revision 0136afa08967f6e160b9b4e85a7a70e4180a8333)
1*0136afa0SLucas Stach // SPDX-License-Identifier: GPL-2.0+
2*0136afa0SLucas Stach /*
3*0136afa0SLucas Stach  * Copyright 2017 NXP
4*0136afa0SLucas Stach  * Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
5*0136afa0SLucas Stach  */
6*0136afa0SLucas Stach 
7*0136afa0SLucas Stach #include <linux/clk.h>
8*0136afa0SLucas Stach #include <linux/interrupt.h>
9*0136afa0SLucas Stach #include <linux/irq.h>
10*0136afa0SLucas Stach #include <linux/irqchip/chained_irq.h>
11*0136afa0SLucas Stach #include <linux/irqdomain.h>
12*0136afa0SLucas Stach #include <linux/kernel.h>
13*0136afa0SLucas Stach #include <linux/of_platform.h>
14*0136afa0SLucas Stach #include <linux/spinlock.h>
15*0136afa0SLucas Stach 
16*0136afa0SLucas Stach #define CTRL_STRIDE_OFF(_t, _r)	(_t * 8 * _r)
17*0136afa0SLucas Stach #define CHANCTRL		0x0
18*0136afa0SLucas Stach #define CHANMASK(n, t)		(CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
19*0136afa0SLucas Stach #define CHANSET(n, t)		(CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
20*0136afa0SLucas Stach #define CHANSTATUS(n, t)	(CTRL_STRIDE_OFF(t, 2) + 0x4 * (n) + 0x4)
21*0136afa0SLucas Stach #define CHAN_MINTDIS(t)		(CTRL_STRIDE_OFF(t, 3) + 0x4)
22*0136afa0SLucas Stach #define CHAN_MASTRSTAT(t)	(CTRL_STRIDE_OFF(t, 3) + 0x8)
23*0136afa0SLucas Stach 
24*0136afa0SLucas Stach struct irqsteer_data {
25*0136afa0SLucas Stach 	void __iomem		*regs;
26*0136afa0SLucas Stach 	struct clk		*ipg_clk;
27*0136afa0SLucas Stach 	int			irq;
28*0136afa0SLucas Stach 	raw_spinlock_t		lock;
29*0136afa0SLucas Stach 	int			irq_groups;
30*0136afa0SLucas Stach 	int			channel;
31*0136afa0SLucas Stach 	struct irq_domain	*domain;
32*0136afa0SLucas Stach 	u32			*saved_reg;
33*0136afa0SLucas Stach };
34*0136afa0SLucas Stach 
35*0136afa0SLucas Stach static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
36*0136afa0SLucas Stach 				      unsigned long irqnum)
37*0136afa0SLucas Stach {
38*0136afa0SLucas Stach 	return (data->irq_groups * 2 - irqnum / 32 - 1);
39*0136afa0SLucas Stach }
40*0136afa0SLucas Stach 
41*0136afa0SLucas Stach static void imx_irqsteer_irq_unmask(struct irq_data *d)
42*0136afa0SLucas Stach {
43*0136afa0SLucas Stach 	struct irqsteer_data *data = d->chip_data;
44*0136afa0SLucas Stach 	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
45*0136afa0SLucas Stach 	unsigned long flags;
46*0136afa0SLucas Stach 	u32 val;
47*0136afa0SLucas Stach 
48*0136afa0SLucas Stach 	raw_spin_lock_irqsave(&data->lock, flags);
49*0136afa0SLucas Stach 	val = readl_relaxed(data->regs + CHANMASK(idx, data->irq_groups));
50*0136afa0SLucas Stach 	val |= BIT(d->hwirq % 32);
51*0136afa0SLucas Stach 	writel_relaxed(val, data->regs + CHANMASK(idx, data->irq_groups));
52*0136afa0SLucas Stach 	raw_spin_unlock_irqrestore(&data->lock, flags);
53*0136afa0SLucas Stach }
54*0136afa0SLucas Stach 
55*0136afa0SLucas Stach static void imx_irqsteer_irq_mask(struct irq_data *d)
56*0136afa0SLucas Stach {
57*0136afa0SLucas Stach 	struct irqsteer_data *data = d->chip_data;
58*0136afa0SLucas Stach 	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
59*0136afa0SLucas Stach 	unsigned long flags;
60*0136afa0SLucas Stach 	u32 val;
61*0136afa0SLucas Stach 
62*0136afa0SLucas Stach 	raw_spin_lock_irqsave(&data->lock, flags);
63*0136afa0SLucas Stach 	val = readl_relaxed(data->regs + CHANMASK(idx, data->irq_groups));
64*0136afa0SLucas Stach 	val &= ~BIT(d->hwirq % 32);
65*0136afa0SLucas Stach 	writel_relaxed(val, data->regs + CHANMASK(idx, data->irq_groups));
66*0136afa0SLucas Stach 	raw_spin_unlock_irqrestore(&data->lock, flags);
67*0136afa0SLucas Stach }
68*0136afa0SLucas Stach 
69*0136afa0SLucas Stach static struct irq_chip imx_irqsteer_irq_chip = {
70*0136afa0SLucas Stach 	.name		= "irqsteer",
71*0136afa0SLucas Stach 	.irq_mask	= imx_irqsteer_irq_mask,
72*0136afa0SLucas Stach 	.irq_unmask	= imx_irqsteer_irq_unmask,
73*0136afa0SLucas Stach };
74*0136afa0SLucas Stach 
75*0136afa0SLucas Stach static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
76*0136afa0SLucas Stach 				irq_hw_number_t hwirq)
77*0136afa0SLucas Stach {
78*0136afa0SLucas Stach 	irq_set_status_flags(irq, IRQ_LEVEL);
79*0136afa0SLucas Stach 	irq_set_chip_data(irq, h->host_data);
80*0136afa0SLucas Stach 	irq_set_chip_and_handler(irq, &imx_irqsteer_irq_chip, handle_level_irq);
81*0136afa0SLucas Stach 
82*0136afa0SLucas Stach 	return 0;
83*0136afa0SLucas Stach }
84*0136afa0SLucas Stach 
85*0136afa0SLucas Stach static const struct irq_domain_ops imx_irqsteer_domain_ops = {
86*0136afa0SLucas Stach 	.map		= imx_irqsteer_irq_map,
87*0136afa0SLucas Stach 	.xlate		= irq_domain_xlate_onecell,
88*0136afa0SLucas Stach };
89*0136afa0SLucas Stach 
90*0136afa0SLucas Stach static void imx_irqsteer_irq_handler(struct irq_desc *desc)
91*0136afa0SLucas Stach {
92*0136afa0SLucas Stach 	struct irqsteer_data *data = irq_desc_get_handler_data(desc);
93*0136afa0SLucas Stach 	int i;
94*0136afa0SLucas Stach 
95*0136afa0SLucas Stach 	chained_irq_enter(irq_desc_get_chip(desc), desc);
96*0136afa0SLucas Stach 
97*0136afa0SLucas Stach 	for (i = 0; i < data->irq_groups * 64; i += 32) {
98*0136afa0SLucas Stach 		int idx = imx_irqsteer_get_reg_index(data, i);
99*0136afa0SLucas Stach 		unsigned long irqmap;
100*0136afa0SLucas Stach 		int pos, virq;
101*0136afa0SLucas Stach 
102*0136afa0SLucas Stach 		irqmap = readl_relaxed(data->regs +
103*0136afa0SLucas Stach 				       CHANSTATUS(idx, data->irq_groups));
104*0136afa0SLucas Stach 
105*0136afa0SLucas Stach 		for_each_set_bit(pos, &irqmap, 32) {
106*0136afa0SLucas Stach 			virq = irq_find_mapping(data->domain, pos + i);
107*0136afa0SLucas Stach 			if (virq)
108*0136afa0SLucas Stach 				generic_handle_irq(virq);
109*0136afa0SLucas Stach 		}
110*0136afa0SLucas Stach 	}
111*0136afa0SLucas Stach 
112*0136afa0SLucas Stach 	chained_irq_exit(irq_desc_get_chip(desc), desc);
113*0136afa0SLucas Stach }
114*0136afa0SLucas Stach 
115*0136afa0SLucas Stach static int imx_irqsteer_probe(struct platform_device *pdev)
116*0136afa0SLucas Stach {
117*0136afa0SLucas Stach 	struct device_node *np = pdev->dev.of_node;
118*0136afa0SLucas Stach 	struct irqsteer_data *data;
119*0136afa0SLucas Stach 	struct resource *res;
120*0136afa0SLucas Stach 	int ret;
121*0136afa0SLucas Stach 
122*0136afa0SLucas Stach 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
123*0136afa0SLucas Stach 	if (!data)
124*0136afa0SLucas Stach 		return -ENOMEM;
125*0136afa0SLucas Stach 
126*0136afa0SLucas Stach 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
127*0136afa0SLucas Stach 	data->regs = devm_ioremap_resource(&pdev->dev, res);
128*0136afa0SLucas Stach 	if (IS_ERR(data->regs)) {
129*0136afa0SLucas Stach 		dev_err(&pdev->dev, "failed to initialize reg\n");
130*0136afa0SLucas Stach 		return PTR_ERR(data->regs);
131*0136afa0SLucas Stach 	}
132*0136afa0SLucas Stach 
133*0136afa0SLucas Stach 	data->irq = platform_get_irq(pdev, 0);
134*0136afa0SLucas Stach 	if (data->irq <= 0) {
135*0136afa0SLucas Stach 		dev_err(&pdev->dev, "failed to get irq\n");
136*0136afa0SLucas Stach 		return -ENODEV;
137*0136afa0SLucas Stach 	}
138*0136afa0SLucas Stach 
139*0136afa0SLucas Stach 	data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
140*0136afa0SLucas Stach 	if (IS_ERR(data->ipg_clk)) {
141*0136afa0SLucas Stach 		ret = PTR_ERR(data->ipg_clk);
142*0136afa0SLucas Stach 		if (ret != -EPROBE_DEFER)
143*0136afa0SLucas Stach 			dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
144*0136afa0SLucas Stach 		return ret;
145*0136afa0SLucas Stach 	}
146*0136afa0SLucas Stach 
147*0136afa0SLucas Stach 	raw_spin_lock_init(&data->lock);
148*0136afa0SLucas Stach 
149*0136afa0SLucas Stach 	of_property_read_u32(np, "fsl,irq-groups", &data->irq_groups);
150*0136afa0SLucas Stach 	of_property_read_u32(np, "fsl,channel", &data->channel);
151*0136afa0SLucas Stach 
152*0136afa0SLucas Stach 	if (IS_ENABLED(CONFIG_PM_SLEEP)) {
153*0136afa0SLucas Stach 		data->saved_reg = devm_kzalloc(&pdev->dev,
154*0136afa0SLucas Stach 					sizeof(u32) * data->irq_groups * 2,
155*0136afa0SLucas Stach 					GFP_KERNEL);
156*0136afa0SLucas Stach 		if (!data->saved_reg)
157*0136afa0SLucas Stach 			return -ENOMEM;
158*0136afa0SLucas Stach 	}
159*0136afa0SLucas Stach 
160*0136afa0SLucas Stach 	ret = clk_prepare_enable(data->ipg_clk);
161*0136afa0SLucas Stach 	if (ret) {
162*0136afa0SLucas Stach 		dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
163*0136afa0SLucas Stach 		return ret;
164*0136afa0SLucas Stach 	}
165*0136afa0SLucas Stach 
166*0136afa0SLucas Stach 	/* steer all IRQs into configured channel */
167*0136afa0SLucas Stach 	writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
168*0136afa0SLucas Stach 
169*0136afa0SLucas Stach 	data->domain = irq_domain_add_linear(np, data->irq_groups * 64,
170*0136afa0SLucas Stach 					     &imx_irqsteer_domain_ops, data);
171*0136afa0SLucas Stach 	if (!data->domain) {
172*0136afa0SLucas Stach 		dev_err(&pdev->dev, "failed to create IRQ domain\n");
173*0136afa0SLucas Stach 		clk_disable_unprepare(data->ipg_clk);
174*0136afa0SLucas Stach 		return -ENOMEM;
175*0136afa0SLucas Stach 	}
176*0136afa0SLucas Stach 
177*0136afa0SLucas Stach 	irq_set_chained_handler_and_data(data->irq, imx_irqsteer_irq_handler,
178*0136afa0SLucas Stach 					 data);
179*0136afa0SLucas Stach 
180*0136afa0SLucas Stach 	platform_set_drvdata(pdev, data);
181*0136afa0SLucas Stach 
182*0136afa0SLucas Stach 	return 0;
183*0136afa0SLucas Stach }
184*0136afa0SLucas Stach 
185*0136afa0SLucas Stach static int imx_irqsteer_remove(struct platform_device *pdev)
186*0136afa0SLucas Stach {
187*0136afa0SLucas Stach 	struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);
188*0136afa0SLucas Stach 
189*0136afa0SLucas Stach 	irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
190*0136afa0SLucas Stach 	irq_domain_remove(irqsteer_data->domain);
191*0136afa0SLucas Stach 
192*0136afa0SLucas Stach 	clk_disable_unprepare(irqsteer_data->ipg_clk);
193*0136afa0SLucas Stach 
194*0136afa0SLucas Stach 	return 0;
195*0136afa0SLucas Stach }
196*0136afa0SLucas Stach 
197*0136afa0SLucas Stach #ifdef CONFIG_PM_SLEEP
198*0136afa0SLucas Stach static void imx_irqsteer_save_regs(struct irqsteer_data *data)
199*0136afa0SLucas Stach {
200*0136afa0SLucas Stach 	int i;
201*0136afa0SLucas Stach 
202*0136afa0SLucas Stach 	for (i = 0; i < data->irq_groups * 2; i++)
203*0136afa0SLucas Stach 		data->saved_reg[i] = readl_relaxed(data->regs +
204*0136afa0SLucas Stach 						CHANMASK(i, data->irq_groups));
205*0136afa0SLucas Stach }
206*0136afa0SLucas Stach 
207*0136afa0SLucas Stach static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
208*0136afa0SLucas Stach {
209*0136afa0SLucas Stach 	int i;
210*0136afa0SLucas Stach 
211*0136afa0SLucas Stach 	writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
212*0136afa0SLucas Stach 	for (i = 0; i < data->irq_groups * 2; i++)
213*0136afa0SLucas Stach 		writel_relaxed(data->saved_reg[i],
214*0136afa0SLucas Stach 			       data->regs + CHANMASK(i, data->irq_groups));
215*0136afa0SLucas Stach }
216*0136afa0SLucas Stach 
217*0136afa0SLucas Stach static int imx_irqsteer_suspend(struct device *dev)
218*0136afa0SLucas Stach {
219*0136afa0SLucas Stach 	struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
220*0136afa0SLucas Stach 
221*0136afa0SLucas Stach 	imx_irqsteer_save_regs(irqsteer_data);
222*0136afa0SLucas Stach 	clk_disable_unprepare(irqsteer_data->ipg_clk);
223*0136afa0SLucas Stach 
224*0136afa0SLucas Stach 	return 0;
225*0136afa0SLucas Stach }
226*0136afa0SLucas Stach 
227*0136afa0SLucas Stach static int imx_irqsteer_resume(struct device *dev)
228*0136afa0SLucas Stach {
229*0136afa0SLucas Stach 	struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
230*0136afa0SLucas Stach 	int ret;
231*0136afa0SLucas Stach 
232*0136afa0SLucas Stach 	ret = clk_prepare_enable(irqsteer_data->ipg_clk);
233*0136afa0SLucas Stach 	if (ret) {
234*0136afa0SLucas Stach 		dev_err(dev, "failed to enable ipg clk: %d\n", ret);
235*0136afa0SLucas Stach 		return ret;
236*0136afa0SLucas Stach 	}
237*0136afa0SLucas Stach 	imx_irqsteer_restore_regs(irqsteer_data);
238*0136afa0SLucas Stach 
239*0136afa0SLucas Stach 	return 0;
240*0136afa0SLucas Stach }
241*0136afa0SLucas Stach #endif
242*0136afa0SLucas Stach 
243*0136afa0SLucas Stach static const struct dev_pm_ops imx_irqsteer_pm_ops = {
244*0136afa0SLucas Stach 	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx_irqsteer_suspend, imx_irqsteer_resume)
245*0136afa0SLucas Stach };
246*0136afa0SLucas Stach 
247*0136afa0SLucas Stach static const struct of_device_id imx_irqsteer_dt_ids[] = {
248*0136afa0SLucas Stach 	{ .compatible = "fsl,imx-irqsteer", },
249*0136afa0SLucas Stach 	{},
250*0136afa0SLucas Stach };
251*0136afa0SLucas Stach 
252*0136afa0SLucas Stach static struct platform_driver imx_irqsteer_driver = {
253*0136afa0SLucas Stach 	.driver = {
254*0136afa0SLucas Stach 		.name = "imx-irqsteer",
255*0136afa0SLucas Stach 		.of_match_table = imx_irqsteer_dt_ids,
256*0136afa0SLucas Stach 		.pm = &imx_irqsteer_pm_ops,
257*0136afa0SLucas Stach 	},
258*0136afa0SLucas Stach 	.probe = imx_irqsteer_probe,
259*0136afa0SLucas Stach 	.remove = imx_irqsteer_remove,
260*0136afa0SLucas Stach };
261*0136afa0SLucas Stach builtin_platform_driver(imx_irqsteer_driver);
262