xref: /openbmc/linux/drivers/irqchip/irq-gic-realview.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
28673c1d7SLinus Walleij /*
38673c1d7SLinus Walleij  * Special GIC quirks for the ARM RealView
48673c1d7SLinus Walleij  * Copyright (C) 2015 Linus Walleij
58673c1d7SLinus Walleij  */
68673c1d7SLinus Walleij #include <linux/of.h>
78673c1d7SLinus Walleij #include <linux/regmap.h>
88673c1d7SLinus Walleij #include <linux/mfd/syscon.h>
98673c1d7SLinus Walleij #include <linux/bitops.h>
108673c1d7SLinus Walleij #include <linux/irqchip.h>
118673c1d7SLinus Walleij #include <linux/irqchip/arm-gic.h>
128673c1d7SLinus Walleij 
138673c1d7SLinus Walleij #define REALVIEW_SYS_LOCK_OFFSET	0x20
1482b0a434SLinus Walleij #define REALVIEW_SYS_PLD_CTRL1		0x74
1582b0a434SLinus Walleij #define REALVIEW_EB_REVB_SYS_PLD_CTRL1	0xD8
168673c1d7SLinus Walleij #define VERSATILE_LOCK_VAL		0xA05F
178673c1d7SLinus Walleij #define PLD_INTMODE_MASK		BIT(22)|BIT(23)|BIT(24)
188673c1d7SLinus Walleij #define PLD_INTMODE_LEGACY		0x0
198673c1d7SLinus Walleij #define PLD_INTMODE_NEW_DCC		BIT(22)
208673c1d7SLinus Walleij #define PLD_INTMODE_NEW_NO_DCC		BIT(23)
218673c1d7SLinus Walleij #define PLD_INTMODE_FIQ_ENABLE		BIT(24)
228673c1d7SLinus Walleij 
2382b0a434SLinus Walleij /* For some reason RealView EB Rev B moved this register */
2482b0a434SLinus Walleij static const struct of_device_id syscon_pldset_of_match[] = {
2582b0a434SLinus Walleij 	{
2682b0a434SLinus Walleij 		.compatible = "arm,realview-eb11mp-revb-syscon",
2782b0a434SLinus Walleij 		.data = (void *)REALVIEW_EB_REVB_SYS_PLD_CTRL1,
2882b0a434SLinus Walleij 	},
2982b0a434SLinus Walleij 	{
3082b0a434SLinus Walleij 		.compatible = "arm,realview-eb11mp-revc-syscon",
3182b0a434SLinus Walleij 		.data = (void *)REALVIEW_SYS_PLD_CTRL1,
3282b0a434SLinus Walleij 	},
3382b0a434SLinus Walleij 	{
3482b0a434SLinus Walleij 		.compatible = "arm,realview-eb-syscon",
3582b0a434SLinus Walleij 		.data = (void *)REALVIEW_SYS_PLD_CTRL1,
3682b0a434SLinus Walleij 	},
3782b0a434SLinus Walleij 	{
3882b0a434SLinus Walleij 		.compatible = "arm,realview-pb11mp-syscon",
3982b0a434SLinus Walleij 		.data = (void *)REALVIEW_SYS_PLD_CTRL1,
4082b0a434SLinus Walleij 	},
4182b0a434SLinus Walleij 	{},
4282b0a434SLinus Walleij };
4382b0a434SLinus Walleij 
448673c1d7SLinus Walleij static int __init
realview_gic_of_init(struct device_node * node,struct device_node * parent)458673c1d7SLinus Walleij realview_gic_of_init(struct device_node *node, struct device_node *parent)
468673c1d7SLinus Walleij {
47512f9e79SJulia Lawall 	struct regmap *map;
4882b0a434SLinus Walleij 	struct device_node *np;
4982b0a434SLinus Walleij 	const struct of_device_id *gic_id;
5082b0a434SLinus Walleij 	u32 pld1_ctrl;
5182b0a434SLinus Walleij 
5282b0a434SLinus Walleij 	np = of_find_matching_node_and_match(NULL, syscon_pldset_of_match,
5382b0a434SLinus Walleij 					     &gic_id);
5482b0a434SLinus Walleij 	if (!np)
5582b0a434SLinus Walleij 		return -ENODEV;
5682b0a434SLinus Walleij 	pld1_ctrl = (u32)gic_id->data;
578673c1d7SLinus Walleij 
588673c1d7SLinus Walleij 	/* The PB11MPCore GIC needs to be configured in the syscon */
5982b0a434SLinus Walleij 	map = syscon_node_to_regmap(np);
60*f4b98e31SMiaoqian Lin 	of_node_put(np);
618673c1d7SLinus Walleij 	if (!IS_ERR(map)) {
628673c1d7SLinus Walleij 		/* new irq mode with no DCC */
638673c1d7SLinus Walleij 		regmap_write(map, REALVIEW_SYS_LOCK_OFFSET,
648673c1d7SLinus Walleij 			     VERSATILE_LOCK_VAL);
6582b0a434SLinus Walleij 		regmap_update_bits(map, pld1_ctrl,
668673c1d7SLinus Walleij 				   PLD_INTMODE_NEW_NO_DCC,
678673c1d7SLinus Walleij 				   PLD_INTMODE_MASK);
688673c1d7SLinus Walleij 		regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, 0x0000);
6982b0a434SLinus Walleij 		pr_info("RealView GIC: set up interrupt controller to NEW mode, no DCC\n");
708673c1d7SLinus Walleij 	} else {
7182b0a434SLinus Walleij 		pr_err("RealView GIC setup: could not find syscon\n");
7282b0a434SLinus Walleij 		return -ENODEV;
738673c1d7SLinus Walleij 	}
748673c1d7SLinus Walleij 	return gic_of_init(node, parent);
758673c1d7SLinus Walleij }
768673c1d7SLinus Walleij IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", realview_gic_of_init);
7782b0a434SLinus Walleij IRQCHIP_DECLARE(armeb11mp_gic, "arm,eb11mp-gic", realview_gic_of_init);
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