xref: /openbmc/linux/drivers/irqchip/irq-crossbar.c (revision 3894e9e82dfdc87fa35dc7976e0472d220228826)
196ca848eSSricharan R /*
296ca848eSSricharan R  *  drivers/irqchip/irq-crossbar.c
396ca848eSSricharan R  *
496ca848eSSricharan R  *  Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
596ca848eSSricharan R  *  Author: Sricharan R <r.sricharan@ti.com>
696ca848eSSricharan R  *
796ca848eSSricharan R  * This program is free software; you can redistribute it and/or modify
896ca848eSSricharan R  * it under the terms of the GNU General Public License version 2 as
996ca848eSSricharan R  * published by the Free Software Foundation.
1096ca848eSSricharan R  *
1196ca848eSSricharan R  */
1296ca848eSSricharan R #include <linux/err.h>
1396ca848eSSricharan R #include <linux/io.h>
1496ca848eSSricharan R #include <linux/of_address.h>
1596ca848eSSricharan R #include <linux/of_irq.h>
1696ca848eSSricharan R #include <linux/slab.h>
1796ca848eSSricharan R #include <linux/irqchip/arm-gic.h>
1896ca848eSSricharan R 
1996ca848eSSricharan R #define IRQ_FREE	-1
2096ca848eSSricharan R #define GIC_IRQ_START	32
2196ca848eSSricharan R 
2296ca848eSSricharan R /*
2396ca848eSSricharan R  * @int_max: maximum number of supported interrupts
2496ca848eSSricharan R  * @irq_map: array of interrupts to crossbar number mapping
2596ca848eSSricharan R  * @crossbar_base: crossbar base address
2696ca848eSSricharan R  * @register_offsets: offsets for each irq number
2796ca848eSSricharan R  */
2896ca848eSSricharan R struct crossbar_device {
2996ca848eSSricharan R 	uint int_max;
3096ca848eSSricharan R 	uint *irq_map;
3196ca848eSSricharan R 	void __iomem *crossbar_base;
3296ca848eSSricharan R 	int *register_offsets;
3396ca848eSSricharan R 	void (*write) (int, int);
3496ca848eSSricharan R };
3596ca848eSSricharan R 
3696ca848eSSricharan R static struct crossbar_device *cb;
3796ca848eSSricharan R 
3896ca848eSSricharan R static inline void crossbar_writel(int irq_no, int cb_no)
3996ca848eSSricharan R {
4096ca848eSSricharan R 	writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
4196ca848eSSricharan R }
4296ca848eSSricharan R 
4396ca848eSSricharan R static inline void crossbar_writew(int irq_no, int cb_no)
4496ca848eSSricharan R {
4596ca848eSSricharan R 	writew(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
4696ca848eSSricharan R }
4796ca848eSSricharan R 
4896ca848eSSricharan R static inline void crossbar_writeb(int irq_no, int cb_no)
4996ca848eSSricharan R {
5096ca848eSSricharan R 	writeb(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
5196ca848eSSricharan R }
5296ca848eSSricharan R 
5396ca848eSSricharan R static inline int allocate_free_irq(int cb_no)
5496ca848eSSricharan R {
5596ca848eSSricharan R 	int i;
5696ca848eSSricharan R 
5796ca848eSSricharan R 	for (i = 0; i < cb->int_max; i++) {
5896ca848eSSricharan R 		if (cb->irq_map[i] == IRQ_FREE) {
5996ca848eSSricharan R 			cb->irq_map[i] = cb_no;
6096ca848eSSricharan R 			return i;
6196ca848eSSricharan R 		}
6296ca848eSSricharan R 	}
6396ca848eSSricharan R 
6496ca848eSSricharan R 	return -ENODEV;
6596ca848eSSricharan R }
6696ca848eSSricharan R 
6796ca848eSSricharan R static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
6896ca848eSSricharan R 			       irq_hw_number_t hw)
6996ca848eSSricharan R {
7096ca848eSSricharan R 	cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
7196ca848eSSricharan R 	return 0;
7296ca848eSSricharan R }
7396ca848eSSricharan R 
7496ca848eSSricharan R static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
7596ca848eSSricharan R {
7696ca848eSSricharan R 	irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
7796ca848eSSricharan R 
7896ca848eSSricharan R 	if (hw > GIC_IRQ_START)
7996ca848eSSricharan R 		cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
8096ca848eSSricharan R }
8196ca848eSSricharan R 
8296ca848eSSricharan R static int crossbar_domain_xlate(struct irq_domain *d,
8396ca848eSSricharan R 				 struct device_node *controller,
8496ca848eSSricharan R 				 const u32 *intspec, unsigned int intsize,
8596ca848eSSricharan R 				 unsigned long *out_hwirq,
8696ca848eSSricharan R 				 unsigned int *out_type)
8796ca848eSSricharan R {
8896ca848eSSricharan R 	unsigned long ret;
8996ca848eSSricharan R 
9096ca848eSSricharan R 	ret = allocate_free_irq(intspec[1]);
9196ca848eSSricharan R 
9296ca848eSSricharan R 	if (IS_ERR_VALUE(ret))
9396ca848eSSricharan R 		return ret;
9496ca848eSSricharan R 
9596ca848eSSricharan R 	*out_hwirq = ret + GIC_IRQ_START;
9696ca848eSSricharan R 	return 0;
9796ca848eSSricharan R }
9896ca848eSSricharan R 
9996ca848eSSricharan R const struct irq_domain_ops routable_irq_domain_ops = {
10096ca848eSSricharan R 	.map = crossbar_domain_map,
10196ca848eSSricharan R 	.unmap = crossbar_domain_unmap,
10296ca848eSSricharan R 	.xlate = crossbar_domain_xlate
10396ca848eSSricharan R };
10496ca848eSSricharan R 
10596ca848eSSricharan R static int __init crossbar_of_init(struct device_node *node)
10696ca848eSSricharan R {
10796ca848eSSricharan R 	int i, size, max, reserved = 0, entry;
10896ca848eSSricharan R 	const __be32 *irqsr;
10996ca848eSSricharan R 
110*3894e9e8SDan Carpenter 	cb = kzalloc(sizeof(*cb), GFP_KERNEL);
11196ca848eSSricharan R 
11296ca848eSSricharan R 	if (!cb)
11396ca848eSSricharan R 		return -ENOMEM;
11496ca848eSSricharan R 
11596ca848eSSricharan R 	cb->crossbar_base = of_iomap(node, 0);
11696ca848eSSricharan R 	if (!cb->crossbar_base)
11796ca848eSSricharan R 		goto err1;
11896ca848eSSricharan R 
11996ca848eSSricharan R 	of_property_read_u32(node, "ti,max-irqs", &max);
12096ca848eSSricharan R 	cb->irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
12196ca848eSSricharan R 	if (!cb->irq_map)
12296ca848eSSricharan R 		goto err2;
12396ca848eSSricharan R 
12496ca848eSSricharan R 	cb->int_max = max;
12596ca848eSSricharan R 
12696ca848eSSricharan R 	for (i = 0; i < max; i++)
12796ca848eSSricharan R 		cb->irq_map[i] = IRQ_FREE;
12896ca848eSSricharan R 
12996ca848eSSricharan R 	/* Get and mark reserved irqs */
13096ca848eSSricharan R 	irqsr = of_get_property(node, "ti,irqs-reserved", &size);
13196ca848eSSricharan R 	if (irqsr) {
13296ca848eSSricharan R 		size /= sizeof(__be32);
13396ca848eSSricharan R 
13496ca848eSSricharan R 		for (i = 0; i < size; i++) {
13596ca848eSSricharan R 			of_property_read_u32_index(node,
13696ca848eSSricharan R 						   "ti,irqs-reserved",
13796ca848eSSricharan R 						   i, &entry);
13896ca848eSSricharan R 			if (entry > max) {
13996ca848eSSricharan R 				pr_err("Invalid reserved entry\n");
14096ca848eSSricharan R 				goto err3;
14196ca848eSSricharan R 			}
14296ca848eSSricharan R 			cb->irq_map[entry] = 0;
14396ca848eSSricharan R 		}
14496ca848eSSricharan R 	}
14596ca848eSSricharan R 
14696ca848eSSricharan R 	cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
14796ca848eSSricharan R 	if (!cb->register_offsets)
14896ca848eSSricharan R 		goto err3;
14996ca848eSSricharan R 
15096ca848eSSricharan R 	of_property_read_u32(node, "ti,reg-size", &size);
15196ca848eSSricharan R 
15296ca848eSSricharan R 	switch (size) {
15396ca848eSSricharan R 	case 1:
15496ca848eSSricharan R 		cb->write = crossbar_writeb;
15596ca848eSSricharan R 		break;
15696ca848eSSricharan R 	case 2:
15796ca848eSSricharan R 		cb->write = crossbar_writew;
15896ca848eSSricharan R 		break;
15996ca848eSSricharan R 	case 4:
16096ca848eSSricharan R 		cb->write = crossbar_writel;
16196ca848eSSricharan R 		break;
16296ca848eSSricharan R 	default:
16396ca848eSSricharan R 		pr_err("Invalid reg-size property\n");
16496ca848eSSricharan R 		goto err4;
16596ca848eSSricharan R 		break;
16696ca848eSSricharan R 	}
16796ca848eSSricharan R 
16896ca848eSSricharan R 	/*
16996ca848eSSricharan R 	 * Register offsets are not linear because of the
17096ca848eSSricharan R 	 * reserved irqs. so find and store the offsets once.
17196ca848eSSricharan R 	 */
17296ca848eSSricharan R 	for (i = 0; i < max; i++) {
17396ca848eSSricharan R 		if (!cb->irq_map[i])
17496ca848eSSricharan R 			continue;
17596ca848eSSricharan R 
17696ca848eSSricharan R 		cb->register_offsets[i] = reserved;
17796ca848eSSricharan R 		reserved += size;
17896ca848eSSricharan R 	}
17996ca848eSSricharan R 
18096ca848eSSricharan R 	register_routable_domain_ops(&routable_irq_domain_ops);
18196ca848eSSricharan R 	return 0;
18296ca848eSSricharan R 
18396ca848eSSricharan R err4:
18496ca848eSSricharan R 	kfree(cb->register_offsets);
18596ca848eSSricharan R err3:
18696ca848eSSricharan R 	kfree(cb->irq_map);
18796ca848eSSricharan R err2:
18896ca848eSSricharan R 	iounmap(cb->crossbar_base);
18996ca848eSSricharan R err1:
19096ca848eSSricharan R 	kfree(cb);
19196ca848eSSricharan R 	return -ENOMEM;
19296ca848eSSricharan R }
19396ca848eSSricharan R 
19496ca848eSSricharan R static const struct of_device_id crossbar_match[] __initconst = {
19596ca848eSSricharan R 	{ .compatible = "ti,irq-crossbar" },
19696ca848eSSricharan R 	{}
19796ca848eSSricharan R };
19896ca848eSSricharan R 
19996ca848eSSricharan R int __init irqcrossbar_init(void)
20096ca848eSSricharan R {
20196ca848eSSricharan R 	struct device_node *np;
20296ca848eSSricharan R 	np = of_find_matching_node(NULL, crossbar_match);
20396ca848eSSricharan R 	if (!np)
20496ca848eSSricharan R 		return -ENODEV;
20596ca848eSSricharan R 
20696ca848eSSricharan R 	crossbar_of_init(np);
20796ca848eSSricharan R 	return 0;
20896ca848eSSricharan R }
209