1afc98d90SAlexander Shiyan /* 2afc98d90SAlexander Shiyan * CLPS711X IRQ driver 3afc98d90SAlexander Shiyan * 4afc98d90SAlexander Shiyan * Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru> 5afc98d90SAlexander Shiyan * 6afc98d90SAlexander Shiyan * This program is free software; you can redistribute it and/or modify 7afc98d90SAlexander Shiyan * it under the terms of the GNU General Public License as published by 8afc98d90SAlexander Shiyan * the Free Software Foundation; either version 2 of the License, or 9afc98d90SAlexander Shiyan * (at your option) any later version. 10afc98d90SAlexander Shiyan */ 11afc98d90SAlexander Shiyan 12afc98d90SAlexander Shiyan #include <linux/io.h> 13afc98d90SAlexander Shiyan #include <linux/irq.h> 14afc98d90SAlexander Shiyan #include <linux/irqdomain.h> 15afc98d90SAlexander Shiyan #include <linux/of_address.h> 16afc98d90SAlexander Shiyan #include <linux/of_irq.h> 17afc98d90SAlexander Shiyan #include <linux/slab.h> 18afc98d90SAlexander Shiyan 19afc98d90SAlexander Shiyan #include <asm/exception.h> 20afc98d90SAlexander Shiyan #include <asm/mach/irq.h> 21afc98d90SAlexander Shiyan 22afc98d90SAlexander Shiyan #include "irqchip.h" 23afc98d90SAlexander Shiyan 24afc98d90SAlexander Shiyan #define CLPS711X_INTSR1 (0x0240) 25afc98d90SAlexander Shiyan #define CLPS711X_INTMR1 (0x0280) 26afc98d90SAlexander Shiyan #define CLPS711X_BLEOI (0x0600) 27afc98d90SAlexander Shiyan #define CLPS711X_MCEOI (0x0640) 28afc98d90SAlexander Shiyan #define CLPS711X_TEOI (0x0680) 29afc98d90SAlexander Shiyan #define CLPS711X_TC1EOI (0x06c0) 30afc98d90SAlexander Shiyan #define CLPS711X_TC2EOI (0x0700) 31afc98d90SAlexander Shiyan #define CLPS711X_RTCEOI (0x0740) 32afc98d90SAlexander Shiyan #define CLPS711X_UMSEOI (0x0780) 33afc98d90SAlexander Shiyan #define CLPS711X_COEOI (0x07c0) 34afc98d90SAlexander Shiyan #define CLPS711X_INTSR2 (0x1240) 35afc98d90SAlexander Shiyan #define CLPS711X_INTMR2 (0x1280) 36afc98d90SAlexander Shiyan #define CLPS711X_SRXEOF (0x1600) 37afc98d90SAlexander Shiyan #define CLPS711X_KBDEOI (0x1700) 38afc98d90SAlexander Shiyan #define CLPS711X_INTSR3 (0x2240) 39afc98d90SAlexander Shiyan #define CLPS711X_INTMR3 (0x2280) 40afc98d90SAlexander Shiyan 41afc98d90SAlexander Shiyan static const struct { 42afc98d90SAlexander Shiyan #define CLPS711X_FLAG_EN (1 << 0) 43afc98d90SAlexander Shiyan #define CLPS711X_FLAG_FIQ (1 << 1) 44afc98d90SAlexander Shiyan unsigned int flags; 45afc98d90SAlexander Shiyan phys_addr_t eoi; 46afc98d90SAlexander Shiyan } clps711x_irqs[] = { 47afc98d90SAlexander Shiyan [1] = { CLPS711X_FLAG_FIQ, CLPS711X_BLEOI, }, 48afc98d90SAlexander Shiyan [3] = { CLPS711X_FLAG_FIQ, CLPS711X_MCEOI, }, 49afc98d90SAlexander Shiyan [4] = { CLPS711X_FLAG_EN, CLPS711X_COEOI, }, 50afc98d90SAlexander Shiyan [5] = { CLPS711X_FLAG_EN, }, 51afc98d90SAlexander Shiyan [6] = { CLPS711X_FLAG_EN, }, 52afc98d90SAlexander Shiyan [7] = { CLPS711X_FLAG_EN, }, 53afc98d90SAlexander Shiyan [8] = { CLPS711X_FLAG_EN, CLPS711X_TC1EOI, }, 54afc98d90SAlexander Shiyan [9] = { CLPS711X_FLAG_EN, CLPS711X_TC2EOI, }, 55afc98d90SAlexander Shiyan [10] = { CLPS711X_FLAG_EN, CLPS711X_RTCEOI, }, 56afc98d90SAlexander Shiyan [11] = { CLPS711X_FLAG_EN, CLPS711X_TEOI, }, 57afc98d90SAlexander Shiyan [12] = { CLPS711X_FLAG_EN, }, 58afc98d90SAlexander Shiyan [13] = { CLPS711X_FLAG_EN, }, 59afc98d90SAlexander Shiyan [14] = { CLPS711X_FLAG_EN, CLPS711X_UMSEOI, }, 60afc98d90SAlexander Shiyan [15] = { CLPS711X_FLAG_EN, CLPS711X_SRXEOF, }, 61afc98d90SAlexander Shiyan [16] = { CLPS711X_FLAG_EN, CLPS711X_KBDEOI, }, 62afc98d90SAlexander Shiyan [17] = { CLPS711X_FLAG_EN, }, 63afc98d90SAlexander Shiyan [18] = { CLPS711X_FLAG_EN, }, 64afc98d90SAlexander Shiyan [28] = { CLPS711X_FLAG_EN, }, 65afc98d90SAlexander Shiyan [29] = { CLPS711X_FLAG_EN, }, 66afc98d90SAlexander Shiyan [32] = { CLPS711X_FLAG_FIQ, }, 67afc98d90SAlexander Shiyan }; 68afc98d90SAlexander Shiyan 69afc98d90SAlexander Shiyan static struct { 70afc98d90SAlexander Shiyan void __iomem *base; 71afc98d90SAlexander Shiyan void __iomem *intmr[3]; 72afc98d90SAlexander Shiyan void __iomem *intsr[3]; 73afc98d90SAlexander Shiyan struct irq_domain *domain; 74afc98d90SAlexander Shiyan struct irq_domain_ops ops; 75afc98d90SAlexander Shiyan } *clps711x_intc; 76afc98d90SAlexander Shiyan 77afc98d90SAlexander Shiyan static asmlinkage void __exception_irq_entry clps711x_irqh(struct pt_regs *regs) 78afc98d90SAlexander Shiyan { 79*a8e10cb7SMarc Zyngier u32 irqstat; 80afc98d90SAlexander Shiyan 81afc98d90SAlexander Shiyan do { 82afc98d90SAlexander Shiyan irqstat = readw_relaxed(clps711x_intc->intmr[0]) & 83afc98d90SAlexander Shiyan readw_relaxed(clps711x_intc->intsr[0]); 84*a8e10cb7SMarc Zyngier if (irqstat) 85*a8e10cb7SMarc Zyngier handle_domain_irq(clps711x_intc->domain, 86*a8e10cb7SMarc Zyngier fls(irqstat) - 1, regs); 87afc98d90SAlexander Shiyan 88afc98d90SAlexander Shiyan irqstat = readw_relaxed(clps711x_intc->intmr[1]) & 89afc98d90SAlexander Shiyan readw_relaxed(clps711x_intc->intsr[1]); 90*a8e10cb7SMarc Zyngier if (irqstat) 91*a8e10cb7SMarc Zyngier handle_domain_irq(clps711x_intc->domain, 92*a8e10cb7SMarc Zyngier fls(irqstat) - 1 + 16, regs); 93afc98d90SAlexander Shiyan } while (irqstat); 94afc98d90SAlexander Shiyan } 95afc98d90SAlexander Shiyan 96afc98d90SAlexander Shiyan static void clps711x_intc_eoi(struct irq_data *d) 97afc98d90SAlexander Shiyan { 98afc98d90SAlexander Shiyan irq_hw_number_t hwirq = irqd_to_hwirq(d); 99afc98d90SAlexander Shiyan 100afc98d90SAlexander Shiyan writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi); 101afc98d90SAlexander Shiyan } 102afc98d90SAlexander Shiyan 103afc98d90SAlexander Shiyan static void clps711x_intc_mask(struct irq_data *d) 104afc98d90SAlexander Shiyan { 105afc98d90SAlexander Shiyan irq_hw_number_t hwirq = irqd_to_hwirq(d); 106afc98d90SAlexander Shiyan void __iomem *intmr = clps711x_intc->intmr[hwirq / 16]; 107afc98d90SAlexander Shiyan u32 tmp; 108afc98d90SAlexander Shiyan 109afc98d90SAlexander Shiyan tmp = readl_relaxed(intmr); 110afc98d90SAlexander Shiyan tmp &= ~(1 << (hwirq % 16)); 111afc98d90SAlexander Shiyan writel_relaxed(tmp, intmr); 112afc98d90SAlexander Shiyan } 113afc98d90SAlexander Shiyan 114afc98d90SAlexander Shiyan static void clps711x_intc_unmask(struct irq_data *d) 115afc98d90SAlexander Shiyan { 116afc98d90SAlexander Shiyan irq_hw_number_t hwirq = irqd_to_hwirq(d); 117afc98d90SAlexander Shiyan void __iomem *intmr = clps711x_intc->intmr[hwirq / 16]; 118afc98d90SAlexander Shiyan u32 tmp; 119afc98d90SAlexander Shiyan 120afc98d90SAlexander Shiyan tmp = readl_relaxed(intmr); 121afc98d90SAlexander Shiyan tmp |= 1 << (hwirq % 16); 122afc98d90SAlexander Shiyan writel_relaxed(tmp, intmr); 123afc98d90SAlexander Shiyan } 124afc98d90SAlexander Shiyan 125afc98d90SAlexander Shiyan static struct irq_chip clps711x_intc_chip = { 126afc98d90SAlexander Shiyan .name = "clps711x-intc", 127afc98d90SAlexander Shiyan .irq_eoi = clps711x_intc_eoi, 128afc98d90SAlexander Shiyan .irq_mask = clps711x_intc_mask, 129afc98d90SAlexander Shiyan .irq_unmask = clps711x_intc_unmask, 130afc98d90SAlexander Shiyan }; 131afc98d90SAlexander Shiyan 132afc98d90SAlexander Shiyan static int __init clps711x_intc_irq_map(struct irq_domain *h, unsigned int virq, 133afc98d90SAlexander Shiyan irq_hw_number_t hw) 134afc98d90SAlexander Shiyan { 135afc98d90SAlexander Shiyan irq_flow_handler_t handler = handle_level_irq; 136afc98d90SAlexander Shiyan unsigned int flags = IRQF_VALID | IRQF_PROBE; 137afc98d90SAlexander Shiyan 138afc98d90SAlexander Shiyan if (!clps711x_irqs[hw].flags) 139afc98d90SAlexander Shiyan return 0; 140afc98d90SAlexander Shiyan 141afc98d90SAlexander Shiyan if (clps711x_irqs[hw].flags & CLPS711X_FLAG_FIQ) { 142afc98d90SAlexander Shiyan handler = handle_bad_irq; 143afc98d90SAlexander Shiyan flags |= IRQF_NOAUTOEN; 144afc98d90SAlexander Shiyan } else if (clps711x_irqs[hw].eoi) { 145afc98d90SAlexander Shiyan handler = handle_fasteoi_irq; 146afc98d90SAlexander Shiyan } 147afc98d90SAlexander Shiyan 148afc98d90SAlexander Shiyan /* Clear down pending interrupt */ 149afc98d90SAlexander Shiyan if (clps711x_irqs[hw].eoi) 150afc98d90SAlexander Shiyan writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi); 151afc98d90SAlexander Shiyan 152afc98d90SAlexander Shiyan irq_set_chip_and_handler(virq, &clps711x_intc_chip, handler); 153afc98d90SAlexander Shiyan set_irq_flags(virq, flags); 154afc98d90SAlexander Shiyan 155afc98d90SAlexander Shiyan return 0; 156afc98d90SAlexander Shiyan } 157afc98d90SAlexander Shiyan 158afc98d90SAlexander Shiyan static int __init _clps711x_intc_init(struct device_node *np, 159afc98d90SAlexander Shiyan phys_addr_t base, resource_size_t size) 160afc98d90SAlexander Shiyan { 161afc98d90SAlexander Shiyan int err; 162afc98d90SAlexander Shiyan 163afc98d90SAlexander Shiyan clps711x_intc = kzalloc(sizeof(*clps711x_intc), GFP_KERNEL); 164afc98d90SAlexander Shiyan if (!clps711x_intc) 165afc98d90SAlexander Shiyan return -ENOMEM; 166afc98d90SAlexander Shiyan 167afc98d90SAlexander Shiyan clps711x_intc->base = ioremap(base, size); 168afc98d90SAlexander Shiyan if (!clps711x_intc->base) { 169afc98d90SAlexander Shiyan err = -ENOMEM; 170afc98d90SAlexander Shiyan goto out_kfree; 171afc98d90SAlexander Shiyan } 172afc98d90SAlexander Shiyan 173afc98d90SAlexander Shiyan clps711x_intc->intsr[0] = clps711x_intc->base + CLPS711X_INTSR1; 174afc98d90SAlexander Shiyan clps711x_intc->intmr[0] = clps711x_intc->base + CLPS711X_INTMR1; 175afc98d90SAlexander Shiyan clps711x_intc->intsr[1] = clps711x_intc->base + CLPS711X_INTSR2; 176afc98d90SAlexander Shiyan clps711x_intc->intmr[1] = clps711x_intc->base + CLPS711X_INTMR2; 177afc98d90SAlexander Shiyan clps711x_intc->intsr[2] = clps711x_intc->base + CLPS711X_INTSR3; 178afc98d90SAlexander Shiyan clps711x_intc->intmr[2] = clps711x_intc->base + CLPS711X_INTMR3; 179afc98d90SAlexander Shiyan 180afc98d90SAlexander Shiyan /* Mask all interrupts */ 181afc98d90SAlexander Shiyan writel_relaxed(0, clps711x_intc->intmr[0]); 182afc98d90SAlexander Shiyan writel_relaxed(0, clps711x_intc->intmr[1]); 183afc98d90SAlexander Shiyan writel_relaxed(0, clps711x_intc->intmr[2]); 184afc98d90SAlexander Shiyan 185afc98d90SAlexander Shiyan err = irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs), numa_node_id()); 186afc98d90SAlexander Shiyan if (IS_ERR_VALUE(err)) 187afc98d90SAlexander Shiyan goto out_iounmap; 188afc98d90SAlexander Shiyan 189afc98d90SAlexander Shiyan clps711x_intc->ops.map = clps711x_intc_irq_map; 190afc98d90SAlexander Shiyan clps711x_intc->ops.xlate = irq_domain_xlate_onecell; 191afc98d90SAlexander Shiyan clps711x_intc->domain = 192afc98d90SAlexander Shiyan irq_domain_add_legacy(np, ARRAY_SIZE(clps711x_irqs), 193afc98d90SAlexander Shiyan 0, 0, &clps711x_intc->ops, NULL); 194afc98d90SAlexander Shiyan if (!clps711x_intc->domain) { 195afc98d90SAlexander Shiyan err = -ENOMEM; 196afc98d90SAlexander Shiyan goto out_irqfree; 197afc98d90SAlexander Shiyan } 198afc98d90SAlexander Shiyan 199afc98d90SAlexander Shiyan irq_set_default_host(clps711x_intc->domain); 200afc98d90SAlexander Shiyan set_handle_irq(clps711x_irqh); 201afc98d90SAlexander Shiyan 202afc98d90SAlexander Shiyan #ifdef CONFIG_FIQ 203afc98d90SAlexander Shiyan init_FIQ(0); 204afc98d90SAlexander Shiyan #endif 205afc98d90SAlexander Shiyan 206afc98d90SAlexander Shiyan return 0; 207afc98d90SAlexander Shiyan 208afc98d90SAlexander Shiyan out_irqfree: 209afc98d90SAlexander Shiyan irq_free_descs(0, ARRAY_SIZE(clps711x_irqs)); 210afc98d90SAlexander Shiyan 211afc98d90SAlexander Shiyan out_iounmap: 212afc98d90SAlexander Shiyan iounmap(clps711x_intc->base); 213afc98d90SAlexander Shiyan 214afc98d90SAlexander Shiyan out_kfree: 215afc98d90SAlexander Shiyan kfree(clps711x_intc); 216afc98d90SAlexander Shiyan 217afc98d90SAlexander Shiyan return err; 218afc98d90SAlexander Shiyan } 219afc98d90SAlexander Shiyan 220afc98d90SAlexander Shiyan void __init clps711x_intc_init(phys_addr_t base, resource_size_t size) 221afc98d90SAlexander Shiyan { 222afc98d90SAlexander Shiyan BUG_ON(_clps711x_intc_init(NULL, base, size)); 223afc98d90SAlexander Shiyan } 224afc98d90SAlexander Shiyan 225afc98d90SAlexander Shiyan #ifdef CONFIG_IRQCHIP 226afc98d90SAlexander Shiyan static int __init clps711x_intc_init_dt(struct device_node *np, 227afc98d90SAlexander Shiyan struct device_node *parent) 228afc98d90SAlexander Shiyan { 229afc98d90SAlexander Shiyan struct resource res; 230afc98d90SAlexander Shiyan int err; 231afc98d90SAlexander Shiyan 232afc98d90SAlexander Shiyan err = of_address_to_resource(np, 0, &res); 233afc98d90SAlexander Shiyan if (err) 234afc98d90SAlexander Shiyan return err; 235afc98d90SAlexander Shiyan 236afc98d90SAlexander Shiyan return _clps711x_intc_init(np, res.start, resource_size(&res)); 237afc98d90SAlexander Shiyan } 238afc98d90SAlexander Shiyan IRQCHIP_DECLARE(clps711x, "cirrus,clps711x-intc", clps711x_intc_init_dt); 239afc98d90SAlexander Shiyan #endif 240