xref: /openbmc/linux/drivers/irqchip/irq-aspeed-i2c-ic.c (revision 7bdeb7f52b1b193bb50fc6d01c6110ba50bafb5b)
1f48e699dSBrendan Higgins /*
2f48e699dSBrendan Higgins  *  Aspeed 24XX/25XX I2C Interrupt Controller.
3f48e699dSBrendan Higgins  *
4f48e699dSBrendan Higgins  *  Copyright (C) 2012-2017 ASPEED Technology Inc.
5f48e699dSBrendan Higgins  *  Copyright 2017 IBM Corporation
6f48e699dSBrendan Higgins  *  Copyright 2017 Google, Inc.
7f48e699dSBrendan Higgins  *
8f48e699dSBrendan Higgins  *  This program is free software; you can redistribute it and/or modify
9f48e699dSBrendan Higgins  *  it under the terms of the GNU General Public License version 2 as
10f48e699dSBrendan Higgins  *  published by the Free Software Foundation.
11f48e699dSBrendan Higgins  */
12f48e699dSBrendan Higgins 
13f48e699dSBrendan Higgins #include <linux/irq.h>
14f48e699dSBrendan Higgins #include <linux/irqchip.h>
15f48e699dSBrendan Higgins #include <linux/irqchip/chained_irq.h>
16f48e699dSBrendan Higgins #include <linux/irqdomain.h>
17f48e699dSBrendan Higgins #include <linux/of_address.h>
18f48e699dSBrendan Higgins #include <linux/of_irq.h>
19f48e699dSBrendan Higgins #include <linux/io.h>
20f48e699dSBrendan Higgins 
21f48e699dSBrendan Higgins 
22f48e699dSBrendan Higgins #define ASPEED_I2C_IC_NUM_BUS 14
23f48e699dSBrendan Higgins 
24f48e699dSBrendan Higgins struct aspeed_i2c_ic {
25f48e699dSBrendan Higgins 	void __iomem		*base;
26f48e699dSBrendan Higgins 	int			parent_irq;
27f48e699dSBrendan Higgins 	struct irq_domain	*irq_domain;
28f48e699dSBrendan Higgins };
29f48e699dSBrendan Higgins 
30f48e699dSBrendan Higgins /*
31f48e699dSBrendan Higgins  * The aspeed chip provides a single hardware interrupt for all of the I2C
32f48e699dSBrendan Higgins  * busses, so we use a dummy interrupt chip to translate this single interrupt
33f48e699dSBrendan Higgins  * into multiple interrupts, each associated with a single I2C bus.
34f48e699dSBrendan Higgins  */
35f48e699dSBrendan Higgins static void aspeed_i2c_ic_irq_handler(struct irq_desc *desc)
36f48e699dSBrendan Higgins {
37f48e699dSBrendan Higgins 	struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc);
38f48e699dSBrendan Higgins 	struct irq_chip *chip = irq_desc_get_chip(desc);
39f48e699dSBrendan Higgins 	unsigned long bit, status;
40f48e699dSBrendan Higgins 	unsigned int bus_irq;
41f48e699dSBrendan Higgins 
42f48e699dSBrendan Higgins 	chained_irq_enter(chip, desc);
43f48e699dSBrendan Higgins 	status = readl(i2c_ic->base);
44f48e699dSBrendan Higgins 	for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS) {
45f48e699dSBrendan Higgins 		bus_irq = irq_find_mapping(i2c_ic->irq_domain, bit);
46f48e699dSBrendan Higgins 		generic_handle_irq(bus_irq);
47f48e699dSBrendan Higgins 	}
48f48e699dSBrendan Higgins 	chained_irq_exit(chip, desc);
49f48e699dSBrendan Higgins }
50f48e699dSBrendan Higgins 
51f48e699dSBrendan Higgins /*
52f48e699dSBrendan Higgins  * Set simple handler and mark IRQ as valid. Nothing interesting to do here
53f48e699dSBrendan Higgins  * since we are using a dummy interrupt chip.
54f48e699dSBrendan Higgins  */
55f48e699dSBrendan Higgins static int aspeed_i2c_ic_map_irq_domain(struct irq_domain *domain,
56f48e699dSBrendan Higgins 					unsigned int irq, irq_hw_number_t hwirq)
57f48e699dSBrendan Higgins {
58f48e699dSBrendan Higgins 	irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq);
59f48e699dSBrendan Higgins 	irq_set_chip_data(irq, domain->host_data);
60f48e699dSBrendan Higgins 
61f48e699dSBrendan Higgins 	return 0;
62f48e699dSBrendan Higgins }
63f48e699dSBrendan Higgins 
64f48e699dSBrendan Higgins static const struct irq_domain_ops aspeed_i2c_ic_irq_domain_ops = {
65f48e699dSBrendan Higgins 	.map = aspeed_i2c_ic_map_irq_domain,
66f48e699dSBrendan Higgins };
67f48e699dSBrendan Higgins 
68f48e699dSBrendan Higgins static int __init aspeed_i2c_ic_of_init(struct device_node *node,
69f48e699dSBrendan Higgins 					struct device_node *parent)
70f48e699dSBrendan Higgins {
71f48e699dSBrendan Higgins 	struct aspeed_i2c_ic *i2c_ic;
72f48e699dSBrendan Higgins 	int ret = 0;
73f48e699dSBrendan Higgins 
74f48e699dSBrendan Higgins 	i2c_ic = kzalloc(sizeof(*i2c_ic), GFP_KERNEL);
75f48e699dSBrendan Higgins 	if (!i2c_ic)
76f48e699dSBrendan Higgins 		return -ENOMEM;
77f48e699dSBrendan Higgins 
78f48e699dSBrendan Higgins 	i2c_ic->base = of_iomap(node, 0);
79*7bdeb7f5SWei Yongjun 	if (!i2c_ic->base) {
80*7bdeb7f5SWei Yongjun 		ret = -ENOMEM;
81f48e699dSBrendan Higgins 		goto err_free_ic;
82f48e699dSBrendan Higgins 	}
83f48e699dSBrendan Higgins 
84f48e699dSBrendan Higgins 	i2c_ic->parent_irq = irq_of_parse_and_map(node, 0);
85f48e699dSBrendan Higgins 	if (i2c_ic->parent_irq < 0) {
86f48e699dSBrendan Higgins 		ret = i2c_ic->parent_irq;
87f48e699dSBrendan Higgins 		goto err_iounmap;
88f48e699dSBrendan Higgins 	}
89f48e699dSBrendan Higgins 
90f48e699dSBrendan Higgins 	i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
91f48e699dSBrendan Higgins 						   &aspeed_i2c_ic_irq_domain_ops,
92f48e699dSBrendan Higgins 						   NULL);
93f48e699dSBrendan Higgins 	if (!i2c_ic->irq_domain) {
94f48e699dSBrendan Higgins 		ret = -ENOMEM;
95f48e699dSBrendan Higgins 		goto err_iounmap;
96f48e699dSBrendan Higgins 	}
97f48e699dSBrendan Higgins 
98f48e699dSBrendan Higgins 	i2c_ic->irq_domain->name = "aspeed-i2c-domain";
99f48e699dSBrendan Higgins 
100f48e699dSBrendan Higgins 	irq_set_chained_handler_and_data(i2c_ic->parent_irq,
101f48e699dSBrendan Higgins 					 aspeed_i2c_ic_irq_handler, i2c_ic);
102f48e699dSBrendan Higgins 
103f48e699dSBrendan Higgins 	pr_info("i2c controller registered, irq %d\n", i2c_ic->parent_irq);
104f48e699dSBrendan Higgins 
105f48e699dSBrendan Higgins 	return 0;
106f48e699dSBrendan Higgins 
107f48e699dSBrendan Higgins err_iounmap:
108f48e699dSBrendan Higgins 	iounmap(i2c_ic->base);
109f48e699dSBrendan Higgins err_free_ic:
110f48e699dSBrendan Higgins 	kfree(i2c_ic);
111f48e699dSBrendan Higgins 	return ret;
112f48e699dSBrendan Higgins }
113f48e699dSBrendan Higgins 
114f48e699dSBrendan Higgins IRQCHIP_DECLARE(ast2400_i2c_ic, "aspeed,ast2400-i2c-ic", aspeed_i2c_ic_of_init);
115f48e699dSBrendan Higgins IRQCHIP_DECLARE(ast2500_i2c_ic, "aspeed,ast2500-i2c-ic", aspeed_i2c_ic_of_init);
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