1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Apple DART page table allocator. 4 * 5 * Copyright (C) 2022 The Asahi Linux Contributors 6 * 7 * Based on io-pgtable-arm. 8 * 9 * Copyright (C) 2014 ARM Limited 10 * 11 * Author: Will Deacon <will.deacon@arm.com> 12 */ 13 14 #define pr_fmt(fmt) "dart io-pgtable: " fmt 15 16 #include <linux/atomic.h> 17 #include <linux/bitfield.h> 18 #include <linux/bitops.h> 19 #include <linux/io-pgtable.h> 20 #include <linux/kernel.h> 21 #include <linux/sizes.h> 22 #include <linux/slab.h> 23 #include <linux/types.h> 24 25 #include <asm/barrier.h> 26 27 #define DART1_MAX_ADDR_BITS 36 28 29 #define DART_MAX_TABLES 4 30 #define DART_LEVELS 2 31 32 /* Struct accessors */ 33 #define io_pgtable_to_data(x) \ 34 container_of((x), struct dart_io_pgtable, iop) 35 36 #define io_pgtable_ops_to_data(x) \ 37 io_pgtable_to_data(io_pgtable_ops_to_pgtable(x)) 38 39 #define DART_GRANULE(d) \ 40 (sizeof(dart_iopte) << (d)->bits_per_level) 41 #define DART_PTES_PER_TABLE(d) \ 42 (DART_GRANULE(d) >> ilog2(sizeof(dart_iopte))) 43 44 #define APPLE_DART_PTE_SUBPAGE_START GENMASK_ULL(63, 52) 45 #define APPLE_DART_PTE_SUBPAGE_END GENMASK_ULL(51, 40) 46 47 #define APPLE_DART1_PADDR_MASK GENMASK_ULL(35, 12) 48 49 /* Apple DART1 protection bits */ 50 #define APPLE_DART1_PTE_PROT_NO_READ BIT(8) 51 #define APPLE_DART1_PTE_PROT_NO_WRITE BIT(7) 52 #define APPLE_DART1_PTE_PROT_SP_DIS BIT(1) 53 54 /* marks PTE as valid */ 55 #define APPLE_DART_PTE_VALID BIT(0) 56 57 /* IOPTE accessors */ 58 #define iopte_deref(pte, d) __va(iopte_to_paddr(pte, d)) 59 60 struct dart_io_pgtable { 61 struct io_pgtable iop; 62 63 int tbl_bits; 64 int bits_per_level; 65 66 void *pgd[DART_MAX_TABLES]; 67 }; 68 69 typedef u64 dart_iopte; 70 71 72 static dart_iopte paddr_to_iopte(phys_addr_t paddr, 73 struct dart_io_pgtable *data) 74 { 75 return paddr & APPLE_DART1_PADDR_MASK; 76 } 77 78 static phys_addr_t iopte_to_paddr(dart_iopte pte, 79 struct dart_io_pgtable *data) 80 { 81 return pte & APPLE_DART1_PADDR_MASK; 82 } 83 84 static void *__dart_alloc_pages(size_t size, gfp_t gfp, 85 struct io_pgtable_cfg *cfg) 86 { 87 int order = get_order(size); 88 struct page *p; 89 90 VM_BUG_ON((gfp & __GFP_HIGHMEM)); 91 p = alloc_pages(gfp | __GFP_ZERO, order); 92 if (!p) 93 return NULL; 94 95 return page_address(p); 96 } 97 98 static int dart_init_pte(struct dart_io_pgtable *data, 99 unsigned long iova, phys_addr_t paddr, 100 dart_iopte prot, int num_entries, 101 dart_iopte *ptep) 102 { 103 int i; 104 dart_iopte pte = prot; 105 size_t sz = data->iop.cfg.pgsize_bitmap; 106 107 for (i = 0; i < num_entries; i++) 108 if (ptep[i] & APPLE_DART_PTE_VALID) { 109 /* We require an unmap first */ 110 WARN_ON(ptep[i] & APPLE_DART_PTE_VALID); 111 return -EEXIST; 112 } 113 114 /* subpage protection: always allow access to the entire page */ 115 pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_START, 0); 116 pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_END, 0xfff); 117 118 pte |= APPLE_DART1_PTE_PROT_SP_DIS; 119 pte |= APPLE_DART_PTE_VALID; 120 121 for (i = 0; i < num_entries; i++) 122 ptep[i] = pte | paddr_to_iopte(paddr + i * sz, data); 123 124 return 0; 125 } 126 127 static dart_iopte dart_install_table(dart_iopte *table, 128 dart_iopte *ptep, 129 dart_iopte curr, 130 struct dart_io_pgtable *data) 131 { 132 dart_iopte old, new; 133 134 new = paddr_to_iopte(__pa(table), data) | APPLE_DART_PTE_VALID; 135 136 /* 137 * Ensure the table itself is visible before its PTE can be. 138 * Whilst we could get away with cmpxchg64_release below, this 139 * doesn't have any ordering semantics when !CONFIG_SMP. 140 */ 141 dma_wmb(); 142 143 old = cmpxchg64_relaxed(ptep, curr, new); 144 145 return old; 146 } 147 148 static int dart_get_table(struct dart_io_pgtable *data, unsigned long iova) 149 { 150 return (iova >> (3 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 151 ((1 << data->tbl_bits) - 1); 152 } 153 154 static int dart_get_l1_index(struct dart_io_pgtable *data, unsigned long iova) 155 { 156 157 return (iova >> (2 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 158 ((1 << data->bits_per_level) - 1); 159 } 160 161 static int dart_get_l2_index(struct dart_io_pgtable *data, unsigned long iova) 162 { 163 164 return (iova >> (data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 165 ((1 << data->bits_per_level) - 1); 166 } 167 168 static dart_iopte *dart_get_l2(struct dart_io_pgtable *data, unsigned long iova) 169 { 170 dart_iopte pte, *ptep; 171 int tbl = dart_get_table(data, iova); 172 173 ptep = data->pgd[tbl]; 174 if (!ptep) 175 return NULL; 176 177 ptep += dart_get_l1_index(data, iova); 178 pte = READ_ONCE(*ptep); 179 180 /* Valid entry? */ 181 if (!pte) 182 return NULL; 183 184 /* Deref to get level 2 table */ 185 return iopte_deref(pte, data); 186 } 187 188 static dart_iopte dart_prot_to_pte(struct dart_io_pgtable *data, 189 int prot) 190 { 191 dart_iopte pte = 0; 192 193 if (!(prot & IOMMU_WRITE)) 194 pte |= APPLE_DART1_PTE_PROT_NO_WRITE; 195 if (!(prot & IOMMU_READ)) 196 pte |= APPLE_DART1_PTE_PROT_NO_READ; 197 198 return pte; 199 } 200 201 static int dart_map_pages(struct io_pgtable_ops *ops, unsigned long iova, 202 phys_addr_t paddr, size_t pgsize, size_t pgcount, 203 int iommu_prot, gfp_t gfp, size_t *mapped) 204 { 205 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 206 struct io_pgtable_cfg *cfg = &data->iop.cfg; 207 size_t tblsz = DART_GRANULE(data); 208 int ret = 0, tbl, num_entries, max_entries, map_idx_start; 209 dart_iopte pte, *cptep, *ptep; 210 dart_iopte prot; 211 212 if (WARN_ON(pgsize != cfg->pgsize_bitmap)) 213 return -EINVAL; 214 215 if (WARN_ON(paddr >> cfg->oas)) 216 return -ERANGE; 217 218 /* If no access, then nothing to do */ 219 if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE))) 220 return 0; 221 222 tbl = dart_get_table(data, iova); 223 224 ptep = data->pgd[tbl]; 225 ptep += dart_get_l1_index(data, iova); 226 pte = READ_ONCE(*ptep); 227 228 /* no L2 table present */ 229 if (!pte) { 230 cptep = __dart_alloc_pages(tblsz, gfp, cfg); 231 if (!cptep) 232 return -ENOMEM; 233 234 pte = dart_install_table(cptep, ptep, 0, data); 235 if (pte) 236 free_pages((unsigned long)cptep, get_order(tblsz)); 237 238 /* L2 table is present (now) */ 239 pte = READ_ONCE(*ptep); 240 } 241 242 ptep = iopte_deref(pte, data); 243 244 /* install a leaf entries into L2 table */ 245 prot = dart_prot_to_pte(data, iommu_prot); 246 map_idx_start = dart_get_l2_index(data, iova); 247 max_entries = DART_PTES_PER_TABLE(data) - map_idx_start; 248 num_entries = min_t(int, pgcount, max_entries); 249 ptep += map_idx_start; 250 ret = dart_init_pte(data, iova, paddr, prot, num_entries, ptep); 251 if (!ret && mapped) 252 *mapped += num_entries * pgsize; 253 254 /* 255 * Synchronise all PTE updates for the new mapping before there's 256 * a chance for anything to kick off a table walk for the new iova. 257 */ 258 wmb(); 259 260 return ret; 261 } 262 263 static size_t dart_unmap_pages(struct io_pgtable_ops *ops, unsigned long iova, 264 size_t pgsize, size_t pgcount, 265 struct iommu_iotlb_gather *gather) 266 { 267 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 268 struct io_pgtable_cfg *cfg = &data->iop.cfg; 269 int i = 0, num_entries, max_entries, unmap_idx_start; 270 dart_iopte pte, *ptep; 271 272 if (WARN_ON(pgsize != cfg->pgsize_bitmap || !pgcount)) 273 return 0; 274 275 ptep = dart_get_l2(data, iova); 276 277 /* Valid L2 IOPTE pointer? */ 278 if (WARN_ON(!ptep)) 279 return 0; 280 281 unmap_idx_start = dart_get_l2_index(data, iova); 282 ptep += unmap_idx_start; 283 284 max_entries = DART_PTES_PER_TABLE(data) - unmap_idx_start; 285 num_entries = min_t(int, pgcount, max_entries); 286 287 while (i < num_entries) { 288 pte = READ_ONCE(*ptep); 289 if (WARN_ON(!pte)) 290 break; 291 292 /* clear pte */ 293 *ptep = 0; 294 295 if (!iommu_iotlb_gather_queued(gather)) 296 io_pgtable_tlb_add_page(&data->iop, gather, 297 iova + i * pgsize, pgsize); 298 299 ptep++; 300 i++; 301 } 302 303 return i * pgsize; 304 } 305 306 static phys_addr_t dart_iova_to_phys(struct io_pgtable_ops *ops, 307 unsigned long iova) 308 { 309 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 310 dart_iopte pte, *ptep; 311 312 ptep = dart_get_l2(data, iova); 313 314 /* Valid L2 IOPTE pointer? */ 315 if (!ptep) 316 return 0; 317 318 ptep += dart_get_l2_index(data, iova); 319 320 pte = READ_ONCE(*ptep); 321 /* Found translation */ 322 if (pte) { 323 iova &= (data->iop.cfg.pgsize_bitmap - 1); 324 return iopte_to_paddr(pte, data) | iova; 325 } 326 327 /* Ran out of page tables to walk */ 328 return 0; 329 } 330 331 static struct dart_io_pgtable * 332 dart_alloc_pgtable(struct io_pgtable_cfg *cfg) 333 { 334 struct dart_io_pgtable *data; 335 int tbl_bits, bits_per_level, va_bits, pg_shift; 336 337 pg_shift = __ffs(cfg->pgsize_bitmap); 338 bits_per_level = pg_shift - ilog2(sizeof(dart_iopte)); 339 340 va_bits = cfg->ias - pg_shift; 341 342 tbl_bits = max_t(int, 0, va_bits - (bits_per_level * DART_LEVELS)); 343 if ((1 << tbl_bits) > DART_MAX_TABLES) 344 return NULL; 345 346 data = kzalloc(sizeof(*data), GFP_KERNEL); 347 if (!data) 348 return NULL; 349 350 data->tbl_bits = tbl_bits; 351 data->bits_per_level = bits_per_level; 352 353 data->iop.ops = (struct io_pgtable_ops) { 354 .map_pages = dart_map_pages, 355 .unmap_pages = dart_unmap_pages, 356 .iova_to_phys = dart_iova_to_phys, 357 }; 358 359 return data; 360 } 361 362 static struct io_pgtable * 363 apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) 364 { 365 struct dart_io_pgtable *data; 366 int i; 367 368 if (!cfg->coherent_walk) 369 return NULL; 370 371 if (cfg->oas > DART1_MAX_ADDR_BITS) 372 return NULL; 373 374 if (cfg->ias > cfg->oas) 375 return NULL; 376 377 if (!(cfg->pgsize_bitmap == SZ_4K || cfg->pgsize_bitmap == SZ_16K)) 378 return NULL; 379 380 data = dart_alloc_pgtable(cfg); 381 if (!data) 382 return NULL; 383 384 cfg->apple_dart_cfg.n_ttbrs = 1 << data->tbl_bits; 385 386 for (i = 0; i < cfg->apple_dart_cfg.n_ttbrs; ++i) { 387 data->pgd[i] = __dart_alloc_pages(DART_GRANULE(data), GFP_KERNEL, 388 cfg); 389 if (!data->pgd[i]) 390 goto out_free_data; 391 cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]); 392 } 393 394 return &data->iop; 395 396 out_free_data: 397 while (--i >= 0) 398 free_pages((unsigned long)data->pgd[i], 399 get_order(DART_GRANULE(data))); 400 kfree(data); 401 return NULL; 402 } 403 404 static void apple_dart_free_pgtable(struct io_pgtable *iop) 405 { 406 struct dart_io_pgtable *data = io_pgtable_to_data(iop); 407 dart_iopte *ptep, *end; 408 int i; 409 410 for (i = 0; i < (1 << data->tbl_bits) && data->pgd[i]; ++i) { 411 ptep = data->pgd[i]; 412 end = (void *)ptep + DART_GRANULE(data); 413 414 while (ptep != end) { 415 dart_iopte pte = *ptep++; 416 417 if (pte) { 418 unsigned long page = 419 (unsigned long)iopte_deref(pte, data); 420 421 free_pages(page, get_order(DART_GRANULE(data))); 422 } 423 } 424 free_pages((unsigned long)data->pgd[i], 425 get_order(DART_GRANULE(data))); 426 } 427 428 kfree(data); 429 } 430 431 struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns = { 432 .alloc = apple_dart_alloc_pgtable, 433 .free = apple_dart_free_pgtable, 434 }; 435