1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Apple DART page table allocator. 4 * 5 * Copyright (C) 2022 The Asahi Linux Contributors 6 * 7 * Based on io-pgtable-arm. 8 * 9 * Copyright (C) 2014 ARM Limited 10 * 11 * Author: Will Deacon <will.deacon@arm.com> 12 */ 13 14 #define pr_fmt(fmt) "dart io-pgtable: " fmt 15 16 #include <linux/atomic.h> 17 #include <linux/bitops.h> 18 #include <linux/io-pgtable.h> 19 #include <linux/kernel.h> 20 #include <linux/sizes.h> 21 #include <linux/slab.h> 22 #include <linux/types.h> 23 24 #include <asm/barrier.h> 25 26 #define DART1_MAX_ADDR_BITS 36 27 28 #define DART_MAX_TABLES 4 29 #define DART_LEVELS 2 30 31 /* Struct accessors */ 32 #define io_pgtable_to_data(x) \ 33 container_of((x), struct dart_io_pgtable, iop) 34 35 #define io_pgtable_ops_to_data(x) \ 36 io_pgtable_to_data(io_pgtable_ops_to_pgtable(x)) 37 38 #define DART_GRANULE(d) \ 39 (sizeof(dart_iopte) << (d)->bits_per_level) 40 #define DART_PTES_PER_TABLE(d) \ 41 (DART_GRANULE(d) >> ilog2(sizeof(dart_iopte))) 42 43 #define APPLE_DART1_PADDR_MASK GENMASK_ULL(35, 12) 44 45 /* Apple DART1 protection bits */ 46 #define APPLE_DART1_PTE_PROT_NO_READ BIT(8) 47 #define APPLE_DART1_PTE_PROT_NO_WRITE BIT(7) 48 #define APPLE_DART1_PTE_PROT_SP_DIS BIT(1) 49 50 /* marks PTE as valid */ 51 #define APPLE_DART_PTE_VALID BIT(0) 52 53 /* IOPTE accessors */ 54 #define iopte_deref(pte, d) __va(iopte_to_paddr(pte, d)) 55 56 struct dart_io_pgtable { 57 struct io_pgtable iop; 58 59 int tbl_bits; 60 int bits_per_level; 61 62 void *pgd[DART_MAX_TABLES]; 63 }; 64 65 typedef u64 dart_iopte; 66 67 68 static dart_iopte paddr_to_iopte(phys_addr_t paddr, 69 struct dart_io_pgtable *data) 70 { 71 return paddr & APPLE_DART1_PADDR_MASK; 72 } 73 74 static phys_addr_t iopte_to_paddr(dart_iopte pte, 75 struct dart_io_pgtable *data) 76 { 77 return pte & APPLE_DART1_PADDR_MASK; 78 } 79 80 static void *__dart_alloc_pages(size_t size, gfp_t gfp, 81 struct io_pgtable_cfg *cfg) 82 { 83 int order = get_order(size); 84 struct page *p; 85 86 VM_BUG_ON((gfp & __GFP_HIGHMEM)); 87 p = alloc_pages(gfp | __GFP_ZERO, order); 88 if (!p) 89 return NULL; 90 91 return page_address(p); 92 } 93 94 static int dart_init_pte(struct dart_io_pgtable *data, 95 unsigned long iova, phys_addr_t paddr, 96 dart_iopte prot, int num_entries, 97 dart_iopte *ptep) 98 { 99 int i; 100 dart_iopte pte = prot; 101 size_t sz = data->iop.cfg.pgsize_bitmap; 102 103 for (i = 0; i < num_entries; i++) 104 if (ptep[i] & APPLE_DART_PTE_VALID) { 105 /* We require an unmap first */ 106 WARN_ON(ptep[i] & APPLE_DART_PTE_VALID); 107 return -EEXIST; 108 } 109 110 pte |= APPLE_DART1_PTE_PROT_SP_DIS; 111 pte |= APPLE_DART_PTE_VALID; 112 113 for (i = 0; i < num_entries; i++) 114 ptep[i] = pte | paddr_to_iopte(paddr + i * sz, data); 115 116 return 0; 117 } 118 119 static dart_iopte dart_install_table(dart_iopte *table, 120 dart_iopte *ptep, 121 dart_iopte curr, 122 struct dart_io_pgtable *data) 123 { 124 dart_iopte old, new; 125 126 new = paddr_to_iopte(__pa(table), data) | APPLE_DART_PTE_VALID; 127 128 /* 129 * Ensure the table itself is visible before its PTE can be. 130 * Whilst we could get away with cmpxchg64_release below, this 131 * doesn't have any ordering semantics when !CONFIG_SMP. 132 */ 133 dma_wmb(); 134 135 old = cmpxchg64_relaxed(ptep, curr, new); 136 137 return old; 138 } 139 140 static int dart_get_table(struct dart_io_pgtable *data, unsigned long iova) 141 { 142 return (iova >> (3 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 143 ((1 << data->tbl_bits) - 1); 144 } 145 146 static int dart_get_l1_index(struct dart_io_pgtable *data, unsigned long iova) 147 { 148 149 return (iova >> (2 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 150 ((1 << data->bits_per_level) - 1); 151 } 152 153 static int dart_get_l2_index(struct dart_io_pgtable *data, unsigned long iova) 154 { 155 156 return (iova >> (data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 157 ((1 << data->bits_per_level) - 1); 158 } 159 160 static dart_iopte *dart_get_l2(struct dart_io_pgtable *data, unsigned long iova) 161 { 162 dart_iopte pte, *ptep; 163 int tbl = dart_get_table(data, iova); 164 165 ptep = data->pgd[tbl]; 166 if (!ptep) 167 return NULL; 168 169 ptep += dart_get_l1_index(data, iova); 170 pte = READ_ONCE(*ptep); 171 172 /* Valid entry? */ 173 if (!pte) 174 return NULL; 175 176 /* Deref to get level 2 table */ 177 return iopte_deref(pte, data); 178 } 179 180 static dart_iopte dart_prot_to_pte(struct dart_io_pgtable *data, 181 int prot) 182 { 183 dart_iopte pte = 0; 184 185 if (!(prot & IOMMU_WRITE)) 186 pte |= APPLE_DART1_PTE_PROT_NO_WRITE; 187 if (!(prot & IOMMU_READ)) 188 pte |= APPLE_DART1_PTE_PROT_NO_READ; 189 190 return pte; 191 } 192 193 static int dart_map_pages(struct io_pgtable_ops *ops, unsigned long iova, 194 phys_addr_t paddr, size_t pgsize, size_t pgcount, 195 int iommu_prot, gfp_t gfp, size_t *mapped) 196 { 197 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 198 struct io_pgtable_cfg *cfg = &data->iop.cfg; 199 size_t tblsz = DART_GRANULE(data); 200 int ret = 0, tbl, num_entries, max_entries, map_idx_start; 201 dart_iopte pte, *cptep, *ptep; 202 dart_iopte prot; 203 204 if (WARN_ON(pgsize != cfg->pgsize_bitmap)) 205 return -EINVAL; 206 207 if (WARN_ON(paddr >> cfg->oas)) 208 return -ERANGE; 209 210 /* If no access, then nothing to do */ 211 if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE))) 212 return 0; 213 214 tbl = dart_get_table(data, iova); 215 216 ptep = data->pgd[tbl]; 217 ptep += dart_get_l1_index(data, iova); 218 pte = READ_ONCE(*ptep); 219 220 /* no L2 table present */ 221 if (!pte) { 222 cptep = __dart_alloc_pages(tblsz, gfp, cfg); 223 if (!cptep) 224 return -ENOMEM; 225 226 pte = dart_install_table(cptep, ptep, 0, data); 227 if (pte) 228 free_pages((unsigned long)cptep, get_order(tblsz)); 229 230 /* L2 table is present (now) */ 231 pte = READ_ONCE(*ptep); 232 } 233 234 ptep = iopte_deref(pte, data); 235 236 /* install a leaf entries into L2 table */ 237 prot = dart_prot_to_pte(data, iommu_prot); 238 map_idx_start = dart_get_l2_index(data, iova); 239 max_entries = DART_PTES_PER_TABLE(data) - map_idx_start; 240 num_entries = min_t(int, pgcount, max_entries); 241 ptep += map_idx_start; 242 ret = dart_init_pte(data, iova, paddr, prot, num_entries, ptep); 243 if (!ret && mapped) 244 *mapped += num_entries * pgsize; 245 246 /* 247 * Synchronise all PTE updates for the new mapping before there's 248 * a chance for anything to kick off a table walk for the new iova. 249 */ 250 wmb(); 251 252 return ret; 253 } 254 255 static size_t dart_unmap_pages(struct io_pgtable_ops *ops, unsigned long iova, 256 size_t pgsize, size_t pgcount, 257 struct iommu_iotlb_gather *gather) 258 { 259 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 260 struct io_pgtable_cfg *cfg = &data->iop.cfg; 261 int i = 0, num_entries, max_entries, unmap_idx_start; 262 dart_iopte pte, *ptep; 263 264 if (WARN_ON(pgsize != cfg->pgsize_bitmap || !pgcount)) 265 return 0; 266 267 ptep = dart_get_l2(data, iova); 268 269 /* Valid L2 IOPTE pointer? */ 270 if (WARN_ON(!ptep)) 271 return 0; 272 273 unmap_idx_start = dart_get_l2_index(data, iova); 274 ptep += unmap_idx_start; 275 276 max_entries = DART_PTES_PER_TABLE(data) - unmap_idx_start; 277 num_entries = min_t(int, pgcount, max_entries); 278 279 while (i < num_entries) { 280 pte = READ_ONCE(*ptep); 281 if (WARN_ON(!pte)) 282 break; 283 284 /* clear pte */ 285 *ptep = 0; 286 287 if (!iommu_iotlb_gather_queued(gather)) 288 io_pgtable_tlb_add_page(&data->iop, gather, 289 iova + i * pgsize, pgsize); 290 291 ptep++; 292 i++; 293 } 294 295 return i * pgsize; 296 } 297 298 static phys_addr_t dart_iova_to_phys(struct io_pgtable_ops *ops, 299 unsigned long iova) 300 { 301 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 302 dart_iopte pte, *ptep; 303 304 ptep = dart_get_l2(data, iova); 305 306 /* Valid L2 IOPTE pointer? */ 307 if (!ptep) 308 return 0; 309 310 ptep += dart_get_l2_index(data, iova); 311 312 pte = READ_ONCE(*ptep); 313 /* Found translation */ 314 if (pte) { 315 iova &= (data->iop.cfg.pgsize_bitmap - 1); 316 return iopte_to_paddr(pte, data) | iova; 317 } 318 319 /* Ran out of page tables to walk */ 320 return 0; 321 } 322 323 static struct dart_io_pgtable * 324 dart_alloc_pgtable(struct io_pgtable_cfg *cfg) 325 { 326 struct dart_io_pgtable *data; 327 int tbl_bits, bits_per_level, va_bits, pg_shift; 328 329 pg_shift = __ffs(cfg->pgsize_bitmap); 330 bits_per_level = pg_shift - ilog2(sizeof(dart_iopte)); 331 332 va_bits = cfg->ias - pg_shift; 333 334 tbl_bits = max_t(int, 0, va_bits - (bits_per_level * DART_LEVELS)); 335 if ((1 << tbl_bits) > DART_MAX_TABLES) 336 return NULL; 337 338 data = kzalloc(sizeof(*data), GFP_KERNEL); 339 if (!data) 340 return NULL; 341 342 data->tbl_bits = tbl_bits; 343 data->bits_per_level = bits_per_level; 344 345 data->iop.ops = (struct io_pgtable_ops) { 346 .map_pages = dart_map_pages, 347 .unmap_pages = dart_unmap_pages, 348 .iova_to_phys = dart_iova_to_phys, 349 }; 350 351 return data; 352 } 353 354 static struct io_pgtable * 355 apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) 356 { 357 struct dart_io_pgtable *data; 358 int i; 359 360 if (!cfg->coherent_walk) 361 return NULL; 362 363 if (cfg->oas > DART1_MAX_ADDR_BITS) 364 return NULL; 365 366 if (cfg->ias > cfg->oas) 367 return NULL; 368 369 if (!(cfg->pgsize_bitmap == SZ_4K || cfg->pgsize_bitmap == SZ_16K)) 370 return NULL; 371 372 data = dart_alloc_pgtable(cfg); 373 if (!data) 374 return NULL; 375 376 cfg->apple_dart_cfg.n_ttbrs = 1 << data->tbl_bits; 377 378 for (i = 0; i < cfg->apple_dart_cfg.n_ttbrs; ++i) { 379 data->pgd[i] = __dart_alloc_pages(DART_GRANULE(data), GFP_KERNEL, 380 cfg); 381 if (!data->pgd[i]) 382 goto out_free_data; 383 cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]); 384 } 385 386 return &data->iop; 387 388 out_free_data: 389 while (--i >= 0) 390 free_pages((unsigned long)data->pgd[i], 391 get_order(DART_GRANULE(data))); 392 kfree(data); 393 return NULL; 394 } 395 396 static void apple_dart_free_pgtable(struct io_pgtable *iop) 397 { 398 struct dart_io_pgtable *data = io_pgtable_to_data(iop); 399 dart_iopte *ptep, *end; 400 int i; 401 402 for (i = 0; i < (1 << data->tbl_bits) && data->pgd[i]; ++i) { 403 ptep = data->pgd[i]; 404 end = (void *)ptep + DART_GRANULE(data); 405 406 while (ptep != end) { 407 dart_iopte pte = *ptep++; 408 409 if (pte) { 410 unsigned long page = 411 (unsigned long)iopte_deref(pte, data); 412 413 free_pages(page, get_order(DART_GRANULE(data))); 414 } 415 } 416 free_pages((unsigned long)data->pgd[i], 417 get_order(DART_GRANULE(data))); 418 } 419 420 kfree(data); 421 } 422 423 struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns = { 424 .alloc = apple_dart_alloc_pgtable, 425 .free = apple_dart_free_pgtable, 426 }; 427