xref: /openbmc/linux/drivers/iommu/intel/Kconfig (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1ab65ba57SJerry Snitselaar# SPDX-License-Identifier: GPL-2.0-only
2ab65ba57SJerry Snitselaar# Intel IOMMU support
3ab65ba57SJerry Snitselaarconfig DMAR_TABLE
4ab65ba57SJerry Snitselaar	bool
5ab65ba57SJerry Snitselaar
655ee5e67SLu Baoluconfig DMAR_PERF
755ee5e67SLu Baolu	bool
855ee5e67SLu Baolu
9914ff771SKyung Min Parkconfig DMAR_DEBUG
10914ff771SKyung Min Park	bool
11914ff771SKyung Min Park
12ab65ba57SJerry Snitselaarconfig INTEL_IOMMU
13ab65ba57SJerry Snitselaar	bool "Support for Intel IOMMU using DMA Remapping Devices"
14ab65ba57SJerry Snitselaar	depends on PCI_MSI && ACPI && (X86 || IA64)
15952ace79SLinus Torvalds	select DMA_OPS
16ab65ba57SJerry Snitselaar	select IOMMU_API
17ab65ba57SJerry Snitselaar	select IOMMU_IOVA
18ab65ba57SJerry Snitselaar	select NEED_DMA_MAP_STATE
19ab65ba57SJerry Snitselaar	select DMAR_TABLE
20ab65ba57SJerry Snitselaar	select SWIOTLB
21879fcc6bSLu Baolu	select PCI_ATS
220faa19a1SLu Baolu	select PCI_PRI
230faa19a1SLu Baolu	select PCI_PASID
24ab65ba57SJerry Snitselaar	help
25ab65ba57SJerry Snitselaar	  DMA remapping (DMAR) devices support enables independent address
26ab65ba57SJerry Snitselaar	  translations for Direct Memory Access (DMA) from devices.
27ab65ba57SJerry Snitselaar	  These DMA remapping devices are reported via ACPI tables
28ab65ba57SJerry Snitselaar	  and include PCI device scope covered by these DMA
29ab65ba57SJerry Snitselaar	  remapping devices.
30ab65ba57SJerry Snitselaar
3101dac2d9SLu Baoluif INTEL_IOMMU
3201dac2d9SLu Baolu
33ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEBUGFS
34ab65ba57SJerry Snitselaar	bool "Export Intel IOMMU internals in Debugfs"
3501dac2d9SLu Baolu	depends on IOMMU_DEBUGFS
36456bb0b9SLu Baolu	select DMAR_PERF
37914ff771SKyung Min Park	select DMAR_DEBUG
38ab65ba57SJerry Snitselaar	help
39ab65ba57SJerry Snitselaar	  !!!WARNING!!!
40ab65ba57SJerry Snitselaar
41ab65ba57SJerry Snitselaar	  DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!!
42ab65ba57SJerry Snitselaar
43ab65ba57SJerry Snitselaar	  Expose Intel IOMMU internals in Debugfs.
44ab65ba57SJerry Snitselaar
45ab65ba57SJerry Snitselaar	  This option is -NOT- intended for production environments, and should
46ab65ba57SJerry Snitselaar	  only be enabled for debugging Intel IOMMU.
47ab65ba57SJerry Snitselaar
48ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SVM
49ab65ba57SJerry Snitselaar	bool "Support for Shared Virtual Memory with Intel IOMMU"
5001dac2d9SLu Baolu	depends on X86_64
51ab65ba57SJerry Snitselaar	select MMU_NOTIFIER
527ba56472SFenghua Yu	select IOMMU_SVA
53ab65ba57SJerry Snitselaar	help
54ab65ba57SJerry Snitselaar	  Shared Virtual Memory (SVM) provides a facility for devices
55ab65ba57SJerry Snitselaar	  to access DMA resources through process address space by
56ab65ba57SJerry Snitselaar	  means of a Process Address Space ID (PASID).
57ab65ba57SJerry Snitselaar
58ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEFAULT_ON
5901dac2d9SLu Baolu	bool "Enable Intel DMA Remapping Devices by default"
6001dac2d9SLu Baolu	default y
61ab65ba57SJerry Snitselaar	help
62ab65ba57SJerry Snitselaar	  Selecting this option will enable a DMAR device at boot time if
63ab65ba57SJerry Snitselaar	  one is found. If this option is not selected, DMAR support can
64ab65ba57SJerry Snitselaar	  be enabled by passing intel_iommu=on to the kernel.
65ab65ba57SJerry Snitselaar
66ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_BROKEN_GFX_WA
67ab65ba57SJerry Snitselaar	bool "Workaround broken graphics drivers (going away soon)"
6801dac2d9SLu Baolu	depends on BROKEN && X86
69ab65ba57SJerry Snitselaar	help
70ab65ba57SJerry Snitselaar	  Current Graphics drivers tend to use physical address
71ab65ba57SJerry Snitselaar	  for DMA and avoid using DMA APIs. Setting this config
72ab65ba57SJerry Snitselaar	  option permits the IOMMU driver to set a unity map for
73ab65ba57SJerry Snitselaar	  all the OS-visible memory. Hence the driver can continue
74ab65ba57SJerry Snitselaar	  to use physical addresses for DMA, at least until this
75ab65ba57SJerry Snitselaar	  option is removed in the 2.6.32 kernel.
76ab65ba57SJerry Snitselaar
77ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_FLOPPY_WA
78ab65ba57SJerry Snitselaar	def_bool y
7901dac2d9SLu Baolu	depends on X86
80ab65ba57SJerry Snitselaar	help
81ab65ba57SJerry Snitselaar	  Floppy disk drivers are known to bypass DMA API calls
82ab65ba57SJerry Snitselaar	  thereby failing to work when IOMMU is enabled. This
83ab65ba57SJerry Snitselaar	  workaround will setup a 1:1 mapping for the first
84ab65ba57SJerry Snitselaar	  16MiB to make floppy (an ISA device) work.
85ab65ba57SJerry Snitselaar
86ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
87ab65ba57SJerry Snitselaar	bool "Enable Intel IOMMU scalable mode by default"
88792fb43cSLu Baolu	default y
89ab65ba57SJerry Snitselaar	help
90ab65ba57SJerry Snitselaar	  Selecting this option will enable by default the scalable mode if
91ab65ba57SJerry Snitselaar	  hardware presents the capability. The scalable mode is defined in
92ab65ba57SJerry Snitselaar	  VT-d 3.0. The scalable mode capability could be checked by reading
93ab65ba57SJerry Snitselaar	  /sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option
94ab65ba57SJerry Snitselaar	  is not selected, scalable mode support could also be enabled by
95ab65ba57SJerry Snitselaar	  passing intel_iommu=sm_on to the kernel. If not sure, please use
96ab65ba57SJerry Snitselaar	  the default value.
9701dac2d9SLu Baolu
98*a6a5006dSKan Liangconfig INTEL_IOMMU_PERF_EVENTS
99*a6a5006dSKan Liang	def_bool y
100*a6a5006dSKan Liang	bool "Intel IOMMU performance events"
101*a6a5006dSKan Liang	depends on INTEL_IOMMU && PERF_EVENTS
102*a6a5006dSKan Liang	help
103*a6a5006dSKan Liang	  Selecting this option will enable the performance monitoring
104*a6a5006dSKan Liang	  infrastructure in the Intel IOMMU. It collects information about
105*a6a5006dSKan Liang	  key events occurring during operation of the remapping hardware,
106*a6a5006dSKan Liang	  to aid performance tuning and debug. These are available on modern
107*a6a5006dSKan Liang	  processors which support Intel VT-d 4.0 and later.
108*a6a5006dSKan Liang
10901dac2d9SLu Baoluendif # INTEL_IOMMU
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