1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020 Linaro Ltd 4 */ 5 6 #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 7 #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 8 9 #include <linux/soc/qcom/smd-rpm.h> 10 11 #include <dt-bindings/interconnect/qcom,icc.h> 12 #include <linux/clk.h> 13 #include <linux/interconnect-provider.h> 14 #include <linux/platform_device.h> 15 16 #define RPM_BUS_MASTER_REQ 0x73616d62 17 #define RPM_BUS_SLAVE_REQ 0x766c7362 18 19 #define to_qcom_provider(_provider) \ 20 container_of(_provider, struct qcom_icc_provider, provider) 21 22 enum qcom_icc_type { 23 QCOM_ICC_NOC, 24 QCOM_ICC_BIMC, 25 QCOM_ICC_QNOC, 26 }; 27 28 /** 29 * struct rpm_clk_resource - RPM bus clock resource 30 * @resource_type: RPM resource type of the clock resource 31 * @clock_id: index of the clock resource of a specific resource type 32 * @branch: whether the resource represents a branch clock 33 */ 34 struct rpm_clk_resource { 35 u32 resource_type; 36 u32 clock_id; 37 bool branch; 38 }; 39 40 #define NUM_BUS_CLKS 2 41 42 /** 43 * struct qcom_icc_provider - Qualcomm specific interconnect provider 44 * @provider: generic interconnect provider 45 * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) 46 * @num_intf_clks: the total number of intf_clks clk_bulk_data entries 47 * @type: the ICC provider type 48 * @regmap: regmap for QoS registers read/write access 49 * @qos_offset: offset to QoS registers 50 * @bus_clk_rate: bus clock rate in Hz 51 * @bus_clks: the clk_bulk_data table of bus clocks 52 * @intf_clks: a clk_bulk_data array of interface clocks 53 * @keep_alive: whether to always keep a minimum vote on the bus clocks 54 * @is_on: whether the bus is powered on 55 */ 56 struct qcom_icc_provider { 57 struct icc_provider provider; 58 int num_bus_clks; 59 int num_intf_clks; 60 enum qcom_icc_type type; 61 struct regmap *regmap; 62 unsigned int qos_offset; 63 u64 bus_clk_rate[NUM_BUS_CLKS]; 64 struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; 65 const struct rpm_clk_resource *bus_clk_desc; 66 struct clk_bulk_data *intf_clks; 67 bool keep_alive; 68 bool is_on; 69 }; 70 71 /** 72 * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters 73 * @areq_prio: node requests priority 74 * @prio_level: priority level for bus communication 75 * @limit_commands: activate/deactivate limiter mode during runtime 76 * @ap_owned: indicates if the node is owned by the AP or by the RPM 77 * @qos_mode: default qos mode for this node 78 * @qos_port: qos port number for finding qos registers of this node 79 * @urg_fwd_en: enable urgent forwarding 80 */ 81 struct qcom_icc_qos { 82 u32 areq_prio; 83 u32 prio_level; 84 bool limit_commands; 85 bool ap_owned; 86 int qos_mode; 87 int qos_port; 88 bool urg_fwd_en; 89 }; 90 91 /** 92 * struct qcom_icc_node - Qualcomm specific interconnect nodes 93 * @name: the node name used in debugfs 94 * @id: a unique node identifier 95 * @links: an array of nodes where we can go next while traversing 96 * @num_links: the total number of @links 97 * @channels: number of channels at this node (e.g. DDR channels) 98 * @buswidth: width of the interconnect between a node and the bus (bytes) 99 * @sum_avg: current sum aggregate value of all avg bw requests 100 * @max_peak: current max aggregate value of all peak bw requests 101 * @mas_rpm_id: RPM id for devices that are bus masters 102 * @slv_rpm_id: RPM id for devices that are bus slaves 103 * @qos: NoC QoS setting parameters 104 */ 105 struct qcom_icc_node { 106 unsigned char *name; 107 u16 id; 108 const u16 *links; 109 u16 num_links; 110 u16 channels; 111 u16 buswidth; 112 u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; 113 u64 max_peak[QCOM_ICC_NUM_BUCKETS]; 114 int mas_rpm_id; 115 int slv_rpm_id; 116 struct qcom_icc_qos qos; 117 }; 118 119 struct qcom_icc_desc { 120 struct qcom_icc_node * const *nodes; 121 size_t num_nodes; 122 const char * const *bus_clocks; 123 const struct rpm_clk_resource *bus_clk_desc; 124 const char * const *intf_clocks; 125 size_t num_intf_clocks; 126 bool keep_alive; 127 bool no_clk_scaling; 128 enum qcom_icc_type type; 129 const struct regmap_config *regmap_cfg; 130 unsigned int qos_offset; 131 }; 132 133 /* Valid for all bus types */ 134 enum qos_mode { 135 NOC_QOS_MODE_INVALID = 0, 136 NOC_QOS_MODE_FIXED, 137 NOC_QOS_MODE_BYPASS, 138 }; 139 140 int qnoc_probe(struct platform_device *pdev); 141 int qnoc_remove(struct platform_device *pdev); 142 143 bool qcom_icc_rpm_smd_available(void); 144 int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); 145 int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, int ctx, u32 rate); 146 147 #endif 148