xref: /openbmc/linux/drivers/input/touchscreen/hideep.c (revision 842ff286166e8512450573f6b6eb5e04e626a07f)
1*842ff286SAnthony Kim /*
2*842ff286SAnthony Kim  * Copyright (C) 2012-2017 Hideep, Inc.
3*842ff286SAnthony Kim  *
4*842ff286SAnthony Kim  * This program is free software; you can redistribute it and/or modify it
5*842ff286SAnthony Kim  * under the terms of the GNU General Public License version 2
6*842ff286SAnthony Kim  * as published by the Free Software Foudation.
7*842ff286SAnthony Kim  */
8*842ff286SAnthony Kim 
9*842ff286SAnthony Kim #include <linux/module.h>
10*842ff286SAnthony Kim #include <linux/of.h>
11*842ff286SAnthony Kim #include <linux/firmware.h>
12*842ff286SAnthony Kim #include <linux/delay.h>
13*842ff286SAnthony Kim #include <linux/gpio.h>
14*842ff286SAnthony Kim #include <linux/gpio/machine.h>
15*842ff286SAnthony Kim #include <linux/i2c.h>
16*842ff286SAnthony Kim #include <linux/acpi.h>
17*842ff286SAnthony Kim #include <linux/interrupt.h>
18*842ff286SAnthony Kim #include <linux/regmap.h>
19*842ff286SAnthony Kim #include <linux/sysfs.h>
20*842ff286SAnthony Kim #include <linux/input.h>
21*842ff286SAnthony Kim #include <linux/input/mt.h>
22*842ff286SAnthony Kim #include <linux/input/touchscreen.h>
23*842ff286SAnthony Kim #include <linux/regulator/consumer.h>
24*842ff286SAnthony Kim #include <asm/unaligned.h>
25*842ff286SAnthony Kim 
26*842ff286SAnthony Kim #define HIDEEP_TS_NAME			"HiDeep Touchscreen"
27*842ff286SAnthony Kim #define HIDEEP_I2C_NAME			"hideep_ts"
28*842ff286SAnthony Kim 
29*842ff286SAnthony Kim #define HIDEEP_MT_MAX			10
30*842ff286SAnthony Kim #define HIDEEP_KEY_MAX			3
31*842ff286SAnthony Kim 
32*842ff286SAnthony Kim /* count(2) + touch data(100) + key data(6) */
33*842ff286SAnthony Kim #define HIDEEP_MAX_EVENT		108UL
34*842ff286SAnthony Kim 
35*842ff286SAnthony Kim #define HIDEEP_TOUCH_EVENT_INDEX	2
36*842ff286SAnthony Kim #define HIDEEP_KEY_EVENT_INDEX		102
37*842ff286SAnthony Kim 
38*842ff286SAnthony Kim /* Touch & key event */
39*842ff286SAnthony Kim #define HIDEEP_EVENT_ADDR		0x240
40*842ff286SAnthony Kim 
41*842ff286SAnthony Kim /* command list */
42*842ff286SAnthony Kim #define HIDEEP_RESET_CMD		0x9800
43*842ff286SAnthony Kim 
44*842ff286SAnthony Kim /* event bit */
45*842ff286SAnthony Kim #define HIDEEP_MT_RELEASED		BIT(4)
46*842ff286SAnthony Kim #define HIDEEP_KEY_PRESSED		BIT(7)
47*842ff286SAnthony Kim #define HIDEEP_KEY_FIRST_PRESSED	BIT(8)
48*842ff286SAnthony Kim #define HIDEEP_KEY_PRESSED_MASK		(HIDEEP_KEY_PRESSED | \
49*842ff286SAnthony Kim 					 HIDEEP_KEY_FIRST_PRESSED)
50*842ff286SAnthony Kim 
51*842ff286SAnthony Kim #define HIDEEP_KEY_IDX_MASK		0x0f
52*842ff286SAnthony Kim 
53*842ff286SAnthony Kim /* For NVM */
54*842ff286SAnthony Kim #define HIDEEP_YRAM_BASE		0x40000000
55*842ff286SAnthony Kim #define HIDEEP_PERIPHERAL_BASE		0x50000000
56*842ff286SAnthony Kim #define HIDEEP_ESI_BASE			(HIDEEP_PERIPHERAL_BASE + 0x00000000)
57*842ff286SAnthony Kim #define HIDEEP_FLASH_BASE		(HIDEEP_PERIPHERAL_BASE + 0x01000000)
58*842ff286SAnthony Kim #define HIDEEP_SYSCON_BASE		(HIDEEP_PERIPHERAL_BASE + 0x02000000)
59*842ff286SAnthony Kim 
60*842ff286SAnthony Kim #define HIDEEP_SYSCON_MOD_CON		(HIDEEP_SYSCON_BASE + 0x0000)
61*842ff286SAnthony Kim #define HIDEEP_SYSCON_SPC_CON		(HIDEEP_SYSCON_BASE + 0x0004)
62*842ff286SAnthony Kim #define HIDEEP_SYSCON_CLK_CON		(HIDEEP_SYSCON_BASE + 0x0008)
63*842ff286SAnthony Kim #define HIDEEP_SYSCON_CLK_ENA		(HIDEEP_SYSCON_BASE + 0x000C)
64*842ff286SAnthony Kim #define HIDEEP_SYSCON_RST_CON		(HIDEEP_SYSCON_BASE + 0x0010)
65*842ff286SAnthony Kim #define HIDEEP_SYSCON_WDT_CON		(HIDEEP_SYSCON_BASE + 0x0014)
66*842ff286SAnthony Kim #define HIDEEP_SYSCON_WDT_CNT		(HIDEEP_SYSCON_BASE + 0x0018)
67*842ff286SAnthony Kim #define HIDEEP_SYSCON_PWR_CON		(HIDEEP_SYSCON_BASE + 0x0020)
68*842ff286SAnthony Kim #define HIDEEP_SYSCON_PGM_ID		(HIDEEP_SYSCON_BASE + 0x00F4)
69*842ff286SAnthony Kim 
70*842ff286SAnthony Kim #define HIDEEP_FLASH_CON		(HIDEEP_FLASH_BASE + 0x0000)
71*842ff286SAnthony Kim #define HIDEEP_FLASH_STA		(HIDEEP_FLASH_BASE + 0x0004)
72*842ff286SAnthony Kim #define HIDEEP_FLASH_CFG		(HIDEEP_FLASH_BASE + 0x0008)
73*842ff286SAnthony Kim #define HIDEEP_FLASH_TIM		(HIDEEP_FLASH_BASE + 0x000C)
74*842ff286SAnthony Kim #define HIDEEP_FLASH_CACHE_CFG		(HIDEEP_FLASH_BASE + 0x0010)
75*842ff286SAnthony Kim #define HIDEEP_FLASH_PIO_SIG		(HIDEEP_FLASH_BASE + 0x400000)
76*842ff286SAnthony Kim 
77*842ff286SAnthony Kim #define HIDEEP_ESI_TX_INVALID		(HIDEEP_ESI_BASE + 0x0008)
78*842ff286SAnthony Kim 
79*842ff286SAnthony Kim #define HIDEEP_PERASE			0x00040000
80*842ff286SAnthony Kim #define HIDEEP_WRONLY			0x00100000
81*842ff286SAnthony Kim 
82*842ff286SAnthony Kim #define HIDEEP_NVM_MASK_OFS		0x0000000C
83*842ff286SAnthony Kim #define HIDEEP_NVM_DEFAULT_PAGE		0
84*842ff286SAnthony Kim #define HIDEEP_NVM_SFR_WPAGE		1
85*842ff286SAnthony Kim #define HIDEEP_NVM_SFR_RPAGE		2
86*842ff286SAnthony Kim 
87*842ff286SAnthony Kim #define HIDEEP_PIO_SIG			0x00400000
88*842ff286SAnthony Kim #define HIDEEP_PROT_MODE		0x03400000
89*842ff286SAnthony Kim 
90*842ff286SAnthony Kim #define HIDEEP_NVM_PAGE_SIZE		128
91*842ff286SAnthony Kim 
92*842ff286SAnthony Kim #define HIDEEP_DWZ_INFO			0x000002C0
93*842ff286SAnthony Kim 
94*842ff286SAnthony Kim struct hideep_event {
95*842ff286SAnthony Kim 	__le16 x;
96*842ff286SAnthony Kim 	__le16 y;
97*842ff286SAnthony Kim 	__le16 z;
98*842ff286SAnthony Kim 	u8 w;
99*842ff286SAnthony Kim 	u8 flag;
100*842ff286SAnthony Kim 	u8 type;
101*842ff286SAnthony Kim 	u8 index;
102*842ff286SAnthony Kim };
103*842ff286SAnthony Kim 
104*842ff286SAnthony Kim struct dwz_info {
105*842ff286SAnthony Kim 	__be32 code_start;
106*842ff286SAnthony Kim 	u8 code_crc[12];
107*842ff286SAnthony Kim 
108*842ff286SAnthony Kim 	__be32 c_code_start;
109*842ff286SAnthony Kim 	__be16 gen_ver;
110*842ff286SAnthony Kim 	__be16 c_code_len;
111*842ff286SAnthony Kim 
112*842ff286SAnthony Kim 	__be32 vr_start;
113*842ff286SAnthony Kim 	__be16 rsv0;
114*842ff286SAnthony Kim 	__be16 vr_len;
115*842ff286SAnthony Kim 
116*842ff286SAnthony Kim 	__be32 ft_start;
117*842ff286SAnthony Kim 	__be16 vr_version;
118*842ff286SAnthony Kim 	__be16 ft_len;
119*842ff286SAnthony Kim 
120*842ff286SAnthony Kim 	__be16 core_ver;
121*842ff286SAnthony Kim 	__be16 boot_ver;
122*842ff286SAnthony Kim 
123*842ff286SAnthony Kim 	__be16 release_ver;
124*842ff286SAnthony Kim 	__be16 custom_ver;
125*842ff286SAnthony Kim 
126*842ff286SAnthony Kim 	u8 factory_id;
127*842ff286SAnthony Kim 	u8 panel_type;
128*842ff286SAnthony Kim 	u8 model_name[6];
129*842ff286SAnthony Kim 
130*842ff286SAnthony Kim 	__be16 extra_option;
131*842ff286SAnthony Kim 	__be16 product_code;
132*842ff286SAnthony Kim 
133*842ff286SAnthony Kim 	__be16 vendor_id;
134*842ff286SAnthony Kim 	__be16 product_id;
135*842ff286SAnthony Kim };
136*842ff286SAnthony Kim 
137*842ff286SAnthony Kim struct pgm_packet {
138*842ff286SAnthony Kim 	struct {
139*842ff286SAnthony Kim 		u8 unused[3];
140*842ff286SAnthony Kim 		u8 len;
141*842ff286SAnthony Kim 		__be32 addr;
142*842ff286SAnthony Kim 	} header;
143*842ff286SAnthony Kim 	__be32 payload[HIDEEP_NVM_PAGE_SIZE / sizeof(__be32)];
144*842ff286SAnthony Kim };
145*842ff286SAnthony Kim 
146*842ff286SAnthony Kim #define HIDEEP_XFER_BUF_SIZE	sizeof(struct pgm_packet)
147*842ff286SAnthony Kim 
148*842ff286SAnthony Kim struct hideep_ts {
149*842ff286SAnthony Kim 	struct i2c_client *client;
150*842ff286SAnthony Kim 	struct input_dev *input_dev;
151*842ff286SAnthony Kim 	struct regmap *reg;
152*842ff286SAnthony Kim 
153*842ff286SAnthony Kim 	struct touchscreen_properties prop;
154*842ff286SAnthony Kim 
155*842ff286SAnthony Kim 	struct gpio_desc *reset_gpio;
156*842ff286SAnthony Kim 
157*842ff286SAnthony Kim 	struct regulator *vcc_vdd;
158*842ff286SAnthony Kim 	struct regulator *vcc_vid;
159*842ff286SAnthony Kim 
160*842ff286SAnthony Kim 	struct mutex dev_mutex;
161*842ff286SAnthony Kim 
162*842ff286SAnthony Kim 	u32 tch_count;
163*842ff286SAnthony Kim 	u32 lpm_count;
164*842ff286SAnthony Kim 
165*842ff286SAnthony Kim 	/*
166*842ff286SAnthony Kim 	 * Data buffer to read packet from the device (contacts and key
167*842ff286SAnthony Kim 	 * states). We align it on double-word boundary to keep word-sized
168*842ff286SAnthony Kim 	 * fields in contact data and double-word-sized fields in program
169*842ff286SAnthony Kim 	 * packet aligned.
170*842ff286SAnthony Kim 	 */
171*842ff286SAnthony Kim 	u8 xfer_buf[HIDEEP_XFER_BUF_SIZE] __aligned(4);
172*842ff286SAnthony Kim 
173*842ff286SAnthony Kim 	int key_num;
174*842ff286SAnthony Kim 	u32 key_codes[HIDEEP_KEY_MAX];
175*842ff286SAnthony Kim 
176*842ff286SAnthony Kim 	struct dwz_info dwz_info;
177*842ff286SAnthony Kim 
178*842ff286SAnthony Kim 	unsigned int fw_size;
179*842ff286SAnthony Kim 	u32 nvm_mask;
180*842ff286SAnthony Kim };
181*842ff286SAnthony Kim 
182*842ff286SAnthony Kim static int hideep_pgm_w_mem(struct hideep_ts *ts, u32 addr,
183*842ff286SAnthony Kim 			    const __be32 *data, size_t count)
184*842ff286SAnthony Kim {
185*842ff286SAnthony Kim 	struct pgm_packet *packet = (void *)ts->xfer_buf;
186*842ff286SAnthony Kim 	size_t len = count * sizeof(*data);
187*842ff286SAnthony Kim 	struct i2c_msg msg = {
188*842ff286SAnthony Kim 		.addr	= ts->client->addr,
189*842ff286SAnthony Kim 		.len	= len + sizeof(packet->header.len) +
190*842ff286SAnthony Kim 				sizeof(packet->header.addr),
191*842ff286SAnthony Kim 		.buf	= &packet->header.len,
192*842ff286SAnthony Kim 	};
193*842ff286SAnthony Kim 	int ret;
194*842ff286SAnthony Kim 
195*842ff286SAnthony Kim 	if (len > HIDEEP_NVM_PAGE_SIZE)
196*842ff286SAnthony Kim 		return -EINVAL;
197*842ff286SAnthony Kim 
198*842ff286SAnthony Kim 	packet->header.len = 0x80 | (count - 1);
199*842ff286SAnthony Kim 	packet->header.addr = cpu_to_be32(addr);
200*842ff286SAnthony Kim 	memcpy(packet->payload, data, len);
201*842ff286SAnthony Kim 
202*842ff286SAnthony Kim 	ret = i2c_transfer(ts->client->adapter, &msg, 1);
203*842ff286SAnthony Kim 	if (ret != 1)
204*842ff286SAnthony Kim 		return ret < 0 ? ret : -EIO;
205*842ff286SAnthony Kim 
206*842ff286SAnthony Kim 	return 0;
207*842ff286SAnthony Kim }
208*842ff286SAnthony Kim 
209*842ff286SAnthony Kim static int hideep_pgm_r_mem(struct hideep_ts *ts, u32 addr,
210*842ff286SAnthony Kim 			    __be32 *data, size_t count)
211*842ff286SAnthony Kim {
212*842ff286SAnthony Kim 	struct pgm_packet *packet = (void *)ts->xfer_buf;
213*842ff286SAnthony Kim 	size_t len = count * sizeof(*data);
214*842ff286SAnthony Kim 	struct i2c_msg msg[] = {
215*842ff286SAnthony Kim 		{
216*842ff286SAnthony Kim 			.addr	= ts->client->addr,
217*842ff286SAnthony Kim 			.len	= sizeof(packet->header.len) +
218*842ff286SAnthony Kim 					sizeof(packet->header.addr),
219*842ff286SAnthony Kim 			.buf	= &packet->header.len,
220*842ff286SAnthony Kim 		},
221*842ff286SAnthony Kim 		{
222*842ff286SAnthony Kim 			.addr	= ts->client->addr,
223*842ff286SAnthony Kim 			.flags	= I2C_M_RD,
224*842ff286SAnthony Kim 			.len	= len,
225*842ff286SAnthony Kim 			.buf	= (u8 *)data,
226*842ff286SAnthony Kim 		},
227*842ff286SAnthony Kim 	};
228*842ff286SAnthony Kim 	int ret;
229*842ff286SAnthony Kim 
230*842ff286SAnthony Kim 	if (len > HIDEEP_NVM_PAGE_SIZE)
231*842ff286SAnthony Kim 		return -EINVAL;
232*842ff286SAnthony Kim 
233*842ff286SAnthony Kim 	packet->header.len = count - 1;
234*842ff286SAnthony Kim 	packet->header.addr = cpu_to_be32(addr);
235*842ff286SAnthony Kim 
236*842ff286SAnthony Kim 	ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
237*842ff286SAnthony Kim 	if (ret != ARRAY_SIZE(msg))
238*842ff286SAnthony Kim 		return ret < 0 ? ret : -EIO;
239*842ff286SAnthony Kim 
240*842ff286SAnthony Kim 	return 0;
241*842ff286SAnthony Kim }
242*842ff286SAnthony Kim 
243*842ff286SAnthony Kim static int hideep_pgm_r_reg(struct hideep_ts *ts, u32 addr, u32 *val)
244*842ff286SAnthony Kim {
245*842ff286SAnthony Kim 	__be32 data;
246*842ff286SAnthony Kim 	int error;
247*842ff286SAnthony Kim 
248*842ff286SAnthony Kim 	error = hideep_pgm_r_mem(ts, addr, &data, 1);
249*842ff286SAnthony Kim 	if (error) {
250*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
251*842ff286SAnthony Kim 			"read of register %#08x failed: %d\n",
252*842ff286SAnthony Kim 			addr, error);
253*842ff286SAnthony Kim 		return error;
254*842ff286SAnthony Kim 	}
255*842ff286SAnthony Kim 
256*842ff286SAnthony Kim 	*val = be32_to_cpu(data);
257*842ff286SAnthony Kim 	return 0;
258*842ff286SAnthony Kim }
259*842ff286SAnthony Kim 
260*842ff286SAnthony Kim static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val)
261*842ff286SAnthony Kim {
262*842ff286SAnthony Kim 	__be32 data = cpu_to_be32(val);
263*842ff286SAnthony Kim 	int error;
264*842ff286SAnthony Kim 
265*842ff286SAnthony Kim 	error = hideep_pgm_w_mem(ts, addr, &data, 1);
266*842ff286SAnthony Kim 	if (error) {
267*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
268*842ff286SAnthony Kim 			"write to register %#08x (%#08x) failed: %d\n",
269*842ff286SAnthony Kim 			addr, val, error);
270*842ff286SAnthony Kim 		return error;
271*842ff286SAnthony Kim 	}
272*842ff286SAnthony Kim 
273*842ff286SAnthony Kim 	return 0;
274*842ff286SAnthony Kim }
275*842ff286SAnthony Kim 
276*842ff286SAnthony Kim #define SW_RESET_IN_PGM(clk)					\
277*842ff286SAnthony Kim {								\
278*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk));	\
279*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03);	\
280*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x01);	\
281*842ff286SAnthony Kim }
282*842ff286SAnthony Kim 
283*842ff286SAnthony Kim #define SET_FLASH_PIO(ce)					\
284*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON,			\
285*842ff286SAnthony Kim 			 0x01 | ((ce) << 1))
286*842ff286SAnthony Kim 
287*842ff286SAnthony Kim #define SET_PIO_SIG(x, y)					\
288*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y))
289*842ff286SAnthony Kim 
290*842ff286SAnthony Kim #define SET_FLASH_HWCONTROL()					\
291*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00)
292*842ff286SAnthony Kim 
293*842ff286SAnthony Kim #define NVM_W_SFR(x, y)						\
294*842ff286SAnthony Kim {								\
295*842ff286SAnthony Kim 	SET_FLASH_PIO(1);					\
296*842ff286SAnthony Kim 	SET_PIO_SIG(x, y);					\
297*842ff286SAnthony Kim 	SET_FLASH_PIO(0);					\
298*842ff286SAnthony Kim }
299*842ff286SAnthony Kim 
300*842ff286SAnthony Kim static void hideep_pgm_set(struct hideep_ts *ts)
301*842ff286SAnthony Kim {
302*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00);
303*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00);
304*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF);
305*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01);
306*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01);
307*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03);
308*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00);
309*842ff286SAnthony Kim }
310*842ff286SAnthony Kim 
311*842ff286SAnthony Kim static int hideep_pgm_get_pattern(struct hideep_ts *ts, u32 *pattern)
312*842ff286SAnthony Kim {
313*842ff286SAnthony Kim 	u16 p1 = 0xAF39;
314*842ff286SAnthony Kim 	u16 p2 = 0xDF9D;
315*842ff286SAnthony Kim 	int error;
316*842ff286SAnthony Kim 
317*842ff286SAnthony Kim 	error = regmap_bulk_write(ts->reg, p1, &p2, 1);
318*842ff286SAnthony Kim 	if (error) {
319*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
320*842ff286SAnthony Kim 			"%s: regmap_bulk_write() failed with %d\n",
321*842ff286SAnthony Kim 			__func__, error);
322*842ff286SAnthony Kim 		return error;
323*842ff286SAnthony Kim 	}
324*842ff286SAnthony Kim 
325*842ff286SAnthony Kim 	usleep_range(1000, 1100);
326*842ff286SAnthony Kim 
327*842ff286SAnthony Kim 	/* flush invalid Tx load register */
328*842ff286SAnthony Kim 	error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01);
329*842ff286SAnthony Kim 	if (error)
330*842ff286SAnthony Kim 		return error;
331*842ff286SAnthony Kim 
332*842ff286SAnthony Kim 	error = hideep_pgm_r_reg(ts, HIDEEP_SYSCON_PGM_ID, pattern);
333*842ff286SAnthony Kim 	if (error)
334*842ff286SAnthony Kim 		return error;
335*842ff286SAnthony Kim 
336*842ff286SAnthony Kim 	return 0;
337*842ff286SAnthony Kim }
338*842ff286SAnthony Kim 
339*842ff286SAnthony Kim static int hideep_enter_pgm(struct hideep_ts *ts)
340*842ff286SAnthony Kim {
341*842ff286SAnthony Kim 	int retry_count = 10;
342*842ff286SAnthony Kim 	u32 pattern;
343*842ff286SAnthony Kim 	int error;
344*842ff286SAnthony Kim 
345*842ff286SAnthony Kim 	while (retry_count--) {
346*842ff286SAnthony Kim 		error = hideep_pgm_get_pattern(ts, &pattern);
347*842ff286SAnthony Kim 		if (error) {
348*842ff286SAnthony Kim 			dev_err(&ts->client->dev,
349*842ff286SAnthony Kim 				"hideep_pgm_get_pattern failed: %d\n", error);
350*842ff286SAnthony Kim 		} else if (pattern != 0x39AF9DDF) {
351*842ff286SAnthony Kim 			dev_err(&ts->client->dev, "%s: bad pattern: %#08x\n",
352*842ff286SAnthony Kim 				__func__, pattern);
353*842ff286SAnthony Kim 		} else {
354*842ff286SAnthony Kim 			dev_dbg(&ts->client->dev, "found magic code");
355*842ff286SAnthony Kim 
356*842ff286SAnthony Kim 			hideep_pgm_set(ts);
357*842ff286SAnthony Kim 			usleep_range(1000, 1100);
358*842ff286SAnthony Kim 
359*842ff286SAnthony Kim 			return 0;
360*842ff286SAnthony Kim 		}
361*842ff286SAnthony Kim 	}
362*842ff286SAnthony Kim 
363*842ff286SAnthony Kim 	dev_err(&ts->client->dev, "failed to  enter pgm mode\n");
364*842ff286SAnthony Kim 	SW_RESET_IN_PGM(1000);
365*842ff286SAnthony Kim 	return -EIO;
366*842ff286SAnthony Kim }
367*842ff286SAnthony Kim 
368*842ff286SAnthony Kim static void hideep_nvm_unlock(struct hideep_ts *ts)
369*842ff286SAnthony Kim {
370*842ff286SAnthony Kim 	u32 unmask_code;
371*842ff286SAnthony Kim 
372*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE);
373*842ff286SAnthony Kim 	hideep_pgm_r_reg(ts, 0x0000000C, &unmask_code);
374*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE);
375*842ff286SAnthony Kim 
376*842ff286SAnthony Kim 	/* make it unprotected code */
377*842ff286SAnthony Kim 	unmask_code &= ~HIDEEP_PROT_MODE;
378*842ff286SAnthony Kim 
379*842ff286SAnthony Kim 	/* compare unmask code */
380*842ff286SAnthony Kim 	if (unmask_code != ts->nvm_mask)
381*842ff286SAnthony Kim 		dev_warn(&ts->client->dev,
382*842ff286SAnthony Kim 			 "read mask code different %#08x vs %#08x",
383*842ff286SAnthony Kim 			 unmask_code, ts->nvm_mask);
384*842ff286SAnthony Kim 
385*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE);
386*842ff286SAnthony Kim 	SET_FLASH_PIO(0);
387*842ff286SAnthony Kim 
388*842ff286SAnthony Kim 	NVM_W_SFR(HIDEEP_NVM_MASK_OFS, ts->nvm_mask);
389*842ff286SAnthony Kim 	SET_FLASH_HWCONTROL();
390*842ff286SAnthony Kim 	hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE);
391*842ff286SAnthony Kim }
392*842ff286SAnthony Kim 
393*842ff286SAnthony Kim static int hideep_check_status(struct hideep_ts *ts)
394*842ff286SAnthony Kim {
395*842ff286SAnthony Kim 	int time_out = 100;
396*842ff286SAnthony Kim 	int status;
397*842ff286SAnthony Kim 	int error;
398*842ff286SAnthony Kim 
399*842ff286SAnthony Kim 	while (time_out--) {
400*842ff286SAnthony Kim 		error = hideep_pgm_r_reg(ts, HIDEEP_FLASH_STA, &status);
401*842ff286SAnthony Kim 		if (!error && status)
402*842ff286SAnthony Kim 			return 0;
403*842ff286SAnthony Kim 
404*842ff286SAnthony Kim 		usleep_range(1000, 1100);
405*842ff286SAnthony Kim 	}
406*842ff286SAnthony Kim 
407*842ff286SAnthony Kim 	return -ETIMEDOUT;
408*842ff286SAnthony Kim }
409*842ff286SAnthony Kim 
410*842ff286SAnthony Kim static int hideep_program_page(struct hideep_ts *ts, u32 addr,
411*842ff286SAnthony Kim 			       const __be32 *ucode, size_t xfer_count)
412*842ff286SAnthony Kim {
413*842ff286SAnthony Kim 	u32 val;
414*842ff286SAnthony Kim 	int error;
415*842ff286SAnthony Kim 
416*842ff286SAnthony Kim 	error = hideep_check_status(ts);
417*842ff286SAnthony Kim 	if (error)
418*842ff286SAnthony Kim 		return -EBUSY;
419*842ff286SAnthony Kim 
420*842ff286SAnthony Kim 	addr &= ~(HIDEEP_NVM_PAGE_SIZE - 1);
421*842ff286SAnthony Kim 
422*842ff286SAnthony Kim 	SET_FLASH_PIO(0);
423*842ff286SAnthony Kim 	SET_FLASH_PIO(1);
424*842ff286SAnthony Kim 
425*842ff286SAnthony Kim 	/* erase page */
426*842ff286SAnthony Kim 	SET_PIO_SIG(HIDEEP_PERASE | addr, 0xFFFFFFFF);
427*842ff286SAnthony Kim 
428*842ff286SAnthony Kim 	SET_FLASH_PIO(0);
429*842ff286SAnthony Kim 
430*842ff286SAnthony Kim 	error = hideep_check_status(ts);
431*842ff286SAnthony Kim 	if (error)
432*842ff286SAnthony Kim 		return -EBUSY;
433*842ff286SAnthony Kim 
434*842ff286SAnthony Kim 	/* write page */
435*842ff286SAnthony Kim 	SET_FLASH_PIO(1);
436*842ff286SAnthony Kim 
437*842ff286SAnthony Kim 	val = be32_to_cpu(ucode[0]);
438*842ff286SAnthony Kim 	SET_PIO_SIG(HIDEEP_WRONLY | addr, val);
439*842ff286SAnthony Kim 
440*842ff286SAnthony Kim 	hideep_pgm_w_mem(ts, HIDEEP_FLASH_PIO_SIG | HIDEEP_WRONLY,
441*842ff286SAnthony Kim 			 ucode, xfer_count);
442*842ff286SAnthony Kim 
443*842ff286SAnthony Kim 	val = be32_to_cpu(ucode[xfer_count - 1]);
444*842ff286SAnthony Kim 	SET_PIO_SIG(124, val);
445*842ff286SAnthony Kim 
446*842ff286SAnthony Kim 	SET_FLASH_PIO(0);
447*842ff286SAnthony Kim 
448*842ff286SAnthony Kim 	usleep_range(1000, 1100);
449*842ff286SAnthony Kim 
450*842ff286SAnthony Kim 	error = hideep_check_status(ts);
451*842ff286SAnthony Kim 	if (error)
452*842ff286SAnthony Kim 		return -EBUSY;
453*842ff286SAnthony Kim 
454*842ff286SAnthony Kim 	SET_FLASH_HWCONTROL();
455*842ff286SAnthony Kim 
456*842ff286SAnthony Kim 	return 0;
457*842ff286SAnthony Kim }
458*842ff286SAnthony Kim 
459*842ff286SAnthony Kim static int hideep_program_nvm(struct hideep_ts *ts,
460*842ff286SAnthony Kim 			      const __be32 *ucode, size_t ucode_len)
461*842ff286SAnthony Kim {
462*842ff286SAnthony Kim 	struct pgm_packet *packet_r = (void *)ts->xfer_buf;
463*842ff286SAnthony Kim 	__be32 *current_ucode = packet_r->payload;
464*842ff286SAnthony Kim 	size_t xfer_len;
465*842ff286SAnthony Kim 	size_t xfer_count;
466*842ff286SAnthony Kim 	u32 addr = 0;
467*842ff286SAnthony Kim 	int error;
468*842ff286SAnthony Kim 
469*842ff286SAnthony Kim 	hideep_nvm_unlock(ts);
470*842ff286SAnthony Kim 
471*842ff286SAnthony Kim 	while (ucode_len > 0) {
472*842ff286SAnthony Kim 		xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE);
473*842ff286SAnthony Kim 		xfer_count = xfer_len / sizeof(*ucode);
474*842ff286SAnthony Kim 
475*842ff286SAnthony Kim 		error = hideep_pgm_r_mem(ts, 0x00000000 + addr,
476*842ff286SAnthony Kim 					 current_ucode, xfer_count);
477*842ff286SAnthony Kim 		if (error) {
478*842ff286SAnthony Kim 			dev_err(&ts->client->dev,
479*842ff286SAnthony Kim 				"%s: failed to read page at offset %#08x: %d\n",
480*842ff286SAnthony Kim 				__func__, addr, error);
481*842ff286SAnthony Kim 			return error;
482*842ff286SAnthony Kim 		}
483*842ff286SAnthony Kim 
484*842ff286SAnthony Kim 		/* See if the page needs updating */
485*842ff286SAnthony Kim 		if (memcmp(ucode, current_ucode, xfer_len)) {
486*842ff286SAnthony Kim 			error = hideep_program_page(ts, addr,
487*842ff286SAnthony Kim 						    ucode, xfer_count);
488*842ff286SAnthony Kim 			if (error) {
489*842ff286SAnthony Kim 				dev_err(&ts->client->dev,
490*842ff286SAnthony Kim 					"%s: iwrite failure @%#08x: %d\n",
491*842ff286SAnthony Kim 					__func__, addr, error);
492*842ff286SAnthony Kim 				return error;
493*842ff286SAnthony Kim 			}
494*842ff286SAnthony Kim 
495*842ff286SAnthony Kim 			usleep_range(1000, 1100);
496*842ff286SAnthony Kim 		}
497*842ff286SAnthony Kim 
498*842ff286SAnthony Kim 		ucode += xfer_count;
499*842ff286SAnthony Kim 		addr += xfer_len;
500*842ff286SAnthony Kim 		ucode_len -= xfer_len;
501*842ff286SAnthony Kim 	}
502*842ff286SAnthony Kim 
503*842ff286SAnthony Kim 	return 0;
504*842ff286SAnthony Kim }
505*842ff286SAnthony Kim 
506*842ff286SAnthony Kim static int hideep_verify_nvm(struct hideep_ts *ts,
507*842ff286SAnthony Kim 			     const __be32 *ucode, size_t ucode_len)
508*842ff286SAnthony Kim {
509*842ff286SAnthony Kim 	struct pgm_packet *packet_r = (void *)ts->xfer_buf;
510*842ff286SAnthony Kim 	__be32 *current_ucode = packet_r->payload;
511*842ff286SAnthony Kim 	size_t xfer_len;
512*842ff286SAnthony Kim 	size_t xfer_count;
513*842ff286SAnthony Kim 	u32 addr = 0;
514*842ff286SAnthony Kim 	int i;
515*842ff286SAnthony Kim 	int error;
516*842ff286SAnthony Kim 
517*842ff286SAnthony Kim 	while (ucode_len > 0) {
518*842ff286SAnthony Kim 		xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE);
519*842ff286SAnthony Kim 		xfer_count = xfer_len / sizeof(*ucode);
520*842ff286SAnthony Kim 
521*842ff286SAnthony Kim 		error = hideep_pgm_r_mem(ts, 0x00000000 + addr,
522*842ff286SAnthony Kim 					 current_ucode, xfer_count);
523*842ff286SAnthony Kim 		if (error) {
524*842ff286SAnthony Kim 			dev_err(&ts->client->dev,
525*842ff286SAnthony Kim 				"%s: failed to read page at offset %#08x: %d\n",
526*842ff286SAnthony Kim 				__func__, addr, error);
527*842ff286SAnthony Kim 			return error;
528*842ff286SAnthony Kim 		}
529*842ff286SAnthony Kim 
530*842ff286SAnthony Kim 		if (memcmp(ucode, current_ucode, xfer_len)) {
531*842ff286SAnthony Kim 			const u8 *ucode_bytes = (const u8 *)ucode;
532*842ff286SAnthony Kim 			const u8 *current_bytes = (const u8 *)current_ucode;
533*842ff286SAnthony Kim 
534*842ff286SAnthony Kim 			for (i = 0; i < xfer_len; i++)
535*842ff286SAnthony Kim 				if (ucode_bytes[i] != current_bytes[i])
536*842ff286SAnthony Kim 					dev_err(&ts->client->dev,
537*842ff286SAnthony Kim 						"%s: mismatch @%#08x: (%#02x vs %#02x)\n",
538*842ff286SAnthony Kim 						__func__, addr + i,
539*842ff286SAnthony Kim 						ucode_bytes[i],
540*842ff286SAnthony Kim 						current_bytes[i]);
541*842ff286SAnthony Kim 
542*842ff286SAnthony Kim 			return -EIO;
543*842ff286SAnthony Kim 		}
544*842ff286SAnthony Kim 
545*842ff286SAnthony Kim 		ucode += xfer_count;
546*842ff286SAnthony Kim 		addr += xfer_len;
547*842ff286SAnthony Kim 		ucode_len -= xfer_len;
548*842ff286SAnthony Kim 	}
549*842ff286SAnthony Kim 
550*842ff286SAnthony Kim 	return 0;
551*842ff286SAnthony Kim }
552*842ff286SAnthony Kim 
553*842ff286SAnthony Kim static int hideep_load_dwz(struct hideep_ts *ts)
554*842ff286SAnthony Kim {
555*842ff286SAnthony Kim 	u16 product_code;
556*842ff286SAnthony Kim 	int error;
557*842ff286SAnthony Kim 
558*842ff286SAnthony Kim 	error = hideep_enter_pgm(ts);
559*842ff286SAnthony Kim 	if (error)
560*842ff286SAnthony Kim 		return error;
561*842ff286SAnthony Kim 
562*842ff286SAnthony Kim 	msleep(50);
563*842ff286SAnthony Kim 
564*842ff286SAnthony Kim 	error = hideep_pgm_r_mem(ts, HIDEEP_DWZ_INFO,
565*842ff286SAnthony Kim 				 (void *)&ts->dwz_info,
566*842ff286SAnthony Kim 				 sizeof(ts->dwz_info) / sizeof(__be32));
567*842ff286SAnthony Kim 
568*842ff286SAnthony Kim 	SW_RESET_IN_PGM(10);
569*842ff286SAnthony Kim 	msleep(50);
570*842ff286SAnthony Kim 
571*842ff286SAnthony Kim 	if (error) {
572*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
573*842ff286SAnthony Kim 			"failed to fetch DWZ data: %d\n", error);
574*842ff286SAnthony Kim 		return error;
575*842ff286SAnthony Kim 	}
576*842ff286SAnthony Kim 
577*842ff286SAnthony Kim 	product_code = be16_to_cpu(ts->dwz_info.product_code);
578*842ff286SAnthony Kim 
579*842ff286SAnthony Kim 	switch (product_code & 0xF0) {
580*842ff286SAnthony Kim 	case 0x40:
581*842ff286SAnthony Kim 		dev_dbg(&ts->client->dev, "used crimson IC");
582*842ff286SAnthony Kim 		ts->fw_size = 1024 * 48;
583*842ff286SAnthony Kim 		ts->nvm_mask = 0x00310000;
584*842ff286SAnthony Kim 		break;
585*842ff286SAnthony Kim 	case 0x60:
586*842ff286SAnthony Kim 		dev_dbg(&ts->client->dev, "used lime IC");
587*842ff286SAnthony Kim 		ts->fw_size = 1024 * 64;
588*842ff286SAnthony Kim 		ts->nvm_mask = 0x0030027B;
589*842ff286SAnthony Kim 		break;
590*842ff286SAnthony Kim 	default:
591*842ff286SAnthony Kim 		dev_err(&ts->client->dev, "product code is wrong: %#04x",
592*842ff286SAnthony Kim 			product_code);
593*842ff286SAnthony Kim 		return -EINVAL;
594*842ff286SAnthony Kim 	}
595*842ff286SAnthony Kim 
596*842ff286SAnthony Kim 	dev_dbg(&ts->client->dev, "firmware release version: %#04x",
597*842ff286SAnthony Kim 		be16_to_cpu(ts->dwz_info.release_ver));
598*842ff286SAnthony Kim 
599*842ff286SAnthony Kim 	return 0;
600*842ff286SAnthony Kim }
601*842ff286SAnthony Kim 
602*842ff286SAnthony Kim static int hideep_flash_firmware(struct hideep_ts *ts,
603*842ff286SAnthony Kim 				 const __be32 *ucode, size_t ucode_len)
604*842ff286SAnthony Kim {
605*842ff286SAnthony Kim 	int retry_cnt = 3;
606*842ff286SAnthony Kim 	int error;
607*842ff286SAnthony Kim 
608*842ff286SAnthony Kim 	while (retry_cnt--) {
609*842ff286SAnthony Kim 		error = hideep_program_nvm(ts, ucode, ucode_len);
610*842ff286SAnthony Kim 		if (!error) {
611*842ff286SAnthony Kim 			error = hideep_verify_nvm(ts, ucode, ucode_len);
612*842ff286SAnthony Kim 			if (!error)
613*842ff286SAnthony Kim 				return 0;
614*842ff286SAnthony Kim 		}
615*842ff286SAnthony Kim 	}
616*842ff286SAnthony Kim 
617*842ff286SAnthony Kim 	return error;
618*842ff286SAnthony Kim }
619*842ff286SAnthony Kim 
620*842ff286SAnthony Kim static int hideep_update_firmware(struct hideep_ts *ts,
621*842ff286SAnthony Kim 				  const __be32 *ucode, size_t ucode_len)
622*842ff286SAnthony Kim {
623*842ff286SAnthony Kim 	int error, error2;
624*842ff286SAnthony Kim 
625*842ff286SAnthony Kim 	dev_dbg(&ts->client->dev, "starting firmware update");
626*842ff286SAnthony Kim 
627*842ff286SAnthony Kim 	/* enter program mode */
628*842ff286SAnthony Kim 	error = hideep_enter_pgm(ts);
629*842ff286SAnthony Kim 	if (error)
630*842ff286SAnthony Kim 		return error;
631*842ff286SAnthony Kim 
632*842ff286SAnthony Kim 	error = hideep_flash_firmware(ts, ucode, ucode_len);
633*842ff286SAnthony Kim 	if (error)
634*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
635*842ff286SAnthony Kim 			"firmware update failed: %d\n", error);
636*842ff286SAnthony Kim 	else
637*842ff286SAnthony Kim 		dev_dbg(&ts->client->dev, "firmware updated successfully\n");
638*842ff286SAnthony Kim 
639*842ff286SAnthony Kim 	SW_RESET_IN_PGM(1000);
640*842ff286SAnthony Kim 
641*842ff286SAnthony Kim 	error2 = hideep_load_dwz(ts);
642*842ff286SAnthony Kim 	if (error2)
643*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
644*842ff286SAnthony Kim 			"failed to load dwz after firmware update: %d\n",
645*842ff286SAnthony Kim 			error2);
646*842ff286SAnthony Kim 
647*842ff286SAnthony Kim 	return error ?: error2;
648*842ff286SAnthony Kim }
649*842ff286SAnthony Kim 
650*842ff286SAnthony Kim static int hideep_power_on(struct hideep_ts *ts)
651*842ff286SAnthony Kim {
652*842ff286SAnthony Kim 	int error = 0;
653*842ff286SAnthony Kim 
654*842ff286SAnthony Kim 	error = regulator_enable(ts->vcc_vdd);
655*842ff286SAnthony Kim 	if (error)
656*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
657*842ff286SAnthony Kim 			"failed to enable 'vdd' regulator: %d", error);
658*842ff286SAnthony Kim 
659*842ff286SAnthony Kim 	usleep_range(999, 1000);
660*842ff286SAnthony Kim 
661*842ff286SAnthony Kim 	error = regulator_enable(ts->vcc_vid);
662*842ff286SAnthony Kim 	if (error)
663*842ff286SAnthony Kim 		dev_err(&ts->client->dev,
664*842ff286SAnthony Kim 			"failed to enable 'vcc_vid' regulator: %d",
665*842ff286SAnthony Kim 			error);
666*842ff286SAnthony Kim 
667*842ff286SAnthony Kim 	msleep(30);
668*842ff286SAnthony Kim 
669*842ff286SAnthony Kim 	if (ts->reset_gpio) {
670*842ff286SAnthony Kim 		gpiod_set_value_cansleep(ts->reset_gpio, 0);
671*842ff286SAnthony Kim 	} else {
672*842ff286SAnthony Kim 		error = regmap_write(ts->reg, HIDEEP_RESET_CMD, 0x01);
673*842ff286SAnthony Kim 		if (error)
674*842ff286SAnthony Kim 			dev_err(&ts->client->dev,
675*842ff286SAnthony Kim 				"failed to send 'reset' command: %d\n", error);
676*842ff286SAnthony Kim 	}
677*842ff286SAnthony Kim 
678*842ff286SAnthony Kim 	msleep(50);
679*842ff286SAnthony Kim 
680*842ff286SAnthony Kim 	return error;
681*842ff286SAnthony Kim }
682*842ff286SAnthony Kim 
683*842ff286SAnthony Kim static void hideep_power_off(void *data)
684*842ff286SAnthony Kim {
685*842ff286SAnthony Kim 	struct hideep_ts *ts = data;
686*842ff286SAnthony Kim 
687*842ff286SAnthony Kim 	if (ts->reset_gpio)
688*842ff286SAnthony Kim 		gpiod_set_value(ts->reset_gpio, 1);
689*842ff286SAnthony Kim 
690*842ff286SAnthony Kim 	regulator_disable(ts->vcc_vid);
691*842ff286SAnthony Kim 	regulator_disable(ts->vcc_vdd);
692*842ff286SAnthony Kim }
693*842ff286SAnthony Kim 
694*842ff286SAnthony Kim #define __GET_MT_TOOL_TYPE(type) ((type) == 0x01 ? MT_TOOL_FINGER : MT_TOOL_PEN)
695*842ff286SAnthony Kim 
696*842ff286SAnthony Kim static void hideep_report_slot(struct input_dev *input,
697*842ff286SAnthony Kim 			       const struct hideep_event *event)
698*842ff286SAnthony Kim {
699*842ff286SAnthony Kim 	input_mt_slot(input, event->index & 0x0f);
700*842ff286SAnthony Kim 	input_mt_report_slot_state(input,
701*842ff286SAnthony Kim 				   __GET_MT_TOOL_TYPE(event->type),
702*842ff286SAnthony Kim 				   !(event->flag & HIDEEP_MT_RELEASED));
703*842ff286SAnthony Kim 	if (!(event->flag & HIDEEP_MT_RELEASED)) {
704*842ff286SAnthony Kim 		input_report_abs(input, ABS_MT_POSITION_X,
705*842ff286SAnthony Kim 				 le16_to_cpup(&event->x));
706*842ff286SAnthony Kim 		input_report_abs(input, ABS_MT_POSITION_Y,
707*842ff286SAnthony Kim 				 le16_to_cpup(&event->y));
708*842ff286SAnthony Kim 		input_report_abs(input, ABS_MT_PRESSURE,
709*842ff286SAnthony Kim 				 le16_to_cpup(&event->z));
710*842ff286SAnthony Kim 		input_report_abs(input, ABS_MT_TOUCH_MAJOR, event->w);
711*842ff286SAnthony Kim 	}
712*842ff286SAnthony Kim }
713*842ff286SAnthony Kim 
714*842ff286SAnthony Kim static void hideep_parse_and_report(struct hideep_ts *ts)
715*842ff286SAnthony Kim {
716*842ff286SAnthony Kim 	const struct hideep_event *events =
717*842ff286SAnthony Kim 			(void *)&ts->xfer_buf[HIDEEP_TOUCH_EVENT_INDEX];
718*842ff286SAnthony Kim 	const u8 *keys = &ts->xfer_buf[HIDEEP_KEY_EVENT_INDEX];
719*842ff286SAnthony Kim 	int touch_count = ts->xfer_buf[0];
720*842ff286SAnthony Kim 	int key_count = ts->xfer_buf[1] & 0x0f;
721*842ff286SAnthony Kim 	int lpm_count = ts->xfer_buf[1] & 0xf0;
722*842ff286SAnthony Kim 	int i;
723*842ff286SAnthony Kim 
724*842ff286SAnthony Kim 	/* get touch event count */
725*842ff286SAnthony Kim 	dev_dbg(&ts->client->dev, "mt = %d, key = %d, lpm = %02x",
726*842ff286SAnthony Kim 		touch_count, key_count, lpm_count);
727*842ff286SAnthony Kim 
728*842ff286SAnthony Kim 	touch_count = min(touch_count, HIDEEP_MT_MAX);
729*842ff286SAnthony Kim 	for (i = 0; i < touch_count; i++)
730*842ff286SAnthony Kim 		hideep_report_slot(ts->input_dev, events + i);
731*842ff286SAnthony Kim 
732*842ff286SAnthony Kim 	key_count = min(key_count, HIDEEP_KEY_MAX);
733*842ff286SAnthony Kim 	for (i = 0; i < key_count; i++) {
734*842ff286SAnthony Kim 		u8 key_data = keys[i * 2];
735*842ff286SAnthony Kim 
736*842ff286SAnthony Kim 		input_report_key(ts->input_dev,
737*842ff286SAnthony Kim 				 ts->key_codes[key_data & HIDEEP_KEY_IDX_MASK],
738*842ff286SAnthony Kim 				 key_data & HIDEEP_KEY_PRESSED_MASK);
739*842ff286SAnthony Kim 	}
740*842ff286SAnthony Kim 
741*842ff286SAnthony Kim 	input_mt_sync_frame(ts->input_dev);
742*842ff286SAnthony Kim 	input_sync(ts->input_dev);
743*842ff286SAnthony Kim }
744*842ff286SAnthony Kim 
745*842ff286SAnthony Kim static irqreturn_t hideep_irq(int irq, void *handle)
746*842ff286SAnthony Kim {
747*842ff286SAnthony Kim 	struct hideep_ts *ts = handle;
748*842ff286SAnthony Kim 	int error;
749*842ff286SAnthony Kim 
750*842ff286SAnthony Kim 	BUILD_BUG_ON(HIDEEP_MAX_EVENT > HIDEEP_XFER_BUF_SIZE);
751*842ff286SAnthony Kim 
752*842ff286SAnthony Kim 	error = regmap_bulk_read(ts->reg, HIDEEP_EVENT_ADDR,
753*842ff286SAnthony Kim 				 ts->xfer_buf, HIDEEP_MAX_EVENT / 2);
754*842ff286SAnthony Kim 	if (error) {
755*842ff286SAnthony Kim 		dev_err(&ts->client->dev, "failed to read events: %d\n", error);
756*842ff286SAnthony Kim 		goto out;
757*842ff286SAnthony Kim 	}
758*842ff286SAnthony Kim 
759*842ff286SAnthony Kim 	hideep_parse_and_report(ts);
760*842ff286SAnthony Kim 
761*842ff286SAnthony Kim out:
762*842ff286SAnthony Kim 	return IRQ_HANDLED;
763*842ff286SAnthony Kim }
764*842ff286SAnthony Kim 
765*842ff286SAnthony Kim static int hideep_get_axis_info(struct hideep_ts *ts)
766*842ff286SAnthony Kim {
767*842ff286SAnthony Kim 	__le16 val[2];
768*842ff286SAnthony Kim 	int error;
769*842ff286SAnthony Kim 
770*842ff286SAnthony Kim 	error = regmap_bulk_read(ts->reg, 0x28, val, ARRAY_SIZE(val));
771*842ff286SAnthony Kim 	if (error)
772*842ff286SAnthony Kim 		return error;
773*842ff286SAnthony Kim 
774*842ff286SAnthony Kim 	ts->prop.max_x = le16_to_cpup(val);
775*842ff286SAnthony Kim 	ts->prop.max_y = le16_to_cpup(val + 1);
776*842ff286SAnthony Kim 
777*842ff286SAnthony Kim 	dev_dbg(&ts->client->dev, "X: %d, Y: %d",
778*842ff286SAnthony Kim 		ts->prop.max_x, ts->prop.max_y);
779*842ff286SAnthony Kim 
780*842ff286SAnthony Kim 	return 0;
781*842ff286SAnthony Kim }
782*842ff286SAnthony Kim 
783*842ff286SAnthony Kim static int hideep_init_input(struct hideep_ts *ts)
784*842ff286SAnthony Kim {
785*842ff286SAnthony Kim 	struct device *dev = &ts->client->dev;
786*842ff286SAnthony Kim 	int i;
787*842ff286SAnthony Kim 	int error;
788*842ff286SAnthony Kim 
789*842ff286SAnthony Kim 	ts->input_dev = devm_input_allocate_device(dev);
790*842ff286SAnthony Kim 	if (!ts->input_dev) {
791*842ff286SAnthony Kim 		dev_err(dev, "failed to allocate input device\n");
792*842ff286SAnthony Kim 		return -ENOMEM;
793*842ff286SAnthony Kim 	}
794*842ff286SAnthony Kim 
795*842ff286SAnthony Kim 	ts->input_dev->name = HIDEEP_TS_NAME;
796*842ff286SAnthony Kim 	ts->input_dev->id.bustype = BUS_I2C;
797*842ff286SAnthony Kim 	input_set_drvdata(ts->input_dev, ts);
798*842ff286SAnthony Kim 
799*842ff286SAnthony Kim 	input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_X);
800*842ff286SAnthony Kim 	input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_Y);
801*842ff286SAnthony Kim 	input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 65535, 0, 0);
802*842ff286SAnthony Kim 	input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0);
803*842ff286SAnthony Kim 	input_set_abs_params(ts->input_dev, ABS_MT_TOOL_TYPE,
804*842ff286SAnthony Kim 			     0, MT_TOOL_MAX, 0, 0);
805*842ff286SAnthony Kim 	touchscreen_parse_properties(ts->input_dev, true, &ts->prop);
806*842ff286SAnthony Kim 
807*842ff286SAnthony Kim 	if (ts->prop.max_x == 0 || ts->prop.max_y == 0) {
808*842ff286SAnthony Kim 		error = hideep_get_axis_info(ts);
809*842ff286SAnthony Kim 		if (error)
810*842ff286SAnthony Kim 			return error;
811*842ff286SAnthony Kim 	}
812*842ff286SAnthony Kim 
813*842ff286SAnthony Kim 	error = input_mt_init_slots(ts->input_dev, HIDEEP_MT_MAX,
814*842ff286SAnthony Kim 				    INPUT_MT_DIRECT);
815*842ff286SAnthony Kim 	if (error)
816*842ff286SAnthony Kim 		return error;
817*842ff286SAnthony Kim 
818*842ff286SAnthony Kim 	ts->key_num = device_property_read_u32_array(dev, "linux,keycodes",
819*842ff286SAnthony Kim 						     NULL, 0);
820*842ff286SAnthony Kim 	if (ts->key_num > HIDEEP_KEY_MAX) {
821*842ff286SAnthony Kim 		dev_err(dev, "too many keys defined: %d\n",
822*842ff286SAnthony Kim 			ts->key_num);
823*842ff286SAnthony Kim 		return -EINVAL;
824*842ff286SAnthony Kim 	}
825*842ff286SAnthony Kim 
826*842ff286SAnthony Kim 	if (ts->key_num <= 0) {
827*842ff286SAnthony Kim 		dev_dbg(dev,
828*842ff286SAnthony Kim 			"missing or malformed 'linux,keycodes' property\n");
829*842ff286SAnthony Kim 	} else {
830*842ff286SAnthony Kim 		error = device_property_read_u32_array(dev, "linux,keycodes",
831*842ff286SAnthony Kim 						       ts->key_codes,
832*842ff286SAnthony Kim 						       ts->key_num);
833*842ff286SAnthony Kim 		if (error) {
834*842ff286SAnthony Kim 			dev_dbg(dev, "failed to read keymap: %d", error);
835*842ff286SAnthony Kim 			return error;
836*842ff286SAnthony Kim 		}
837*842ff286SAnthony Kim 
838*842ff286SAnthony Kim 		if (ts->key_num) {
839*842ff286SAnthony Kim 			ts->input_dev->keycode = ts->key_codes;
840*842ff286SAnthony Kim 			ts->input_dev->keycodesize = sizeof(ts->key_codes[0]);
841*842ff286SAnthony Kim 			ts->input_dev->keycodemax = ts->key_num;
842*842ff286SAnthony Kim 
843*842ff286SAnthony Kim 			for (i = 0; i < ts->key_num; i++)
844*842ff286SAnthony Kim 				input_set_capability(ts->input_dev, EV_KEY,
845*842ff286SAnthony Kim 					ts->key_codes[i]);
846*842ff286SAnthony Kim 		}
847*842ff286SAnthony Kim 	}
848*842ff286SAnthony Kim 
849*842ff286SAnthony Kim 	error = input_register_device(ts->input_dev);
850*842ff286SAnthony Kim 	if (error) {
851*842ff286SAnthony Kim 		dev_err(dev, "failed to register input device: %d", error);
852*842ff286SAnthony Kim 		return error;
853*842ff286SAnthony Kim 	}
854*842ff286SAnthony Kim 
855*842ff286SAnthony Kim 	return 0;
856*842ff286SAnthony Kim }
857*842ff286SAnthony Kim 
858*842ff286SAnthony Kim static ssize_t hideep_update_fw(struct device *dev,
859*842ff286SAnthony Kim 				struct device_attribute *attr,
860*842ff286SAnthony Kim 				const char *buf, size_t count)
861*842ff286SAnthony Kim {
862*842ff286SAnthony Kim 	struct i2c_client *client = to_i2c_client(dev);
863*842ff286SAnthony Kim 	struct hideep_ts *ts = i2c_get_clientdata(client);
864*842ff286SAnthony Kim 	const struct firmware *fw_entry;
865*842ff286SAnthony Kim 	char *fw_name;
866*842ff286SAnthony Kim 	int mode;
867*842ff286SAnthony Kim 	int error;
868*842ff286SAnthony Kim 
869*842ff286SAnthony Kim 	error = kstrtoint(buf, 0, &mode);
870*842ff286SAnthony Kim 	if (error)
871*842ff286SAnthony Kim 		return error;
872*842ff286SAnthony Kim 
873*842ff286SAnthony Kim 	fw_name = kasprintf(GFP_KERNEL, "hideep_ts_%04x.bin",
874*842ff286SAnthony Kim 			    be16_to_cpu(ts->dwz_info.product_id));
875*842ff286SAnthony Kim 	if (!fw_name)
876*842ff286SAnthony Kim 		return -ENOMEM;
877*842ff286SAnthony Kim 
878*842ff286SAnthony Kim 	error = request_firmware(&fw_entry, fw_name, dev);
879*842ff286SAnthony Kim 	if (error) {
880*842ff286SAnthony Kim 		dev_err(dev, "failed to request firmware %s: %d",
881*842ff286SAnthony Kim 			fw_name, error);
882*842ff286SAnthony Kim 		goto out_free_fw_name;
883*842ff286SAnthony Kim 	}
884*842ff286SAnthony Kim 
885*842ff286SAnthony Kim 	if (fw_entry->size % sizeof(__be32)) {
886*842ff286SAnthony Kim 		dev_err(dev, "invalid firmware size %zu\n", fw_entry->size);
887*842ff286SAnthony Kim 		error = -EINVAL;
888*842ff286SAnthony Kim 		goto out_release_fw;
889*842ff286SAnthony Kim 	}
890*842ff286SAnthony Kim 
891*842ff286SAnthony Kim 	if (fw_entry->size > ts->fw_size) {
892*842ff286SAnthony Kim 		dev_err(dev, "fw size (%zu) is too big (memory size %d)\n",
893*842ff286SAnthony Kim 			fw_entry->size, ts->fw_size);
894*842ff286SAnthony Kim 		error = -EFBIG;
895*842ff286SAnthony Kim 		goto out_release_fw;
896*842ff286SAnthony Kim 	}
897*842ff286SAnthony Kim 
898*842ff286SAnthony Kim 	mutex_lock(&ts->dev_mutex);
899*842ff286SAnthony Kim 	disable_irq(client->irq);
900*842ff286SAnthony Kim 
901*842ff286SAnthony Kim 	error = hideep_update_firmware(ts, (const __be32 *)fw_entry->data,
902*842ff286SAnthony Kim 				       fw_entry->size);
903*842ff286SAnthony Kim 
904*842ff286SAnthony Kim 	enable_irq(client->irq);
905*842ff286SAnthony Kim 	mutex_unlock(&ts->dev_mutex);
906*842ff286SAnthony Kim 
907*842ff286SAnthony Kim out_release_fw:
908*842ff286SAnthony Kim 	release_firmware(fw_entry);
909*842ff286SAnthony Kim out_free_fw_name:
910*842ff286SAnthony Kim 	kfree(fw_name);
911*842ff286SAnthony Kim 
912*842ff286SAnthony Kim 	return error ?: count;
913*842ff286SAnthony Kim }
914*842ff286SAnthony Kim 
915*842ff286SAnthony Kim static ssize_t hideep_fw_version_show(struct device *dev,
916*842ff286SAnthony Kim 				      struct device_attribute *attr, char *buf)
917*842ff286SAnthony Kim {
918*842ff286SAnthony Kim 	struct i2c_client *client = to_i2c_client(dev);
919*842ff286SAnthony Kim 	struct hideep_ts *ts = i2c_get_clientdata(client);
920*842ff286SAnthony Kim 	ssize_t len;
921*842ff286SAnthony Kim 
922*842ff286SAnthony Kim 	mutex_lock(&ts->dev_mutex);
923*842ff286SAnthony Kim 	len = scnprintf(buf, PAGE_SIZE, "%04x\n",
924*842ff286SAnthony Kim 			be16_to_cpu(ts->dwz_info.release_ver));
925*842ff286SAnthony Kim 	mutex_unlock(&ts->dev_mutex);
926*842ff286SAnthony Kim 
927*842ff286SAnthony Kim 	return len;
928*842ff286SAnthony Kim }
929*842ff286SAnthony Kim 
930*842ff286SAnthony Kim static ssize_t hideep_product_id_show(struct device *dev,
931*842ff286SAnthony Kim 				      struct device_attribute *attr, char *buf)
932*842ff286SAnthony Kim {
933*842ff286SAnthony Kim 	struct i2c_client *client = to_i2c_client(dev);
934*842ff286SAnthony Kim 	struct hideep_ts *ts = i2c_get_clientdata(client);
935*842ff286SAnthony Kim 	ssize_t len;
936*842ff286SAnthony Kim 
937*842ff286SAnthony Kim 	mutex_lock(&ts->dev_mutex);
938*842ff286SAnthony Kim 	len = scnprintf(buf, PAGE_SIZE, "%04x\n",
939*842ff286SAnthony Kim 			be16_to_cpu(ts->dwz_info.product_id));
940*842ff286SAnthony Kim 	mutex_unlock(&ts->dev_mutex);
941*842ff286SAnthony Kim 
942*842ff286SAnthony Kim 	return len;
943*842ff286SAnthony Kim }
944*842ff286SAnthony Kim 
945*842ff286SAnthony Kim static DEVICE_ATTR(version, 0664, hideep_fw_version_show, NULL);
946*842ff286SAnthony Kim static DEVICE_ATTR(product_id, 0664, hideep_product_id_show, NULL);
947*842ff286SAnthony Kim static DEVICE_ATTR(update_fw, 0664, NULL, hideep_update_fw);
948*842ff286SAnthony Kim 
949*842ff286SAnthony Kim static struct attribute *hideep_ts_sysfs_entries[] = {
950*842ff286SAnthony Kim 	&dev_attr_version.attr,
951*842ff286SAnthony Kim 	&dev_attr_product_id.attr,
952*842ff286SAnthony Kim 	&dev_attr_update_fw.attr,
953*842ff286SAnthony Kim 	NULL,
954*842ff286SAnthony Kim };
955*842ff286SAnthony Kim 
956*842ff286SAnthony Kim static const struct attribute_group hideep_ts_attr_group = {
957*842ff286SAnthony Kim 	.attrs = hideep_ts_sysfs_entries,
958*842ff286SAnthony Kim };
959*842ff286SAnthony Kim 
960*842ff286SAnthony Kim static int __maybe_unused hideep_suspend(struct device *dev)
961*842ff286SAnthony Kim {
962*842ff286SAnthony Kim 	struct i2c_client *client = to_i2c_client(dev);
963*842ff286SAnthony Kim 	struct hideep_ts *ts = i2c_get_clientdata(client);
964*842ff286SAnthony Kim 
965*842ff286SAnthony Kim 	disable_irq(client->irq);
966*842ff286SAnthony Kim 	hideep_power_off(ts);
967*842ff286SAnthony Kim 
968*842ff286SAnthony Kim 	return 0;
969*842ff286SAnthony Kim }
970*842ff286SAnthony Kim 
971*842ff286SAnthony Kim static int __maybe_unused hideep_resume(struct device *dev)
972*842ff286SAnthony Kim {
973*842ff286SAnthony Kim 	struct i2c_client *client = to_i2c_client(dev);
974*842ff286SAnthony Kim 	struct hideep_ts *ts = i2c_get_clientdata(client);
975*842ff286SAnthony Kim 	int error;
976*842ff286SAnthony Kim 
977*842ff286SAnthony Kim 	error = hideep_power_on(ts);
978*842ff286SAnthony Kim 	if (error) {
979*842ff286SAnthony Kim 		dev_err(&client->dev, "power on failed");
980*842ff286SAnthony Kim 		return error;
981*842ff286SAnthony Kim 	}
982*842ff286SAnthony Kim 
983*842ff286SAnthony Kim 	enable_irq(client->irq);
984*842ff286SAnthony Kim 
985*842ff286SAnthony Kim 	return 0;
986*842ff286SAnthony Kim }
987*842ff286SAnthony Kim 
988*842ff286SAnthony Kim static SIMPLE_DEV_PM_OPS(hideep_pm_ops, hideep_suspend, hideep_resume);
989*842ff286SAnthony Kim 
990*842ff286SAnthony Kim static const struct regmap_config hideep_regmap_config = {
991*842ff286SAnthony Kim 	.reg_bits = 16,
992*842ff286SAnthony Kim 	.reg_format_endian = REGMAP_ENDIAN_LITTLE,
993*842ff286SAnthony Kim 	.val_bits = 16,
994*842ff286SAnthony Kim 	.val_format_endian = REGMAP_ENDIAN_LITTLE,
995*842ff286SAnthony Kim 	.max_register = 0xffff,
996*842ff286SAnthony Kim };
997*842ff286SAnthony Kim 
998*842ff286SAnthony Kim static int hideep_probe(struct i2c_client *client,
999*842ff286SAnthony Kim 			const struct i2c_device_id *id)
1000*842ff286SAnthony Kim {
1001*842ff286SAnthony Kim 	struct hideep_ts *ts;
1002*842ff286SAnthony Kim 	int error;
1003*842ff286SAnthony Kim 
1004*842ff286SAnthony Kim 	/* check i2c bus */
1005*842ff286SAnthony Kim 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
1006*842ff286SAnthony Kim 		dev_err(&client->dev, "check i2c device error");
1007*842ff286SAnthony Kim 		return -ENODEV;
1008*842ff286SAnthony Kim 	}
1009*842ff286SAnthony Kim 
1010*842ff286SAnthony Kim 	if (client->irq <= 0) {
1011*842ff286SAnthony Kim 		dev_err(&client->dev, "missing irq: %d\n", client->irq);
1012*842ff286SAnthony Kim 		return -EINVAL;
1013*842ff286SAnthony Kim 	}
1014*842ff286SAnthony Kim 
1015*842ff286SAnthony Kim 	ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL);
1016*842ff286SAnthony Kim 	if (!ts)
1017*842ff286SAnthony Kim 		return -ENOMEM;
1018*842ff286SAnthony Kim 
1019*842ff286SAnthony Kim 	ts->client = client;
1020*842ff286SAnthony Kim 	i2c_set_clientdata(client, ts);
1021*842ff286SAnthony Kim 	mutex_init(&ts->dev_mutex);
1022*842ff286SAnthony Kim 
1023*842ff286SAnthony Kim 	ts->reg = devm_regmap_init_i2c(client, &hideep_regmap_config);
1024*842ff286SAnthony Kim 	if (IS_ERR(ts->reg)) {
1025*842ff286SAnthony Kim 		error = PTR_ERR(ts->reg);
1026*842ff286SAnthony Kim 		dev_err(&client->dev,
1027*842ff286SAnthony Kim 			"failed to initialize regmap: %d\n", error);
1028*842ff286SAnthony Kim 		return error;
1029*842ff286SAnthony Kim 	}
1030*842ff286SAnthony Kim 
1031*842ff286SAnthony Kim 	ts->vcc_vdd = devm_regulator_get(&client->dev, "vdd");
1032*842ff286SAnthony Kim 	if (IS_ERR(ts->vcc_vdd))
1033*842ff286SAnthony Kim 		return PTR_ERR(ts->vcc_vdd);
1034*842ff286SAnthony Kim 
1035*842ff286SAnthony Kim 	ts->vcc_vid = devm_regulator_get(&client->dev, "vid");
1036*842ff286SAnthony Kim 	if (IS_ERR(ts->vcc_vid))
1037*842ff286SAnthony Kim 		return PTR_ERR(ts->vcc_vid);
1038*842ff286SAnthony Kim 
1039*842ff286SAnthony Kim 	ts->reset_gpio = devm_gpiod_get_optional(&client->dev,
1040*842ff286SAnthony Kim 						 "reset", GPIOD_OUT_HIGH);
1041*842ff286SAnthony Kim 	if (IS_ERR(ts->reset_gpio))
1042*842ff286SAnthony Kim 		return PTR_ERR(ts->reset_gpio);
1043*842ff286SAnthony Kim 
1044*842ff286SAnthony Kim 	error = hideep_power_on(ts);
1045*842ff286SAnthony Kim 	if (error) {
1046*842ff286SAnthony Kim 		dev_err(&client->dev, "power on failed: %d\n", error);
1047*842ff286SAnthony Kim 		return error;
1048*842ff286SAnthony Kim 	}
1049*842ff286SAnthony Kim 
1050*842ff286SAnthony Kim 	error = devm_add_action_or_reset(&client->dev, hideep_power_off, ts);
1051*842ff286SAnthony Kim 	if (error)
1052*842ff286SAnthony Kim 		return error;
1053*842ff286SAnthony Kim 
1054*842ff286SAnthony Kim 	error = hideep_load_dwz(ts);
1055*842ff286SAnthony Kim 	if (error) {
1056*842ff286SAnthony Kim 		dev_err(&client->dev, "failed to load dwz: %d", error);
1057*842ff286SAnthony Kim 		return error;
1058*842ff286SAnthony Kim 	}
1059*842ff286SAnthony Kim 
1060*842ff286SAnthony Kim 	error = hideep_init_input(ts);
1061*842ff286SAnthony Kim 	if (error)
1062*842ff286SAnthony Kim 		return error;
1063*842ff286SAnthony Kim 
1064*842ff286SAnthony Kim 	error = devm_request_threaded_irq(&client->dev, client->irq,
1065*842ff286SAnthony Kim 					  NULL, hideep_irq, IRQF_ONESHOT,
1066*842ff286SAnthony Kim 					  client->name, ts);
1067*842ff286SAnthony Kim 	if (error) {
1068*842ff286SAnthony Kim 		dev_err(&client->dev, "failed to request irq %d: %d\n",
1069*842ff286SAnthony Kim 			client->irq, error);
1070*842ff286SAnthony Kim 		return error;
1071*842ff286SAnthony Kim 	}
1072*842ff286SAnthony Kim 
1073*842ff286SAnthony Kim 	error = devm_device_add_group(&client->dev, &hideep_ts_attr_group);
1074*842ff286SAnthony Kim 	if (error) {
1075*842ff286SAnthony Kim 		dev_err(&client->dev,
1076*842ff286SAnthony Kim 			"failed to add sysfs attributes: %d\n", error);
1077*842ff286SAnthony Kim 		return error;
1078*842ff286SAnthony Kim 	}
1079*842ff286SAnthony Kim 
1080*842ff286SAnthony Kim 	return 0;
1081*842ff286SAnthony Kim }
1082*842ff286SAnthony Kim 
1083*842ff286SAnthony Kim static const struct i2c_device_id hideep_i2c_id[] = {
1084*842ff286SAnthony Kim 	{ HIDEEP_I2C_NAME, 0 },
1085*842ff286SAnthony Kim 	{ }
1086*842ff286SAnthony Kim };
1087*842ff286SAnthony Kim MODULE_DEVICE_TABLE(i2c, hideep_i2c_id);
1088*842ff286SAnthony Kim 
1089*842ff286SAnthony Kim #ifdef CONFIG_ACPI
1090*842ff286SAnthony Kim static const struct acpi_device_id hideep_acpi_id[] = {
1091*842ff286SAnthony Kim 	{ "HIDP0001", 0 },
1092*842ff286SAnthony Kim 	{ }
1093*842ff286SAnthony Kim };
1094*842ff286SAnthony Kim MODULE_DEVICE_TABLE(acpi, hideep_acpi_id);
1095*842ff286SAnthony Kim #endif
1096*842ff286SAnthony Kim 
1097*842ff286SAnthony Kim #ifdef CONFIG_OF
1098*842ff286SAnthony Kim static const struct of_device_id hideep_match_table[] = {
1099*842ff286SAnthony Kim 	{ .compatible = "hideep,hideep-ts" },
1100*842ff286SAnthony Kim 	{ }
1101*842ff286SAnthony Kim };
1102*842ff286SAnthony Kim MODULE_DEVICE_TABLE(of, hideep_match_table);
1103*842ff286SAnthony Kim #endif
1104*842ff286SAnthony Kim 
1105*842ff286SAnthony Kim static struct i2c_driver hideep_driver = {
1106*842ff286SAnthony Kim 	.driver = {
1107*842ff286SAnthony Kim 		.name			= HIDEEP_I2C_NAME,
1108*842ff286SAnthony Kim 		.of_match_table		= of_match_ptr(hideep_match_table),
1109*842ff286SAnthony Kim 		.acpi_match_table	= ACPI_PTR(hideep_acpi_id),
1110*842ff286SAnthony Kim 		.pm			= &hideep_pm_ops,
1111*842ff286SAnthony Kim 	},
1112*842ff286SAnthony Kim 	.id_table	= hideep_i2c_id,
1113*842ff286SAnthony Kim 	.probe		= hideep_probe,
1114*842ff286SAnthony Kim };
1115*842ff286SAnthony Kim 
1116*842ff286SAnthony Kim module_i2c_driver(hideep_driver);
1117*842ff286SAnthony Kim 
1118*842ff286SAnthony Kim MODULE_DESCRIPTION("Driver for HiDeep Touchscreen Controller");
1119*842ff286SAnthony Kim MODULE_AUTHOR("anthony.kim@hideep.com");
1120*842ff286SAnthony Kim MODULE_LICENSE("GPL v2");
1121