1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 29ee0a055SDanilo Krummrich /* 39ee0a055SDanilo Krummrich * GPIO based serio bus driver for bit banging the PS/2 protocol 49ee0a055SDanilo Krummrich * 59ee0a055SDanilo Krummrich * Author: Danilo Krummrich <danilokrummrich@dk-develop.de> 69ee0a055SDanilo Krummrich */ 79ee0a055SDanilo Krummrich 89ee0a055SDanilo Krummrich #include <linux/gpio/consumer.h> 99ee0a055SDanilo Krummrich #include <linux/interrupt.h> 109ee0a055SDanilo Krummrich #include <linux/module.h> 119ee0a055SDanilo Krummrich #include <linux/serio.h> 129ee0a055SDanilo Krummrich #include <linux/slab.h> 139ee0a055SDanilo Krummrich #include <linux/platform_device.h> 149ee0a055SDanilo Krummrich #include <linux/workqueue.h> 159ee0a055SDanilo Krummrich #include <linux/completion.h> 169ee0a055SDanilo Krummrich #include <linux/mutex.h> 179ee0a055SDanilo Krummrich #include <linux/preempt.h> 189ee0a055SDanilo Krummrich #include <linux/property.h> 199ee0a055SDanilo Krummrich #include <linux/of.h> 209ee0a055SDanilo Krummrich #include <linux/jiffies.h> 219ee0a055SDanilo Krummrich #include <linux/delay.h> 222fa9c57aSDanilo Krummrich #include <linux/timekeeping.h> 239ee0a055SDanilo Krummrich 249ee0a055SDanilo Krummrich #define DRIVER_NAME "ps2-gpio" 259ee0a055SDanilo Krummrich 269ee0a055SDanilo Krummrich #define PS2_MODE_RX 0 279ee0a055SDanilo Krummrich #define PS2_MODE_TX 1 289ee0a055SDanilo Krummrich 299ee0a055SDanilo Krummrich #define PS2_START_BIT 0 309ee0a055SDanilo Krummrich #define PS2_DATA_BIT0 1 319ee0a055SDanilo Krummrich #define PS2_DATA_BIT1 2 329ee0a055SDanilo Krummrich #define PS2_DATA_BIT2 3 339ee0a055SDanilo Krummrich #define PS2_DATA_BIT3 4 349ee0a055SDanilo Krummrich #define PS2_DATA_BIT4 5 359ee0a055SDanilo Krummrich #define PS2_DATA_BIT5 6 369ee0a055SDanilo Krummrich #define PS2_DATA_BIT6 7 379ee0a055SDanilo Krummrich #define PS2_DATA_BIT7 8 389ee0a055SDanilo Krummrich #define PS2_PARITY_BIT 9 399ee0a055SDanilo Krummrich #define PS2_STOP_BIT 10 406283cc9eSDanilo Krummrich #define PS2_ACK_BIT 11 419ee0a055SDanilo Krummrich 429ee0a055SDanilo Krummrich #define PS2_DEV_RET_ACK 0xfa 439ee0a055SDanilo Krummrich #define PS2_DEV_RET_NACK 0xfe 449ee0a055SDanilo Krummrich 459ee0a055SDanilo Krummrich #define PS2_CMD_RESEND 0xfe 469ee0a055SDanilo Krummrich 472fa9c57aSDanilo Krummrich /* 482fa9c57aSDanilo Krummrich * The PS2 protocol specifies a clock frequency between 10kHz and 16.7kHz, 492fa9c57aSDanilo Krummrich * therefore the maximal interrupt interval should be 100us and the minimum 502fa9c57aSDanilo Krummrich * interrupt interval should be ~60us. Let's allow +/- 20us for frequency 512fa9c57aSDanilo Krummrich * deviations and interrupt latency. 522fa9c57aSDanilo Krummrich * 532fa9c57aSDanilo Krummrich * The data line must be samples after ~30us to 50us after the falling edge, 542fa9c57aSDanilo Krummrich * since the device updates the data line at the rising edge. 552fa9c57aSDanilo Krummrich * 562fa9c57aSDanilo Krummrich * ___ ______ ______ ______ ___ 572fa9c57aSDanilo Krummrich * \ / \ / \ / \ / 582fa9c57aSDanilo Krummrich * \ / \ / \ / \ / 592fa9c57aSDanilo Krummrich * \______/ \______/ \______/ \______/ 602fa9c57aSDanilo Krummrich * 612fa9c57aSDanilo Krummrich * |-----------------| |--------| 622fa9c57aSDanilo Krummrich * 60us/100us 30us/50us 632fa9c57aSDanilo Krummrich */ 642fa9c57aSDanilo Krummrich #define PS2_CLK_FREQ_MIN_HZ 10000 652fa9c57aSDanilo Krummrich #define PS2_CLK_FREQ_MAX_HZ 16700 662fa9c57aSDanilo Krummrich #define PS2_CLK_MIN_INTERVAL_US ((1000 * 1000) / PS2_CLK_FREQ_MAX_HZ) 672fa9c57aSDanilo Krummrich #define PS2_CLK_MAX_INTERVAL_US ((1000 * 1000) / PS2_CLK_FREQ_MIN_HZ) 682fa9c57aSDanilo Krummrich #define PS2_IRQ_MIN_INTERVAL_US (PS2_CLK_MIN_INTERVAL_US - 20) 692fa9c57aSDanilo Krummrich #define PS2_IRQ_MAX_INTERVAL_US (PS2_CLK_MAX_INTERVAL_US + 20) 702fa9c57aSDanilo Krummrich 719ee0a055SDanilo Krummrich struct ps2_gpio_data { 729ee0a055SDanilo Krummrich struct device *dev; 739ee0a055SDanilo Krummrich struct serio *serio; 749ee0a055SDanilo Krummrich unsigned char mode; 759ee0a055SDanilo Krummrich struct gpio_desc *gpio_clk; 769ee0a055SDanilo Krummrich struct gpio_desc *gpio_data; 779ee0a055SDanilo Krummrich bool write_enable; 789ee0a055SDanilo Krummrich int irq; 792fa9c57aSDanilo Krummrich ktime_t t_irq_now; 802fa9c57aSDanilo Krummrich ktime_t t_irq_last; 810dde5f82SDanilo Krummrich struct { 820dde5f82SDanilo Krummrich unsigned char cnt; 830dde5f82SDanilo Krummrich unsigned char byte; 840dde5f82SDanilo Krummrich } rx; 850dde5f82SDanilo Krummrich struct { 860dde5f82SDanilo Krummrich unsigned char cnt; 870dde5f82SDanilo Krummrich unsigned char byte; 882fa9c57aSDanilo Krummrich ktime_t t_xfer_start; 892fa9c57aSDanilo Krummrich ktime_t t_xfer_end; 900dde5f82SDanilo Krummrich struct completion complete; 910dde5f82SDanilo Krummrich struct mutex mutex; 920dde5f82SDanilo Krummrich struct delayed_work work; 930dde5f82SDanilo Krummrich } tx; 949ee0a055SDanilo Krummrich }; 959ee0a055SDanilo Krummrich 969ee0a055SDanilo Krummrich static int ps2_gpio_open(struct serio *serio) 979ee0a055SDanilo Krummrich { 989ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = serio->port_data; 999ee0a055SDanilo Krummrich 1002fa9c57aSDanilo Krummrich drvdata->t_irq_last = 0; 1012fa9c57aSDanilo Krummrich drvdata->tx.t_xfer_end = 0; 1022fa9c57aSDanilo Krummrich 1039ee0a055SDanilo Krummrich enable_irq(drvdata->irq); 1049ee0a055SDanilo Krummrich return 0; 1059ee0a055SDanilo Krummrich } 1069ee0a055SDanilo Krummrich 1079ee0a055SDanilo Krummrich static void ps2_gpio_close(struct serio *serio) 1089ee0a055SDanilo Krummrich { 1099ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = serio->port_data; 1109ee0a055SDanilo Krummrich 1110dde5f82SDanilo Krummrich flush_delayed_work(&drvdata->tx.work); 1129ee0a055SDanilo Krummrich disable_irq(drvdata->irq); 1139ee0a055SDanilo Krummrich } 1149ee0a055SDanilo Krummrich 1159ee0a055SDanilo Krummrich static int __ps2_gpio_write(struct serio *serio, unsigned char val) 1169ee0a055SDanilo Krummrich { 1179ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = serio->port_data; 1189ee0a055SDanilo Krummrich 1199ee0a055SDanilo Krummrich disable_irq_nosync(drvdata->irq); 1209ee0a055SDanilo Krummrich gpiod_direction_output(drvdata->gpio_clk, 0); 1219ee0a055SDanilo Krummrich 1229ee0a055SDanilo Krummrich drvdata->mode = PS2_MODE_TX; 1230dde5f82SDanilo Krummrich drvdata->tx.byte = val; 1249ee0a055SDanilo Krummrich 1250dde5f82SDanilo Krummrich schedule_delayed_work(&drvdata->tx.work, usecs_to_jiffies(200)); 1269ee0a055SDanilo Krummrich 1279ee0a055SDanilo Krummrich return 0; 1289ee0a055SDanilo Krummrich } 1299ee0a055SDanilo Krummrich 1309ee0a055SDanilo Krummrich static int ps2_gpio_write(struct serio *serio, unsigned char val) 1319ee0a055SDanilo Krummrich { 1329ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = serio->port_data; 1339ee0a055SDanilo Krummrich int ret = 0; 1349ee0a055SDanilo Krummrich 1359ee0a055SDanilo Krummrich if (in_task()) { 1360dde5f82SDanilo Krummrich mutex_lock(&drvdata->tx.mutex); 1379ee0a055SDanilo Krummrich __ps2_gpio_write(serio, val); 1380dde5f82SDanilo Krummrich if (!wait_for_completion_timeout(&drvdata->tx.complete, 1399ee0a055SDanilo Krummrich msecs_to_jiffies(10000))) 1409ee0a055SDanilo Krummrich ret = SERIO_TIMEOUT; 1410dde5f82SDanilo Krummrich mutex_unlock(&drvdata->tx.mutex); 1429ee0a055SDanilo Krummrich } else { 1439ee0a055SDanilo Krummrich __ps2_gpio_write(serio, val); 1449ee0a055SDanilo Krummrich } 1459ee0a055SDanilo Krummrich 1469ee0a055SDanilo Krummrich return ret; 1479ee0a055SDanilo Krummrich } 1489ee0a055SDanilo Krummrich 1499ee0a055SDanilo Krummrich static void ps2_gpio_tx_work_fn(struct work_struct *work) 1509ee0a055SDanilo Krummrich { 1519ee0a055SDanilo Krummrich struct delayed_work *dwork = to_delayed_work(work); 1529ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = container_of(dwork, 1539ee0a055SDanilo Krummrich struct ps2_gpio_data, 1540dde5f82SDanilo Krummrich tx.work); 1559ee0a055SDanilo Krummrich 1562fa9c57aSDanilo Krummrich drvdata->tx.t_xfer_start = ktime_get(); 1579ee0a055SDanilo Krummrich enable_irq(drvdata->irq); 1589ee0a055SDanilo Krummrich gpiod_direction_output(drvdata->gpio_data, 0); 1599ee0a055SDanilo Krummrich gpiod_direction_input(drvdata->gpio_clk); 1609ee0a055SDanilo Krummrich } 1619ee0a055SDanilo Krummrich 1629ee0a055SDanilo Krummrich static irqreturn_t ps2_gpio_irq_rx(struct ps2_gpio_data *drvdata) 1639ee0a055SDanilo Krummrich { 1649ee0a055SDanilo Krummrich unsigned char byte, cnt; 1659ee0a055SDanilo Krummrich int data; 1669ee0a055SDanilo Krummrich int rxflags = 0; 1672fa9c57aSDanilo Krummrich s64 us_delta; 1689ee0a055SDanilo Krummrich 1690dde5f82SDanilo Krummrich byte = drvdata->rx.byte; 1700dde5f82SDanilo Krummrich cnt = drvdata->rx.cnt; 1719ee0a055SDanilo Krummrich 1722fa9c57aSDanilo Krummrich drvdata->t_irq_now = ktime_get(); 1739ee0a055SDanilo Krummrich 1742fa9c57aSDanilo Krummrich /* 1752fa9c57aSDanilo Krummrich * We need to consider spurious interrupts happening right after 1762fa9c57aSDanilo Krummrich * a TX xfer finished. 1772fa9c57aSDanilo Krummrich */ 1782fa9c57aSDanilo Krummrich us_delta = ktime_us_delta(drvdata->t_irq_now, drvdata->tx.t_xfer_end); 1792fa9c57aSDanilo Krummrich if (unlikely(us_delta < PS2_IRQ_MIN_INTERVAL_US)) 1802fa9c57aSDanilo Krummrich goto end; 1812fa9c57aSDanilo Krummrich 1822fa9c57aSDanilo Krummrich us_delta = ktime_us_delta(drvdata->t_irq_now, drvdata->t_irq_last); 1832fa9c57aSDanilo Krummrich if (us_delta > PS2_IRQ_MAX_INTERVAL_US && cnt) { 1849ee0a055SDanilo Krummrich dev_err(drvdata->dev, 1859ee0a055SDanilo Krummrich "RX: timeout, probably we missed an interrupt\n"); 1869ee0a055SDanilo Krummrich goto err; 1872fa9c57aSDanilo Krummrich } else if (unlikely(us_delta < PS2_IRQ_MIN_INTERVAL_US)) { 1882fa9c57aSDanilo Krummrich /* Ignore spurious IRQs. */ 1892fa9c57aSDanilo Krummrich goto end; 1909ee0a055SDanilo Krummrich } 1912fa9c57aSDanilo Krummrich drvdata->t_irq_last = drvdata->t_irq_now; 1929ee0a055SDanilo Krummrich 1939ee0a055SDanilo Krummrich data = gpiod_get_value(drvdata->gpio_data); 1949ee0a055SDanilo Krummrich if (unlikely(data < 0)) { 1959ee0a055SDanilo Krummrich dev_err(drvdata->dev, "RX: failed to get data gpio val: %d\n", 1969ee0a055SDanilo Krummrich data); 1979ee0a055SDanilo Krummrich goto err; 1989ee0a055SDanilo Krummrich } 1999ee0a055SDanilo Krummrich 2009ee0a055SDanilo Krummrich switch (cnt) { 2019ee0a055SDanilo Krummrich case PS2_START_BIT: 2029ee0a055SDanilo Krummrich /* start bit should be low */ 2039ee0a055SDanilo Krummrich if (unlikely(data)) { 2049ee0a055SDanilo Krummrich dev_err(drvdata->dev, "RX: start bit should be low\n"); 2059ee0a055SDanilo Krummrich goto err; 2069ee0a055SDanilo Krummrich } 2079ee0a055SDanilo Krummrich break; 2089ee0a055SDanilo Krummrich case PS2_DATA_BIT0: 2099ee0a055SDanilo Krummrich case PS2_DATA_BIT1: 2109ee0a055SDanilo Krummrich case PS2_DATA_BIT2: 2119ee0a055SDanilo Krummrich case PS2_DATA_BIT3: 2129ee0a055SDanilo Krummrich case PS2_DATA_BIT4: 2139ee0a055SDanilo Krummrich case PS2_DATA_BIT5: 2149ee0a055SDanilo Krummrich case PS2_DATA_BIT6: 2159ee0a055SDanilo Krummrich case PS2_DATA_BIT7: 2169ee0a055SDanilo Krummrich /* processing data bits */ 2179ee0a055SDanilo Krummrich if (data) 2189ee0a055SDanilo Krummrich byte |= (data << (cnt - 1)); 2199ee0a055SDanilo Krummrich break; 2209ee0a055SDanilo Krummrich case PS2_PARITY_BIT: 2219ee0a055SDanilo Krummrich /* check odd parity */ 2229ee0a055SDanilo Krummrich if (!((hweight8(byte) & 1) ^ data)) { 2239ee0a055SDanilo Krummrich rxflags |= SERIO_PARITY; 2249ee0a055SDanilo Krummrich dev_warn(drvdata->dev, "RX: parity error\n"); 2259ee0a055SDanilo Krummrich if (!drvdata->write_enable) 2269ee0a055SDanilo Krummrich goto err; 2279ee0a055SDanilo Krummrich } 22881b9fd69SDanilo Krummrich break; 22981b9fd69SDanilo Krummrich case PS2_STOP_BIT: 23081b9fd69SDanilo Krummrich /* stop bit should be high */ 23181b9fd69SDanilo Krummrich if (unlikely(!data)) { 23281b9fd69SDanilo Krummrich dev_err(drvdata->dev, "RX: stop bit should be high\n"); 23381b9fd69SDanilo Krummrich goto err; 23481b9fd69SDanilo Krummrich } 2359ee0a055SDanilo Krummrich 2362fa9c57aSDanilo Krummrich /* 2372fa9c57aSDanilo Krummrich * Do not send spurious ACK's and NACK's when write fn is 2389ee0a055SDanilo Krummrich * not provided. 2399ee0a055SDanilo Krummrich */ 2409ee0a055SDanilo Krummrich if (!drvdata->write_enable) { 2419ee0a055SDanilo Krummrich if (byte == PS2_DEV_RET_NACK) 2429ee0a055SDanilo Krummrich goto err; 2439ee0a055SDanilo Krummrich else if (byte == PS2_DEV_RET_ACK) 2449ee0a055SDanilo Krummrich break; 2459ee0a055SDanilo Krummrich } 2469ee0a055SDanilo Krummrich 2479ee0a055SDanilo Krummrich serio_interrupt(drvdata->serio, byte, rxflags); 2489ee0a055SDanilo Krummrich dev_dbg(drvdata->dev, "RX: sending byte 0x%x\n", byte); 24981b9fd69SDanilo Krummrich 2509ee0a055SDanilo Krummrich cnt = byte = 0; 2512fa9c57aSDanilo Krummrich 2529ee0a055SDanilo Krummrich goto end; /* success */ 2539ee0a055SDanilo Krummrich default: 2549ee0a055SDanilo Krummrich dev_err(drvdata->dev, "RX: got out of sync with the device\n"); 2559ee0a055SDanilo Krummrich goto err; 2569ee0a055SDanilo Krummrich } 2579ee0a055SDanilo Krummrich 2589ee0a055SDanilo Krummrich cnt++; 2599ee0a055SDanilo Krummrich goto end; /* success */ 2609ee0a055SDanilo Krummrich 2619ee0a055SDanilo Krummrich err: 2629ee0a055SDanilo Krummrich cnt = byte = 0; 2639ee0a055SDanilo Krummrich __ps2_gpio_write(drvdata->serio, PS2_CMD_RESEND); 2649ee0a055SDanilo Krummrich end: 2650dde5f82SDanilo Krummrich drvdata->rx.cnt = cnt; 2660dde5f82SDanilo Krummrich drvdata->rx.byte = byte; 2679ee0a055SDanilo Krummrich return IRQ_HANDLED; 2689ee0a055SDanilo Krummrich } 2699ee0a055SDanilo Krummrich 2709ee0a055SDanilo Krummrich static irqreturn_t ps2_gpio_irq_tx(struct ps2_gpio_data *drvdata) 2719ee0a055SDanilo Krummrich { 2729ee0a055SDanilo Krummrich unsigned char byte, cnt; 2739ee0a055SDanilo Krummrich int data; 2742fa9c57aSDanilo Krummrich s64 us_delta; 2759ee0a055SDanilo Krummrich 2760dde5f82SDanilo Krummrich cnt = drvdata->tx.cnt; 2770dde5f82SDanilo Krummrich byte = drvdata->tx.byte; 2789ee0a055SDanilo Krummrich 2792fa9c57aSDanilo Krummrich drvdata->t_irq_now = ktime_get(); 2809ee0a055SDanilo Krummrich 2812fa9c57aSDanilo Krummrich /* 2822fa9c57aSDanilo Krummrich * There might be pending IRQs since we disabled IRQs in 2832fa9c57aSDanilo Krummrich * __ps2_gpio_write(). We can expect at least one clock period until 2842fa9c57aSDanilo Krummrich * the device generates the first falling edge after releasing the 2852fa9c57aSDanilo Krummrich * clock line. 2862fa9c57aSDanilo Krummrich */ 2872fa9c57aSDanilo Krummrich us_delta = ktime_us_delta(drvdata->t_irq_now, 2882fa9c57aSDanilo Krummrich drvdata->tx.t_xfer_start); 2892fa9c57aSDanilo Krummrich if (unlikely(us_delta < PS2_CLK_MIN_INTERVAL_US)) 2902fa9c57aSDanilo Krummrich goto end; 2912fa9c57aSDanilo Krummrich 2922fa9c57aSDanilo Krummrich us_delta = ktime_us_delta(drvdata->t_irq_now, drvdata->t_irq_last); 2932fa9c57aSDanilo Krummrich if (us_delta > PS2_IRQ_MAX_INTERVAL_US && cnt > 1) { 2949ee0a055SDanilo Krummrich dev_err(drvdata->dev, 2959ee0a055SDanilo Krummrich "TX: timeout, probably we missed an interrupt\n"); 2969ee0a055SDanilo Krummrich goto err; 2972fa9c57aSDanilo Krummrich } else if (unlikely(us_delta < PS2_IRQ_MIN_INTERVAL_US)) { 2982fa9c57aSDanilo Krummrich /* Ignore spurious IRQs. */ 2992fa9c57aSDanilo Krummrich goto end; 3009ee0a055SDanilo Krummrich } 3012fa9c57aSDanilo Krummrich drvdata->t_irq_last = drvdata->t_irq_now; 3029ee0a055SDanilo Krummrich 3039ee0a055SDanilo Krummrich switch (cnt) { 3049ee0a055SDanilo Krummrich case PS2_START_BIT: 3059ee0a055SDanilo Krummrich /* should never happen */ 3069ee0a055SDanilo Krummrich dev_err(drvdata->dev, 3079ee0a055SDanilo Krummrich "TX: start bit should have been sent already\n"); 3089ee0a055SDanilo Krummrich goto err; 3099ee0a055SDanilo Krummrich case PS2_DATA_BIT0: 3109ee0a055SDanilo Krummrich case PS2_DATA_BIT1: 3119ee0a055SDanilo Krummrich case PS2_DATA_BIT2: 3129ee0a055SDanilo Krummrich case PS2_DATA_BIT3: 3139ee0a055SDanilo Krummrich case PS2_DATA_BIT4: 3149ee0a055SDanilo Krummrich case PS2_DATA_BIT5: 3159ee0a055SDanilo Krummrich case PS2_DATA_BIT6: 3169ee0a055SDanilo Krummrich case PS2_DATA_BIT7: 3179ee0a055SDanilo Krummrich data = byte & BIT(cnt - 1); 3189ee0a055SDanilo Krummrich gpiod_set_value(drvdata->gpio_data, data); 3199ee0a055SDanilo Krummrich break; 3209ee0a055SDanilo Krummrich case PS2_PARITY_BIT: 3219ee0a055SDanilo Krummrich /* do odd parity */ 3229ee0a055SDanilo Krummrich data = !(hweight8(byte) & 1); 3239ee0a055SDanilo Krummrich gpiod_set_value(drvdata->gpio_data, data); 3249ee0a055SDanilo Krummrich break; 3259ee0a055SDanilo Krummrich case PS2_STOP_BIT: 3269ee0a055SDanilo Krummrich /* release data line to generate stop bit */ 3279ee0a055SDanilo Krummrich gpiod_direction_input(drvdata->gpio_data); 3289ee0a055SDanilo Krummrich break; 3299ee0a055SDanilo Krummrich case PS2_ACK_BIT: 3309ee0a055SDanilo Krummrich data = gpiod_get_value(drvdata->gpio_data); 3319ee0a055SDanilo Krummrich if (data) { 3329ee0a055SDanilo Krummrich dev_warn(drvdata->dev, "TX: received NACK, retry\n"); 3339ee0a055SDanilo Krummrich goto err; 3349ee0a055SDanilo Krummrich } 3359ee0a055SDanilo Krummrich 3362fa9c57aSDanilo Krummrich drvdata->tx.t_xfer_end = ktime_get(); 3379ee0a055SDanilo Krummrich drvdata->mode = PS2_MODE_RX; 3380dde5f82SDanilo Krummrich complete(&drvdata->tx.complete); 3399ee0a055SDanilo Krummrich 3409ee0a055SDanilo Krummrich cnt = 1; 3419ee0a055SDanilo Krummrich goto end; /* success */ 3429ee0a055SDanilo Krummrich default: 3432fa9c57aSDanilo Krummrich /* 3442fa9c57aSDanilo Krummrich * Probably we missed the stop bit. Therefore we release data 3459ee0a055SDanilo Krummrich * line and try again. 3469ee0a055SDanilo Krummrich */ 3479ee0a055SDanilo Krummrich gpiod_direction_input(drvdata->gpio_data); 3489ee0a055SDanilo Krummrich dev_err(drvdata->dev, "TX: got out of sync with the device\n"); 3499ee0a055SDanilo Krummrich goto err; 3509ee0a055SDanilo Krummrich } 3519ee0a055SDanilo Krummrich 3529ee0a055SDanilo Krummrich cnt++; 3539ee0a055SDanilo Krummrich goto end; /* success */ 3549ee0a055SDanilo Krummrich 3559ee0a055SDanilo Krummrich err: 3569ee0a055SDanilo Krummrich cnt = 1; 3579ee0a055SDanilo Krummrich gpiod_direction_input(drvdata->gpio_data); 3580dde5f82SDanilo Krummrich __ps2_gpio_write(drvdata->serio, drvdata->tx.byte); 3599ee0a055SDanilo Krummrich end: 3600dde5f82SDanilo Krummrich drvdata->tx.cnt = cnt; 3619ee0a055SDanilo Krummrich return IRQ_HANDLED; 3629ee0a055SDanilo Krummrich } 3639ee0a055SDanilo Krummrich 3649ee0a055SDanilo Krummrich static irqreturn_t ps2_gpio_irq(int irq, void *dev_id) 3659ee0a055SDanilo Krummrich { 3669ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = dev_id; 3679ee0a055SDanilo Krummrich 3689ee0a055SDanilo Krummrich return drvdata->mode ? ps2_gpio_irq_tx(drvdata) : 3699ee0a055SDanilo Krummrich ps2_gpio_irq_rx(drvdata); 3709ee0a055SDanilo Krummrich } 3719ee0a055SDanilo Krummrich 3729ee0a055SDanilo Krummrich static int ps2_gpio_get_props(struct device *dev, 3739ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata) 3749ee0a055SDanilo Krummrich { 3750c0ef67eSDanilo Krummrich enum gpiod_flags gflags; 3760c0ef67eSDanilo Krummrich 3770c0ef67eSDanilo Krummrich /* Enforce open drain, since this is required by the PS/2 bus. */ 3780c0ef67eSDanilo Krummrich gflags = GPIOD_IN | GPIOD_FLAGS_BIT_OPEN_DRAIN; 3790c0ef67eSDanilo Krummrich 3800c0ef67eSDanilo Krummrich drvdata->gpio_data = devm_gpiod_get(dev, "data", gflags); 3819ee0a055SDanilo Krummrich if (IS_ERR(drvdata->gpio_data)) { 3829ee0a055SDanilo Krummrich dev_err(dev, "failed to request data gpio: %ld", 3839ee0a055SDanilo Krummrich PTR_ERR(drvdata->gpio_data)); 3849ee0a055SDanilo Krummrich return PTR_ERR(drvdata->gpio_data); 3859ee0a055SDanilo Krummrich } 3869ee0a055SDanilo Krummrich 3870c0ef67eSDanilo Krummrich drvdata->gpio_clk = devm_gpiod_get(dev, "clk", gflags); 3889ee0a055SDanilo Krummrich if (IS_ERR(drvdata->gpio_clk)) { 3899ee0a055SDanilo Krummrich dev_err(dev, "failed to request clock gpio: %ld", 3909ee0a055SDanilo Krummrich PTR_ERR(drvdata->gpio_clk)); 3919ee0a055SDanilo Krummrich return PTR_ERR(drvdata->gpio_clk); 3929ee0a055SDanilo Krummrich } 3939ee0a055SDanilo Krummrich 3949ee0a055SDanilo Krummrich drvdata->write_enable = device_property_read_bool(dev, 3959ee0a055SDanilo Krummrich "write-enable"); 3969ee0a055SDanilo Krummrich 3979ee0a055SDanilo Krummrich return 0; 3989ee0a055SDanilo Krummrich } 3999ee0a055SDanilo Krummrich 4009ee0a055SDanilo Krummrich static int ps2_gpio_probe(struct platform_device *pdev) 4019ee0a055SDanilo Krummrich { 4029ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata; 4039ee0a055SDanilo Krummrich struct serio *serio; 4049ee0a055SDanilo Krummrich struct device *dev = &pdev->dev; 4059ee0a055SDanilo Krummrich int error; 4069ee0a055SDanilo Krummrich 4079ee0a055SDanilo Krummrich drvdata = devm_kzalloc(dev, sizeof(struct ps2_gpio_data), GFP_KERNEL); 4089ee0a055SDanilo Krummrich serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 4099ee0a055SDanilo Krummrich if (!drvdata || !serio) { 4109ee0a055SDanilo Krummrich error = -ENOMEM; 4119ee0a055SDanilo Krummrich goto err_free_serio; 4129ee0a055SDanilo Krummrich } 4139ee0a055SDanilo Krummrich 4149ee0a055SDanilo Krummrich error = ps2_gpio_get_props(dev, drvdata); 4159ee0a055SDanilo Krummrich if (error) 4169ee0a055SDanilo Krummrich goto err_free_serio; 4179ee0a055SDanilo Krummrich 4189ee0a055SDanilo Krummrich if (gpiod_cansleep(drvdata->gpio_data) || 4199ee0a055SDanilo Krummrich gpiod_cansleep(drvdata->gpio_clk)) { 4209ee0a055SDanilo Krummrich dev_err(dev, "GPIO data or clk are connected via slow bus\n"); 4219ee0a055SDanilo Krummrich error = -EINVAL; 4226a3eafe4SDmitry Torokhov goto err_free_serio; 4239ee0a055SDanilo Krummrich } 4249ee0a055SDanilo Krummrich 4259ee0a055SDanilo Krummrich drvdata->irq = platform_get_irq(pdev, 0); 4269ee0a055SDanilo Krummrich if (drvdata->irq < 0) { 4279ee0a055SDanilo Krummrich error = drvdata->irq; 4289ee0a055SDanilo Krummrich goto err_free_serio; 4299ee0a055SDanilo Krummrich } 4309ee0a055SDanilo Krummrich 4319ee0a055SDanilo Krummrich error = devm_request_irq(dev, drvdata->irq, ps2_gpio_irq, 4329ee0a055SDanilo Krummrich IRQF_NO_THREAD, DRIVER_NAME, drvdata); 4339ee0a055SDanilo Krummrich if (error) { 4349ee0a055SDanilo Krummrich dev_err(dev, "failed to request irq %d: %d\n", 4359ee0a055SDanilo Krummrich drvdata->irq, error); 4369ee0a055SDanilo Krummrich goto err_free_serio; 4379ee0a055SDanilo Krummrich } 4389ee0a055SDanilo Krummrich 4399ee0a055SDanilo Krummrich /* Keep irq disabled until serio->open is called. */ 4409ee0a055SDanilo Krummrich disable_irq(drvdata->irq); 4419ee0a055SDanilo Krummrich 4429ee0a055SDanilo Krummrich serio->id.type = SERIO_8042; 4439ee0a055SDanilo Krummrich serio->open = ps2_gpio_open; 4449ee0a055SDanilo Krummrich serio->close = ps2_gpio_close; 4452fa9c57aSDanilo Krummrich /* 4462fa9c57aSDanilo Krummrich * Write can be enabled in platform/dt data, but possibly it will not 4479ee0a055SDanilo Krummrich * work because of the tough timings. 4489ee0a055SDanilo Krummrich */ 4499ee0a055SDanilo Krummrich serio->write = drvdata->write_enable ? ps2_gpio_write : NULL; 4509ee0a055SDanilo Krummrich serio->port_data = drvdata; 4519ee0a055SDanilo Krummrich serio->dev.parent = dev; 452*a9f08ad7SWolfram Sang strscpy(serio->name, dev_name(dev), sizeof(serio->name)); 453*a9f08ad7SWolfram Sang strscpy(serio->phys, dev_name(dev), sizeof(serio->phys)); 4549ee0a055SDanilo Krummrich 4559ee0a055SDanilo Krummrich drvdata->serio = serio; 4569ee0a055SDanilo Krummrich drvdata->dev = dev; 4579ee0a055SDanilo Krummrich drvdata->mode = PS2_MODE_RX; 4589ee0a055SDanilo Krummrich 4592fa9c57aSDanilo Krummrich /* 4602fa9c57aSDanilo Krummrich * Tx count always starts at 1, as the start bit is sent implicitly by 4619ee0a055SDanilo Krummrich * host-to-device communication initialization. 4629ee0a055SDanilo Krummrich */ 4630dde5f82SDanilo Krummrich drvdata->tx.cnt = 1; 4649ee0a055SDanilo Krummrich 4650dde5f82SDanilo Krummrich INIT_DELAYED_WORK(&drvdata->tx.work, ps2_gpio_tx_work_fn); 4660dde5f82SDanilo Krummrich init_completion(&drvdata->tx.complete); 4670dde5f82SDanilo Krummrich mutex_init(&drvdata->tx.mutex); 4689ee0a055SDanilo Krummrich 4699ee0a055SDanilo Krummrich serio_register_port(serio); 4709ee0a055SDanilo Krummrich platform_set_drvdata(pdev, drvdata); 4719ee0a055SDanilo Krummrich 4729ee0a055SDanilo Krummrich return 0; /* success */ 4739ee0a055SDanilo Krummrich 4749ee0a055SDanilo Krummrich err_free_serio: 4759ee0a055SDanilo Krummrich kfree(serio); 4769ee0a055SDanilo Krummrich return error; 4779ee0a055SDanilo Krummrich } 4789ee0a055SDanilo Krummrich 4799ee0a055SDanilo Krummrich static int ps2_gpio_remove(struct platform_device *pdev) 4809ee0a055SDanilo Krummrich { 4819ee0a055SDanilo Krummrich struct ps2_gpio_data *drvdata = platform_get_drvdata(pdev); 4829ee0a055SDanilo Krummrich 4839ee0a055SDanilo Krummrich serio_unregister_port(drvdata->serio); 4849ee0a055SDanilo Krummrich return 0; 4859ee0a055SDanilo Krummrich } 4869ee0a055SDanilo Krummrich 4879ee0a055SDanilo Krummrich #if defined(CONFIG_OF) 4889ee0a055SDanilo Krummrich static const struct of_device_id ps2_gpio_match[] = { 4899ee0a055SDanilo Krummrich { .compatible = "ps2-gpio", }, 4909ee0a055SDanilo Krummrich { }, 4919ee0a055SDanilo Krummrich }; 4929ee0a055SDanilo Krummrich MODULE_DEVICE_TABLE(of, ps2_gpio_match); 4939ee0a055SDanilo Krummrich #endif 4949ee0a055SDanilo Krummrich 4959ee0a055SDanilo Krummrich static struct platform_driver ps2_gpio_driver = { 4969ee0a055SDanilo Krummrich .probe = ps2_gpio_probe, 4979ee0a055SDanilo Krummrich .remove = ps2_gpio_remove, 4989ee0a055SDanilo Krummrich .driver = { 4999ee0a055SDanilo Krummrich .name = DRIVER_NAME, 5009ee0a055SDanilo Krummrich .of_match_table = of_match_ptr(ps2_gpio_match), 5019ee0a055SDanilo Krummrich }, 5029ee0a055SDanilo Krummrich }; 5039ee0a055SDanilo Krummrich module_platform_driver(ps2_gpio_driver); 5049ee0a055SDanilo Krummrich 5059ee0a055SDanilo Krummrich MODULE_AUTHOR("Danilo Krummrich <danilokrummrich@dk-develop.de>"); 5069ee0a055SDanilo Krummrich MODULE_DESCRIPTION("GPIO PS2 driver"); 5079ee0a055SDanilo Krummrich MODULE_LICENSE("GPL v2"); 508