1 /* 2 * i8042 keyboard and mouse controller driver for Linux 3 * 4 * Copyright (c) 1999-2004 Vojtech Pavlik 5 */ 6 7 /* 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/interrupt.h> 17 #include <linux/ioport.h> 18 #include <linux/init.h> 19 #include <linux/serio.h> 20 #include <linux/err.h> 21 #include <linux/rcupdate.h> 22 #include <linux/platform_device.h> 23 24 #include <asm/io.h> 25 26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 28 MODULE_LICENSE("GPL"); 29 30 static unsigned int i8042_nokbd; 31 module_param_named(nokbd, i8042_nokbd, bool, 0); 32 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 33 34 static unsigned int i8042_noaux; 35 module_param_named(noaux, i8042_noaux, bool, 0); 36 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 37 38 static unsigned int i8042_nomux; 39 module_param_named(nomux, i8042_nomux, bool, 0); 40 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present."); 41 42 static unsigned int i8042_unlock; 43 module_param_named(unlock, i8042_unlock, bool, 0); 44 MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 45 46 static unsigned int i8042_reset; 47 module_param_named(reset, i8042_reset, bool, 0); 48 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup."); 49 50 static unsigned int i8042_direct; 51 module_param_named(direct, i8042_direct, bool, 0); 52 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 53 54 static unsigned int i8042_dumbkbd; 55 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 56 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 57 58 static unsigned int i8042_noloop; 59 module_param_named(noloop, i8042_noloop, bool, 0); 60 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 61 62 static unsigned int i8042_blink_frequency = 500; 63 module_param_named(panicblink, i8042_blink_frequency, uint, 0600); 64 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics"); 65 66 #ifdef CONFIG_PNP 67 static int i8042_nopnp; 68 module_param_named(nopnp, i8042_nopnp, bool, 0); 69 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 70 #endif 71 72 #define DEBUG 73 #ifdef DEBUG 74 static int i8042_debug; 75 module_param_named(debug, i8042_debug, bool, 0600); 76 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 77 #endif 78 79 #include "i8042.h" 80 81 static DEFINE_SPINLOCK(i8042_lock); 82 83 struct i8042_port { 84 struct serio *serio; 85 int irq; 86 unsigned char exists; 87 signed char mux; 88 }; 89 90 #define I8042_KBD_PORT_NO 0 91 #define I8042_AUX_PORT_NO 1 92 #define I8042_MUX_PORT_NO 2 93 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 94 95 static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 96 97 static unsigned char i8042_initial_ctr; 98 static unsigned char i8042_ctr; 99 static unsigned char i8042_mux_present; 100 static unsigned char i8042_kbd_irq_registered; 101 static unsigned char i8042_aux_irq_registered; 102 static unsigned char i8042_suppress_kbd_ack; 103 static struct platform_device *i8042_platform_device; 104 105 static irqreturn_t i8042_interrupt(int irq, void *dev_id); 106 107 /* 108 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 109 * be ready for reading values from it / writing values to it. 110 * Called always with i8042_lock held. 111 */ 112 113 static int i8042_wait_read(void) 114 { 115 int i = 0; 116 117 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 118 udelay(50); 119 i++; 120 } 121 return -(i == I8042_CTL_TIMEOUT); 122 } 123 124 static int i8042_wait_write(void) 125 { 126 int i = 0; 127 128 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 129 udelay(50); 130 i++; 131 } 132 return -(i == I8042_CTL_TIMEOUT); 133 } 134 135 /* 136 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 137 * of the i8042 down the toilet. 138 */ 139 140 static int i8042_flush(void) 141 { 142 unsigned long flags; 143 unsigned char data, str; 144 int i = 0; 145 146 spin_lock_irqsave(&i8042_lock, flags); 147 148 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) { 149 udelay(50); 150 data = i8042_read_data(); 151 i++; 152 dbg("%02x <- i8042 (flush, %s)", data, 153 str & I8042_STR_AUXDATA ? "aux" : "kbd"); 154 } 155 156 spin_unlock_irqrestore(&i8042_lock, flags); 157 158 return i; 159 } 160 161 /* 162 * i8042_command() executes a command on the i8042. It also sends the input 163 * parameter(s) of the commands to it, and receives the output value(s). The 164 * parameters are to be stored in the param array, and the output is placed 165 * into the same array. The number of the parameters and output values is 166 * encoded in bits 8-11 of the command number. 167 */ 168 169 static int __i8042_command(unsigned char *param, int command) 170 { 171 int i, error; 172 173 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 174 return -1; 175 176 error = i8042_wait_write(); 177 if (error) 178 return error; 179 180 dbg("%02x -> i8042 (command)", command & 0xff); 181 i8042_write_command(command & 0xff); 182 183 for (i = 0; i < ((command >> 12) & 0xf); i++) { 184 error = i8042_wait_write(); 185 if (error) 186 return error; 187 dbg("%02x -> i8042 (parameter)", param[i]); 188 i8042_write_data(param[i]); 189 } 190 191 for (i = 0; i < ((command >> 8) & 0xf); i++) { 192 error = i8042_wait_read(); 193 if (error) { 194 dbg(" -- i8042 (timeout)"); 195 return error; 196 } 197 198 if (command == I8042_CMD_AUX_LOOP && 199 !(i8042_read_status() & I8042_STR_AUXDATA)) { 200 dbg(" -- i8042 (auxerr)"); 201 return -1; 202 } 203 204 param[i] = i8042_read_data(); 205 dbg("%02x <- i8042 (return)", param[i]); 206 } 207 208 return 0; 209 } 210 211 static int i8042_command(unsigned char *param, int command) 212 { 213 unsigned long flags; 214 int retval; 215 216 spin_lock_irqsave(&i8042_lock, flags); 217 retval = __i8042_command(param, command); 218 spin_unlock_irqrestore(&i8042_lock, flags); 219 220 return retval; 221 } 222 223 /* 224 * i8042_kbd_write() sends a byte out through the keyboard interface. 225 */ 226 227 static int i8042_kbd_write(struct serio *port, unsigned char c) 228 { 229 unsigned long flags; 230 int retval = 0; 231 232 spin_lock_irqsave(&i8042_lock, flags); 233 234 if (!(retval = i8042_wait_write())) { 235 dbg("%02x -> i8042 (kbd-data)", c); 236 i8042_write_data(c); 237 } 238 239 spin_unlock_irqrestore(&i8042_lock, flags); 240 241 return retval; 242 } 243 244 /* 245 * i8042_aux_write() sends a byte out through the aux interface. 246 */ 247 248 static int i8042_aux_write(struct serio *serio, unsigned char c) 249 { 250 struct i8042_port *port = serio->port_data; 251 252 return i8042_command(&c, port->mux == -1 ? 253 I8042_CMD_AUX_SEND : 254 I8042_CMD_MUX_SEND + port->mux); 255 } 256 257 /* 258 * i8042_start() is called by serio core when port is about to finish 259 * registering. It will mark port as existing so i8042_interrupt can 260 * start sending data through it. 261 */ 262 static int i8042_start(struct serio *serio) 263 { 264 struct i8042_port *port = serio->port_data; 265 266 port->exists = 1; 267 mb(); 268 return 0; 269 } 270 271 /* 272 * i8042_stop() marks serio port as non-existing so i8042_interrupt 273 * will not try to send data to the port that is about to go away. 274 * The function is called by serio core as part of unregister procedure. 275 */ 276 static void i8042_stop(struct serio *serio) 277 { 278 struct i8042_port *port = serio->port_data; 279 280 port->exists = 0; 281 synchronize_sched(); 282 port->serio = NULL; 283 } 284 285 /* 286 * i8042_interrupt() is the most important function in this driver - 287 * it handles the interrupts from the i8042, and sends incoming bytes 288 * to the upper layers. 289 */ 290 291 static irqreturn_t i8042_interrupt(int irq, void *dev_id) 292 { 293 struct i8042_port *port; 294 unsigned long flags; 295 unsigned char str, data; 296 unsigned int dfl; 297 unsigned int port_no; 298 int ret = 1; 299 300 spin_lock_irqsave(&i8042_lock, flags); 301 str = i8042_read_status(); 302 if (unlikely(~str & I8042_STR_OBF)) { 303 spin_unlock_irqrestore(&i8042_lock, flags); 304 if (irq) dbg("Interrupt %d, without any data", irq); 305 ret = 0; 306 goto out; 307 } 308 data = i8042_read_data(); 309 spin_unlock_irqrestore(&i8042_lock, flags); 310 311 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 312 static unsigned long last_transmit; 313 static unsigned char last_str; 314 315 dfl = 0; 316 if (str & I8042_STR_MUXERR) { 317 dbg("MUX error, status is %02x, data is %02x", str, data); 318 /* 319 * When MUXERR condition is signalled the data register can only contain 320 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 321 * it is not always the case. Some KBCs also report 0xfc when there is 322 * nothing connected to the port while others sometimes get confused which 323 * port the data came from and signal error leaving the data intact. They 324 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 325 * to legacy mode yet, when we see one we'll add proper handling). 326 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 327 * rest assume that the data came from the same serio last byte 328 * was transmitted (if transmission happened not too long ago). 329 */ 330 331 switch (data) { 332 default: 333 if (time_before(jiffies, last_transmit + HZ/10)) { 334 str = last_str; 335 break; 336 } 337 /* fall through - report timeout */ 338 case 0xfc: 339 case 0xfd: 340 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 341 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 342 } 343 } 344 345 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 346 last_str = str; 347 last_transmit = jiffies; 348 } else { 349 350 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 351 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0); 352 353 port_no = (str & I8042_STR_AUXDATA) ? 354 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 355 } 356 357 port = &i8042_ports[port_no]; 358 359 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)", 360 data, port_no, irq, 361 dfl & SERIO_PARITY ? ", bad parity" : "", 362 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 363 364 if (unlikely(i8042_suppress_kbd_ack)) 365 if (port_no == I8042_KBD_PORT_NO && 366 (data == 0xfa || data == 0xfe)) { 367 i8042_suppress_kbd_ack--; 368 goto out; 369 } 370 371 if (likely(port->exists)) 372 serio_interrupt(port->serio, data, dfl); 373 374 out: 375 return IRQ_RETVAL(ret); 376 } 377 378 /* 379 * i8042_enable_kbd_port enables keybaord port on chip 380 */ 381 382 static int i8042_enable_kbd_port(void) 383 { 384 i8042_ctr &= ~I8042_CTR_KBDDIS; 385 i8042_ctr |= I8042_CTR_KBDINT; 386 387 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 388 i8042_ctr &= ~I8042_CTR_KBDINT; 389 i8042_ctr |= I8042_CTR_KBDDIS; 390 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n"); 391 return -EIO; 392 } 393 394 return 0; 395 } 396 397 /* 398 * i8042_enable_aux_port enables AUX (mouse) port on chip 399 */ 400 401 static int i8042_enable_aux_port(void) 402 { 403 i8042_ctr &= ~I8042_CTR_AUXDIS; 404 i8042_ctr |= I8042_CTR_AUXINT; 405 406 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 407 i8042_ctr &= ~I8042_CTR_AUXINT; 408 i8042_ctr |= I8042_CTR_AUXDIS; 409 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n"); 410 return -EIO; 411 } 412 413 return 0; 414 } 415 416 /* 417 * i8042_enable_mux_ports enables 4 individual AUX ports after 418 * the controller has been switched into Multiplexed mode 419 */ 420 421 static int i8042_enable_mux_ports(void) 422 { 423 unsigned char param; 424 int i; 425 426 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 427 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 428 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 429 } 430 431 return i8042_enable_aux_port(); 432 } 433 434 /* 435 * i8042_set_mux_mode checks whether the controller has an active 436 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode. 437 */ 438 439 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) 440 { 441 442 unsigned char param; 443 /* 444 * Get rid of bytes in the queue. 445 */ 446 447 i8042_flush(); 448 449 /* 450 * Internal loopback test - send three bytes, they should come back from the 451 * mouse interface, the last should be version. 452 */ 453 454 param = 0xf0; 455 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0) 456 return -1; 457 param = mode ? 0x56 : 0xf6; 458 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6)) 459 return -1; 460 param = mode ? 0xa4 : 0xa5; 461 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5)) 462 return -1; 463 464 if (mux_version) 465 *mux_version = param; 466 467 return 0; 468 } 469 470 /* 471 * i8042_check_mux() checks whether the controller supports the PS/2 Active 472 * Multiplexing specification by Synaptics, Phoenix, Insyde and 473 * LCS/Telegraphics. 474 */ 475 476 static int __devinit i8042_check_mux(void) 477 { 478 unsigned char mux_version; 479 480 if (i8042_set_mux_mode(1, &mux_version)) 481 return -1; 482 483 /* 484 * Workaround for interference with USB Legacy emulation 485 * that causes a v10.12 MUX to be found. 486 */ 487 if (mux_version == 0xAC) 488 return -1; 489 490 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n", 491 (mux_version >> 4) & 0xf, mux_version & 0xf); 492 493 /* 494 * Disable all muxed ports by disabling AUX. 495 */ 496 i8042_ctr |= I8042_CTR_AUXDIS; 497 i8042_ctr &= ~I8042_CTR_AUXINT; 498 499 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 500 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n"); 501 return -EIO; 502 } 503 504 i8042_mux_present = 1; 505 506 return 0; 507 } 508 509 /* 510 * The following is used to test AUX IRQ delivery. 511 */ 512 static struct completion i8042_aux_irq_delivered __devinitdata; 513 static int i8042_irq_being_tested __devinitdata; 514 515 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id) 516 { 517 unsigned long flags; 518 unsigned char str, data; 519 int ret = 0; 520 521 spin_lock_irqsave(&i8042_lock, flags); 522 str = i8042_read_status(); 523 if (str & I8042_STR_OBF) { 524 data = i8042_read_data(); 525 if (i8042_irq_being_tested && 526 data == 0xa5 && (str & I8042_STR_AUXDATA)) 527 complete(&i8042_aux_irq_delivered); 528 ret = 1; 529 } 530 spin_unlock_irqrestore(&i8042_lock, flags); 531 532 return IRQ_RETVAL(ret); 533 } 534 535 /* 536 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 537 * verifies success by readinng CTR. Used when testing for presence of AUX 538 * port. 539 */ 540 static int __devinit i8042_toggle_aux(int on) 541 { 542 unsigned char param; 543 int i; 544 545 if (i8042_command(¶m, 546 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 547 return -1; 548 549 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 550 for (i = 0; i < 100; i++) { 551 udelay(50); 552 553 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 554 return -1; 555 556 if (!(param & I8042_CTR_AUXDIS) == on) 557 return 0; 558 } 559 560 return -1; 561 } 562 563 /* 564 * i8042_check_aux() applies as much paranoia as it can at detecting 565 * the presence of an AUX interface. 566 */ 567 568 static int __devinit i8042_check_aux(void) 569 { 570 int retval = -1; 571 int irq_registered = 0; 572 int aux_loop_broken = 0; 573 unsigned long flags; 574 unsigned char param; 575 576 /* 577 * Get rid of bytes in the queue. 578 */ 579 580 i8042_flush(); 581 582 /* 583 * Internal loopback test - filters out AT-type i8042's. Unfortunately 584 * SiS screwed up and their 5597 doesn't support the LOOP command even 585 * though it has an AUX port. 586 */ 587 588 param = 0x5a; 589 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 590 if (retval || param != 0x5a) { 591 592 /* 593 * External connection test - filters out AT-soldered PS/2 i8042's 594 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 595 * 0xfa - no error on some notebooks which ignore the spec 596 * Because it's common for chipsets to return error on perfectly functioning 597 * AUX ports, we test for this only when the LOOP command failed. 598 */ 599 600 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 601 (param && param != 0xfa && param != 0xff)) 602 return -1; 603 604 /* 605 * If AUX_LOOP completed without error but returned unexpected data 606 * mark it as broken 607 */ 608 if (!retval) 609 aux_loop_broken = 1; 610 } 611 612 /* 613 * Bit assignment test - filters out PS/2 i8042's in AT mode 614 */ 615 616 if (i8042_toggle_aux(0)) { 617 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 618 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n"); 619 } 620 621 if (i8042_toggle_aux(1)) 622 return -1; 623 624 /* 625 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 626 * used it for a PCI card or somethig else. 627 */ 628 629 if (i8042_noloop || aux_loop_broken) { 630 /* 631 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 632 * is working and hope we are right. 633 */ 634 retval = 0; 635 goto out; 636 } 637 638 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 639 "i8042", i8042_platform_device)) 640 goto out; 641 642 irq_registered = 1; 643 644 if (i8042_enable_aux_port()) 645 goto out; 646 647 spin_lock_irqsave(&i8042_lock, flags); 648 649 init_completion(&i8042_aux_irq_delivered); 650 i8042_irq_being_tested = 1; 651 652 param = 0xa5; 653 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 654 655 spin_unlock_irqrestore(&i8042_lock, flags); 656 657 if (retval) 658 goto out; 659 660 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 661 msecs_to_jiffies(250)) == 0) { 662 /* 663 * AUX IRQ was never delivered so we need to flush the controller to 664 * get rid of the byte we put there; otherwise keyboard may not work. 665 */ 666 i8042_flush(); 667 retval = -1; 668 } 669 670 out: 671 672 /* 673 * Disable the interface. 674 */ 675 676 i8042_ctr |= I8042_CTR_AUXDIS; 677 i8042_ctr &= ~I8042_CTR_AUXINT; 678 679 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 680 retval = -1; 681 682 if (irq_registered) 683 free_irq(I8042_AUX_IRQ, i8042_platform_device); 684 685 return retval; 686 } 687 688 static int i8042_controller_check(void) 689 { 690 if (i8042_flush() == I8042_BUFFER_SIZE) { 691 printk(KERN_ERR "i8042.c: No controller found.\n"); 692 return -ENODEV; 693 } 694 695 return 0; 696 } 697 698 static int i8042_controller_selftest(void) 699 { 700 unsigned char param; 701 702 if (!i8042_reset) 703 return 0; 704 705 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 706 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); 707 return -ENODEV; 708 } 709 710 if (param != I8042_RET_CTL_TEST) { 711 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", 712 param, I8042_RET_CTL_TEST); 713 return -EIO; 714 } 715 716 return 0; 717 } 718 719 /* 720 * i8042_controller init initializes the i8042 controller, and, 721 * most importantly, sets it into non-xlated mode if that's 722 * desired. 723 */ 724 725 static int i8042_controller_init(void) 726 { 727 unsigned long flags; 728 729 /* 730 * Save the CTR for restoral on unload / reboot. 731 */ 732 733 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { 734 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); 735 return -EIO; 736 } 737 738 i8042_initial_ctr = i8042_ctr; 739 740 /* 741 * Disable the keyboard interface and interrupt. 742 */ 743 744 i8042_ctr |= I8042_CTR_KBDDIS; 745 i8042_ctr &= ~I8042_CTR_KBDINT; 746 747 /* 748 * Handle keylock. 749 */ 750 751 spin_lock_irqsave(&i8042_lock, flags); 752 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 753 if (i8042_unlock) 754 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 755 else 756 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n"); 757 } 758 spin_unlock_irqrestore(&i8042_lock, flags); 759 760 /* 761 * If the chip is configured into nontranslated mode by the BIOS, don't 762 * bother enabling translating and be happy. 763 */ 764 765 if (~i8042_ctr & I8042_CTR_XLATE) 766 i8042_direct = 1; 767 768 /* 769 * Set nontranslated mode for the kbd interface if requested by an option. 770 * After this the kbd interface becomes a simple serial in/out, like the aux 771 * interface is. We don't do this by default, since it can confuse notebook 772 * BIOSes. 773 */ 774 775 if (i8042_direct) 776 i8042_ctr &= ~I8042_CTR_XLATE; 777 778 /* 779 * Write CTR back. 780 */ 781 782 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 783 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n"); 784 return -EIO; 785 } 786 787 return 0; 788 } 789 790 791 /* 792 * Reset the controller and reset CRT to the original value set by BIOS. 793 */ 794 795 static void i8042_controller_reset(void) 796 { 797 i8042_flush(); 798 799 /* 800 * Disable both KBD and AUX interfaces so they don't get in the way 801 */ 802 803 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 804 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 805 806 /* 807 * Disable MUX mode if present. 808 */ 809 810 if (i8042_mux_present) 811 i8042_set_mux_mode(0, NULL); 812 813 /* 814 * Reset the controller if requested. 815 */ 816 817 i8042_controller_selftest(); 818 819 /* 820 * Restore the original control register setting. 821 */ 822 823 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 824 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n"); 825 } 826 827 828 /* 829 * i8042_panic_blink() will flash the keyboard LEDs and is called when 830 * kernel panics. Flashing LEDs is useful for users running X who may 831 * not see the console and will help distingushing panics from "real" 832 * lockups. 833 * 834 * Note that DELAY has a limit of 10ms so we will not get stuck here 835 * waiting for KBC to free up even if KBD interrupt is off 836 */ 837 838 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 839 840 static long i8042_panic_blink(long count) 841 { 842 long delay = 0; 843 static long last_blink; 844 static char led; 845 846 /* 847 * We expect frequency to be about 1/2s. KDB uses about 1s. 848 * Make sure they are different. 849 */ 850 if (!i8042_blink_frequency) 851 return 0; 852 if (count - last_blink < i8042_blink_frequency) 853 return 0; 854 855 led ^= 0x01 | 0x04; 856 while (i8042_read_status() & I8042_STR_IBF) 857 DELAY; 858 dbg("%02x -> i8042 (panic blink)", 0xed); 859 i8042_suppress_kbd_ack = 2; 860 i8042_write_data(0xed); /* set leds */ 861 DELAY; 862 while (i8042_read_status() & I8042_STR_IBF) 863 DELAY; 864 DELAY; 865 dbg("%02x -> i8042 (panic blink)", led); 866 i8042_write_data(led); 867 DELAY; 868 last_blink = count; 869 return delay; 870 } 871 872 #undef DELAY 873 874 #ifdef CONFIG_PM 875 /* 876 * Here we try to restore the original BIOS settings. We only want to 877 * do that once, when we really suspend, not when we taking memory 878 * snapshot for swsusp (in this case we'll perform required cleanup 879 * as part of shutdown process). 880 */ 881 882 static int i8042_suspend(struct platform_device *dev, pm_message_t state) 883 { 884 if (dev->dev.power.power_state.event != state.event) { 885 if (state.event == PM_EVENT_SUSPEND) 886 i8042_controller_reset(); 887 888 dev->dev.power.power_state = state; 889 } 890 891 return 0; 892 } 893 894 895 /* 896 * Here we try to reset everything back to a state in which suspended 897 */ 898 899 static int i8042_resume(struct platform_device *dev) 900 { 901 int error; 902 903 /* 904 * Do not bother with restoring state if we haven't suspened yet 905 */ 906 if (dev->dev.power.power_state.event == PM_EVENT_ON) 907 return 0; 908 909 error = i8042_controller_check(); 910 if (error) 911 return error; 912 913 error = i8042_controller_selftest(); 914 if (error) 915 return error; 916 917 /* 918 * Restore original CTR value and disable all ports 919 */ 920 921 i8042_ctr = i8042_initial_ctr; 922 if (i8042_direct) 923 i8042_ctr &= ~I8042_CTR_XLATE; 924 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 925 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 926 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 927 printk(KERN_ERR "i8042: Can't write CTR to resume\n"); 928 return -EIO; 929 } 930 931 if (i8042_mux_present) { 932 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports()) 933 printk(KERN_WARNING 934 "i8042: failed to resume active multiplexor, " 935 "mouse won't work.\n"); 936 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 937 i8042_enable_aux_port(); 938 939 if (i8042_ports[I8042_KBD_PORT_NO].serio) 940 i8042_enable_kbd_port(); 941 942 i8042_interrupt(0, NULL); 943 944 dev->dev.power.power_state = PMSG_ON; 945 946 return 0; 947 } 948 #endif /* CONFIG_PM */ 949 950 /* 951 * We need to reset the 8042 back to original mode on system shutdown, 952 * because otherwise BIOSes will be confused. 953 */ 954 955 static void i8042_shutdown(struct platform_device *dev) 956 { 957 i8042_controller_reset(); 958 } 959 960 static int __devinit i8042_create_kbd_port(void) 961 { 962 struct serio *serio; 963 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 964 965 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 966 if (!serio) 967 return -ENOMEM; 968 969 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 970 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 971 serio->start = i8042_start; 972 serio->stop = i8042_stop; 973 serio->port_data = port; 974 serio->dev.parent = &i8042_platform_device->dev; 975 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 976 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 977 978 port->serio = serio; 979 port->irq = I8042_KBD_IRQ; 980 981 return 0; 982 } 983 984 static int __devinit i8042_create_aux_port(int idx) 985 { 986 struct serio *serio; 987 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 988 struct i8042_port *port = &i8042_ports[port_no]; 989 990 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 991 if (!serio) 992 return -ENOMEM; 993 994 serio->id.type = SERIO_8042; 995 serio->write = i8042_aux_write; 996 serio->start = i8042_start; 997 serio->stop = i8042_stop; 998 serio->port_data = port; 999 serio->dev.parent = &i8042_platform_device->dev; 1000 if (idx < 0) { 1001 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1002 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1003 } else { 1004 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1005 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 1006 } 1007 1008 port->serio = serio; 1009 port->mux = idx; 1010 port->irq = I8042_AUX_IRQ; 1011 1012 return 0; 1013 } 1014 1015 static void __devinit i8042_free_kbd_port(void) 1016 { 1017 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1018 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1019 } 1020 1021 static void __devinit i8042_free_aux_ports(void) 1022 { 1023 int i; 1024 1025 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1026 kfree(i8042_ports[i].serio); 1027 i8042_ports[i].serio = NULL; 1028 } 1029 } 1030 1031 static void __devinit i8042_register_ports(void) 1032 { 1033 int i; 1034 1035 for (i = 0; i < I8042_NUM_PORTS; i++) { 1036 if (i8042_ports[i].serio) { 1037 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1038 i8042_ports[i].serio->name, 1039 (unsigned long) I8042_DATA_REG, 1040 (unsigned long) I8042_COMMAND_REG, 1041 i8042_ports[i].irq); 1042 serio_register_port(i8042_ports[i].serio); 1043 } 1044 } 1045 } 1046 1047 static void __devexit i8042_unregister_ports(void) 1048 { 1049 int i; 1050 1051 for (i = 0; i < I8042_NUM_PORTS; i++) { 1052 if (i8042_ports[i].serio) { 1053 serio_unregister_port(i8042_ports[i].serio); 1054 i8042_ports[i].serio = NULL; 1055 } 1056 } 1057 } 1058 1059 static void i8042_free_irqs(void) 1060 { 1061 if (i8042_aux_irq_registered) 1062 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1063 if (i8042_kbd_irq_registered) 1064 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1065 1066 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0; 1067 } 1068 1069 static int __devinit i8042_setup_aux(void) 1070 { 1071 int (*aux_enable)(void); 1072 int error; 1073 int i; 1074 1075 if (i8042_check_aux()) 1076 return -ENODEV; 1077 1078 if (i8042_nomux || i8042_check_mux()) { 1079 error = i8042_create_aux_port(-1); 1080 if (error) 1081 goto err_free_ports; 1082 aux_enable = i8042_enable_aux_port; 1083 } else { 1084 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1085 error = i8042_create_aux_port(i); 1086 if (error) 1087 goto err_free_ports; 1088 } 1089 aux_enable = i8042_enable_mux_ports; 1090 } 1091 1092 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1093 "i8042", i8042_platform_device); 1094 if (error) 1095 goto err_free_ports; 1096 1097 if (aux_enable()) 1098 goto err_free_irq; 1099 1100 i8042_aux_irq_registered = 1; 1101 return 0; 1102 1103 err_free_irq: 1104 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1105 err_free_ports: 1106 i8042_free_aux_ports(); 1107 return error; 1108 } 1109 1110 static int __devinit i8042_setup_kbd(void) 1111 { 1112 int error; 1113 1114 error = i8042_create_kbd_port(); 1115 if (error) 1116 return error; 1117 1118 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1119 "i8042", i8042_platform_device); 1120 if (error) 1121 goto err_free_port; 1122 1123 error = i8042_enable_kbd_port(); 1124 if (error) 1125 goto err_free_irq; 1126 1127 i8042_kbd_irq_registered = 1; 1128 return 0; 1129 1130 err_free_irq: 1131 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1132 err_free_port: 1133 i8042_free_kbd_port(); 1134 return error; 1135 } 1136 1137 static int __devinit i8042_probe(struct platform_device *dev) 1138 { 1139 int error; 1140 1141 error = i8042_controller_selftest(); 1142 if (error) 1143 return error; 1144 1145 error = i8042_controller_init(); 1146 if (error) 1147 return error; 1148 1149 if (!i8042_noaux) { 1150 error = i8042_setup_aux(); 1151 if (error && error != -ENODEV && error != -EBUSY) 1152 goto out_fail; 1153 } 1154 1155 if (!i8042_nokbd) { 1156 error = i8042_setup_kbd(); 1157 if (error) 1158 goto out_fail; 1159 } 1160 1161 /* 1162 * Ok, everything is ready, let's register all serio ports 1163 */ 1164 i8042_register_ports(); 1165 1166 return 0; 1167 1168 out_fail: 1169 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1170 i8042_free_irqs(); 1171 i8042_controller_reset(); 1172 1173 return error; 1174 } 1175 1176 static int __devexit i8042_remove(struct platform_device *dev) 1177 { 1178 i8042_unregister_ports(); 1179 i8042_free_irqs(); 1180 i8042_controller_reset(); 1181 1182 return 0; 1183 } 1184 1185 static struct platform_driver i8042_driver = { 1186 .driver = { 1187 .name = "i8042", 1188 .owner = THIS_MODULE, 1189 }, 1190 .probe = i8042_probe, 1191 .remove = __devexit_p(i8042_remove), 1192 .shutdown = i8042_shutdown, 1193 #ifdef CONFIG_PM 1194 .suspend = i8042_suspend, 1195 .resume = i8042_resume, 1196 #endif 1197 }; 1198 1199 static int __init i8042_init(void) 1200 { 1201 int err; 1202 1203 dbg_init(); 1204 1205 err = i8042_platform_init(); 1206 if (err) 1207 return err; 1208 1209 err = i8042_controller_check(); 1210 if (err) 1211 goto err_platform_exit; 1212 1213 err = platform_driver_register(&i8042_driver); 1214 if (err) 1215 goto err_platform_exit; 1216 1217 i8042_platform_device = platform_device_alloc("i8042", -1); 1218 if (!i8042_platform_device) { 1219 err = -ENOMEM; 1220 goto err_unregister_driver; 1221 } 1222 1223 err = platform_device_add(i8042_platform_device); 1224 if (err) 1225 goto err_free_device; 1226 1227 panic_blink = i8042_panic_blink; 1228 1229 return 0; 1230 1231 err_free_device: 1232 platform_device_put(i8042_platform_device); 1233 err_unregister_driver: 1234 platform_driver_unregister(&i8042_driver); 1235 err_platform_exit: 1236 i8042_platform_exit(); 1237 1238 return err; 1239 } 1240 1241 static void __exit i8042_exit(void) 1242 { 1243 platform_device_unregister(i8042_platform_device); 1244 platform_driver_unregister(&i8042_driver); 1245 i8042_platform_exit(); 1246 1247 panic_blink = NULL; 1248 } 1249 1250 module_init(i8042_init); 1251 module_exit(i8042_exit); 1252