1*9c92ab61SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 23e9f0b3eSChen Zhong /* 33e9f0b3eSChen Zhong * Copyright (C) 2017 MediaTek, Inc. 43e9f0b3eSChen Zhong * 53e9f0b3eSChen Zhong * Author: Chen Zhong <chen.zhong@mediatek.com> 63e9f0b3eSChen Zhong */ 73e9f0b3eSChen Zhong 83e9f0b3eSChen Zhong #include <linux/input.h> 93e9f0b3eSChen Zhong #include <linux/interrupt.h> 103e9f0b3eSChen Zhong #include <linux/kernel.h> 113e9f0b3eSChen Zhong #include <linux/mfd/mt6323/registers.h> 123e9f0b3eSChen Zhong #include <linux/mfd/mt6397/core.h> 131eb7ea26SYueHaibing #include <linux/mfd/mt6397/registers.h> 141eb7ea26SYueHaibing #include <linux/module.h> 151eb7ea26SYueHaibing #include <linux/of_device.h> 161eb7ea26SYueHaibing #include <linux/of.h> 171eb7ea26SYueHaibing #include <linux/platform_device.h> 181eb7ea26SYueHaibing #include <linux/regmap.h> 193e9f0b3eSChen Zhong 203e9f0b3eSChen Zhong #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1 213e9f0b3eSChen Zhong #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6 223e9f0b3eSChen Zhong #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1 233e9f0b3eSChen Zhong #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5 243e9f0b3eSChen Zhong #define MTK_PMIC_RST_DU_MASK 0x3 253e9f0b3eSChen Zhong #define MTK_PMIC_RST_DU_SHIFT 8 263e9f0b3eSChen Zhong 273e9f0b3eSChen Zhong #define MTK_PMIC_PWRKEY_RST \ 283e9f0b3eSChen Zhong (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT) 293e9f0b3eSChen Zhong #define MTK_PMIC_HOMEKEY_RST \ 303e9f0b3eSChen Zhong (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT) 313e9f0b3eSChen Zhong 323e9f0b3eSChen Zhong #define MTK_PMIC_PWRKEY_INDEX 0 333e9f0b3eSChen Zhong #define MTK_PMIC_HOMEKEY_INDEX 1 343e9f0b3eSChen Zhong #define MTK_PMIC_MAX_KEY_COUNT 2 353e9f0b3eSChen Zhong 363e9f0b3eSChen Zhong struct mtk_pmic_keys_regs { 373e9f0b3eSChen Zhong u32 deb_reg; 383e9f0b3eSChen Zhong u32 deb_mask; 393e9f0b3eSChen Zhong u32 intsel_reg; 403e9f0b3eSChen Zhong u32 intsel_mask; 413e9f0b3eSChen Zhong }; 423e9f0b3eSChen Zhong 433e9f0b3eSChen Zhong #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ 443e9f0b3eSChen Zhong _intsel_reg, _intsel_mask) \ 453e9f0b3eSChen Zhong { \ 463e9f0b3eSChen Zhong .deb_reg = _deb_reg, \ 473e9f0b3eSChen Zhong .deb_mask = _deb_mask, \ 483e9f0b3eSChen Zhong .intsel_reg = _intsel_reg, \ 493e9f0b3eSChen Zhong .intsel_mask = _intsel_mask, \ 503e9f0b3eSChen Zhong } 513e9f0b3eSChen Zhong 523e9f0b3eSChen Zhong struct mtk_pmic_regs { 533e9f0b3eSChen Zhong const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; 543e9f0b3eSChen Zhong u32 pmic_rst_reg; 553e9f0b3eSChen Zhong }; 563e9f0b3eSChen Zhong 573e9f0b3eSChen Zhong static const struct mtk_pmic_regs mt6397_regs = { 583e9f0b3eSChen Zhong .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 593e9f0b3eSChen Zhong MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, 603e9f0b3eSChen Zhong 0x8, MT6397_INT_RSV, 0x10), 613e9f0b3eSChen Zhong .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 623e9f0b3eSChen Zhong MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, 633e9f0b3eSChen Zhong 0x10, MT6397_INT_RSV, 0x8), 643e9f0b3eSChen Zhong .pmic_rst_reg = MT6397_TOP_RST_MISC, 653e9f0b3eSChen Zhong }; 663e9f0b3eSChen Zhong 673e9f0b3eSChen Zhong static const struct mtk_pmic_regs mt6323_regs = { 683e9f0b3eSChen Zhong .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 693e9f0b3eSChen Zhong MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 703e9f0b3eSChen Zhong 0x2, MT6323_INT_MISC_CON, 0x10), 713e9f0b3eSChen Zhong .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 723e9f0b3eSChen Zhong MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 733e9f0b3eSChen Zhong 0x4, MT6323_INT_MISC_CON, 0x8), 743e9f0b3eSChen Zhong .pmic_rst_reg = MT6323_TOP_RST_MISC, 753e9f0b3eSChen Zhong }; 763e9f0b3eSChen Zhong 773e9f0b3eSChen Zhong struct mtk_pmic_keys_info { 783e9f0b3eSChen Zhong struct mtk_pmic_keys *keys; 793e9f0b3eSChen Zhong const struct mtk_pmic_keys_regs *regs; 803e9f0b3eSChen Zhong unsigned int keycode; 813e9f0b3eSChen Zhong int irq; 823e9f0b3eSChen Zhong bool wakeup:1; 833e9f0b3eSChen Zhong }; 843e9f0b3eSChen Zhong 853e9f0b3eSChen Zhong struct mtk_pmic_keys { 863e9f0b3eSChen Zhong struct input_dev *input_dev; 873e9f0b3eSChen Zhong struct device *dev; 883e9f0b3eSChen Zhong struct regmap *regmap; 893e9f0b3eSChen Zhong struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT]; 903e9f0b3eSChen Zhong }; 913e9f0b3eSChen Zhong 923e9f0b3eSChen Zhong enum mtk_pmic_keys_lp_mode { 933e9f0b3eSChen Zhong LP_DISABLE, 943e9f0b3eSChen Zhong LP_ONEKEY, 953e9f0b3eSChen Zhong LP_TWOKEY, 963e9f0b3eSChen Zhong }; 973e9f0b3eSChen Zhong 983e9f0b3eSChen Zhong static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, 993e9f0b3eSChen Zhong u32 pmic_rst_reg) 1003e9f0b3eSChen Zhong { 1013e9f0b3eSChen Zhong int ret; 1023e9f0b3eSChen Zhong u32 long_press_mode, long_press_debounce; 1033e9f0b3eSChen Zhong 1043e9f0b3eSChen Zhong ret = of_property_read_u32(keys->dev->of_node, 1053e9f0b3eSChen Zhong "power-off-time-sec", &long_press_debounce); 1063e9f0b3eSChen Zhong if (ret) 1073e9f0b3eSChen Zhong long_press_debounce = 0; 1083e9f0b3eSChen Zhong 1093e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1103e9f0b3eSChen Zhong MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT, 1113e9f0b3eSChen Zhong long_press_debounce << MTK_PMIC_RST_DU_SHIFT); 1123e9f0b3eSChen Zhong 1133e9f0b3eSChen Zhong ret = of_property_read_u32(keys->dev->of_node, 1143e9f0b3eSChen Zhong "mediatek,long-press-mode", &long_press_mode); 1153e9f0b3eSChen Zhong if (ret) 1163e9f0b3eSChen Zhong long_press_mode = LP_DISABLE; 1173e9f0b3eSChen Zhong 1183e9f0b3eSChen Zhong switch (long_press_mode) { 1193e9f0b3eSChen Zhong case LP_ONEKEY: 1203e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1213e9f0b3eSChen Zhong MTK_PMIC_PWRKEY_RST, 1223e9f0b3eSChen Zhong MTK_PMIC_PWRKEY_RST); 1233e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1243e9f0b3eSChen Zhong MTK_PMIC_HOMEKEY_RST, 1253e9f0b3eSChen Zhong 0); 1263e9f0b3eSChen Zhong break; 1273e9f0b3eSChen Zhong case LP_TWOKEY: 1283e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1293e9f0b3eSChen Zhong MTK_PMIC_PWRKEY_RST, 1303e9f0b3eSChen Zhong MTK_PMIC_PWRKEY_RST); 1313e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1323e9f0b3eSChen Zhong MTK_PMIC_HOMEKEY_RST, 1333e9f0b3eSChen Zhong MTK_PMIC_HOMEKEY_RST); 1343e9f0b3eSChen Zhong break; 1353e9f0b3eSChen Zhong case LP_DISABLE: 1363e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1373e9f0b3eSChen Zhong MTK_PMIC_PWRKEY_RST, 1383e9f0b3eSChen Zhong 0); 1393e9f0b3eSChen Zhong regmap_update_bits(keys->regmap, pmic_rst_reg, 1403e9f0b3eSChen Zhong MTK_PMIC_HOMEKEY_RST, 1413e9f0b3eSChen Zhong 0); 1423e9f0b3eSChen Zhong break; 1433e9f0b3eSChen Zhong default: 1443e9f0b3eSChen Zhong break; 1453e9f0b3eSChen Zhong } 1463e9f0b3eSChen Zhong } 1473e9f0b3eSChen Zhong 1483e9f0b3eSChen Zhong static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) 1493e9f0b3eSChen Zhong { 1503e9f0b3eSChen Zhong struct mtk_pmic_keys_info *info = data; 1513e9f0b3eSChen Zhong u32 key_deb, pressed; 1523e9f0b3eSChen Zhong 1533e9f0b3eSChen Zhong regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb); 1543e9f0b3eSChen Zhong 1553e9f0b3eSChen Zhong key_deb &= info->regs->deb_mask; 1563e9f0b3eSChen Zhong 1573e9f0b3eSChen Zhong pressed = !key_deb; 1583e9f0b3eSChen Zhong 1593e9f0b3eSChen Zhong input_report_key(info->keys->input_dev, info->keycode, pressed); 1603e9f0b3eSChen Zhong input_sync(info->keys->input_dev); 1613e9f0b3eSChen Zhong 1623e9f0b3eSChen Zhong dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n", 1633e9f0b3eSChen Zhong pressed ? "pressed" : "released", info->keycode); 1643e9f0b3eSChen Zhong 1653e9f0b3eSChen Zhong return IRQ_HANDLED; 1663e9f0b3eSChen Zhong } 1673e9f0b3eSChen Zhong 1683e9f0b3eSChen Zhong static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys, 1693e9f0b3eSChen Zhong struct mtk_pmic_keys_info *info) 1703e9f0b3eSChen Zhong { 1713e9f0b3eSChen Zhong int ret; 1723e9f0b3eSChen Zhong 1733e9f0b3eSChen Zhong info->keys = keys; 1743e9f0b3eSChen Zhong 1753e9f0b3eSChen Zhong ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg, 1763e9f0b3eSChen Zhong info->regs->intsel_mask, 1773e9f0b3eSChen Zhong info->regs->intsel_mask); 1783e9f0b3eSChen Zhong if (ret < 0) 1793e9f0b3eSChen Zhong return ret; 1803e9f0b3eSChen Zhong 1813e9f0b3eSChen Zhong ret = devm_request_threaded_irq(keys->dev, info->irq, NULL, 1823e9f0b3eSChen Zhong mtk_pmic_keys_irq_handler_thread, 1833e9f0b3eSChen Zhong IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 1843e9f0b3eSChen Zhong "mtk-pmic-keys", info); 1853e9f0b3eSChen Zhong if (ret) { 1863e9f0b3eSChen Zhong dev_err(keys->dev, "Failed to request IRQ: %d: %d\n", 1873e9f0b3eSChen Zhong info->irq, ret); 1883e9f0b3eSChen Zhong return ret; 1893e9f0b3eSChen Zhong } 1903e9f0b3eSChen Zhong 1913e9f0b3eSChen Zhong input_set_capability(keys->input_dev, EV_KEY, info->keycode); 1923e9f0b3eSChen Zhong 1933e9f0b3eSChen Zhong return 0; 1943e9f0b3eSChen Zhong } 1953e9f0b3eSChen Zhong 1963e9f0b3eSChen Zhong static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev) 1973e9f0b3eSChen Zhong { 1983e9f0b3eSChen Zhong struct mtk_pmic_keys *keys = dev_get_drvdata(dev); 1993e9f0b3eSChen Zhong int index; 2003e9f0b3eSChen Zhong 2013e9f0b3eSChen Zhong for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { 2023e9f0b3eSChen Zhong if (keys->keys[index].wakeup) 2033e9f0b3eSChen Zhong enable_irq_wake(keys->keys[index].irq); 2043e9f0b3eSChen Zhong } 2053e9f0b3eSChen Zhong 2063e9f0b3eSChen Zhong return 0; 2073e9f0b3eSChen Zhong } 2083e9f0b3eSChen Zhong 2093e9f0b3eSChen Zhong static int __maybe_unused mtk_pmic_keys_resume(struct device *dev) 2103e9f0b3eSChen Zhong { 2113e9f0b3eSChen Zhong struct mtk_pmic_keys *keys = dev_get_drvdata(dev); 2123e9f0b3eSChen Zhong int index; 2133e9f0b3eSChen Zhong 2143e9f0b3eSChen Zhong for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { 2153e9f0b3eSChen Zhong if (keys->keys[index].wakeup) 2163e9f0b3eSChen Zhong disable_irq_wake(keys->keys[index].irq); 2173e9f0b3eSChen Zhong } 2183e9f0b3eSChen Zhong 2193e9f0b3eSChen Zhong return 0; 2203e9f0b3eSChen Zhong } 2213e9f0b3eSChen Zhong 2223e9f0b3eSChen Zhong static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend, 2233e9f0b3eSChen Zhong mtk_pmic_keys_resume); 2243e9f0b3eSChen Zhong 2253e9f0b3eSChen Zhong static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { 2263e9f0b3eSChen Zhong { 2273e9f0b3eSChen Zhong .compatible = "mediatek,mt6397-keys", 2283e9f0b3eSChen Zhong .data = &mt6397_regs, 2293e9f0b3eSChen Zhong }, { 2303e9f0b3eSChen Zhong .compatible = "mediatek,mt6323-keys", 2313e9f0b3eSChen Zhong .data = &mt6323_regs, 2323e9f0b3eSChen Zhong }, { 2333e9f0b3eSChen Zhong /* sentinel */ 2343e9f0b3eSChen Zhong } 2353e9f0b3eSChen Zhong }; 2363e9f0b3eSChen Zhong MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl); 2373e9f0b3eSChen Zhong 2383e9f0b3eSChen Zhong static int mtk_pmic_keys_probe(struct platform_device *pdev) 2393e9f0b3eSChen Zhong { 2403e9f0b3eSChen Zhong int error, index = 0; 2413e9f0b3eSChen Zhong unsigned int keycount; 2423e9f0b3eSChen Zhong struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent); 2433e9f0b3eSChen Zhong struct device_node *node = pdev->dev.of_node, *child; 2443e9f0b3eSChen Zhong struct mtk_pmic_keys *keys; 2453e9f0b3eSChen Zhong const struct mtk_pmic_regs *mtk_pmic_regs; 2463e9f0b3eSChen Zhong struct input_dev *input_dev; 2473e9f0b3eSChen Zhong const struct of_device_id *of_id = 2483e9f0b3eSChen Zhong of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev); 2493e9f0b3eSChen Zhong 2503e9f0b3eSChen Zhong keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL); 2513e9f0b3eSChen Zhong if (!keys) 2523e9f0b3eSChen Zhong return -ENOMEM; 2533e9f0b3eSChen Zhong 2543e9f0b3eSChen Zhong keys->dev = &pdev->dev; 2553e9f0b3eSChen Zhong keys->regmap = pmic_chip->regmap; 2563e9f0b3eSChen Zhong mtk_pmic_regs = of_id->data; 2573e9f0b3eSChen Zhong 2583e9f0b3eSChen Zhong keys->input_dev = input_dev = devm_input_allocate_device(keys->dev); 2593e9f0b3eSChen Zhong if (!input_dev) { 2603e9f0b3eSChen Zhong dev_err(keys->dev, "input allocate device fail.\n"); 2613e9f0b3eSChen Zhong return -ENOMEM; 2623e9f0b3eSChen Zhong } 2633e9f0b3eSChen Zhong 2643e9f0b3eSChen Zhong input_dev->name = "mtk-pmic-keys"; 2653e9f0b3eSChen Zhong input_dev->id.bustype = BUS_HOST; 2663e9f0b3eSChen Zhong input_dev->id.vendor = 0x0001; 2673e9f0b3eSChen Zhong input_dev->id.product = 0x0001; 2683e9f0b3eSChen Zhong input_dev->id.version = 0x0001; 2693e9f0b3eSChen Zhong 2703e9f0b3eSChen Zhong keycount = of_get_available_child_count(node); 2713e9f0b3eSChen Zhong if (keycount > MTK_PMIC_MAX_KEY_COUNT) { 2723e9f0b3eSChen Zhong dev_err(keys->dev, "too many keys defined (%d)\n", keycount); 2733e9f0b3eSChen Zhong return -EINVAL; 2743e9f0b3eSChen Zhong } 2753e9f0b3eSChen Zhong 2763e9f0b3eSChen Zhong for_each_child_of_node(node, child) { 2773e9f0b3eSChen Zhong keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index]; 2783e9f0b3eSChen Zhong 2793e9f0b3eSChen Zhong keys->keys[index].irq = platform_get_irq(pdev, index); 2803e9f0b3eSChen Zhong if (keys->keys[index].irq < 0) 2813e9f0b3eSChen Zhong return keys->keys[index].irq; 2823e9f0b3eSChen Zhong 2833e9f0b3eSChen Zhong error = of_property_read_u32(child, 2843e9f0b3eSChen Zhong "linux,keycodes", &keys->keys[index].keycode); 2853e9f0b3eSChen Zhong if (error) { 2863e9f0b3eSChen Zhong dev_err(keys->dev, 2873e9f0b3eSChen Zhong "failed to read key:%d linux,keycode property: %d\n", 2883e9f0b3eSChen Zhong index, error); 2893e9f0b3eSChen Zhong return error; 2903e9f0b3eSChen Zhong } 2913e9f0b3eSChen Zhong 2923e9f0b3eSChen Zhong if (of_property_read_bool(child, "wakeup-source")) 2933e9f0b3eSChen Zhong keys->keys[index].wakeup = true; 2943e9f0b3eSChen Zhong 2953e9f0b3eSChen Zhong error = mtk_pmic_key_setup(keys, &keys->keys[index]); 2963e9f0b3eSChen Zhong if (error) 2973e9f0b3eSChen Zhong return error; 2983e9f0b3eSChen Zhong 2993e9f0b3eSChen Zhong index++; 3003e9f0b3eSChen Zhong } 3013e9f0b3eSChen Zhong 3023e9f0b3eSChen Zhong error = input_register_device(input_dev); 3033e9f0b3eSChen Zhong if (error) { 3043e9f0b3eSChen Zhong dev_err(&pdev->dev, 3053e9f0b3eSChen Zhong "register input device failed (%d)\n", error); 3063e9f0b3eSChen Zhong return error; 3073e9f0b3eSChen Zhong } 3083e9f0b3eSChen Zhong 3093e9f0b3eSChen Zhong mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg); 3103e9f0b3eSChen Zhong 3113e9f0b3eSChen Zhong platform_set_drvdata(pdev, keys); 3123e9f0b3eSChen Zhong 3133e9f0b3eSChen Zhong return 0; 3143e9f0b3eSChen Zhong } 3153e9f0b3eSChen Zhong 3163e9f0b3eSChen Zhong static struct platform_driver pmic_keys_pdrv = { 3173e9f0b3eSChen Zhong .probe = mtk_pmic_keys_probe, 3183e9f0b3eSChen Zhong .driver = { 3193e9f0b3eSChen Zhong .name = "mtk-pmic-keys", 3203e9f0b3eSChen Zhong .of_match_table = of_mtk_pmic_keys_match_tbl, 3213e9f0b3eSChen Zhong .pm = &mtk_pmic_keys_pm_ops, 3223e9f0b3eSChen Zhong }, 3233e9f0b3eSChen Zhong }; 3243e9f0b3eSChen Zhong 3253e9f0b3eSChen Zhong module_platform_driver(pmic_keys_pdrv); 3263e9f0b3eSChen Zhong 3273e9f0b3eSChen Zhong MODULE_LICENSE("GPL v2"); 3283e9f0b3eSChen Zhong MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>"); 3293e9f0b3eSChen Zhong MODULE_DESCRIPTION("MTK pmic-keys driver v0.1"); 330