1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ 35 */ 36 37 #include <linux/module.h> 38 #include <linux/init.h> 39 #include <linux/errno.h> 40 #include <linux/pci.h> 41 #include <linux/interrupt.h> 42 43 #include "mthca_dev.h" 44 #include "mthca_config_reg.h" 45 #include "mthca_cmd.h" 46 #include "mthca_profile.h" 47 #include "mthca_memfree.h" 48 49 MODULE_AUTHOR("Roland Dreier"); 50 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 51 MODULE_LICENSE("Dual BSD/GPL"); 52 MODULE_VERSION(DRV_VERSION); 53 54 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG 55 56 int mthca_debug_level = 0; 57 module_param_named(debug_level, mthca_debug_level, int, 0644); 58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 59 60 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */ 61 62 #ifdef CONFIG_PCI_MSI 63 64 static int msi_x = 1; 65 module_param(msi_x, int, 0444); 66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 67 68 static int msi = 0; 69 module_param(msi, int, 0444); 70 MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero (deprecated, use MSI-X instead)"); 71 72 #else /* CONFIG_PCI_MSI */ 73 74 #define msi_x (0) 75 #define msi (0) 76 77 #endif /* CONFIG_PCI_MSI */ 78 79 static int tune_pci = 0; 80 module_param(tune_pci, int, 0444); 81 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero"); 82 83 DEFINE_MUTEX(mthca_device_mutex); 84 85 #define MTHCA_DEFAULT_NUM_QP (1 << 16) 86 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2) 87 #define MTHCA_DEFAULT_NUM_CQ (1 << 16) 88 #define MTHCA_DEFAULT_NUM_MCG (1 << 13) 89 #define MTHCA_DEFAULT_NUM_MPT (1 << 17) 90 #define MTHCA_DEFAULT_NUM_MTT (1 << 20) 91 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15) 92 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18) 93 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18) 94 95 static struct mthca_profile hca_profile = { 96 .num_qp = MTHCA_DEFAULT_NUM_QP, 97 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP, 98 .num_cq = MTHCA_DEFAULT_NUM_CQ, 99 .num_mcg = MTHCA_DEFAULT_NUM_MCG, 100 .num_mpt = MTHCA_DEFAULT_NUM_MPT, 101 .num_mtt = MTHCA_DEFAULT_NUM_MTT, 102 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */ 103 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */ 104 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */ 105 }; 106 107 module_param_named(num_qp, hca_profile.num_qp, int, 0444); 108 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA"); 109 110 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444); 111 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP"); 112 113 module_param_named(num_cq, hca_profile.num_cq, int, 0444); 114 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA"); 115 116 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444); 117 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA"); 118 119 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444); 120 MODULE_PARM_DESC(num_mpt, 121 "maximum number of memory protection table entries per HCA"); 122 123 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444); 124 MODULE_PARM_DESC(num_mtt, 125 "maximum number of memory translation table segments per HCA"); 126 127 module_param_named(num_udav, hca_profile.num_udav, int, 0444); 128 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA"); 129 130 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444); 131 MODULE_PARM_DESC(fmr_reserved_mtts, 132 "number of memory translation table segments reserved for FMR"); 133 134 static const char mthca_version[] __devinitdata = 135 DRV_NAME ": Mellanox InfiniBand HCA driver v" 136 DRV_VERSION " (" DRV_RELDATE ")\n"; 137 138 static int mthca_tune_pci(struct mthca_dev *mdev) 139 { 140 if (!tune_pci) 141 return 0; 142 143 /* First try to max out Read Byte Count */ 144 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { 145 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { 146 mthca_err(mdev, "Couldn't set PCI-X max read count, " 147 "aborting.\n"); 148 return -ENODEV; 149 } 150 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 151 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 152 153 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) { 154 if (pcie_set_readrq(mdev->pdev, 4096)) { 155 mthca_err(mdev, "Couldn't write PCI Express read request, " 156 "aborting.\n"); 157 return -ENODEV; 158 } 159 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 160 mthca_info(mdev, "No PCI Express capability, " 161 "not setting Max Read Request Size.\n"); 162 163 return 0; 164 } 165 166 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 167 { 168 int err; 169 u8 status; 170 171 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 172 if (err) { 173 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 174 return err; 175 } 176 if (status) { 177 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 178 "aborting.\n", status); 179 return -EINVAL; 180 } 181 if (dev_lim->min_page_sz > PAGE_SIZE) { 182 mthca_err(mdev, "HCA minimum page size of %d bigger than " 183 "kernel PAGE_SIZE of %ld, aborting.\n", 184 dev_lim->min_page_sz, PAGE_SIZE); 185 return -ENODEV; 186 } 187 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 188 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 189 "aborting.\n", 190 dev_lim->num_ports, MTHCA_MAX_PORTS); 191 return -ENODEV; 192 } 193 194 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { 195 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " 196 "PCI resource 2 size of 0x%llx, aborting.\n", 197 dev_lim->uar_size, 198 (unsigned long long)pci_resource_len(mdev->pdev, 2)); 199 return -ENODEV; 200 } 201 202 mdev->limits.num_ports = dev_lim->num_ports; 203 mdev->limits.vl_cap = dev_lim->max_vl; 204 mdev->limits.mtu_cap = dev_lim->max_mtu; 205 mdev->limits.gid_table_len = dev_lim->max_gids; 206 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 207 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 208 mdev->limits.max_sg = dev_lim->max_sg; 209 mdev->limits.max_wqes = dev_lim->max_qp_sz; 210 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 211 mdev->limits.reserved_qps = dev_lim->reserved_qps; 212 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 213 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 214 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 215 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 216 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev); 217 /* 218 * Subtract 1 from the limit because we need to allocate a 219 * spare CQE so the HCA HW can tell the difference between an 220 * empty CQ and a full CQ. 221 */ 222 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 223 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 224 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 225 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 226 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 227 mdev->limits.reserved_uars = dev_lim->reserved_uars; 228 mdev->limits.reserved_pds = dev_lim->reserved_pds; 229 mdev->limits.port_width_cap = dev_lim->max_port_width; 230 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 231 mdev->limits.flags = dev_lim->flags; 232 /* 233 * For old FW that doesn't return static rate support, use a 234 * value of 0x3 (only static rate values of 0 or 1 are handled), 235 * except on Sinai, where even old FW can handle static rate 236 * values of 2 and 3. 237 */ 238 if (dev_lim->stat_rate_support) 239 mdev->limits.stat_rate_support = dev_lim->stat_rate_support; 240 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 241 mdev->limits.stat_rate_support = 0xf; 242 else 243 mdev->limits.stat_rate_support = 0x3; 244 245 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 246 May be doable since hardware supports it for SRQ. 247 248 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 249 250 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 251 supported by driver. */ 252 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 253 IB_DEVICE_PORT_ACTIVE_EVENT | 254 IB_DEVICE_SYS_IMAGE_GUID | 255 IB_DEVICE_RC_RNR_NAK_GEN; 256 257 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 258 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 259 260 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 261 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 262 263 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 264 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 265 266 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 267 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 268 269 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 270 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 271 272 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 273 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 274 275 return 0; 276 } 277 278 static int mthca_init_tavor(struct mthca_dev *mdev) 279 { 280 u8 status; 281 int err; 282 struct mthca_dev_lim dev_lim; 283 struct mthca_profile profile; 284 struct mthca_init_hca_param init_hca; 285 286 err = mthca_SYS_EN(mdev, &status); 287 if (err) { 288 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 289 return err; 290 } 291 if (status) { 292 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 293 "aborting.\n", status); 294 return -EINVAL; 295 } 296 297 err = mthca_QUERY_FW(mdev, &status); 298 if (err) { 299 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 300 goto err_disable; 301 } 302 if (status) { 303 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 304 "aborting.\n", status); 305 err = -EINVAL; 306 goto err_disable; 307 } 308 err = mthca_QUERY_DDR(mdev, &status); 309 if (err) { 310 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 311 goto err_disable; 312 } 313 if (status) { 314 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 315 "aborting.\n", status); 316 err = -EINVAL; 317 goto err_disable; 318 } 319 320 err = mthca_dev_lim(mdev, &dev_lim); 321 if (err) { 322 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 323 goto err_disable; 324 } 325 326 profile = hca_profile; 327 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 328 profile.uarc_size = 0; 329 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 330 profile.num_srq = dev_lim.max_srqs; 331 332 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 333 if (err < 0) 334 goto err_disable; 335 336 err = mthca_INIT_HCA(mdev, &init_hca, &status); 337 if (err) { 338 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 339 goto err_disable; 340 } 341 if (status) { 342 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 343 "aborting.\n", status); 344 err = -EINVAL; 345 goto err_disable; 346 } 347 348 return 0; 349 350 err_disable: 351 mthca_SYS_DIS(mdev, &status); 352 353 return err; 354 } 355 356 static int mthca_load_fw(struct mthca_dev *mdev) 357 { 358 u8 status; 359 int err; 360 361 /* FIXME: use HCA-attached memory for FW if present */ 362 363 mdev->fw.arbel.fw_icm = 364 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 365 GFP_HIGHUSER | __GFP_NOWARN, 0); 366 if (!mdev->fw.arbel.fw_icm) { 367 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 368 return -ENOMEM; 369 } 370 371 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 372 if (err) { 373 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 374 goto err_free; 375 } 376 if (status) { 377 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 378 err = -EINVAL; 379 goto err_free; 380 } 381 err = mthca_RUN_FW(mdev, &status); 382 if (err) { 383 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 384 goto err_unmap_fa; 385 } 386 if (status) { 387 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 388 err = -EINVAL; 389 goto err_unmap_fa; 390 } 391 392 return 0; 393 394 err_unmap_fa: 395 mthca_UNMAP_FA(mdev, &status); 396 397 err_free: 398 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 399 return err; 400 } 401 402 static int mthca_init_icm(struct mthca_dev *mdev, 403 struct mthca_dev_lim *dev_lim, 404 struct mthca_init_hca_param *init_hca, 405 u64 icm_size) 406 { 407 u64 aux_pages; 408 u8 status; 409 int err; 410 411 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 412 if (err) { 413 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 414 return err; 415 } 416 if (status) { 417 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 418 "aborting.\n", status); 419 return -EINVAL; 420 } 421 422 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 423 (unsigned long long) icm_size >> 10, 424 (unsigned long long) aux_pages << 2); 425 426 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 427 GFP_HIGHUSER | __GFP_NOWARN, 0); 428 if (!mdev->fw.arbel.aux_icm) { 429 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 430 return -ENOMEM; 431 } 432 433 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 434 if (err) { 435 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 436 goto err_free_aux; 437 } 438 if (status) { 439 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 440 err = -EINVAL; 441 goto err_free_aux; 442 } 443 444 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 445 if (err) { 446 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 447 goto err_unmap_aux; 448 } 449 450 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */ 451 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE, 452 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE; 453 454 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 455 MTHCA_MTT_SEG_SIZE, 456 mdev->limits.num_mtt_segs, 457 mdev->limits.reserved_mtts, 458 1, 0); 459 if (!mdev->mr_table.mtt_table) { 460 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 461 err = -ENOMEM; 462 goto err_unmap_eq; 463 } 464 465 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 466 dev_lim->mpt_entry_sz, 467 mdev->limits.num_mpts, 468 mdev->limits.reserved_mrws, 469 1, 1); 470 if (!mdev->mr_table.mpt_table) { 471 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 472 err = -ENOMEM; 473 goto err_unmap_mtt; 474 } 475 476 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 477 dev_lim->qpc_entry_sz, 478 mdev->limits.num_qps, 479 mdev->limits.reserved_qps, 480 0, 0); 481 if (!mdev->qp_table.qp_table) { 482 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 483 err = -ENOMEM; 484 goto err_unmap_mpt; 485 } 486 487 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 488 dev_lim->eqpc_entry_sz, 489 mdev->limits.num_qps, 490 mdev->limits.reserved_qps, 491 0, 0); 492 if (!mdev->qp_table.eqp_table) { 493 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 494 err = -ENOMEM; 495 goto err_unmap_qp; 496 } 497 498 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 499 MTHCA_RDB_ENTRY_SIZE, 500 mdev->limits.num_qps << 501 mdev->qp_table.rdb_shift, 0, 502 0, 0); 503 if (!mdev->qp_table.rdb_table) { 504 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 505 err = -ENOMEM; 506 goto err_unmap_eqp; 507 } 508 509 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 510 dev_lim->cqc_entry_sz, 511 mdev->limits.num_cqs, 512 mdev->limits.reserved_cqs, 513 0, 0); 514 if (!mdev->cq_table.table) { 515 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 516 err = -ENOMEM; 517 goto err_unmap_rdb; 518 } 519 520 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 521 mdev->srq_table.table = 522 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 523 dev_lim->srq_entry_sz, 524 mdev->limits.num_srqs, 525 mdev->limits.reserved_srqs, 526 0, 0); 527 if (!mdev->srq_table.table) { 528 mthca_err(mdev, "Failed to map SRQ context memory, " 529 "aborting.\n"); 530 err = -ENOMEM; 531 goto err_unmap_cq; 532 } 533 } 534 535 /* 536 * It's not strictly required, but for simplicity just map the 537 * whole multicast group table now. The table isn't very big 538 * and it's a lot easier than trying to track ref counts. 539 */ 540 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 541 MTHCA_MGM_ENTRY_SIZE, 542 mdev->limits.num_mgms + 543 mdev->limits.num_amgms, 544 mdev->limits.num_mgms + 545 mdev->limits.num_amgms, 546 0, 0); 547 if (!mdev->mcg_table.table) { 548 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 549 err = -ENOMEM; 550 goto err_unmap_srq; 551 } 552 553 return 0; 554 555 err_unmap_srq: 556 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 557 mthca_free_icm_table(mdev, mdev->srq_table.table); 558 559 err_unmap_cq: 560 mthca_free_icm_table(mdev, mdev->cq_table.table); 561 562 err_unmap_rdb: 563 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 564 565 err_unmap_eqp: 566 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 567 568 err_unmap_qp: 569 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 570 571 err_unmap_mpt: 572 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 573 574 err_unmap_mtt: 575 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 576 577 err_unmap_eq: 578 mthca_unmap_eq_icm(mdev); 579 580 err_unmap_aux: 581 mthca_UNMAP_ICM_AUX(mdev, &status); 582 583 err_free_aux: 584 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 585 586 return err; 587 } 588 589 static void mthca_free_icms(struct mthca_dev *mdev) 590 { 591 u8 status; 592 593 mthca_free_icm_table(mdev, mdev->mcg_table.table); 594 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 595 mthca_free_icm_table(mdev, mdev->srq_table.table); 596 mthca_free_icm_table(mdev, mdev->cq_table.table); 597 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 598 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 599 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 600 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 601 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 602 mthca_unmap_eq_icm(mdev); 603 604 mthca_UNMAP_ICM_AUX(mdev, &status); 605 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 606 } 607 608 static int mthca_init_arbel(struct mthca_dev *mdev) 609 { 610 struct mthca_dev_lim dev_lim; 611 struct mthca_profile profile; 612 struct mthca_init_hca_param init_hca; 613 u64 icm_size; 614 u8 status; 615 int err; 616 617 err = mthca_QUERY_FW(mdev, &status); 618 if (err) { 619 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 620 return err; 621 } 622 if (status) { 623 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 624 "aborting.\n", status); 625 return -EINVAL; 626 } 627 628 err = mthca_ENABLE_LAM(mdev, &status); 629 if (err) { 630 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 631 return err; 632 } 633 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 634 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 635 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 636 } else if (status) { 637 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 638 "aborting.\n", status); 639 return -EINVAL; 640 } 641 642 err = mthca_load_fw(mdev); 643 if (err) { 644 mthca_err(mdev, "Failed to start FW, aborting.\n"); 645 goto err_disable; 646 } 647 648 err = mthca_dev_lim(mdev, &dev_lim); 649 if (err) { 650 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 651 goto err_stop_fw; 652 } 653 654 profile = hca_profile; 655 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 656 profile.num_udav = 0; 657 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 658 profile.num_srq = dev_lim.max_srqs; 659 660 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 661 if ((int) icm_size < 0) { 662 err = icm_size; 663 goto err_stop_fw; 664 } 665 666 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 667 if (err) 668 goto err_stop_fw; 669 670 err = mthca_INIT_HCA(mdev, &init_hca, &status); 671 if (err) { 672 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 673 goto err_free_icm; 674 } 675 if (status) { 676 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 677 "aborting.\n", status); 678 err = -EINVAL; 679 goto err_free_icm; 680 } 681 682 return 0; 683 684 err_free_icm: 685 mthca_free_icms(mdev); 686 687 err_stop_fw: 688 mthca_UNMAP_FA(mdev, &status); 689 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 690 691 err_disable: 692 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 693 mthca_DISABLE_LAM(mdev, &status); 694 695 return err; 696 } 697 698 static void mthca_close_hca(struct mthca_dev *mdev) 699 { 700 u8 status; 701 702 mthca_CLOSE_HCA(mdev, 0, &status); 703 704 if (mthca_is_memfree(mdev)) { 705 mthca_free_icms(mdev); 706 707 mthca_UNMAP_FA(mdev, &status); 708 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 709 710 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 711 mthca_DISABLE_LAM(mdev, &status); 712 } else 713 mthca_SYS_DIS(mdev, &status); 714 } 715 716 static int mthca_init_hca(struct mthca_dev *mdev) 717 { 718 u8 status; 719 int err; 720 struct mthca_adapter adapter; 721 722 if (mthca_is_memfree(mdev)) 723 err = mthca_init_arbel(mdev); 724 else 725 err = mthca_init_tavor(mdev); 726 727 if (err) 728 return err; 729 730 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 731 if (err) { 732 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 733 goto err_close; 734 } 735 if (status) { 736 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 737 "aborting.\n", status); 738 err = -EINVAL; 739 goto err_close; 740 } 741 742 mdev->eq_table.inta_pin = adapter.inta_pin; 743 mdev->rev_id = adapter.revision_id; 744 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 745 746 return 0; 747 748 err_close: 749 mthca_close_hca(mdev); 750 return err; 751 } 752 753 static int mthca_setup_hca(struct mthca_dev *dev) 754 { 755 int err; 756 u8 status; 757 758 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 759 760 err = mthca_init_uar_table(dev); 761 if (err) { 762 mthca_err(dev, "Failed to initialize " 763 "user access region table, aborting.\n"); 764 return err; 765 } 766 767 err = mthca_uar_alloc(dev, &dev->driver_uar); 768 if (err) { 769 mthca_err(dev, "Failed to allocate driver access region, " 770 "aborting.\n"); 771 goto err_uar_table_free; 772 } 773 774 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 775 if (!dev->kar) { 776 mthca_err(dev, "Couldn't map kernel access region, " 777 "aborting.\n"); 778 err = -ENOMEM; 779 goto err_uar_free; 780 } 781 782 err = mthca_init_pd_table(dev); 783 if (err) { 784 mthca_err(dev, "Failed to initialize " 785 "protection domain table, aborting.\n"); 786 goto err_kar_unmap; 787 } 788 789 err = mthca_init_mr_table(dev); 790 if (err) { 791 mthca_err(dev, "Failed to initialize " 792 "memory region table, aborting.\n"); 793 goto err_pd_table_free; 794 } 795 796 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 797 if (err) { 798 mthca_err(dev, "Failed to create driver PD, " 799 "aborting.\n"); 800 goto err_mr_table_free; 801 } 802 803 err = mthca_init_eq_table(dev); 804 if (err) { 805 mthca_err(dev, "Failed to initialize " 806 "event queue table, aborting.\n"); 807 goto err_pd_free; 808 } 809 810 err = mthca_cmd_use_events(dev); 811 if (err) { 812 mthca_err(dev, "Failed to switch to event-driven " 813 "firmware commands, aborting.\n"); 814 goto err_eq_table_free; 815 } 816 817 err = mthca_NOP(dev, &status); 818 if (err || status) { 819 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) { 820 mthca_warn(dev, "NOP command failed to generate interrupt " 821 "(IRQ %d).\n", 822 dev->mthca_flags & MTHCA_FLAG_MSI_X ? 823 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector : 824 dev->pdev->irq); 825 mthca_warn(dev, "Trying again with MSI/MSI-X disabled.\n"); 826 } else { 827 mthca_err(dev, "NOP command failed to generate interrupt " 828 "(IRQ %d), aborting.\n", 829 dev->pdev->irq); 830 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 831 } 832 833 goto err_cmd_poll; 834 } 835 836 mthca_dbg(dev, "NOP command IRQ test passed\n"); 837 838 err = mthca_init_cq_table(dev); 839 if (err) { 840 mthca_err(dev, "Failed to initialize " 841 "completion queue table, aborting.\n"); 842 goto err_cmd_poll; 843 } 844 845 err = mthca_init_srq_table(dev); 846 if (err) { 847 mthca_err(dev, "Failed to initialize " 848 "shared receive queue table, aborting.\n"); 849 goto err_cq_table_free; 850 } 851 852 err = mthca_init_qp_table(dev); 853 if (err) { 854 mthca_err(dev, "Failed to initialize " 855 "queue pair table, aborting.\n"); 856 goto err_srq_table_free; 857 } 858 859 err = mthca_init_av_table(dev); 860 if (err) { 861 mthca_err(dev, "Failed to initialize " 862 "address vector table, aborting.\n"); 863 goto err_qp_table_free; 864 } 865 866 err = mthca_init_mcg_table(dev); 867 if (err) { 868 mthca_err(dev, "Failed to initialize " 869 "multicast group table, aborting.\n"); 870 goto err_av_table_free; 871 } 872 873 return 0; 874 875 err_av_table_free: 876 mthca_cleanup_av_table(dev); 877 878 err_qp_table_free: 879 mthca_cleanup_qp_table(dev); 880 881 err_srq_table_free: 882 mthca_cleanup_srq_table(dev); 883 884 err_cq_table_free: 885 mthca_cleanup_cq_table(dev); 886 887 err_cmd_poll: 888 mthca_cmd_use_polling(dev); 889 890 err_eq_table_free: 891 mthca_cleanup_eq_table(dev); 892 893 err_pd_free: 894 mthca_pd_free(dev, &dev->driver_pd); 895 896 err_mr_table_free: 897 mthca_cleanup_mr_table(dev); 898 899 err_pd_table_free: 900 mthca_cleanup_pd_table(dev); 901 902 err_kar_unmap: 903 iounmap(dev->kar); 904 905 err_uar_free: 906 mthca_uar_free(dev, &dev->driver_uar); 907 908 err_uar_table_free: 909 mthca_cleanup_uar_table(dev); 910 return err; 911 } 912 913 static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden) 914 { 915 int err; 916 917 /* 918 * We can't just use pci_request_regions() because the MSI-X 919 * table is right in the middle of the first BAR. If we did 920 * pci_request_region and grab all of the first BAR, then 921 * setting up MSI-X would fail, since the PCI core wants to do 922 * request_mem_region on the MSI-X vector table. 923 * 924 * So just request what we need right now, and request any 925 * other regions we need when setting up EQs. 926 */ 927 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 928 MTHCA_HCR_SIZE, DRV_NAME)) 929 return -EBUSY; 930 931 err = pci_request_region(pdev, 2, DRV_NAME); 932 if (err) 933 goto err_bar2_failed; 934 935 if (!ddr_hidden) { 936 err = pci_request_region(pdev, 4, DRV_NAME); 937 if (err) 938 goto err_bar4_failed; 939 } 940 941 return 0; 942 943 err_bar4_failed: 944 pci_release_region(pdev, 2); 945 946 err_bar2_failed: 947 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 948 MTHCA_HCR_SIZE); 949 950 return err; 951 } 952 953 static void mthca_release_regions(struct pci_dev *pdev, 954 int ddr_hidden) 955 { 956 if (!ddr_hidden) 957 pci_release_region(pdev, 4); 958 959 pci_release_region(pdev, 2); 960 961 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 962 MTHCA_HCR_SIZE); 963 } 964 965 static int mthca_enable_msi_x(struct mthca_dev *mdev) 966 { 967 struct msix_entry entries[3]; 968 int err; 969 970 entries[0].entry = 0; 971 entries[1].entry = 1; 972 entries[2].entry = 2; 973 974 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 975 if (err) { 976 if (err > 0) 977 mthca_info(mdev, "Only %d MSI-X vectors available, " 978 "not using MSI-X\n", err); 979 return err; 980 } 981 982 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 983 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 984 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 985 986 return 0; 987 } 988 989 /* Types of supported HCA */ 990 enum { 991 TAVOR, /* MT23108 */ 992 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 993 ARBEL_NATIVE, /* MT25208 with extended features */ 994 SINAI /* MT25204 */ 995 }; 996 997 #define MTHCA_FW_VER(major, minor, subminor) \ 998 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 999 1000 static struct { 1001 u64 latest_fw; 1002 u32 flags; 1003 } mthca_hca_table[] = { 1004 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0), 1005 .flags = 0 }, 1006 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200), 1007 .flags = MTHCA_FLAG_PCIE }, 1008 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 2, 0), 1009 .flags = MTHCA_FLAG_MEMFREE | 1010 MTHCA_FLAG_PCIE }, 1011 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0), 1012 .flags = MTHCA_FLAG_MEMFREE | 1013 MTHCA_FLAG_PCIE | 1014 MTHCA_FLAG_SINAI_OPT } 1015 }; 1016 1017 static int __mthca_init_one(struct pci_dev *pdev, int hca_type) 1018 { 1019 int ddr_hidden = 0; 1020 int err; 1021 struct mthca_dev *mdev; 1022 1023 printk(KERN_INFO PFX "Initializing %s\n", 1024 pci_name(pdev)); 1025 1026 err = pci_enable_device(pdev); 1027 if (err) { 1028 dev_err(&pdev->dev, "Cannot enable PCI device, " 1029 "aborting.\n"); 1030 return err; 1031 } 1032 1033 /* 1034 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 1035 * be present) 1036 */ 1037 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 1038 pci_resource_len(pdev, 0) != 1 << 20) { 1039 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 1040 err = -ENODEV; 1041 goto err_disable_pdev; 1042 } 1043 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 1044 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 1045 err = -ENODEV; 1046 goto err_disable_pdev; 1047 } 1048 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 1049 ddr_hidden = 1; 1050 1051 err = mthca_request_regions(pdev, ddr_hidden); 1052 if (err) { 1053 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 1054 "aborting.\n"); 1055 goto err_disable_pdev; 1056 } 1057 1058 pci_set_master(pdev); 1059 1060 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 1061 if (err) { 1062 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1063 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1064 if (err) { 1065 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1066 goto err_free_res; 1067 } 1068 } 1069 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1070 if (err) { 1071 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1072 "consistent PCI DMA mask.\n"); 1073 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 1074 if (err) { 1075 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1076 "aborting.\n"); 1077 goto err_free_res; 1078 } 1079 } 1080 1081 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1082 if (!mdev) { 1083 dev_err(&pdev->dev, "Device struct alloc failed, " 1084 "aborting.\n"); 1085 err = -ENOMEM; 1086 goto err_free_res; 1087 } 1088 1089 mdev->pdev = pdev; 1090 1091 mdev->mthca_flags = mthca_hca_table[hca_type].flags; 1092 if (ddr_hidden) 1093 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1094 1095 /* 1096 * Now reset the HCA before we touch the PCI capabilities or 1097 * attempt a firmware command, since a boot ROM may have left 1098 * the HCA in an undefined state. 1099 */ 1100 err = mthca_reset(mdev); 1101 if (err) { 1102 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1103 goto err_free_dev; 1104 } 1105 1106 if (mthca_cmd_init(mdev)) { 1107 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1108 goto err_free_dev; 1109 } 1110 1111 err = mthca_tune_pci(mdev); 1112 if (err) 1113 goto err_cmd; 1114 1115 err = mthca_init_hca(mdev); 1116 if (err) 1117 goto err_cmd; 1118 1119 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) { 1120 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n", 1121 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1122 (int) (mdev->fw_ver & 0xffff), 1123 (int) (mthca_hca_table[hca_type].latest_fw >> 32), 1124 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff, 1125 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff)); 1126 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1127 } 1128 1129 if (msi_x && !mthca_enable_msi_x(mdev)) 1130 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1131 else if (msi) { 1132 static int warned; 1133 1134 if (!warned) { 1135 printk(KERN_WARNING PFX "WARNING: MSI support will be " 1136 "removed from the ib_mthca driver in January 2008.\n"); 1137 printk(KERN_WARNING " If you are using MSI and cannot " 1138 "switch to MSI-X, please tell " 1139 "<general@lists.openfabrics.org>.\n"); 1140 ++warned; 1141 } 1142 1143 if (!pci_enable_msi(pdev)) 1144 mdev->mthca_flags |= MTHCA_FLAG_MSI; 1145 } 1146 1147 err = mthca_setup_hca(mdev); 1148 if (err == -EBUSY && (mdev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))) { 1149 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1150 pci_disable_msix(pdev); 1151 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1152 pci_disable_msi(pdev); 1153 mdev->mthca_flags &= ~(MTHCA_FLAG_MSI_X | MTHCA_FLAG_MSI); 1154 1155 err = mthca_setup_hca(mdev); 1156 } 1157 1158 if (err) 1159 goto err_close; 1160 1161 err = mthca_register_device(mdev); 1162 if (err) 1163 goto err_cleanup; 1164 1165 err = mthca_create_agents(mdev); 1166 if (err) 1167 goto err_unregister; 1168 1169 pci_set_drvdata(pdev, mdev); 1170 mdev->hca_type = hca_type; 1171 1172 return 0; 1173 1174 err_unregister: 1175 mthca_unregister_device(mdev); 1176 1177 err_cleanup: 1178 mthca_cleanup_mcg_table(mdev); 1179 mthca_cleanup_av_table(mdev); 1180 mthca_cleanup_qp_table(mdev); 1181 mthca_cleanup_srq_table(mdev); 1182 mthca_cleanup_cq_table(mdev); 1183 mthca_cmd_use_polling(mdev); 1184 mthca_cleanup_eq_table(mdev); 1185 1186 mthca_pd_free(mdev, &mdev->driver_pd); 1187 1188 mthca_cleanup_mr_table(mdev); 1189 mthca_cleanup_pd_table(mdev); 1190 mthca_cleanup_uar_table(mdev); 1191 1192 err_close: 1193 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1194 pci_disable_msix(pdev); 1195 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1196 pci_disable_msi(pdev); 1197 1198 mthca_close_hca(mdev); 1199 1200 err_cmd: 1201 mthca_cmd_cleanup(mdev); 1202 1203 err_free_dev: 1204 ib_dealloc_device(&mdev->ib_dev); 1205 1206 err_free_res: 1207 mthca_release_regions(pdev, ddr_hidden); 1208 1209 err_disable_pdev: 1210 pci_disable_device(pdev); 1211 pci_set_drvdata(pdev, NULL); 1212 return err; 1213 } 1214 1215 static void __mthca_remove_one(struct pci_dev *pdev) 1216 { 1217 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1218 u8 status; 1219 int p; 1220 1221 if (mdev) { 1222 mthca_free_agents(mdev); 1223 mthca_unregister_device(mdev); 1224 1225 for (p = 1; p <= mdev->limits.num_ports; ++p) 1226 mthca_CLOSE_IB(mdev, p, &status); 1227 1228 mthca_cleanup_mcg_table(mdev); 1229 mthca_cleanup_av_table(mdev); 1230 mthca_cleanup_qp_table(mdev); 1231 mthca_cleanup_srq_table(mdev); 1232 mthca_cleanup_cq_table(mdev); 1233 mthca_cmd_use_polling(mdev); 1234 mthca_cleanup_eq_table(mdev); 1235 1236 mthca_pd_free(mdev, &mdev->driver_pd); 1237 1238 mthca_cleanup_mr_table(mdev); 1239 mthca_cleanup_pd_table(mdev); 1240 1241 iounmap(mdev->kar); 1242 mthca_uar_free(mdev, &mdev->driver_uar); 1243 mthca_cleanup_uar_table(mdev); 1244 mthca_close_hca(mdev); 1245 mthca_cmd_cleanup(mdev); 1246 1247 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1248 pci_disable_msix(pdev); 1249 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1250 pci_disable_msi(pdev); 1251 1252 ib_dealloc_device(&mdev->ib_dev); 1253 mthca_release_regions(pdev, mdev->mthca_flags & 1254 MTHCA_FLAG_DDR_HIDDEN); 1255 pci_disable_device(pdev); 1256 pci_set_drvdata(pdev, NULL); 1257 } 1258 } 1259 1260 int __mthca_restart_one(struct pci_dev *pdev) 1261 { 1262 struct mthca_dev *mdev; 1263 int hca_type; 1264 1265 mdev = pci_get_drvdata(pdev); 1266 if (!mdev) 1267 return -ENODEV; 1268 hca_type = mdev->hca_type; 1269 __mthca_remove_one(pdev); 1270 return __mthca_init_one(pdev, hca_type); 1271 } 1272 1273 static int __devinit mthca_init_one(struct pci_dev *pdev, 1274 const struct pci_device_id *id) 1275 { 1276 static int mthca_version_printed = 0; 1277 int ret; 1278 1279 mutex_lock(&mthca_device_mutex); 1280 1281 if (!mthca_version_printed) { 1282 printk(KERN_INFO "%s", mthca_version); 1283 ++mthca_version_printed; 1284 } 1285 1286 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 1287 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 1288 pci_name(pdev), id->driver_data); 1289 mutex_unlock(&mthca_device_mutex); 1290 return -ENODEV; 1291 } 1292 1293 ret = __mthca_init_one(pdev, id->driver_data); 1294 1295 mutex_unlock(&mthca_device_mutex); 1296 1297 return ret; 1298 } 1299 1300 static void __devexit mthca_remove_one(struct pci_dev *pdev) 1301 { 1302 mutex_lock(&mthca_device_mutex); 1303 __mthca_remove_one(pdev); 1304 mutex_unlock(&mthca_device_mutex); 1305 } 1306 1307 static struct pci_device_id mthca_pci_table[] = { 1308 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1309 .driver_data = TAVOR }, 1310 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1311 .driver_data = TAVOR }, 1312 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1313 .driver_data = ARBEL_COMPAT }, 1314 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1315 .driver_data = ARBEL_COMPAT }, 1316 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1317 .driver_data = ARBEL_NATIVE }, 1318 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1319 .driver_data = ARBEL_NATIVE }, 1320 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1321 .driver_data = SINAI }, 1322 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1323 .driver_data = SINAI }, 1324 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1325 .driver_data = SINAI }, 1326 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1327 .driver_data = SINAI }, 1328 { 0, } 1329 }; 1330 1331 MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1332 1333 static struct pci_driver mthca_driver = { 1334 .name = DRV_NAME, 1335 .id_table = mthca_pci_table, 1336 .probe = mthca_init_one, 1337 .remove = __devexit_p(mthca_remove_one) 1338 }; 1339 1340 static void __init __mthca_check_profile_val(const char *name, int *pval, 1341 int pval_default) 1342 { 1343 /* value must be positive and power of 2 */ 1344 int old_pval = *pval; 1345 1346 if (old_pval <= 0) 1347 *pval = pval_default; 1348 else 1349 *pval = roundup_pow_of_two(old_pval); 1350 1351 if (old_pval != *pval) { 1352 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n", 1353 old_pval, name); 1354 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval); 1355 } 1356 } 1357 1358 #define mthca_check_profile_val(name, default) \ 1359 __mthca_check_profile_val(#name, &hca_profile.name, default) 1360 1361 static void __init mthca_validate_profile(void) 1362 { 1363 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP); 1364 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP); 1365 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ); 1366 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG); 1367 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT); 1368 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT); 1369 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV); 1370 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS); 1371 1372 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) { 1373 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n", 1374 hca_profile.fmr_reserved_mtts); 1375 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n", 1376 hca_profile.num_mtt); 1377 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2; 1378 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n", 1379 hca_profile.fmr_reserved_mtts); 1380 } 1381 } 1382 1383 static int __init mthca_init(void) 1384 { 1385 int ret; 1386 1387 mthca_validate_profile(); 1388 1389 ret = mthca_catas_init(); 1390 if (ret) 1391 return ret; 1392 1393 ret = pci_register_driver(&mthca_driver); 1394 if (ret < 0) { 1395 mthca_catas_cleanup(); 1396 return ret; 1397 } 1398 1399 return 0; 1400 } 1401 1402 static void __exit mthca_cleanup(void) 1403 { 1404 pci_unregister_driver(&mthca_driver); 1405 mthca_catas_cleanup(); 1406 } 1407 1408 module_init(mthca_init); 1409 module_exit(mthca_cleanup); 1410