1*145eba1aSCai Huoqing /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
2f48ad614SDennis Dalessandro /*
3a74d5307SMitko Haralanov * Copyright(c) 2015 - 2018 Intel Corporation.
4f48ad614SDennis Dalessandro */
5f48ad614SDennis Dalessandro
6f48ad614SDennis Dalessandro #ifndef HFI1_VERBS_H
7f48ad614SDennis Dalessandro #define HFI1_VERBS_H
8f48ad614SDennis Dalessandro
9f48ad614SDennis Dalessandro #include <linux/types.h>
10f48ad614SDennis Dalessandro #include <linux/seqlock.h>
11f48ad614SDennis Dalessandro #include <linux/kernel.h>
12f48ad614SDennis Dalessandro #include <linux/interrupt.h>
13f48ad614SDennis Dalessandro #include <linux/kref.h>
14f48ad614SDennis Dalessandro #include <linux/workqueue.h>
15f48ad614SDennis Dalessandro #include <linux/kthread.h>
16f48ad614SDennis Dalessandro #include <linux/completion.h>
17f48ad614SDennis Dalessandro #include <linux/slab.h>
18f48ad614SDennis Dalessandro #include <rdma/ib_pack.h>
19f48ad614SDennis Dalessandro #include <rdma/ib_user_verbs.h>
20f48ad614SDennis Dalessandro #include <rdma/ib_mad.h>
21261a4351SMike Marciniszyn #include <rdma/ib_hdrs.h>
22f48ad614SDennis Dalessandro #include <rdma/rdma_vt.h>
23f48ad614SDennis Dalessandro #include <rdma/rdmavt_qp.h>
24f48ad614SDennis Dalessandro #include <rdma/rdmavt_cq.h>
25f48ad614SDennis Dalessandro
26f48ad614SDennis Dalessandro struct hfi1_ctxtdata;
27f48ad614SDennis Dalessandro struct hfi1_pportdata;
28f48ad614SDennis Dalessandro struct hfi1_devdata;
29f48ad614SDennis Dalessandro struct hfi1_packet;
30f48ad614SDennis Dalessandro
31f48ad614SDennis Dalessandro #include "iowait.h"
325190f052SMike Marciniszyn #include "tid_rdma.h"
3344e43d91SMitko Haralanov #include "opfn.h"
34f48ad614SDennis Dalessandro
35f48ad614SDennis Dalessandro #define HFI1_MAX_RDMA_ATOMIC 16
36f48ad614SDennis Dalessandro
37f48ad614SDennis Dalessandro /*
38f48ad614SDennis Dalessandro * Increment this value if any changes that break userspace ABI
39f48ad614SDennis Dalessandro * compatibility are made.
40f48ad614SDennis Dalessandro */
41f48ad614SDennis Dalessandro #define HFI1_UVERBS_ABI_VERSION 2
42f48ad614SDennis Dalessandro
43f48ad614SDennis Dalessandro /* IB Performance Manager status values */
44f48ad614SDennis Dalessandro #define IB_PMA_SAMPLE_STATUS_DONE 0x00
45f48ad614SDennis Dalessandro #define IB_PMA_SAMPLE_STATUS_STARTED 0x01
46f48ad614SDennis Dalessandro #define IB_PMA_SAMPLE_STATUS_RUNNING 0x02
47f48ad614SDennis Dalessandro
48f48ad614SDennis Dalessandro /* Mandatory IB performance counter select values. */
49f48ad614SDennis Dalessandro #define IB_PMA_PORT_XMIT_DATA cpu_to_be16(0x0001)
50f48ad614SDennis Dalessandro #define IB_PMA_PORT_RCV_DATA cpu_to_be16(0x0002)
51f48ad614SDennis Dalessandro #define IB_PMA_PORT_XMIT_PKTS cpu_to_be16(0x0003)
52f48ad614SDennis Dalessandro #define IB_PMA_PORT_RCV_PKTS cpu_to_be16(0x0004)
53f48ad614SDennis Dalessandro #define IB_PMA_PORT_XMIT_WAIT cpu_to_be16(0x0005)
54f48ad614SDennis Dalessandro
55f48ad614SDennis Dalessandro #define HFI1_VENDOR_IPG cpu_to_be16(0xFFA0)
56f48ad614SDennis Dalessandro
57f48ad614SDennis Dalessandro #define IB_DEFAULT_GID_PREFIX cpu_to_be64(0xfe80000000000000ULL)
585786adf3SDon Hiatt #define OPA_BTH_MIG_REQ BIT(31)
59f48ad614SDennis Dalessandro
60b374e060SMike Marciniszyn #define RC_OP(x) IB_OPCODE_RC_##x
61b374e060SMike Marciniszyn #define UC_OP(x) IB_OPCODE_UC_##x
62b374e060SMike Marciniszyn
63f48ad614SDennis Dalessandro /* flags passed by hfi1_ib_rcv() */
64f48ad614SDennis Dalessandro enum {
65f48ad614SDennis Dalessandro HFI1_HAS_GRH = (1 << 0),
66f48ad614SDennis Dalessandro };
67f48ad614SDennis Dalessandro
68c593642cSPankaj Bharadiya #define LRH_16B_BYTES (sizeof_field(struct hfi1_16b_header, lrh))
6978d3633bSMike Marciniszyn #define LRH_16B_DWORDS (LRH_16B_BYTES / sizeof(u32))
70c593642cSPankaj Bharadiya #define LRH_9B_BYTES (sizeof_field(struct ib_header, lrh))
7178d3633bSMike Marciniszyn #define LRH_9B_DWORDS (LRH_9B_BYTES / sizeof(u32))
7278d3633bSMike Marciniszyn
734171a693SDon Hiatt /* 24Bits for qpn, upper 8Bits reserved */
744171a693SDon Hiatt struct opa_16b_mgmt {
754171a693SDon Hiatt __be32 dest_qpn;
764171a693SDon Hiatt __be32 src_qpn;
774171a693SDon Hiatt };
784171a693SDon Hiatt
7972c07e2bSDon Hiatt struct hfi1_16b_header {
8072c07e2bSDon Hiatt u32 lrh[4];
8172c07e2bSDon Hiatt union {
8272c07e2bSDon Hiatt struct {
8372c07e2bSDon Hiatt struct ib_grh grh;
8472c07e2bSDon Hiatt struct ib_other_headers oth;
8572c07e2bSDon Hiatt } l;
8672c07e2bSDon Hiatt struct ib_other_headers oth;
874171a693SDon Hiatt struct opa_16b_mgmt mgmt;
8872c07e2bSDon Hiatt } u;
8972c07e2bSDon Hiatt } __packed;
9072c07e2bSDon Hiatt
9130e07416SDon Hiatt struct hfi1_opa_header {
9230e07416SDon Hiatt union {
9330e07416SDon Hiatt struct ib_header ibh; /* 9B header */
9430e07416SDon Hiatt struct hfi1_16b_header opah; /* 16B header */
9530e07416SDon Hiatt };
9630e07416SDon Hiatt u8 hdr_type; /* 9B or 16B */
9730e07416SDon Hiatt } __packed;
9830e07416SDon Hiatt
99a9b6b3bcSDasaratharaman Chandramouli struct hfi1_ahg_info {
100f48ad614SDennis Dalessandro u32 ahgdesc[2];
101f48ad614SDennis Dalessandro u16 tx_flags;
102f48ad614SDennis Dalessandro u8 ahgcount;
103f48ad614SDennis Dalessandro u8 ahgidx;
104f48ad614SDennis Dalessandro };
105f48ad614SDennis Dalessandro
106d4d602e9SDon Hiatt struct hfi1_sdma_header {
107f48ad614SDennis Dalessandro __le64 pbc;
10830e07416SDon Hiatt struct hfi1_opa_header hdr;
109f48ad614SDennis Dalessandro } __packed;
110f48ad614SDennis Dalessandro
111f48ad614SDennis Dalessandro /*
112f48ad614SDennis Dalessandro * hfi1 specific data structures that will be hidden from rvt after the queue
113f48ad614SDennis Dalessandro * pair is made common
114f48ad614SDennis Dalessandro */
115f48ad614SDennis Dalessandro struct hfi1_qp_priv {
116a9b6b3bcSDasaratharaman Chandramouli struct hfi1_ahg_info *s_ahg; /* ahg info for next header */
117f48ad614SDennis Dalessandro struct sdma_engine *s_sde; /* current sde */
118f48ad614SDennis Dalessandro struct send_context *s_sendcontext; /* current sendcontext */
1195190f052SMike Marciniszyn struct hfi1_ctxtdata *rcd; /* QP's receive context */
120838b6fd2SKaike Wan struct page **pages; /* for TID page scan */
12137356e78SKaike Wan u32 tid_enqueue; /* saved when tid waited */
122f48ad614SDennis Dalessandro u8 s_sc; /* SC[0..4] for next packet */
123f48ad614SDennis Dalessandro struct iowait s_iowait;
1243c759e00SKaike Wan struct timer_list s_tid_timer; /* for timing tid wait */
125829eaee5SKaike Wan struct timer_list s_tid_retry_timer; /* for timing tid ack */
12637356e78SKaike Wan struct list_head tid_wait; /* for queueing tid space */
127d22a207dSKaike Wan struct hfi1_opfn_data opfn;
12837356e78SKaike Wan struct tid_flow_state flow_state;
129d22a207dSKaike Wan struct tid_rdma_qp_params tid_rdma;
130f48ad614SDennis Dalessandro struct rvt_qp *owner;
131270a9833SMike Marciniszyn u16 s_running_pkt_size;
132d98bb7f7SDon Hiatt u8 hdr_type; /* 9B or 16B */
1336e38fca6SKaike Wan struct rvt_sge_state tid_ss; /* SGE state pointer for 2nd leg */
13470dcb2e3SKaike Wan atomic_t n_requests; /* # of TID RDMA requests in the */
13570dcb2e3SKaike Wan /* queue */
1369e93e967SKaike Wan atomic_t n_tid_requests; /* # of sent TID RDMA requests */
137d22a207dSKaike Wan unsigned long tid_timer_timeout_jiffies;
138829eaee5SKaike Wan unsigned long tid_retry_timeout_jiffies;
139742a3826SKaike Wan
140a0b34f75SKaike Wan /* variables for the TID RDMA SE state machine */
1419e93e967SKaike Wan u8 s_state;
1429e93e967SKaike Wan u8 s_retry;
14307b92370SKaike Wan u8 rnr_nak_state; /* RNR NAK state */
144d72fe7d5SKaike Wan u8 s_nak_state;
145d72fe7d5SKaike Wan u32 s_nak_psn;
146a0b34f75SKaike Wan u32 s_flags;
14772a0ea99SKaike Wan u32 s_tid_cur;
14872a0ea99SKaike Wan u32 s_tid_head;
14972a0ea99SKaike Wan u32 s_tid_tail;
15007b92370SKaike Wan u32 r_tid_head; /* Most recently added TID RDMA request */
15107b92370SKaike Wan u32 r_tid_tail; /* the last completed TID RDMA request */
15207b92370SKaike Wan u32 r_tid_ack; /* the TID RDMA request to be ACK'ed */
15307b92370SKaike Wan u32 r_tid_alloc; /* Request for which we are allocating resources */
15407b92370SKaike Wan u32 pending_tid_w_segs; /* Num of pending tid write segments */
1553c6cb20aSKaike Wan u32 pending_tid_w_resp; /* Num of pending tid write responses */
15607b92370SKaike Wan u32 alloc_w_segs; /* Number of segments for which write */
15707b92370SKaike Wan /* resources have been allocated for this QP */
158a0b34f75SKaike Wan
159742a3826SKaike Wan /* For TID RDMA READ */
1609905bf06SKaike Wan u32 tid_r_reqs; /* Num of tid reads requested */
1619905bf06SKaike Wan u32 tid_r_comp; /* Num of tid reads completed */
162742a3826SKaike Wan u32 pending_tid_r_segs; /* Num of pending tid read segments */
163d22a207dSKaike Wan u16 pkts_ps; /* packets per segment */
164d22a207dSKaike Wan u8 timeout_shift; /* account for number of packets per segment */
16507b92370SKaike Wan
166d72fe7d5SKaike Wan u32 r_next_psn_kdeth;
1670f75e325SKaike Wan u32 r_next_psn_kdeth_save;
1689e93e967SKaike Wan u32 s_resync_psn;
16907b92370SKaike Wan u8 sync_pt; /* Set when QP reaches sync point */
1700f75e325SKaike Wan u8 resync;
171f48ad614SDennis Dalessandro };
172f48ad614SDennis Dalessandro
17307b92370SKaike Wan #define HFI1_QP_WQE_INVALID ((u32)-1)
17407b92370SKaike Wan
175838b6fd2SKaike Wan struct hfi1_swqe_priv {
176838b6fd2SKaike Wan struct tid_rdma_request tid_req;
177742a3826SKaike Wan struct rvt_sge_state ss; /* Used for TID RDMA READ Request */
178838b6fd2SKaike Wan };
179838b6fd2SKaike Wan
180838b6fd2SKaike Wan struct hfi1_ack_priv {
18138d46d36SKaike Wan struct rvt_sge_state ss; /* used for TID WRITE RESP */
182838b6fd2SKaike Wan struct tid_rdma_request tid_req;
183838b6fd2SKaike Wan };
184838b6fd2SKaike Wan
185f48ad614SDennis Dalessandro /*
186f48ad614SDennis Dalessandro * This structure is used to hold commonly lookedup and computed values during
187f48ad614SDennis Dalessandro * the send engine progress.
188f48ad614SDennis Dalessandro */
1895da0fc9dSDennis Dalessandro struct iowait_work;
190f48ad614SDennis Dalessandro struct hfi1_pkt_state {
191f48ad614SDennis Dalessandro struct hfi1_ibdev *dev;
192f48ad614SDennis Dalessandro struct hfi1_ibport *ibp;
193f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd;
194f48ad614SDennis Dalessandro struct verbs_txreq *s_txreq;
1955da0fc9dSDennis Dalessandro struct iowait_work *wait;
196f48ad614SDennis Dalessandro unsigned long flags;
197dd1ed108SMike Marciniszyn unsigned long timeout;
198dd1ed108SMike Marciniszyn unsigned long timeout_int;
199dd1ed108SMike Marciniszyn int cpu;
200566d53a8SDon Hiatt u8 opcode;
201dd1ed108SMike Marciniszyn bool in_thread;
202bcad2913SKaike Wan bool pkts_sent;
203f48ad614SDennis Dalessandro };
204f48ad614SDennis Dalessandro
205f48ad614SDennis Dalessandro #define HFI1_PSN_CREDIT 16
206f48ad614SDennis Dalessandro
207f48ad614SDennis Dalessandro struct hfi1_opcode_stats {
208f48ad614SDennis Dalessandro u64 n_packets; /* number of packets */
209f48ad614SDennis Dalessandro u64 n_bytes; /* total number of bytes */
210f48ad614SDennis Dalessandro };
211f48ad614SDennis Dalessandro
212f48ad614SDennis Dalessandro struct hfi1_opcode_stats_perctx {
213f48ad614SDennis Dalessandro struct hfi1_opcode_stats stats[256];
214f48ad614SDennis Dalessandro };
215f48ad614SDennis Dalessandro
inc_opstats(u32 tlen,struct hfi1_opcode_stats * stats)216f48ad614SDennis Dalessandro static inline void inc_opstats(
217f48ad614SDennis Dalessandro u32 tlen,
218f48ad614SDennis Dalessandro struct hfi1_opcode_stats *stats)
219f48ad614SDennis Dalessandro {
220f48ad614SDennis Dalessandro #ifdef CONFIG_DEBUG_FS
221f48ad614SDennis Dalessandro stats->n_bytes += tlen;
222f48ad614SDennis Dalessandro stats->n_packets++;
223f48ad614SDennis Dalessandro #endif
224f48ad614SDennis Dalessandro }
225f48ad614SDennis Dalessandro
226f48ad614SDennis Dalessandro struct hfi1_ibport {
227f48ad614SDennis Dalessandro struct rvt_qp __rcu *qp[2];
228f48ad614SDennis Dalessandro struct rvt_ibport rvp;
229f48ad614SDennis Dalessandro
230f48ad614SDennis Dalessandro /* the first 16 entries are sl_to_vl for !OPA */
231f48ad614SDennis Dalessandro u8 sl_to_sc[32];
232f48ad614SDennis Dalessandro u8 sc_to_sl[32];
233f48ad614SDennis Dalessandro };
234f48ad614SDennis Dalessandro
235f48ad614SDennis Dalessandro struct hfi1_ibdev {
236f48ad614SDennis Dalessandro struct rvt_dev_info rdi; /* Must be first */
237f48ad614SDennis Dalessandro
238f48ad614SDennis Dalessandro /* QP numbers are shared by all IB ports */
2394e045572SMike Marciniszyn /* protect txwait list */
2404e045572SMike Marciniszyn seqlock_t txwait_lock ____cacheline_aligned_in_smp;
241f48ad614SDennis Dalessandro struct list_head txwait; /* list for wait verbs_txreq */
242f48ad614SDennis Dalessandro struct list_head memwait; /* list for wait kernel memory */
243f48ad614SDennis Dalessandro struct kmem_cache *verbs_txreq_cache;
244f48ad614SDennis Dalessandro u64 n_txwait;
245f48ad614SDennis Dalessandro u64 n_kmem_wait;
2462f16a696SKaike Wan u64 n_tidwait;
247f48ad614SDennis Dalessandro
2484e045572SMike Marciniszyn /* protect iowait lists */
2494e045572SMike Marciniszyn seqlock_t iowait_lock ____cacheline_aligned_in_smp;
2504e045572SMike Marciniszyn u64 n_piowait;
2514e045572SMike Marciniszyn u64 n_piodrain;
2524e045572SMike Marciniszyn struct timer_list mem_timer;
2534e045572SMike Marciniszyn
254f48ad614SDennis Dalessandro #ifdef CONFIG_DEBUG_FS
255f48ad614SDennis Dalessandro /* per HFI debugfs */
256f48ad614SDennis Dalessandro struct dentry *hfi1_ibdev_dbg;
257f48ad614SDennis Dalessandro /* per HFI symlinks to above */
258f48ad614SDennis Dalessandro struct dentry *hfi1_ibdev_link;
2590181ce31SDon Hiatt #ifdef CONFIG_FAULT_INJECTION
260a74d5307SMitko Haralanov struct fault *fault;
2610181ce31SDon Hiatt #endif
262f48ad614SDennis Dalessandro #endif
263f48ad614SDennis Dalessandro };
264f48ad614SDennis Dalessandro
to_idev(struct ib_device * ibdev)265f48ad614SDennis Dalessandro static inline struct hfi1_ibdev *to_idev(struct ib_device *ibdev)
266f48ad614SDennis Dalessandro {
267f48ad614SDennis Dalessandro struct rvt_dev_info *rdi;
268f48ad614SDennis Dalessandro
269f48ad614SDennis Dalessandro rdi = container_of(ibdev, struct rvt_dev_info, ibdev);
270f48ad614SDennis Dalessandro return container_of(rdi, struct hfi1_ibdev, rdi);
271f48ad614SDennis Dalessandro }
272f48ad614SDennis Dalessandro
iowait_to_qp(struct iowait * s_iowait)273f48ad614SDennis Dalessandro static inline struct rvt_qp *iowait_to_qp(struct iowait *s_iowait)
274f48ad614SDennis Dalessandro {
275f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv;
276f48ad614SDennis Dalessandro
277f48ad614SDennis Dalessandro priv = container_of(s_iowait, struct hfi1_qp_priv, s_iowait);
278f48ad614SDennis Dalessandro return priv->owner;
279f48ad614SDennis Dalessandro }
280f48ad614SDennis Dalessandro
281f48ad614SDennis Dalessandro /*
282f48ad614SDennis Dalessandro * This must be called with s_lock held.
283f48ad614SDennis Dalessandro */
28413d84914SDennis Dalessandro void hfi1_bad_pkey(struct hfi1_ibport *ibp, u32 key, u32 sl,
28588733e3bSDon Hiatt u32 qp1, u32 qp2, u32 lid1, u32 lid2);
2861fb7f897SMark Bloch void hfi1_cap_mask_chg(struct rvt_dev_info *rdi, u32 port_num);
287f48ad614SDennis Dalessandro void hfi1_sys_guid_chg(struct hfi1_ibport *ibp);
288f48ad614SDennis Dalessandro void hfi1_node_desc_chg(struct hfi1_ibport *ibp);
2891fb7f897SMark Bloch int hfi1_process_mad(struct ib_device *ibdev, int mad_flags, u32 port,
290f48ad614SDennis Dalessandro const struct ib_wc *in_wc, const struct ib_grh *in_grh,
291e26e7b88SLeon Romanovsky const struct ib_mad *in_mad, struct ib_mad *out_mad,
292e26e7b88SLeon Romanovsky size_t *out_mad_size, u16 *out_mad_pkey_index);
293f48ad614SDennis Dalessandro
294f48ad614SDennis Dalessandro /*
295f48ad614SDennis Dalessandro * The PSN_MASK and PSN_SHIFT allow for
296f48ad614SDennis Dalessandro * 1) comparing two PSNs
297f48ad614SDennis Dalessandro * 2) returning the PSN with any upper bits masked
298f48ad614SDennis Dalessandro * 3) returning the difference between to PSNs
299f48ad614SDennis Dalessandro *
300f48ad614SDennis Dalessandro * The number of significant bits in the PSN must
301f48ad614SDennis Dalessandro * necessarily be at least one bit less than
302f48ad614SDennis Dalessandro * the container holding the PSN.
303f48ad614SDennis Dalessandro */
304f48ad614SDennis Dalessandro #define PSN_MASK 0x7FFFFFFF
305f48ad614SDennis Dalessandro #define PSN_SHIFT 1
306f48ad614SDennis Dalessandro #define PSN_MODIFY_MASK 0xFFFFFF
307f48ad614SDennis Dalessandro
308f48ad614SDennis Dalessandro /*
309f48ad614SDennis Dalessandro * Compare two PSNs
310f48ad614SDennis Dalessandro * Returns an integer <, ==, or > than zero.
311f48ad614SDennis Dalessandro */
cmp_psn(u32 a,u32 b)312f48ad614SDennis Dalessandro static inline int cmp_psn(u32 a, u32 b)
313f48ad614SDennis Dalessandro {
314f48ad614SDennis Dalessandro return (((int)a) - ((int)b)) << PSN_SHIFT;
315f48ad614SDennis Dalessandro }
316f48ad614SDennis Dalessandro
317f48ad614SDennis Dalessandro /*
318f48ad614SDennis Dalessandro * Return masked PSN
319f48ad614SDennis Dalessandro */
mask_psn(u32 a)320f48ad614SDennis Dalessandro static inline u32 mask_psn(u32 a)
321f48ad614SDennis Dalessandro {
322f48ad614SDennis Dalessandro return a & PSN_MASK;
323f48ad614SDennis Dalessandro }
324f48ad614SDennis Dalessandro
325f48ad614SDennis Dalessandro /*
326f48ad614SDennis Dalessandro * Return delta between two PSNs
327f48ad614SDennis Dalessandro */
delta_psn(u32 a,u32 b)328f48ad614SDennis Dalessandro static inline u32 delta_psn(u32 a, u32 b)
329f48ad614SDennis Dalessandro {
330f48ad614SDennis Dalessandro return (((int)a - (int)b) << PSN_SHIFT) >> PSN_SHIFT;
331f48ad614SDennis Dalessandro }
332f48ad614SDennis Dalessandro
wqe_to_tid_req(struct rvt_swqe * wqe)333742a3826SKaike Wan static inline struct tid_rdma_request *wqe_to_tid_req(struct rvt_swqe *wqe)
334742a3826SKaike Wan {
335742a3826SKaike Wan return &((struct hfi1_swqe_priv *)wqe->priv)->tid_req;
336742a3826SKaike Wan }
337742a3826SKaike Wan
ack_to_tid_req(struct rvt_ack_entry * e)338d0d564a1SKaike Wan static inline struct tid_rdma_request *ack_to_tid_req(struct rvt_ack_entry *e)
339d0d564a1SKaike Wan {
340d0d564a1SKaike Wan return &((struct hfi1_ack_priv *)e->priv)->tid_req;
341d0d564a1SKaike Wan }
342d0d564a1SKaike Wan
343838b6fd2SKaike Wan /*
344838b6fd2SKaike Wan * Look through all the active flows for a TID RDMA request and find
345838b6fd2SKaike Wan * the one (if it exists) that contains the specified PSN.
346838b6fd2SKaike Wan */
__full_flow_psn(struct flow_state * state,u32 psn)347838b6fd2SKaike Wan static inline u32 __full_flow_psn(struct flow_state *state, u32 psn)
348838b6fd2SKaike Wan {
349838b6fd2SKaike Wan return mask_psn((state->generation << HFI1_KDETH_BTH_SEQ_SHIFT) |
350838b6fd2SKaike Wan (psn & HFI1_KDETH_BTH_SEQ_MASK));
351838b6fd2SKaike Wan }
352838b6fd2SKaike Wan
full_flow_psn(struct tid_rdma_flow * flow,u32 psn)353838b6fd2SKaike Wan static inline u32 full_flow_psn(struct tid_rdma_flow *flow, u32 psn)
354838b6fd2SKaike Wan {
355838b6fd2SKaike Wan return __full_flow_psn(&flow->flow_state, psn);
356838b6fd2SKaike Wan }
357838b6fd2SKaike Wan
358f48ad614SDennis Dalessandro struct verbs_txreq;
359f48ad614SDennis Dalessandro void hfi1_put_txreq(struct verbs_txreq *tx);
360f48ad614SDennis Dalessandro
361f48ad614SDennis Dalessandro int hfi1_verbs_send(struct rvt_qp *qp, struct hfi1_pkt_state *ps);
362f48ad614SDennis Dalessandro
363f48ad614SDennis Dalessandro void hfi1_cnp_rcv(struct hfi1_packet *packet);
364f48ad614SDennis Dalessandro
365f48ad614SDennis Dalessandro void hfi1_uc_rcv(struct hfi1_packet *packet);
366f48ad614SDennis Dalessandro
367f48ad614SDennis Dalessandro void hfi1_rc_rcv(struct hfi1_packet *packet);
368f48ad614SDennis Dalessandro
369f48ad614SDennis Dalessandro void hfi1_rc_hdrerr(
370f48ad614SDennis Dalessandro struct hfi1_ctxtdata *rcd,
3719039746cSDon Hiatt struct hfi1_packet *packet,
372f48ad614SDennis Dalessandro struct rvt_qp *qp);
373f48ad614SDennis Dalessandro
37490898850SDasaratharaman Chandramouli u8 ah_to_sc(struct ib_device *ibdev, struct rdma_ah_attr *ah_attr);
375f48ad614SDennis Dalessandro
3764bb02e95SMike Marciniszyn void hfi1_rc_verbs_aborted(struct rvt_qp *qp, struct hfi1_opa_header *opah);
37730e07416SDon Hiatt void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah);
378f48ad614SDennis Dalessandro
379f48ad614SDennis Dalessandro void hfi1_ud_rcv(struct hfi1_packet *packet);
380f48ad614SDennis Dalessandro
381f48ad614SDennis Dalessandro int hfi1_lookup_pkey_idx(struct hfi1_ibport *ibp, u16 pkey);
382f48ad614SDennis Dalessandro
383f48ad614SDennis Dalessandro void hfi1_migrate_qp(struct rvt_qp *qp);
384f48ad614SDennis Dalessandro
385f48ad614SDennis Dalessandro int hfi1_check_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr,
386f48ad614SDennis Dalessandro int attr_mask, struct ib_udata *udata);
387f48ad614SDennis Dalessandro
388f48ad614SDennis Dalessandro void hfi1_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr,
389f48ad614SDennis Dalessandro int attr_mask, struct ib_udata *udata);
39056acbbfbSVenkata Sandeep Dhanalakota void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait);
391d205a06aSKaike Wan int hfi1_setup_wqe(struct rvt_qp *qp, struct rvt_swqe *wqe,
3920b79b277SMichael J. Ruhl bool *call_send);
393f48ad614SDennis Dalessandro
3949039746cSDon Hiatt int hfi1_ruc_check_hdr(struct hfi1_ibport *ibp, struct hfi1_packet *packet);
395f48ad614SDennis Dalessandro
396f48ad614SDennis Dalessandro u32 hfi1_make_grh(struct hfi1_ibport *ibp, struct ib_grh *hdr,
397d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh, u32 hwords, u32 nwords);
398f48ad614SDennis Dalessandro
399261a4351SMike Marciniszyn void hfi1_make_ruc_header(struct rvt_qp *qp, struct ib_other_headers *ohdr,
40044e43d91SMitko Haralanov u32 bth0, u32 bth1, u32 bth2, int middle,
401f48ad614SDennis Dalessandro struct hfi1_pkt_state *ps);
402f48ad614SDennis Dalessandro
403572f0c33SKaike Wan bool hfi1_schedule_send_yield(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
404572f0c33SKaike Wan bool tid);
405572f0c33SKaike Wan
406f48ad614SDennis Dalessandro void _hfi1_do_send(struct work_struct *work);
407f48ad614SDennis Dalessandro
408b6eac931SMike Marciniszyn void hfi1_do_send_from_rvt(struct rvt_qp *qp);
409b6eac931SMike Marciniszyn
410b6eac931SMike Marciniszyn void hfi1_do_send(struct rvt_qp *qp, bool in_thread);
411f48ad614SDennis Dalessandro
412bdaf96f6SSebastian Sanchez void hfi1_send_rc_ack(struct hfi1_packet *packet, bool is_fecn);
413f48ad614SDennis Dalessandro
414f48ad614SDennis Dalessandro int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps);
415f48ad614SDennis Dalessandro
416f48ad614SDennis Dalessandro int hfi1_make_uc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps);
417f48ad614SDennis Dalessandro
418f48ad614SDennis Dalessandro int hfi1_make_ud_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps);
419f48ad614SDennis Dalessandro
420f48ad614SDennis Dalessandro int hfi1_register_ib_device(struct hfi1_devdata *);
421f48ad614SDennis Dalessandro
422f48ad614SDennis Dalessandro void hfi1_unregister_ib_device(struct hfi1_devdata *);
423f48ad614SDennis Dalessandro
42422d136d7SKaike Wan void hfi1_kdeth_eager_rcv(struct hfi1_packet *packet);
42522d136d7SKaike Wan
42622d136d7SKaike Wan void hfi1_kdeth_expected_rcv(struct hfi1_packet *packet);
42722d136d7SKaike Wan
428f48ad614SDennis Dalessandro void hfi1_ib_rcv(struct hfi1_packet *packet);
429f48ad614SDennis Dalessandro
43072c07e2bSDon Hiatt void hfi1_16B_rcv(struct hfi1_packet *packet);
43172c07e2bSDon Hiatt
432f48ad614SDennis Dalessandro unsigned hfi1_get_npkeys(struct hfi1_devdata *);
433f48ad614SDennis Dalessandro
434f48ad614SDennis Dalessandro int hfi1_verbs_send_dma(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
435f48ad614SDennis Dalessandro u64 pbc);
436f48ad614SDennis Dalessandro
437f48ad614SDennis Dalessandro int hfi1_verbs_send_pio(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
438f48ad614SDennis Dalessandro u64 pbc);
439f48ad614SDennis Dalessandro
opa_bth_is_migration(struct ib_other_headers * ohdr)4406d6b8848SSebastian Sanchez static inline bool opa_bth_is_migration(struct ib_other_headers *ohdr)
4416d6b8848SSebastian Sanchez {
4426d6b8848SSebastian Sanchez return ohdr->bth[1] & cpu_to_be32(OPA_BTH_MIG_REQ);
4436d6b8848SSebastian Sanchez }
4446d6b8848SSebastian Sanchez
445838b6fd2SKaike Wan void hfi1_wait_kmem(struct rvt_qp *qp);
446838b6fd2SKaike Wan
hfi1_trdma_send_complete(struct rvt_qp * qp,struct rvt_swqe * wqe,enum ib_wc_status status)447838b6fd2SKaike Wan static inline void hfi1_trdma_send_complete(struct rvt_qp *qp,
448838b6fd2SKaike Wan struct rvt_swqe *wqe,
449838b6fd2SKaike Wan enum ib_wc_status status)
450838b6fd2SKaike Wan {
451838b6fd2SKaike Wan trdma_clean_swqe(qp, wqe);
452838b6fd2SKaike Wan rvt_send_complete(qp, wqe, status);
453838b6fd2SKaike Wan }
454838b6fd2SKaike Wan
455f48ad614SDennis Dalessandro extern const enum ib_wc_opcode ib_hfi1_wc_opcode[];
456f48ad614SDennis Dalessandro
457f48ad614SDennis Dalessandro extern const u8 hdr_len_by_opcode[];
458f48ad614SDennis Dalessandro
459f48ad614SDennis Dalessandro extern const int ib_rvt_state_ops[];
460f48ad614SDennis Dalessandro
461f48ad614SDennis Dalessandro extern __be64 ib_hfi1_sys_image_guid; /* in network order */
462f48ad614SDennis Dalessandro
463f48ad614SDennis Dalessandro extern unsigned int hfi1_max_cqes;
464f48ad614SDennis Dalessandro
465f48ad614SDennis Dalessandro extern unsigned int hfi1_max_cqs;
466f48ad614SDennis Dalessandro
467f48ad614SDennis Dalessandro extern unsigned int hfi1_max_qp_wrs;
468f48ad614SDennis Dalessandro
469f48ad614SDennis Dalessandro extern unsigned int hfi1_max_qps;
470f48ad614SDennis Dalessandro
471f48ad614SDennis Dalessandro extern unsigned int hfi1_max_sges;
472f48ad614SDennis Dalessandro
473f48ad614SDennis Dalessandro extern unsigned int hfi1_max_mcast_grps;
474f48ad614SDennis Dalessandro
475f48ad614SDennis Dalessandro extern unsigned int hfi1_max_mcast_qp_attached;
476f48ad614SDennis Dalessandro
477f48ad614SDennis Dalessandro extern unsigned int hfi1_max_srqs;
478f48ad614SDennis Dalessandro
479f48ad614SDennis Dalessandro extern unsigned int hfi1_max_srq_sges;
480f48ad614SDennis Dalessandro
481f48ad614SDennis Dalessandro extern unsigned int hfi1_max_srq_wrs;
482f48ad614SDennis Dalessandro
483f48ad614SDennis Dalessandro extern unsigned short piothreshold;
484f48ad614SDennis Dalessandro
485f48ad614SDennis Dalessandro extern const u32 ib_hfi1_rnr_table[];
486f48ad614SDennis Dalessandro
487f48ad614SDennis Dalessandro #endif /* HFI1_VERBS_H */
488