1145eba1aSCai Huoqing // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
2f48ad614SDennis Dalessandro /*
3*d2c02346SBrendan Cunningham * Copyright(c) 2020 - 2023 Cornelis Networks, Inc.
45da0fc9dSDennis Dalessandro * Copyright(c) 2015 - 2018 Intel Corporation.
5f48ad614SDennis Dalessandro */
6145eba1aSCai Huoqing
7f48ad614SDennis Dalessandro #include <linux/mm.h>
8f48ad614SDennis Dalessandro #include <linux/types.h>
9f48ad614SDennis Dalessandro #include <linux/device.h>
10f48ad614SDennis Dalessandro #include <linux/dmapool.h>
11f48ad614SDennis Dalessandro #include <linux/slab.h>
12f48ad614SDennis Dalessandro #include <linux/list.h>
13f48ad614SDennis Dalessandro #include <linux/highmem.h>
14f48ad614SDennis Dalessandro #include <linux/io.h>
15f48ad614SDennis Dalessandro #include <linux/uio.h>
16f48ad614SDennis Dalessandro #include <linux/rbtree.h>
17f48ad614SDennis Dalessandro #include <linux/spinlock.h>
18f48ad614SDennis Dalessandro #include <linux/delay.h>
19f48ad614SDennis Dalessandro #include <linux/kthread.h>
20f48ad614SDennis Dalessandro #include <linux/mmu_context.h>
21f48ad614SDennis Dalessandro #include <linux/module.h>
22f48ad614SDennis Dalessandro #include <linux/vmalloc.h>
231bb0d7b7SMichael J. Ruhl #include <linux/string.h>
24f48ad614SDennis Dalessandro
25f48ad614SDennis Dalessandro #include "hfi.h"
26f48ad614SDennis Dalessandro #include "sdma.h"
27f48ad614SDennis Dalessandro #include "user_sdma.h"
28f48ad614SDennis Dalessandro #include "verbs.h" /* for the headers */
29f48ad614SDennis Dalessandro #include "common.h" /* for struct hfi1_tid_info */
30f48ad614SDennis Dalessandro #include "trace.h"
31f48ad614SDennis Dalessandro
32f48ad614SDennis Dalessandro static uint hfi1_sdma_comp_ring_size = 128;
33f48ad614SDennis Dalessandro module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
34f48ad614SDennis Dalessandro MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
35f48ad614SDennis Dalessandro
36f48ad614SDennis Dalessandro static unsigned initial_pkt_count = 8;
37f48ad614SDennis Dalessandro
383ca633f1SMichael J. Ruhl static int user_sdma_send_pkts(struct user_sdma_request *req, u16 maxpkts);
39f4cd8765SMichael J. Ruhl static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status);
40f4cd8765SMichael J. Ruhl static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq);
4100cbce5cSPatrick Kelsey static void user_sdma_free_request(struct user_sdma_request *req);
42f4cd8765SMichael J. Ruhl static int check_header_template(struct user_sdma_request *req,
43f4cd8765SMichael J. Ruhl struct hfi1_pkt_header *hdr, u32 lrhlen,
44f4cd8765SMichael J. Ruhl u32 datalen);
45f4cd8765SMichael J. Ruhl static int set_txreq_header(struct user_sdma_request *req,
46f4cd8765SMichael J. Ruhl struct user_sdma_txreq *tx, u32 datalen);
47f4cd8765SMichael J. Ruhl static int set_txreq_header_ahg(struct user_sdma_request *req,
48f4cd8765SMichael J. Ruhl struct user_sdma_txreq *tx, u32 len);
49f4cd8765SMichael J. Ruhl static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
50f4cd8765SMichael J. Ruhl struct hfi1_user_sdma_comp_q *cq,
51f4cd8765SMichael J. Ruhl u16 idx, enum hfi1_sdma_comp_state state,
52f4cd8765SMichael J. Ruhl int ret);
53f4cd8765SMichael J. Ruhl static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags);
54f48ad614SDennis Dalessandro static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
55f48ad614SDennis Dalessandro
56f48ad614SDennis Dalessandro static int defer_packet_queue(
57f4cd8765SMichael J. Ruhl struct sdma_engine *sde,
585da0fc9dSDennis Dalessandro struct iowait_work *wait,
59f4cd8765SMichael J. Ruhl struct sdma_txreq *txreq,
60bcad2913SKaike Wan uint seq,
61bcad2913SKaike Wan bool pkts_sent);
62f4cd8765SMichael J. Ruhl static void activate_packet_queue(struct iowait *wait, int reason);
6300cbce5cSPatrick Kelsey
defer_packet_queue(struct sdma_engine * sde,struct iowait_work * wait,struct sdma_txreq * txreq,uint seq,bool pkts_sent)64f48ad614SDennis Dalessandro static int defer_packet_queue(
65f48ad614SDennis Dalessandro struct sdma_engine *sde,
665da0fc9dSDennis Dalessandro struct iowait_work *wait,
67f48ad614SDennis Dalessandro struct sdma_txreq *txreq,
68bcad2913SKaike Wan uint seq,
69bcad2913SKaike Wan bool pkts_sent)
70f48ad614SDennis Dalessandro {
71f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq =
725da0fc9dSDennis Dalessandro container_of(wait->iow, struct hfi1_user_sdma_pkt_q, busy);
73f48ad614SDennis Dalessandro
74da9de5f8SMike Marciniszyn write_seqlock(&sde->waitlock);
756b13215dSMike Marciniszyn trace_hfi1_usdma_defer(pq, sde, &pq->busy);
76da9de5f8SMike Marciniszyn if (sdma_progress(sde, seq, txreq))
77f48ad614SDennis Dalessandro goto eagain;
78f48ad614SDennis Dalessandro /*
79f48ad614SDennis Dalessandro * We are assuming that if the list is enqueued somewhere, it
80f48ad614SDennis Dalessandro * is to the dmawait list since that is the only place where
81f48ad614SDennis Dalessandro * it is supposed to be enqueued.
82f48ad614SDennis Dalessandro */
83f48ad614SDennis Dalessandro xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
8434025fb0SKaike Wan if (list_empty(&pq->busy.list)) {
859a293d1eSMike Marciniszyn pq->busy.lock = &sde->waitlock;
8634025fb0SKaike Wan iowait_get_priority(&pq->busy);
87bcad2913SKaike Wan iowait_queue(pkts_sent, &pq->busy, &sde->dmawait);
8834025fb0SKaike Wan }
899aefcabeSMike Marciniszyn write_sequnlock(&sde->waitlock);
90f48ad614SDennis Dalessandro return -EBUSY;
91f48ad614SDennis Dalessandro eagain:
92da9de5f8SMike Marciniszyn write_sequnlock(&sde->waitlock);
93f48ad614SDennis Dalessandro return -EAGAIN;
94f48ad614SDennis Dalessandro }
95f48ad614SDennis Dalessandro
activate_packet_queue(struct iowait * wait,int reason)96f48ad614SDennis Dalessandro static void activate_packet_queue(struct iowait *wait, int reason)
97f48ad614SDennis Dalessandro {
98f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq =
99f48ad614SDennis Dalessandro container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
1006b13215dSMike Marciniszyn
1016b13215dSMike Marciniszyn trace_hfi1_usdma_activate(pq, wait, reason);
102f48ad614SDennis Dalessandro xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
103f48ad614SDennis Dalessandro wake_up(&wait->wait_dma);
104f48ad614SDennis Dalessandro };
105f48ad614SDennis Dalessandro
hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata * uctxt,struct hfi1_filedata * fd)1065042cddfSMichael J. Ruhl int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
1075042cddfSMichael J. Ruhl struct hfi1_filedata *fd)
108f48ad614SDennis Dalessandro {
10962239fc6SMichael J. Ruhl int ret = -ENOMEM;
110f48ad614SDennis Dalessandro char buf[64];
111f48ad614SDennis Dalessandro struct hfi1_devdata *dd;
112f48ad614SDennis Dalessandro struct hfi1_user_sdma_comp_q *cq;
113f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq;
114f48ad614SDennis Dalessandro
11562239fc6SMichael J. Ruhl if (!uctxt || !fd)
11662239fc6SMichael J. Ruhl return -EBADF;
117f48ad614SDennis Dalessandro
11862239fc6SMichael J. Ruhl if (!hfi1_sdma_comp_ring_size)
11962239fc6SMichael J. Ruhl return -EINVAL;
120f48ad614SDennis Dalessandro
121f48ad614SDennis Dalessandro dd = uctxt->dd;
122f48ad614SDennis Dalessandro
123f48ad614SDennis Dalessandro pq = kzalloc(sizeof(*pq), GFP_KERNEL);
124f48ad614SDennis Dalessandro if (!pq)
12562239fc6SMichael J. Ruhl return -ENOMEM;
126f48ad614SDennis Dalessandro pq->dd = dd;
127f48ad614SDennis Dalessandro pq->ctxt = uctxt->ctxt;
128f48ad614SDennis Dalessandro pq->subctxt = fd->subctxt;
129f48ad614SDennis Dalessandro pq->n_max_reqs = hfi1_sdma_comp_ring_size;
130f48ad614SDennis Dalessandro atomic_set(&pq->n_reqs, 0);
131f48ad614SDennis Dalessandro init_waitqueue_head(&pq->wait);
132b7df192fSDean Luick atomic_set(&pq->n_locked, 0);
133f48ad614SDennis Dalessandro
1345da0fc9dSDennis Dalessandro iowait_init(&pq->busy, 0, NULL, NULL, defer_packet_queue,
13534025fb0SKaike Wan activate_packet_queue, NULL, NULL);
136f48ad614SDennis Dalessandro pq->reqidx = 0;
13762239fc6SMichael J. Ruhl
13862239fc6SMichael J. Ruhl pq->reqs = kcalloc(hfi1_sdma_comp_ring_size,
13962239fc6SMichael J. Ruhl sizeof(*pq->reqs),
14062239fc6SMichael J. Ruhl GFP_KERNEL);
14162239fc6SMichael J. Ruhl if (!pq->reqs)
14262239fc6SMichael J. Ruhl goto pq_reqs_nomem;
14362239fc6SMichael J. Ruhl
144f86dbc9fSChristophe JAILLET pq->req_in_use = bitmap_zalloc(hfi1_sdma_comp_ring_size, GFP_KERNEL);
14562239fc6SMichael J. Ruhl if (!pq->req_in_use)
14662239fc6SMichael J. Ruhl goto pq_reqs_no_in_use;
14762239fc6SMichael J. Ruhl
148f48ad614SDennis Dalessandro snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
149f48ad614SDennis Dalessandro fd->subctxt);
150f48ad614SDennis Dalessandro pq->txreq_cache = kmem_cache_create(buf,
151f48ad614SDennis Dalessandro sizeof(struct user_sdma_txreq),
152f48ad614SDennis Dalessandro L1_CACHE_BYTES,
153f48ad614SDennis Dalessandro SLAB_HWCACHE_ALIGN,
1547956371eSMichael J. Ruhl NULL);
155f48ad614SDennis Dalessandro if (!pq->txreq_cache) {
156f48ad614SDennis Dalessandro dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
157f48ad614SDennis Dalessandro uctxt->ctxt);
158f48ad614SDennis Dalessandro goto pq_txreq_nomem;
159f48ad614SDennis Dalessandro }
16062239fc6SMichael J. Ruhl
161f48ad614SDennis Dalessandro cq = kzalloc(sizeof(*cq), GFP_KERNEL);
162f48ad614SDennis Dalessandro if (!cq)
163f48ad614SDennis Dalessandro goto cq_nomem;
164f48ad614SDennis Dalessandro
165e036c200SMarkus Elfring cq->comps = vmalloc_user(PAGE_ALIGN(sizeof(*cq->comps)
166e036c200SMarkus Elfring * hfi1_sdma_comp_ring_size));
167f48ad614SDennis Dalessandro if (!cq->comps)
168f48ad614SDennis Dalessandro goto cq_comps_nomem;
169f48ad614SDennis Dalessandro
170f48ad614SDennis Dalessandro cq->nentries = hfi1_sdma_comp_ring_size;
171f48ad614SDennis Dalessandro
172*d2c02346SBrendan Cunningham ret = hfi1_init_system_pinning(pq);
173*d2c02346SBrendan Cunningham if (ret)
17462239fc6SMichael J. Ruhl goto pq_mmu_fail;
175f48ad614SDennis Dalessandro
176be863834SMike Marciniszyn rcu_assign_pointer(fd->pq, pq);
17762239fc6SMichael J. Ruhl fd->cq = cq;
17862239fc6SMichael J. Ruhl
17962239fc6SMichael J. Ruhl return 0;
18062239fc6SMichael J. Ruhl
18162239fc6SMichael J. Ruhl pq_mmu_fail:
18262239fc6SMichael J. Ruhl vfree(cq->comps);
183f48ad614SDennis Dalessandro cq_comps_nomem:
184f48ad614SDennis Dalessandro kfree(cq);
185f48ad614SDennis Dalessandro cq_nomem:
186f48ad614SDennis Dalessandro kmem_cache_destroy(pq->txreq_cache);
187f48ad614SDennis Dalessandro pq_txreq_nomem:
188f86dbc9fSChristophe JAILLET bitmap_free(pq->req_in_use);
1897b3256e3SDean Luick pq_reqs_no_in_use:
190f48ad614SDennis Dalessandro kfree(pq->reqs);
191f48ad614SDennis Dalessandro pq_reqs_nomem:
192f48ad614SDennis Dalessandro kfree(pq);
19362239fc6SMichael J. Ruhl
194f48ad614SDennis Dalessandro return ret;
195f48ad614SDennis Dalessandro }
196f48ad614SDennis Dalessandro
flush_pq_iowait(struct hfi1_user_sdma_pkt_q * pq)1979a293d1eSMike Marciniszyn static void flush_pq_iowait(struct hfi1_user_sdma_pkt_q *pq)
1989a293d1eSMike Marciniszyn {
1999a293d1eSMike Marciniszyn unsigned long flags;
2009a293d1eSMike Marciniszyn seqlock_t *lock = pq->busy.lock;
2019a293d1eSMike Marciniszyn
2029a293d1eSMike Marciniszyn if (!lock)
2039a293d1eSMike Marciniszyn return;
2049a293d1eSMike Marciniszyn write_seqlock_irqsave(lock, flags);
2059a293d1eSMike Marciniszyn if (!list_empty(&pq->busy.list)) {
2069a293d1eSMike Marciniszyn list_del_init(&pq->busy.list);
2079a293d1eSMike Marciniszyn pq->busy.lock = NULL;
2089a293d1eSMike Marciniszyn }
2099a293d1eSMike Marciniszyn write_sequnlock_irqrestore(lock, flags);
2109a293d1eSMike Marciniszyn }
2119a293d1eSMike Marciniszyn
hfi1_user_sdma_free_queues(struct hfi1_filedata * fd,struct hfi1_ctxtdata * uctxt)212e87473bcSMichael J. Ruhl int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd,
213e87473bcSMichael J. Ruhl struct hfi1_ctxtdata *uctxt)
214f48ad614SDennis Dalessandro {
215f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq;
216f48ad614SDennis Dalessandro
21734ab4de7SMichael J. Ruhl trace_hfi1_sdma_user_free_queues(uctxt->dd, uctxt->ctxt, fd->subctxt);
21834ab4de7SMichael J. Ruhl
219be863834SMike Marciniszyn spin_lock(&fd->pq_rcu_lock);
220be863834SMike Marciniszyn pq = srcu_dereference_check(fd->pq, &fd->pq_srcu,
221be863834SMike Marciniszyn lockdep_is_held(&fd->pq_rcu_lock));
222f48ad614SDennis Dalessandro if (pq) {
223be863834SMike Marciniszyn rcu_assign_pointer(fd->pq, NULL);
224be863834SMike Marciniszyn spin_unlock(&fd->pq_rcu_lock);
225be863834SMike Marciniszyn synchronize_srcu(&fd->pq_srcu);
226be863834SMike Marciniszyn /* at this point there can be no more new requests */
227f48ad614SDennis Dalessandro iowait_sdma_drain(&pq->busy);
228f48ad614SDennis Dalessandro /* Wait until all requests have been freed. */
229f48ad614SDennis Dalessandro wait_event_interruptible(
230f48ad614SDennis Dalessandro pq->wait,
23128a9a9e8SMichael J. Ruhl !atomic_read(&pq->n_reqs));
232f48ad614SDennis Dalessandro kfree(pq->reqs);
233*d2c02346SBrendan Cunningham hfi1_free_system_pinning(pq);
234f86dbc9fSChristophe JAILLET bitmap_free(pq->req_in_use);
235f48ad614SDennis Dalessandro kmem_cache_destroy(pq->txreq_cache);
2369a293d1eSMike Marciniszyn flush_pq_iowait(pq);
237f48ad614SDennis Dalessandro kfree(pq);
238be863834SMike Marciniszyn } else {
239be863834SMike Marciniszyn spin_unlock(&fd->pq_rcu_lock);
240f48ad614SDennis Dalessandro }
241f48ad614SDennis Dalessandro if (fd->cq) {
242f48ad614SDennis Dalessandro vfree(fd->cq->comps);
243f48ad614SDennis Dalessandro kfree(fd->cq);
244f48ad614SDennis Dalessandro fd->cq = NULL;
245f48ad614SDennis Dalessandro }
246f48ad614SDennis Dalessandro return 0;
247f48ad614SDennis Dalessandro }
248f48ad614SDennis Dalessandro
dlid_to_selector(u16 dlid)24914833b8cSJianxin Xiong static u8 dlid_to_selector(u16 dlid)
25014833b8cSJianxin Xiong {
25114833b8cSJianxin Xiong static u8 mapping[256];
25214833b8cSJianxin Xiong static int initialized;
25314833b8cSJianxin Xiong static u8 next;
25414833b8cSJianxin Xiong int hash;
25514833b8cSJianxin Xiong
25614833b8cSJianxin Xiong if (!initialized) {
25714833b8cSJianxin Xiong memset(mapping, 0xFF, 256);
25814833b8cSJianxin Xiong initialized = 1;
25914833b8cSJianxin Xiong }
26014833b8cSJianxin Xiong
26114833b8cSJianxin Xiong hash = ((dlid >> 8) ^ dlid) & 0xFF;
26214833b8cSJianxin Xiong if (mapping[hash] == 0xFF) {
26314833b8cSJianxin Xiong mapping[hash] = next;
26414833b8cSJianxin Xiong next = (next + 1) & 0x7F;
26514833b8cSJianxin Xiong }
26614833b8cSJianxin Xiong
26714833b8cSJianxin Xiong return mapping[hash];
26814833b8cSJianxin Xiong }
26914833b8cSJianxin Xiong
27028a9a9e8SMichael J. Ruhl /**
27128a9a9e8SMichael J. Ruhl * hfi1_user_sdma_process_request() - Process and start a user sdma request
27228a9a9e8SMichael J. Ruhl * @fd: valid file descriptor
27328a9a9e8SMichael J. Ruhl * @iovec: array of io vectors to process
27428a9a9e8SMichael J. Ruhl * @dim: overall iovec array size
27528a9a9e8SMichael J. Ruhl * @count: number of io vector array entries processed
27628a9a9e8SMichael J. Ruhl */
hfi1_user_sdma_process_request(struct hfi1_filedata * fd,struct iovec * iovec,unsigned long dim,unsigned long * count)2775042cddfSMichael J. Ruhl int hfi1_user_sdma_process_request(struct hfi1_filedata *fd,
2785042cddfSMichael J. Ruhl struct iovec *iovec, unsigned long dim,
2795042cddfSMichael J. Ruhl unsigned long *count)
280f48ad614SDennis Dalessandro {
281ff4ce9bdSDean Luick int ret = 0, i;
282f48ad614SDennis Dalessandro struct hfi1_ctxtdata *uctxt = fd->uctxt;
283be863834SMike Marciniszyn struct hfi1_user_sdma_pkt_q *pq =
284be863834SMike Marciniszyn srcu_dereference(fd->pq, &fd->pq_srcu);
285f48ad614SDennis Dalessandro struct hfi1_user_sdma_comp_q *cq = fd->cq;
286f48ad614SDennis Dalessandro struct hfi1_devdata *dd = pq->dd;
287f48ad614SDennis Dalessandro unsigned long idx = 0;
288f48ad614SDennis Dalessandro u8 pcount = initial_pkt_count;
289f48ad614SDennis Dalessandro struct sdma_req_info info;
290f48ad614SDennis Dalessandro struct user_sdma_request *req;
291f48ad614SDennis Dalessandro u8 opcode, sc, vl;
292566d53a8SDon Hiatt u16 pkey;
293566d53a8SDon Hiatt u32 slid;
29414833b8cSJianxin Xiong u16 dlid;
2950cb2aa69STadeusz Struk u32 selector;
296f48ad614SDennis Dalessandro
297f48ad614SDennis Dalessandro if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
298f48ad614SDennis Dalessandro hfi1_cdbg(
299f48ad614SDennis Dalessandro SDMA,
300f48ad614SDennis Dalessandro "[%u:%u:%u] First vector not big enough for header %lu/%lu",
301f48ad614SDennis Dalessandro dd->unit, uctxt->ctxt, fd->subctxt,
302f48ad614SDennis Dalessandro iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
303f48ad614SDennis Dalessandro return -EINVAL;
304f48ad614SDennis Dalessandro }
305f48ad614SDennis Dalessandro ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
306f48ad614SDennis Dalessandro if (ret) {
307f48ad614SDennis Dalessandro hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
308f48ad614SDennis Dalessandro dd->unit, uctxt->ctxt, fd->subctxt, ret);
309f48ad614SDennis Dalessandro return -EFAULT;
310f48ad614SDennis Dalessandro }
311f48ad614SDennis Dalessandro
312f48ad614SDennis Dalessandro trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt,
313f48ad614SDennis Dalessandro (u16 *)&info);
3144fa0d22cSDean Luick if (info.comp_idx >= hfi1_sdma_comp_ring_size) {
3154fa0d22cSDean Luick hfi1_cdbg(SDMA,
3164fa0d22cSDean Luick "[%u:%u:%u:%u] Invalid comp index",
3174fa0d22cSDean Luick dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
3184fa0d22cSDean Luick return -EINVAL;
3194fa0d22cSDean Luick }
3204fa0d22cSDean Luick
3219ff73c87SDean Luick /*
3229ff73c87SDean Luick * Sanity check the header io vector count. Need at least 1 vector
3239ff73c87SDean Luick * (header) and cannot be larger than the actual io vector count.
3249ff73c87SDean Luick */
3259ff73c87SDean Luick if (req_iovcnt(info.ctrl) < 1 || req_iovcnt(info.ctrl) > dim) {
3269ff73c87SDean Luick hfi1_cdbg(SDMA,
3279ff73c87SDean Luick "[%u:%u:%u:%u] Invalid iov count %d, dim %ld",
3289ff73c87SDean Luick dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx,
3299ff73c87SDean Luick req_iovcnt(info.ctrl), dim);
3309ff73c87SDean Luick return -EINVAL;
3319ff73c87SDean Luick }
3329ff73c87SDean Luick
333f48ad614SDennis Dalessandro if (!info.fragsize) {
334f48ad614SDennis Dalessandro hfi1_cdbg(SDMA,
335f48ad614SDennis Dalessandro "[%u:%u:%u:%u] Request does not specify fragsize",
336f48ad614SDennis Dalessandro dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
337f48ad614SDennis Dalessandro return -EINVAL;
338f48ad614SDennis Dalessandro }
3397b3256e3SDean Luick
3407b3256e3SDean Luick /* Try to claim the request. */
3417b3256e3SDean Luick if (test_and_set_bit(info.comp_idx, pq->req_in_use)) {
3427b3256e3SDean Luick hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in use",
3437b3256e3SDean Luick dd->unit, uctxt->ctxt, fd->subctxt,
3447b3256e3SDean Luick info.comp_idx);
3457b3256e3SDean Luick return -EBADSLT;
3467b3256e3SDean Luick }
347f48ad614SDennis Dalessandro /*
3487b3256e3SDean Luick * All safety checks have been done and this request has been claimed.
349f48ad614SDennis Dalessandro */
35034ab4de7SMichael J. Ruhl trace_hfi1_sdma_user_process_request(dd, uctxt->ctxt, fd->subctxt,
35134ab4de7SMichael J. Ruhl info.comp_idx);
352f48ad614SDennis Dalessandro req = pq->reqs + info.comp_idx;
3539ff73c87SDean Luick req->data_iovs = req_iovcnt(info.ctrl) - 1; /* subtract header vector */
354ceb26569SSebastian Sanchez req->data_len = 0;
355f48ad614SDennis Dalessandro req->pq = pq;
356f48ad614SDennis Dalessandro req->cq = cq;
357780a4c16SSebastian Sanchez req->ahg_idx = -1;
358ceb26569SSebastian Sanchez req->iov_idx = 0;
359ceb26569SSebastian Sanchez req->sent = 0;
360ceb26569SSebastian Sanchez req->seqnum = 0;
361ceb26569SSebastian Sanchez req->seqcomp = 0;
362ceb26569SSebastian Sanchez req->seqsubmitted = 0;
363ceb26569SSebastian Sanchez req->tids = NULL;
364e9c48ebdSSebastian Sanchez req->has_error = 0;
365f48ad614SDennis Dalessandro INIT_LIST_HEAD(&req->txps);
366f48ad614SDennis Dalessandro
367f48ad614SDennis Dalessandro memcpy(&req->info, &info, sizeof(info));
368f48ad614SDennis Dalessandro
369a0e0cb82SMichael J. Ruhl /* The request is initialized, count it */
370a0e0cb82SMichael J. Ruhl atomic_inc(&pq->n_reqs);
371a0e0cb82SMichael J. Ruhl
3729ff73c87SDean Luick if (req_opcode(info.ctrl) == EXPECTED) {
3739ff73c87SDean Luick /* expected must have a TID info and at least one data vector */
3749ff73c87SDean Luick if (req->data_iovs < 2) {
3759ff73c87SDean Luick SDMA_DBG(req,
3769ff73c87SDean Luick "Not enough vectors for expected request");
3779ff73c87SDean Luick ret = -EINVAL;
3789ff73c87SDean Luick goto free_req;
3799ff73c87SDean Luick }
380f48ad614SDennis Dalessandro req->data_iovs--;
3819ff73c87SDean Luick }
382f48ad614SDennis Dalessandro
383f48ad614SDennis Dalessandro if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
384f48ad614SDennis Dalessandro SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
385f48ad614SDennis Dalessandro MAX_VECTORS_PER_REQ);
3869da7e9a7SDean Luick ret = -EINVAL;
3879da7e9a7SDean Luick goto free_req;
388f48ad614SDennis Dalessandro }
38900cbce5cSPatrick Kelsey
390f48ad614SDennis Dalessandro /* Copy the header from the user buffer */
391f48ad614SDennis Dalessandro ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
392f48ad614SDennis Dalessandro sizeof(req->hdr));
393f48ad614SDennis Dalessandro if (ret) {
394f48ad614SDennis Dalessandro SDMA_DBG(req, "Failed to copy header template (%d)", ret);
395f48ad614SDennis Dalessandro ret = -EFAULT;
396f48ad614SDennis Dalessandro goto free_req;
397f48ad614SDennis Dalessandro }
398f48ad614SDennis Dalessandro
399f48ad614SDennis Dalessandro /* If Static rate control is not enabled, sanitize the header. */
400f48ad614SDennis Dalessandro if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
401f48ad614SDennis Dalessandro req->hdr.pbc[2] = 0;
402f48ad614SDennis Dalessandro
403f48ad614SDennis Dalessandro /* Validate the opcode. Do not trust packets from user space blindly. */
404f48ad614SDennis Dalessandro opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
405f48ad614SDennis Dalessandro if ((opcode & USER_OPCODE_CHECK_MASK) !=
406f48ad614SDennis Dalessandro USER_OPCODE_CHECK_VAL) {
407f48ad614SDennis Dalessandro SDMA_DBG(req, "Invalid opcode (%d)", opcode);
408f48ad614SDennis Dalessandro ret = -EINVAL;
409f48ad614SDennis Dalessandro goto free_req;
410f48ad614SDennis Dalessandro }
411f48ad614SDennis Dalessandro /*
412f48ad614SDennis Dalessandro * Validate the vl. Do not trust packets from user space blindly.
413f48ad614SDennis Dalessandro * VL comes from PBC, SC comes from LRH, and the VL needs to
414f48ad614SDennis Dalessandro * match the SC look up.
415f48ad614SDennis Dalessandro */
416f48ad614SDennis Dalessandro vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
417f48ad614SDennis Dalessandro sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
418f48ad614SDennis Dalessandro (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
419f48ad614SDennis Dalessandro if (vl >= dd->pport->vls_operational ||
420f48ad614SDennis Dalessandro vl != sc_to_vlt(dd, sc)) {
421f48ad614SDennis Dalessandro SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
422f48ad614SDennis Dalessandro ret = -EINVAL;
423f48ad614SDennis Dalessandro goto free_req;
424f48ad614SDennis Dalessandro }
425f48ad614SDennis Dalessandro
426f48ad614SDennis Dalessandro /* Checking P_KEY for requests from user-space */
427566d53a8SDon Hiatt pkey = (u16)be32_to_cpu(req->hdr.bth[0]);
428566d53a8SDon Hiatt slid = be16_to_cpu(req->hdr.lrh[3]);
429566d53a8SDon Hiatt if (egress_pkey_check(dd->pport, slid, pkey, sc, PKEY_CHECK_INVALID)) {
430f48ad614SDennis Dalessandro ret = -EINVAL;
431f48ad614SDennis Dalessandro goto free_req;
432f48ad614SDennis Dalessandro }
433f48ad614SDennis Dalessandro
434f48ad614SDennis Dalessandro /*
435f48ad614SDennis Dalessandro * Also should check the BTH.lnh. If it says the next header is GRH then
436f48ad614SDennis Dalessandro * the RXE parsing will be off and will land in the middle of the KDETH
437f48ad614SDennis Dalessandro * or miss it entirely.
438f48ad614SDennis Dalessandro */
439f48ad614SDennis Dalessandro if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
440f48ad614SDennis Dalessandro SDMA_DBG(req, "User tried to pass in a GRH");
441f48ad614SDennis Dalessandro ret = -EINVAL;
442f48ad614SDennis Dalessandro goto free_req;
443f48ad614SDennis Dalessandro }
444f48ad614SDennis Dalessandro
445f48ad614SDennis Dalessandro req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
446f48ad614SDennis Dalessandro /*
447f48ad614SDennis Dalessandro * Calculate the initial TID offset based on the values of
448f48ad614SDennis Dalessandro * KDETH.OFFSET and KDETH.OM that are passed in.
449f48ad614SDennis Dalessandro */
450f48ad614SDennis Dalessandro req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
451f48ad614SDennis Dalessandro (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
452f48ad614SDennis Dalessandro KDETH_OM_LARGE : KDETH_OM_SMALL);
45334ab4de7SMichael J. Ruhl trace_hfi1_sdma_user_initial_tidoffset(dd, uctxt->ctxt, fd->subctxt,
45434ab4de7SMichael J. Ruhl info.comp_idx, req->tidoffset);
455f48ad614SDennis Dalessandro idx++;
456f48ad614SDennis Dalessandro
457f48ad614SDennis Dalessandro /* Save all the IO vector structures */
458ff4ce9bdSDean Luick for (i = 0; i < req->data_iovs; i++) {
459ceb26569SSebastian Sanchez req->iovs[i].offset = 0;
460f48ad614SDennis Dalessandro INIT_LIST_HEAD(&req->iovs[i].list);
461db6f0289SMarkus Elfring memcpy(&req->iovs[i].iov,
462db6f0289SMarkus Elfring iovec + idx++,
463db6f0289SMarkus Elfring sizeof(req->iovs[i].iov));
46400cbce5cSPatrick Kelsey if (req->iovs[i].iov.iov_len == 0) {
46500cbce5cSPatrick Kelsey ret = -EINVAL;
466f48ad614SDennis Dalessandro goto free_req;
467f48ad614SDennis Dalessandro }
468ff4ce9bdSDean Luick req->data_len += req->iovs[i].iov.iov_len;
469f48ad614SDennis Dalessandro }
47034ab4de7SMichael J. Ruhl trace_hfi1_sdma_user_data_length(dd, uctxt->ctxt, fd->subctxt,
47134ab4de7SMichael J. Ruhl info.comp_idx, req->data_len);
472f48ad614SDennis Dalessandro if (pcount > req->info.npkts)
473f48ad614SDennis Dalessandro pcount = req->info.npkts;
474f48ad614SDennis Dalessandro /*
475f48ad614SDennis Dalessandro * Copy any TID info
476f48ad614SDennis Dalessandro * User space will provide the TID info only when the
477f48ad614SDennis Dalessandro * request type is EXPECTED. This is true even if there is
478f48ad614SDennis Dalessandro * only one packet in the request and the header is already
479f48ad614SDennis Dalessandro * setup. The reason for the singular TID case is that the
480f48ad614SDennis Dalessandro * driver needs to perform safety checks.
481f48ad614SDennis Dalessandro */
482f48ad614SDennis Dalessandro if (req_opcode(req->info.ctrl) == EXPECTED) {
483f48ad614SDennis Dalessandro u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
4841bb0d7b7SMichael J. Ruhl u32 *tmp;
485f48ad614SDennis Dalessandro
486f48ad614SDennis Dalessandro if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
487f48ad614SDennis Dalessandro ret = -EINVAL;
488f48ad614SDennis Dalessandro goto free_req;
489f48ad614SDennis Dalessandro }
4901bb0d7b7SMichael J. Ruhl
491f48ad614SDennis Dalessandro /*
492f48ad614SDennis Dalessandro * We have to copy all of the tids because they may vary
493f48ad614SDennis Dalessandro * in size and, therefore, the TID count might not be
494f48ad614SDennis Dalessandro * equal to the pkt count. However, there is no way to
495f48ad614SDennis Dalessandro * tell at this point.
496f48ad614SDennis Dalessandro */
4971bb0d7b7SMichael J. Ruhl tmp = memdup_user(iovec[idx].iov_base,
498f48ad614SDennis Dalessandro ntids * sizeof(*req->tids));
4991bb0d7b7SMichael J. Ruhl if (IS_ERR(tmp)) {
5001bb0d7b7SMichael J. Ruhl ret = PTR_ERR(tmp);
501f48ad614SDennis Dalessandro SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
502f48ad614SDennis Dalessandro ntids, ret);
503f48ad614SDennis Dalessandro goto free_req;
504f48ad614SDennis Dalessandro }
5051bb0d7b7SMichael J. Ruhl req->tids = tmp;
506f48ad614SDennis Dalessandro req->n_tids = ntids;
507ceb26569SSebastian Sanchez req->tididx = 0;
508f48ad614SDennis Dalessandro idx++;
509f48ad614SDennis Dalessandro }
510f48ad614SDennis Dalessandro
51114833b8cSJianxin Xiong dlid = be16_to_cpu(req->hdr.lrh[1]);
51214833b8cSJianxin Xiong selector = dlid_to_selector(dlid);
5130cb2aa69STadeusz Struk selector += uctxt->ctxt + fd->subctxt;
5140cb2aa69STadeusz Struk req->sde = sdma_select_user_engine(dd, selector, vl);
51514833b8cSJianxin Xiong
516f48ad614SDennis Dalessandro if (!req->sde || !sdma_running(req->sde)) {
517f48ad614SDennis Dalessandro ret = -ECOMM;
518f48ad614SDennis Dalessandro goto free_req;
519f48ad614SDennis Dalessandro }
520f48ad614SDennis Dalessandro
521f48ad614SDennis Dalessandro /* We don't need an AHG entry if the request contains only one packet */
522780a4c16SSebastian Sanchez if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG))
523780a4c16SSebastian Sanchez req->ahg_idx = sdma_ahg_alloc(req->sde);
524f48ad614SDennis Dalessandro
525f48ad614SDennis Dalessandro set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
52628a9a9e8SMichael J. Ruhl pq->state = SDMA_PKT_Q_ACTIVE;
527f48ad614SDennis Dalessandro
528f48ad614SDennis Dalessandro /*
529f48ad614SDennis Dalessandro * This is a somewhat blocking send implementation.
530f48ad614SDennis Dalessandro * The driver will block the caller until all packets of the
531f48ad614SDennis Dalessandro * request have been submitted to the SDMA engine. However, it
532f48ad614SDennis Dalessandro * will not wait for send completions.
533f48ad614SDennis Dalessandro */
534b888429cSSebastian Sanchez while (req->seqsubmitted != req->info.npkts) {
535f48ad614SDennis Dalessandro ret = user_sdma_send_pkts(req, pcount);
536f48ad614SDennis Dalessandro if (ret < 0) {
5376b13215dSMike Marciniszyn int we_ret;
5386b13215dSMike Marciniszyn
539a0e0cb82SMichael J. Ruhl if (ret != -EBUSY)
540f48ad614SDennis Dalessandro goto free_req;
5416b13215dSMike Marciniszyn we_ret = wait_event_interruptible_timeout(
542f48ad614SDennis Dalessandro pq->busy.wait_dma,
5439a293d1eSMike Marciniszyn pq->state == SDMA_PKT_Q_ACTIVE,
544f48ad614SDennis Dalessandro msecs_to_jiffies(
5456b13215dSMike Marciniszyn SDMA_IOWAIT_TIMEOUT));
5466b13215dSMike Marciniszyn trace_hfi1_usdma_we(pq, we_ret);
5476b13215dSMike Marciniszyn if (we_ret <= 0)
5489a293d1eSMike Marciniszyn flush_pq_iowait(pq);
549f48ad614SDennis Dalessandro }
550f48ad614SDennis Dalessandro }
551f48ad614SDennis Dalessandro *count += idx;
552f48ad614SDennis Dalessandro return 0;
553f48ad614SDennis Dalessandro free_req:
554a0e0cb82SMichael J. Ruhl /*
555a0e0cb82SMichael J. Ruhl * If the submitted seqsubmitted == npkts, the completion routine
556a0e0cb82SMichael J. Ruhl * controls the final state. If sequbmitted < npkts, wait for any
557a0e0cb82SMichael J. Ruhl * outstanding packets to finish before cleaning up.
558a0e0cb82SMichael J. Ruhl */
559a0e0cb82SMichael J. Ruhl if (req->seqsubmitted < req->info.npkts) {
560a0e0cb82SMichael J. Ruhl if (req->seqsubmitted)
561a0e0cb82SMichael J. Ruhl wait_event(pq->busy.wait_dma,
562a0e0cb82SMichael J. Ruhl (req->seqcomp == req->seqsubmitted - 1));
56300cbce5cSPatrick Kelsey user_sdma_free_request(req);
564f48ad614SDennis Dalessandro pq_update(pq);
565a0e0cb82SMichael J. Ruhl set_comp_state(pq, cq, info.comp_idx, ERROR, ret);
566a0e0cb82SMichael J. Ruhl }
567f48ad614SDennis Dalessandro return ret;
568f48ad614SDennis Dalessandro }
569f48ad614SDennis Dalessandro
compute_data_length(struct user_sdma_request * req,struct user_sdma_txreq * tx)570f48ad614SDennis Dalessandro static inline u32 compute_data_length(struct user_sdma_request *req,
571f48ad614SDennis Dalessandro struct user_sdma_txreq *tx)
572f48ad614SDennis Dalessandro {
573f48ad614SDennis Dalessandro /*
574f48ad614SDennis Dalessandro * Determine the proper size of the packet data.
575f48ad614SDennis Dalessandro * The size of the data of the first packet is in the header
576f48ad614SDennis Dalessandro * template. However, it includes the header and ICRC, which need
577f48ad614SDennis Dalessandro * to be subtracted.
578c4929802SIra Weiny * The minimum representable packet data length in a header is 4 bytes,
579c4929802SIra Weiny * therefore, when the data length request is less than 4 bytes, there's
580c4929802SIra Weiny * only one packet, and the packet data length is equal to that of the
581c4929802SIra Weiny * request data length.
582f48ad614SDennis Dalessandro * The size of the remaining packets is the minimum of the frag
583f48ad614SDennis Dalessandro * size (MTU) or remaining data in the request.
584f48ad614SDennis Dalessandro */
585f48ad614SDennis Dalessandro u32 len;
586f48ad614SDennis Dalessandro
587f48ad614SDennis Dalessandro if (!req->seqnum) {
588c4929802SIra Weiny if (req->data_len < sizeof(u32))
589c4929802SIra Weiny len = req->data_len;
590c4929802SIra Weiny else
591f48ad614SDennis Dalessandro len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
592f48ad614SDennis Dalessandro (sizeof(tx->hdr) - 4));
593f48ad614SDennis Dalessandro } else if (req_opcode(req->info.ctrl) == EXPECTED) {
594f48ad614SDennis Dalessandro u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
595f48ad614SDennis Dalessandro PAGE_SIZE;
596f48ad614SDennis Dalessandro /*
597f48ad614SDennis Dalessandro * Get the data length based on the remaining space in the
598f48ad614SDennis Dalessandro * TID pair.
599f48ad614SDennis Dalessandro */
600f48ad614SDennis Dalessandro len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
601f48ad614SDennis Dalessandro /* If we've filled up the TID pair, move to the next one. */
602f48ad614SDennis Dalessandro if (unlikely(!len) && ++req->tididx < req->n_tids &&
603f48ad614SDennis Dalessandro req->tids[req->tididx]) {
604f48ad614SDennis Dalessandro tidlen = EXP_TID_GET(req->tids[req->tididx],
605f48ad614SDennis Dalessandro LEN) * PAGE_SIZE;
606f48ad614SDennis Dalessandro req->tidoffset = 0;
607f48ad614SDennis Dalessandro len = min_t(u32, tidlen, req->info.fragsize);
608f48ad614SDennis Dalessandro }
609f48ad614SDennis Dalessandro /*
610f48ad614SDennis Dalessandro * Since the TID pairs map entire pages, make sure that we
611f48ad614SDennis Dalessandro * are not going to try to send more data that we have
612f48ad614SDennis Dalessandro * remaining.
613f48ad614SDennis Dalessandro */
614f48ad614SDennis Dalessandro len = min(len, req->data_len - req->sent);
615f48ad614SDennis Dalessandro } else {
616f48ad614SDennis Dalessandro len = min(req->data_len - req->sent, (u32)req->info.fragsize);
617f48ad614SDennis Dalessandro }
61834ab4de7SMichael J. Ruhl trace_hfi1_sdma_user_compute_length(req->pq->dd,
61934ab4de7SMichael J. Ruhl req->pq->ctxt,
62034ab4de7SMichael J. Ruhl req->pq->subctxt,
62134ab4de7SMichael J. Ruhl req->info.comp_idx,
62234ab4de7SMichael J. Ruhl len);
623f48ad614SDennis Dalessandro return len;
624f48ad614SDennis Dalessandro }
625f48ad614SDennis Dalessandro
pad_len(u32 len)626c4929802SIra Weiny static inline u32 pad_len(u32 len)
627c4929802SIra Weiny {
628c4929802SIra Weiny if (len & (sizeof(u32) - 1))
629c4929802SIra Weiny len += sizeof(u32) - (len & (sizeof(u32) - 1));
630c4929802SIra Weiny return len;
631c4929802SIra Weiny }
632c4929802SIra Weiny
get_lrh_len(struct hfi1_pkt_header hdr,u32 len)633f48ad614SDennis Dalessandro static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
634f48ad614SDennis Dalessandro {
635f48ad614SDennis Dalessandro /* (Size of complete header - size of PBC) + 4B ICRC + data length */
636f48ad614SDennis Dalessandro return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
637f48ad614SDennis Dalessandro }
638f48ad614SDennis Dalessandro
user_sdma_txadd_ahg(struct user_sdma_request * req,struct user_sdma_txreq * tx,u32 datalen)639624b9ac1SHarish Chegondi static int user_sdma_txadd_ahg(struct user_sdma_request *req,
640624b9ac1SHarish Chegondi struct user_sdma_txreq *tx,
641624b9ac1SHarish Chegondi u32 datalen)
642624b9ac1SHarish Chegondi {
643624b9ac1SHarish Chegondi int ret;
644624b9ac1SHarish Chegondi u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
645624b9ac1SHarish Chegondi u32 lrhlen = get_lrh_len(req->hdr, pad_len(datalen));
646624b9ac1SHarish Chegondi struct hfi1_user_sdma_pkt_q *pq = req->pq;
647624b9ac1SHarish Chegondi
648624b9ac1SHarish Chegondi /*
649624b9ac1SHarish Chegondi * Copy the request header into the tx header
650624b9ac1SHarish Chegondi * because the HW needs a cacheline-aligned
651624b9ac1SHarish Chegondi * address.
652624b9ac1SHarish Chegondi * This copy can be optimized out if the hdr
653624b9ac1SHarish Chegondi * member of user_sdma_request were also
654624b9ac1SHarish Chegondi * cacheline aligned.
655624b9ac1SHarish Chegondi */
656624b9ac1SHarish Chegondi memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
657624b9ac1SHarish Chegondi if (PBC2LRH(pbclen) != lrhlen) {
658624b9ac1SHarish Chegondi pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
659624b9ac1SHarish Chegondi tx->hdr.pbc[0] = cpu_to_le16(pbclen);
660624b9ac1SHarish Chegondi }
661624b9ac1SHarish Chegondi ret = check_header_template(req, &tx->hdr, lrhlen, datalen);
662624b9ac1SHarish Chegondi if (ret)
663624b9ac1SHarish Chegondi return ret;
664624b9ac1SHarish Chegondi ret = sdma_txinit_ahg(&tx->txreq, SDMA_TXREQ_F_AHG_COPY,
665624b9ac1SHarish Chegondi sizeof(tx->hdr) + datalen, req->ahg_idx,
666624b9ac1SHarish Chegondi 0, NULL, 0, user_sdma_txreq_cb);
667624b9ac1SHarish Chegondi if (ret)
668624b9ac1SHarish Chegondi return ret;
669624b9ac1SHarish Chegondi ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq, &tx->hdr, sizeof(tx->hdr));
670624b9ac1SHarish Chegondi if (ret)
671624b9ac1SHarish Chegondi sdma_txclean(pq->dd, &tx->txreq);
672624b9ac1SHarish Chegondi return ret;
673624b9ac1SHarish Chegondi }
674624b9ac1SHarish Chegondi
user_sdma_send_pkts(struct user_sdma_request * req,u16 maxpkts)6753ca633f1SMichael J. Ruhl static int user_sdma_send_pkts(struct user_sdma_request *req, u16 maxpkts)
676f48ad614SDennis Dalessandro {
6773ca633f1SMichael J. Ruhl int ret = 0;
6783ca633f1SMichael J. Ruhl u16 count;
679f48ad614SDennis Dalessandro unsigned npkts = 0;
680f48ad614SDennis Dalessandro struct user_sdma_txreq *tx = NULL;
681f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq = NULL;
682f48ad614SDennis Dalessandro struct user_sdma_iovec *iovec = NULL;
683f48ad614SDennis Dalessandro
684f48ad614SDennis Dalessandro if (!req->pq)
685f48ad614SDennis Dalessandro return -EINVAL;
686f48ad614SDennis Dalessandro
687f48ad614SDennis Dalessandro pq = req->pq;
688f48ad614SDennis Dalessandro
689f48ad614SDennis Dalessandro /* If tx completion has reported an error, we are done. */
690e9c48ebdSSebastian Sanchez if (READ_ONCE(req->has_error))
691f48ad614SDennis Dalessandro return -EFAULT;
692f48ad614SDennis Dalessandro
693f48ad614SDennis Dalessandro /*
694f48ad614SDennis Dalessandro * Check if we might have sent the entire request already
695f48ad614SDennis Dalessandro */
696f48ad614SDennis Dalessandro if (unlikely(req->seqnum == req->info.npkts)) {
697f48ad614SDennis Dalessandro if (!list_empty(&req->txps))
698f48ad614SDennis Dalessandro goto dosend;
699f48ad614SDennis Dalessandro return ret;
700f48ad614SDennis Dalessandro }
701f48ad614SDennis Dalessandro
702f48ad614SDennis Dalessandro if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
703f48ad614SDennis Dalessandro maxpkts = req->info.npkts - req->seqnum;
704f48ad614SDennis Dalessandro
705f48ad614SDennis Dalessandro while (npkts < maxpkts) {
70600cbce5cSPatrick Kelsey u32 datalen = 0;
707f48ad614SDennis Dalessandro
708f48ad614SDennis Dalessandro /*
709f48ad614SDennis Dalessandro * Check whether any of the completions have come back
710f48ad614SDennis Dalessandro * with errors. If so, we are not going to process any
711f48ad614SDennis Dalessandro * more packets from this request.
712f48ad614SDennis Dalessandro */
713e9c48ebdSSebastian Sanchez if (READ_ONCE(req->has_error))
714f48ad614SDennis Dalessandro return -EFAULT;
715f48ad614SDennis Dalessandro
716f48ad614SDennis Dalessandro tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
717f48ad614SDennis Dalessandro if (!tx)
718f48ad614SDennis Dalessandro return -ENOMEM;
719f48ad614SDennis Dalessandro
720f48ad614SDennis Dalessandro tx->flags = 0;
721f48ad614SDennis Dalessandro tx->req = req;
722f48ad614SDennis Dalessandro INIT_LIST_HEAD(&tx->list);
723f48ad614SDennis Dalessandro
724e730139bSJakub Pawlak /*
725e730139bSJakub Pawlak * For the last packet set the ACK request
726e730139bSJakub Pawlak * and disable header suppression.
727e730139bSJakub Pawlak */
728f48ad614SDennis Dalessandro if (req->seqnum == req->info.npkts - 1)
729e730139bSJakub Pawlak tx->flags |= (TXREQ_FLAGS_REQ_ACK |
730e730139bSJakub Pawlak TXREQ_FLAGS_REQ_DISABLE_SH);
731f48ad614SDennis Dalessandro
732f48ad614SDennis Dalessandro /*
733f48ad614SDennis Dalessandro * Calculate the payload size - this is min of the fragment
734f48ad614SDennis Dalessandro * (MTU) size or the remaining bytes in the request but only
735f48ad614SDennis Dalessandro * if we have payload data.
736f48ad614SDennis Dalessandro */
737f48ad614SDennis Dalessandro if (req->data_len) {
738f48ad614SDennis Dalessandro iovec = &req->iovs[req->iov_idx];
7396aa7de05SMark Rutland if (READ_ONCE(iovec->offset) == iovec->iov.iov_len) {
740f48ad614SDennis Dalessandro if (++req->iov_idx == req->data_iovs) {
741f48ad614SDennis Dalessandro ret = -EFAULT;
74294694d18SMichael J. Ruhl goto free_tx;
743f48ad614SDennis Dalessandro }
744f48ad614SDennis Dalessandro iovec = &req->iovs[req->iov_idx];
745f48ad614SDennis Dalessandro WARN_ON(iovec->offset);
746f48ad614SDennis Dalessandro }
747f48ad614SDennis Dalessandro
748f48ad614SDennis Dalessandro datalen = compute_data_length(req, tx);
749e730139bSJakub Pawlak
750e730139bSJakub Pawlak /*
751e730139bSJakub Pawlak * Disable header suppression for the payload <= 8DWS.
752e730139bSJakub Pawlak * If there is an uncorrectable error in the receive
753e730139bSJakub Pawlak * data FIFO when the received payload size is less than
754e730139bSJakub Pawlak * or equal to 8DWS then the RxDmaDataFifoRdUncErr is
755e730139bSJakub Pawlak * not reported.There is set RHF.EccErr if the header
756e730139bSJakub Pawlak * is not suppressed.
757e730139bSJakub Pawlak */
758f48ad614SDennis Dalessandro if (!datalen) {
759f48ad614SDennis Dalessandro SDMA_DBG(req,
760f48ad614SDennis Dalessandro "Request has data but pkt len is 0");
761f48ad614SDennis Dalessandro ret = -EFAULT;
762f48ad614SDennis Dalessandro goto free_tx;
763e730139bSJakub Pawlak } else if (datalen <= 32) {
764e730139bSJakub Pawlak tx->flags |= TXREQ_FLAGS_REQ_DISABLE_SH;
765f48ad614SDennis Dalessandro }
766f48ad614SDennis Dalessandro }
767f48ad614SDennis Dalessandro
768780a4c16SSebastian Sanchez if (req->ahg_idx >= 0) {
769f48ad614SDennis Dalessandro if (!req->seqnum) {
770624b9ac1SHarish Chegondi ret = user_sdma_txadd_ahg(req, tx, datalen);
771e730139bSJakub Pawlak if (ret)
772e730139bSJakub Pawlak goto free_tx;
773f48ad614SDennis Dalessandro } else {
774f48ad614SDennis Dalessandro int changes;
775f48ad614SDennis Dalessandro
776f48ad614SDennis Dalessandro changes = set_txreq_header_ahg(req, tx,
777f48ad614SDennis Dalessandro datalen);
7782bf4b33fSMichael J. Ruhl if (changes < 0) {
7792bf4b33fSMichael J. Ruhl ret = changes;
780f48ad614SDennis Dalessandro goto free_tx;
781f48ad614SDennis Dalessandro }
7822bf4b33fSMichael J. Ruhl }
783f48ad614SDennis Dalessandro } else {
784f48ad614SDennis Dalessandro ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
785f48ad614SDennis Dalessandro datalen, user_sdma_txreq_cb);
786f48ad614SDennis Dalessandro if (ret)
787f48ad614SDennis Dalessandro goto free_tx;
788f48ad614SDennis Dalessandro /*
789f48ad614SDennis Dalessandro * Modify the header for this packet. This only needs
790f48ad614SDennis Dalessandro * to be done if we are not going to use AHG. Otherwise,
791f48ad614SDennis Dalessandro * the HW will do it based on the changes we gave it
792f48ad614SDennis Dalessandro * during sdma_txinit_ahg().
793f48ad614SDennis Dalessandro */
794f48ad614SDennis Dalessandro ret = set_txreq_header(req, tx, datalen);
795f48ad614SDennis Dalessandro if (ret)
796f48ad614SDennis Dalessandro goto free_txreq;
797f48ad614SDennis Dalessandro }
798f48ad614SDennis Dalessandro
799f48ad614SDennis Dalessandro req->koffset += datalen;
800f48ad614SDennis Dalessandro if (req_opcode(req->info.ctrl) == EXPECTED)
801f48ad614SDennis Dalessandro req->tidoffset += datalen;
80200cbce5cSPatrick Kelsey req->sent += datalen;
80300cbce5cSPatrick Kelsey while (datalen) {
804*d2c02346SBrendan Cunningham ret = hfi1_add_pages_to_sdma_packet(req, tx, iovec,
80500cbce5cSPatrick Kelsey &datalen);
80600cbce5cSPatrick Kelsey if (ret)
80700cbce5cSPatrick Kelsey goto free_txreq;
80800cbce5cSPatrick Kelsey iovec = &req->iovs[req->iov_idx];
80900cbce5cSPatrick Kelsey }
810f48ad614SDennis Dalessandro list_add_tail(&tx->txreq.list, &req->txps);
811f48ad614SDennis Dalessandro /*
812f48ad614SDennis Dalessandro * It is important to increment this here as it is used to
813f48ad614SDennis Dalessandro * generate the BTH.PSN and, therefore, can't be bulk-updated
814f48ad614SDennis Dalessandro * outside of the loop.
815f48ad614SDennis Dalessandro */
816f48ad614SDennis Dalessandro tx->seqnum = req->seqnum++;
817f48ad614SDennis Dalessandro npkts++;
818f48ad614SDennis Dalessandro }
819f48ad614SDennis Dalessandro dosend:
8205da0fc9dSDennis Dalessandro ret = sdma_send_txlist(req->sde,
8215da0fc9dSDennis Dalessandro iowait_get_ib_work(&pq->busy),
8225da0fc9dSDennis Dalessandro &req->txps, &count);
8230b115ef1SHarish Chegondi req->seqsubmitted += count;
8240b115ef1SHarish Chegondi if (req->seqsubmitted == req->info.npkts) {
825f48ad614SDennis Dalessandro /*
826f48ad614SDennis Dalessandro * The txreq has already been submitted to the HW queue
827f48ad614SDennis Dalessandro * so we can free the AHG entry now. Corruption will not
828f48ad614SDennis Dalessandro * happen due to the sequential manner in which
829f48ad614SDennis Dalessandro * descriptors are processed.
830f48ad614SDennis Dalessandro */
831780a4c16SSebastian Sanchez if (req->ahg_idx >= 0)
832f48ad614SDennis Dalessandro sdma_ahg_free(req->sde, req->ahg_idx);
833f48ad614SDennis Dalessandro }
834f48ad614SDennis Dalessandro return ret;
835f48ad614SDennis Dalessandro
836f48ad614SDennis Dalessandro free_txreq:
837f48ad614SDennis Dalessandro sdma_txclean(pq->dd, &tx->txreq);
838f48ad614SDennis Dalessandro free_tx:
839f48ad614SDennis Dalessandro kmem_cache_free(pq->txreq_cache, tx);
840f48ad614SDennis Dalessandro return ret;
841f48ad614SDennis Dalessandro }
842f48ad614SDennis Dalessandro
check_header_template(struct user_sdma_request * req,struct hfi1_pkt_header * hdr,u32 lrhlen,u32 datalen)843f48ad614SDennis Dalessandro static int check_header_template(struct user_sdma_request *req,
844f48ad614SDennis Dalessandro struct hfi1_pkt_header *hdr, u32 lrhlen,
845f48ad614SDennis Dalessandro u32 datalen)
846f48ad614SDennis Dalessandro {
847f48ad614SDennis Dalessandro /*
848f48ad614SDennis Dalessandro * Perform safety checks for any type of packet:
849f48ad614SDennis Dalessandro * - transfer size is multiple of 64bytes
850f48ad614SDennis Dalessandro * - packet length is multiple of 4 bytes
851f48ad614SDennis Dalessandro * - packet length is not larger than MTU size
852f48ad614SDennis Dalessandro *
853f48ad614SDennis Dalessandro * These checks are only done for the first packet of the
854f48ad614SDennis Dalessandro * transfer since the header is "given" to us by user space.
855f48ad614SDennis Dalessandro * For the remainder of the packets we compute the values.
856f48ad614SDennis Dalessandro */
857c4929802SIra Weiny if (req->info.fragsize % PIO_BLOCK_SIZE || lrhlen & 0x3 ||
858f48ad614SDennis Dalessandro lrhlen > get_lrh_len(*hdr, req->info.fragsize))
859f48ad614SDennis Dalessandro return -EINVAL;
860f48ad614SDennis Dalessandro
861f48ad614SDennis Dalessandro if (req_opcode(req->info.ctrl) == EXPECTED) {
862f48ad614SDennis Dalessandro /*
863f48ad614SDennis Dalessandro * The header is checked only on the first packet. Furthermore,
864f48ad614SDennis Dalessandro * we ensure that at least one TID entry is copied when the
865f48ad614SDennis Dalessandro * request is submitted. Therefore, we don't have to verify that
866f48ad614SDennis Dalessandro * tididx points to something sane.
867f48ad614SDennis Dalessandro */
868f48ad614SDennis Dalessandro u32 tidval = req->tids[req->tididx],
869f48ad614SDennis Dalessandro tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
870f48ad614SDennis Dalessandro tididx = EXP_TID_GET(tidval, IDX),
871f48ad614SDennis Dalessandro tidctrl = EXP_TID_GET(tidval, CTRL),
872f48ad614SDennis Dalessandro tidoff;
873f48ad614SDennis Dalessandro __le32 kval = hdr->kdeth.ver_tid_offset;
874f48ad614SDennis Dalessandro
875f48ad614SDennis Dalessandro tidoff = KDETH_GET(kval, OFFSET) *
876f48ad614SDennis Dalessandro (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
877f48ad614SDennis Dalessandro KDETH_OM_LARGE : KDETH_OM_SMALL);
878f48ad614SDennis Dalessandro /*
879f48ad614SDennis Dalessandro * Expected receive packets have the following
880f48ad614SDennis Dalessandro * additional checks:
881f48ad614SDennis Dalessandro * - offset is not larger than the TID size
882f48ad614SDennis Dalessandro * - TIDCtrl values match between header and TID array
883f48ad614SDennis Dalessandro * - TID indexes match between header and TID array
884f48ad614SDennis Dalessandro */
885f48ad614SDennis Dalessandro if ((tidoff + datalen > tidlen) ||
886f48ad614SDennis Dalessandro KDETH_GET(kval, TIDCTRL) != tidctrl ||
887f48ad614SDennis Dalessandro KDETH_GET(kval, TID) != tididx)
888f48ad614SDennis Dalessandro return -EINVAL;
889f48ad614SDennis Dalessandro }
890f48ad614SDennis Dalessandro return 0;
891f48ad614SDennis Dalessandro }
892f48ad614SDennis Dalessandro
893f48ad614SDennis Dalessandro /*
894f48ad614SDennis Dalessandro * Correctly set the BTH.PSN field based on type of
895f48ad614SDennis Dalessandro * transfer - eager packets can just increment the PSN but
896f48ad614SDennis Dalessandro * expected packets encode generation and sequence in the
897f48ad614SDennis Dalessandro * BTH.PSN field so just incrementing will result in errors.
898f48ad614SDennis Dalessandro */
set_pkt_bth_psn(__be32 bthpsn,u8 expct,u32 frags)899f48ad614SDennis Dalessandro static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
900f48ad614SDennis Dalessandro {
901f48ad614SDennis Dalessandro u32 val = be32_to_cpu(bthpsn),
902f48ad614SDennis Dalessandro mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
903f48ad614SDennis Dalessandro 0xffffffull),
904f48ad614SDennis Dalessandro psn = val & mask;
905f48ad614SDennis Dalessandro if (expct)
9063c6cb20aSKaike Wan psn = (psn & ~HFI1_KDETH_BTH_SEQ_MASK) |
9073c6cb20aSKaike Wan ((psn + frags) & HFI1_KDETH_BTH_SEQ_MASK);
908f48ad614SDennis Dalessandro else
909f48ad614SDennis Dalessandro psn = psn + frags;
910f48ad614SDennis Dalessandro return psn & mask;
911f48ad614SDennis Dalessandro }
912f48ad614SDennis Dalessandro
set_txreq_header(struct user_sdma_request * req,struct user_sdma_txreq * tx,u32 datalen)913f48ad614SDennis Dalessandro static int set_txreq_header(struct user_sdma_request *req,
914f48ad614SDennis Dalessandro struct user_sdma_txreq *tx, u32 datalen)
915f48ad614SDennis Dalessandro {
916f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq = req->pq;
917f48ad614SDennis Dalessandro struct hfi1_pkt_header *hdr = &tx->hdr;
918ade6f8afSSebastian Sanchez u8 omfactor; /* KDETH.OM */
919f48ad614SDennis Dalessandro u16 pbclen;
920f48ad614SDennis Dalessandro int ret;
921c4929802SIra Weiny u32 tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
922f48ad614SDennis Dalessandro
923f48ad614SDennis Dalessandro /* Copy the header template to the request before modification */
924f48ad614SDennis Dalessandro memcpy(hdr, &req->hdr, sizeof(*hdr));
925f48ad614SDennis Dalessandro
926f48ad614SDennis Dalessandro /*
927f48ad614SDennis Dalessandro * Check if the PBC and LRH length are mismatched. If so
928f48ad614SDennis Dalessandro * adjust both in the header.
929f48ad614SDennis Dalessandro */
930f48ad614SDennis Dalessandro pbclen = le16_to_cpu(hdr->pbc[0]);
931f48ad614SDennis Dalessandro if (PBC2LRH(pbclen) != lrhlen) {
932f48ad614SDennis Dalessandro pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
933f48ad614SDennis Dalessandro hdr->pbc[0] = cpu_to_le16(pbclen);
934f48ad614SDennis Dalessandro hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
935f48ad614SDennis Dalessandro /*
936f48ad614SDennis Dalessandro * Third packet
937f48ad614SDennis Dalessandro * This is the first packet in the sequence that has
938f48ad614SDennis Dalessandro * a "static" size that can be used for the rest of
939f48ad614SDennis Dalessandro * the packets (besides the last one).
940f48ad614SDennis Dalessandro */
941f48ad614SDennis Dalessandro if (unlikely(req->seqnum == 2)) {
942f48ad614SDennis Dalessandro /*
943f48ad614SDennis Dalessandro * From this point on the lengths in both the
944f48ad614SDennis Dalessandro * PBC and LRH are the same until the last
945f48ad614SDennis Dalessandro * packet.
946f48ad614SDennis Dalessandro * Adjust the template so we don't have to update
947f48ad614SDennis Dalessandro * every packet
948f48ad614SDennis Dalessandro */
949f48ad614SDennis Dalessandro req->hdr.pbc[0] = hdr->pbc[0];
950f48ad614SDennis Dalessandro req->hdr.lrh[2] = hdr->lrh[2];
951f48ad614SDennis Dalessandro }
952f48ad614SDennis Dalessandro }
953f48ad614SDennis Dalessandro /*
954f48ad614SDennis Dalessandro * We only have to modify the header if this is not the
955f48ad614SDennis Dalessandro * first packet in the request. Otherwise, we use the
956f48ad614SDennis Dalessandro * header given to us.
957f48ad614SDennis Dalessandro */
958f48ad614SDennis Dalessandro if (unlikely(!req->seqnum)) {
959f48ad614SDennis Dalessandro ret = check_header_template(req, hdr, lrhlen, datalen);
960f48ad614SDennis Dalessandro if (ret)
961f48ad614SDennis Dalessandro return ret;
962f48ad614SDennis Dalessandro goto done;
963f48ad614SDennis Dalessandro }
964f48ad614SDennis Dalessandro
965f48ad614SDennis Dalessandro hdr->bth[2] = cpu_to_be32(
966f48ad614SDennis Dalessandro set_pkt_bth_psn(hdr->bth[2],
967f48ad614SDennis Dalessandro (req_opcode(req->info.ctrl) == EXPECTED),
968f48ad614SDennis Dalessandro req->seqnum));
969f48ad614SDennis Dalessandro
970f48ad614SDennis Dalessandro /* Set ACK request on last packet */
971e730139bSJakub Pawlak if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
972f48ad614SDennis Dalessandro hdr->bth[2] |= cpu_to_be32(1UL << 31);
973f48ad614SDennis Dalessandro
974f48ad614SDennis Dalessandro /* Set the new offset */
975f48ad614SDennis Dalessandro hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
976f48ad614SDennis Dalessandro /* Expected packets have to fill in the new TID information */
977f48ad614SDennis Dalessandro if (req_opcode(req->info.ctrl) == EXPECTED) {
978f48ad614SDennis Dalessandro tidval = req->tids[req->tididx];
979f48ad614SDennis Dalessandro /*
980f48ad614SDennis Dalessandro * If the offset puts us at the end of the current TID,
981f48ad614SDennis Dalessandro * advance everything.
982f48ad614SDennis Dalessandro */
983f48ad614SDennis Dalessandro if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
984f48ad614SDennis Dalessandro PAGE_SIZE)) {
985f48ad614SDennis Dalessandro req->tidoffset = 0;
986f48ad614SDennis Dalessandro /*
987f48ad614SDennis Dalessandro * Since we don't copy all the TIDs, all at once,
988f48ad614SDennis Dalessandro * we have to check again.
989f48ad614SDennis Dalessandro */
990f48ad614SDennis Dalessandro if (++req->tididx > req->n_tids - 1 ||
991f48ad614SDennis Dalessandro !req->tids[req->tididx]) {
992f48ad614SDennis Dalessandro return -EINVAL;
993f48ad614SDennis Dalessandro }
994f48ad614SDennis Dalessandro tidval = req->tids[req->tididx];
995f48ad614SDennis Dalessandro }
996ade6f8afSSebastian Sanchez omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
997ade6f8afSSebastian Sanchez KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE_SHIFT :
998ade6f8afSSebastian Sanchez KDETH_OM_SMALL_SHIFT;
999f48ad614SDennis Dalessandro /* Set KDETH.TIDCtrl based on value for this TID. */
1000f48ad614SDennis Dalessandro KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
1001f48ad614SDennis Dalessandro EXP_TID_GET(tidval, CTRL));
1002f48ad614SDennis Dalessandro /* Set KDETH.TID based on value for this TID */
1003f48ad614SDennis Dalessandro KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
1004f48ad614SDennis Dalessandro EXP_TID_GET(tidval, IDX));
1005e730139bSJakub Pawlak /* Clear KDETH.SH when DISABLE_SH flag is set */
1006e730139bSJakub Pawlak if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH))
1007f48ad614SDennis Dalessandro KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
1008f48ad614SDennis Dalessandro /*
1009f48ad614SDennis Dalessandro * Set the KDETH.OFFSET and KDETH.OM based on size of
1010f48ad614SDennis Dalessandro * transfer.
1011f48ad614SDennis Dalessandro */
101234ab4de7SMichael J. Ruhl trace_hfi1_sdma_user_tid_info(
101334ab4de7SMichael J. Ruhl pq->dd, pq->ctxt, pq->subctxt, req->info.comp_idx,
1014ade6f8afSSebastian Sanchez req->tidoffset, req->tidoffset >> omfactor,
1015ade6f8afSSebastian Sanchez omfactor != KDETH_OM_SMALL_SHIFT);
1016f48ad614SDennis Dalessandro KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1017ade6f8afSSebastian Sanchez req->tidoffset >> omfactor);
1018f48ad614SDennis Dalessandro KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
1019ade6f8afSSebastian Sanchez omfactor != KDETH_OM_SMALL_SHIFT);
1020f48ad614SDennis Dalessandro }
1021f48ad614SDennis Dalessandro done:
1022f48ad614SDennis Dalessandro trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
1023f48ad614SDennis Dalessandro req->info.comp_idx, hdr, tidval);
1024f48ad614SDennis Dalessandro return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
1025f48ad614SDennis Dalessandro }
1026f48ad614SDennis Dalessandro
set_txreq_header_ahg(struct user_sdma_request * req,struct user_sdma_txreq * tx,u32 datalen)1027f48ad614SDennis Dalessandro static int set_txreq_header_ahg(struct user_sdma_request *req,
1028e3304b7cSSebastian Sanchez struct user_sdma_txreq *tx, u32 datalen)
1029f48ad614SDennis Dalessandro {
1030e3304b7cSSebastian Sanchez u32 ahg[AHG_KDETH_ARRAY_SIZE];
1031d34ed562SHarish Chegondi int idx = 0;
1032ade6f8afSSebastian Sanchez u8 omfactor; /* KDETH.OM */
1033f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq = req->pq;
1034f48ad614SDennis Dalessandro struct hfi1_pkt_header *hdr = &req->hdr;
1035f48ad614SDennis Dalessandro u16 pbclen = le16_to_cpu(hdr->pbc[0]);
1036e3304b7cSSebastian Sanchez u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
1037d34ed562SHarish Chegondi size_t array_size = ARRAY_SIZE(ahg);
1038f48ad614SDennis Dalessandro
1039f48ad614SDennis Dalessandro if (PBC2LRH(pbclen) != lrhlen) {
1040f48ad614SDennis Dalessandro /* PBC.PbcLengthDWs */
1041d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size, 0, 0, 12,
1042d34ed562SHarish Chegondi (__force u16)cpu_to_le16(LRH2PBC(lrhlen)));
1043d34ed562SHarish Chegondi if (idx < 0)
1044d34ed562SHarish Chegondi return idx;
1045f48ad614SDennis Dalessandro /* LRH.PktLen (we need the full 16 bits due to byte swap) */
1046d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size, 3, 0, 16,
1047d34ed562SHarish Chegondi (__force u16)cpu_to_be16(lrhlen >> 2));
1048d34ed562SHarish Chegondi if (idx < 0)
1049d34ed562SHarish Chegondi return idx;
1050f48ad614SDennis Dalessandro }
1051f48ad614SDennis Dalessandro
1052f48ad614SDennis Dalessandro /*
1053f48ad614SDennis Dalessandro * Do the common updates
1054f48ad614SDennis Dalessandro */
1055f48ad614SDennis Dalessandro /* BTH.PSN and BTH.A */
1056f48ad614SDennis Dalessandro val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
1057f48ad614SDennis Dalessandro (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
1058e730139bSJakub Pawlak if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1059f48ad614SDennis Dalessandro val32 |= 1UL << 31;
1060d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size, 6, 0, 16,
1061d34ed562SHarish Chegondi (__force u16)cpu_to_be16(val32 >> 16));
1062d34ed562SHarish Chegondi if (idx < 0)
1063d34ed562SHarish Chegondi return idx;
1064d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size, 6, 16, 16,
1065d34ed562SHarish Chegondi (__force u16)cpu_to_be16(val32 & 0xffff));
1066d34ed562SHarish Chegondi if (idx < 0)
1067d34ed562SHarish Chegondi return idx;
1068f48ad614SDennis Dalessandro /* KDETH.Offset */
1069d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size, 15, 0, 16,
1070d34ed562SHarish Chegondi (__force u16)cpu_to_le16(req->koffset & 0xffff));
1071d34ed562SHarish Chegondi if (idx < 0)
1072d34ed562SHarish Chegondi return idx;
1073d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size, 15, 16, 16,
1074d34ed562SHarish Chegondi (__force u16)cpu_to_le16(req->koffset >> 16));
1075d34ed562SHarish Chegondi if (idx < 0)
1076d34ed562SHarish Chegondi return idx;
1077f48ad614SDennis Dalessandro if (req_opcode(req->info.ctrl) == EXPECTED) {
1078f48ad614SDennis Dalessandro __le16 val;
1079f48ad614SDennis Dalessandro
1080f48ad614SDennis Dalessandro tidval = req->tids[req->tididx];
1081f48ad614SDennis Dalessandro
1082f48ad614SDennis Dalessandro /*
1083f48ad614SDennis Dalessandro * If the offset puts us at the end of the current TID,
1084f48ad614SDennis Dalessandro * advance everything.
1085f48ad614SDennis Dalessandro */
1086f48ad614SDennis Dalessandro if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1087f48ad614SDennis Dalessandro PAGE_SIZE)) {
1088f48ad614SDennis Dalessandro req->tidoffset = 0;
1089f48ad614SDennis Dalessandro /*
1090f48ad614SDennis Dalessandro * Since we don't copy all the TIDs, all at once,
1091f48ad614SDennis Dalessandro * we have to check again.
1092f48ad614SDennis Dalessandro */
1093f48ad614SDennis Dalessandro if (++req->tididx > req->n_tids - 1 ||
1094e3304b7cSSebastian Sanchez !req->tids[req->tididx])
1095f48ad614SDennis Dalessandro return -EINVAL;
1096f48ad614SDennis Dalessandro tidval = req->tids[req->tididx];
1097f48ad614SDennis Dalessandro }
1098ade6f8afSSebastian Sanchez omfactor = ((EXP_TID_GET(tidval, LEN) *
1099f48ad614SDennis Dalessandro PAGE_SIZE) >=
1100ade6f8afSSebastian Sanchez KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE_SHIFT :
1101ade6f8afSSebastian Sanchez KDETH_OM_SMALL_SHIFT;
1102f48ad614SDennis Dalessandro /* KDETH.OM and KDETH.OFFSET (TID) */
1103d34ed562SHarish Chegondi idx = ahg_header_set(
1104d34ed562SHarish Chegondi ahg, idx, array_size, 7, 0, 16,
1105ade6f8afSSebastian Sanchez ((!!(omfactor - KDETH_OM_SMALL_SHIFT)) << 15 |
1106ade6f8afSSebastian Sanchez ((req->tidoffset >> omfactor)
1107ade6f8afSSebastian Sanchez & 0x7fff)));
1108d34ed562SHarish Chegondi if (idx < 0)
1109d34ed562SHarish Chegondi return idx;
1110e730139bSJakub Pawlak /* KDETH.TIDCtrl, KDETH.TID, KDETH.Intr, KDETH.SH */
1111f48ad614SDennis Dalessandro val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
1112f48ad614SDennis Dalessandro (EXP_TID_GET(tidval, IDX) & 0x3ff));
1113e730139bSJakub Pawlak
1114e730139bSJakub Pawlak if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH)) {
1115e730139bSJakub Pawlak val |= cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1116af534939SJubin John INTR) <<
1117e730139bSJakub Pawlak AHG_KDETH_INTR_SHIFT));
1118f48ad614SDennis Dalessandro } else {
1119e730139bSJakub Pawlak val |= KDETH_GET(hdr->kdeth.ver_tid_offset, SH) ?
1120e730139bSJakub Pawlak cpu_to_le16(0x1 << AHG_KDETH_SH_SHIFT) :
1121e730139bSJakub Pawlak cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1122e730139bSJakub Pawlak INTR) <<
1123e730139bSJakub Pawlak AHG_KDETH_INTR_SHIFT));
1124f48ad614SDennis Dalessandro }
1125e730139bSJakub Pawlak
1126d34ed562SHarish Chegondi idx = ahg_header_set(ahg, idx, array_size,
1127d34ed562SHarish Chegondi 7, 16, 14, (__force u16)val);
1128d34ed562SHarish Chegondi if (idx < 0)
1129d34ed562SHarish Chegondi return idx;
1130f48ad614SDennis Dalessandro }
1131f48ad614SDennis Dalessandro
1132f48ad614SDennis Dalessandro trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
1133f48ad614SDennis Dalessandro req->info.comp_idx, req->sde->this_idx,
1134d34ed562SHarish Chegondi req->ahg_idx, ahg, idx, tidval);
1135e3304b7cSSebastian Sanchez sdma_txinit_ahg(&tx->txreq,
1136e3304b7cSSebastian Sanchez SDMA_TXREQ_F_USE_AHG,
1137d34ed562SHarish Chegondi datalen, req->ahg_idx, idx,
1138e3304b7cSSebastian Sanchez ahg, sizeof(req->hdr),
1139e3304b7cSSebastian Sanchez user_sdma_txreq_cb);
1140e3304b7cSSebastian Sanchez
1141d34ed562SHarish Chegondi return idx;
1142f48ad614SDennis Dalessandro }
1143f48ad614SDennis Dalessandro
1144a0e0cb82SMichael J. Ruhl /**
1145a0e0cb82SMichael J. Ruhl * user_sdma_txreq_cb() - SDMA tx request completion callback.
1146a0e0cb82SMichael J. Ruhl * @txreq: valid sdma tx request
1147a0e0cb82SMichael J. Ruhl * @status: success/failure of request
1148a0e0cb82SMichael J. Ruhl *
1149a0e0cb82SMichael J. Ruhl * Called when the SDMA progress state machine gets notification that
1150a0e0cb82SMichael J. Ruhl * the SDMA descriptors for this tx request have been processed by the
1151a0e0cb82SMichael J. Ruhl * DMA engine. Called in interrupt context.
1152a0e0cb82SMichael J. Ruhl * Only do work on completed sequences.
1153f48ad614SDennis Dalessandro */
user_sdma_txreq_cb(struct sdma_txreq * txreq,int status)1154f48ad614SDennis Dalessandro static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
1155f48ad614SDennis Dalessandro {
1156f48ad614SDennis Dalessandro struct user_sdma_txreq *tx =
1157f48ad614SDennis Dalessandro container_of(txreq, struct user_sdma_txreq, txreq);
1158f48ad614SDennis Dalessandro struct user_sdma_request *req;
1159f48ad614SDennis Dalessandro struct hfi1_user_sdma_pkt_q *pq;
1160f48ad614SDennis Dalessandro struct hfi1_user_sdma_comp_q *cq;
1161a0e0cb82SMichael J. Ruhl enum hfi1_sdma_comp_state state = COMPLETE;
1162f48ad614SDennis Dalessandro
1163f48ad614SDennis Dalessandro if (!tx->req)
1164f48ad614SDennis Dalessandro return;
1165f48ad614SDennis Dalessandro
1166f48ad614SDennis Dalessandro req = tx->req;
1167f48ad614SDennis Dalessandro pq = req->pq;
1168f48ad614SDennis Dalessandro cq = req->cq;
1169f48ad614SDennis Dalessandro
1170f48ad614SDennis Dalessandro if (status != SDMA_TXREQ_S_OK) {
1171f48ad614SDennis Dalessandro SDMA_DBG(req, "SDMA completion with error %d",
1172f48ad614SDennis Dalessandro status);
1173e9c48ebdSSebastian Sanchez WRITE_ONCE(req->has_error, 1);
1174a0e0cb82SMichael J. Ruhl state = ERROR;
1175f48ad614SDennis Dalessandro }
1176f48ad614SDennis Dalessandro
1177f48ad614SDennis Dalessandro req->seqcomp = tx->seqnum;
1178f48ad614SDennis Dalessandro kmem_cache_free(pq->txreq_cache, tx);
1179f48ad614SDennis Dalessandro
1180a0e0cb82SMichael J. Ruhl /* sequence isn't complete? We are done */
1181a0e0cb82SMichael J. Ruhl if (req->seqcomp != req->info.npkts - 1)
1182a0e0cb82SMichael J. Ruhl return;
1183a0e0cb82SMichael J. Ruhl
118400cbce5cSPatrick Kelsey user_sdma_free_request(req);
1185a0e0cb82SMichael J. Ruhl set_comp_state(pq, cq, req->info.comp_idx, state, status);
1186f48ad614SDennis Dalessandro pq_update(pq);
1187f48ad614SDennis Dalessandro }
1188f48ad614SDennis Dalessandro
pq_update(struct hfi1_user_sdma_pkt_q * pq)1189f48ad614SDennis Dalessandro static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
1190f48ad614SDennis Dalessandro {
119128a9a9e8SMichael J. Ruhl if (atomic_dec_and_test(&pq->n_reqs))
1192f48ad614SDennis Dalessandro wake_up(&pq->wait);
1193f48ad614SDennis Dalessandro }
1194f48ad614SDennis Dalessandro
user_sdma_free_request(struct user_sdma_request * req)119500cbce5cSPatrick Kelsey static void user_sdma_free_request(struct user_sdma_request *req)
1196f48ad614SDennis Dalessandro {
1197f48ad614SDennis Dalessandro if (!list_empty(&req->txps)) {
1198f48ad614SDennis Dalessandro struct sdma_txreq *t, *p;
1199f48ad614SDennis Dalessandro
1200f48ad614SDennis Dalessandro list_for_each_entry_safe(t, p, &req->txps, list) {
1201f48ad614SDennis Dalessandro struct user_sdma_txreq *tx =
1202f48ad614SDennis Dalessandro container_of(t, struct user_sdma_txreq, txreq);
1203f48ad614SDennis Dalessandro list_del_init(&t->list);
1204f48ad614SDennis Dalessandro sdma_txclean(req->pq->dd, t);
1205f48ad614SDennis Dalessandro kmem_cache_free(req->pq->txreq_cache, tx);
1206f48ad614SDennis Dalessandro }
1207f48ad614SDennis Dalessandro }
1208f48ad614SDennis Dalessandro
1209f48ad614SDennis Dalessandro kfree(req->tids);
12107b3256e3SDean Luick clear_bit(req->info.comp_idx, req->pq->req_in_use);
1211f48ad614SDennis Dalessandro }
1212f48ad614SDennis Dalessandro
set_comp_state(struct hfi1_user_sdma_pkt_q * pq,struct hfi1_user_sdma_comp_q * cq,u16 idx,enum hfi1_sdma_comp_state state,int ret)1213f48ad614SDennis Dalessandro static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
1214f48ad614SDennis Dalessandro struct hfi1_user_sdma_comp_q *cq,
1215f48ad614SDennis Dalessandro u16 idx, enum hfi1_sdma_comp_state state,
1216f48ad614SDennis Dalessandro int ret)
1217f48ad614SDennis Dalessandro {
1218f48ad614SDennis Dalessandro if (state == ERROR)
1219f48ad614SDennis Dalessandro cq->comps[idx].errcode = -ret;
12200519c520SMichael J. Ruhl smp_wmb(); /* make sure errcode is visible first */
12210519c520SMichael J. Ruhl cq->comps[idx].status = state;
1222f48ad614SDennis Dalessandro trace_hfi1_sdma_user_completion(pq->dd, pq->ctxt, pq->subctxt,
1223f48ad614SDennis Dalessandro idx, state, ret);
1224f48ad614SDennis Dalessandro }
1225