xref: /openbmc/linux/drivers/infiniband/core/cma_priv.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1a3b641afSSteve Wise /*
2a3b641afSSteve Wise  * Copyright (c) 2005 Voltaire Inc.  All rights reserved.
3a3b641afSSteve Wise  * Copyright (c) 2002-2005, Network Appliance, Inc. All rights reserved.
4a3b641afSSteve Wise  * Copyright (c) 1999-2005, Mellanox Technologies, Inc. All rights reserved.
5a3b641afSSteve Wise  * Copyright (c) 2005-2006 Intel Corporation.  All rights reserved.
6a3b641afSSteve Wise  *
7a3b641afSSteve Wise  * This software is available to you under a choice of one of two
8a3b641afSSteve Wise  * licenses.  You may choose to be licensed under the terms of the GNU
9a3b641afSSteve Wise  * General Public License (GPL) Version 2, available from the file
10a3b641afSSteve Wise  * COPYING in the main directory of this source tree, or the
11a3b641afSSteve Wise  * OpenIB.org BSD license below:
12a3b641afSSteve Wise  *
13a3b641afSSteve Wise  *     Redistribution and use in source and binary forms, with or
14a3b641afSSteve Wise  *     without modification, are permitted provided that the following
15a3b641afSSteve Wise  *     conditions are met:
16a3b641afSSteve Wise  *
17a3b641afSSteve Wise  *      - Redistributions of source code must retain the above
18a3b641afSSteve Wise  *        copyright notice, this list of conditions and the following
19a3b641afSSteve Wise  *        disclaimer.
20a3b641afSSteve Wise  *
21a3b641afSSteve Wise  *      - Redistributions in binary form must reproduce the above
22a3b641afSSteve Wise  *        copyright notice, this list of conditions and the following
23a3b641afSSteve Wise  *        disclaimer in the documentation and/or other materials
24a3b641afSSteve Wise  *        provided with the distribution.
25a3b641afSSteve Wise  *
26a3b641afSSteve Wise  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27a3b641afSSteve Wise  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28a3b641afSSteve Wise  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29a3b641afSSteve Wise  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30a3b641afSSteve Wise  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31a3b641afSSteve Wise  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32a3b641afSSteve Wise  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33a3b641afSSteve Wise  * SOFTWARE.
34a3b641afSSteve Wise  */
35a3b641afSSteve Wise 
36a3b641afSSteve Wise #ifndef _CMA_PRIV_H
37a3b641afSSteve Wise #define _CMA_PRIV_H
38a3b641afSSteve Wise 
39218b9e3eSParav Pandit enum rdma_cm_state {
40218b9e3eSParav Pandit 	RDMA_CM_IDLE,
41218b9e3eSParav Pandit 	RDMA_CM_ADDR_QUERY,
42218b9e3eSParav Pandit 	RDMA_CM_ADDR_RESOLVED,
43218b9e3eSParav Pandit 	RDMA_CM_ROUTE_QUERY,
44218b9e3eSParav Pandit 	RDMA_CM_ROUTE_RESOLVED,
45218b9e3eSParav Pandit 	RDMA_CM_CONNECT,
46218b9e3eSParav Pandit 	RDMA_CM_DISCONNECT,
47218b9e3eSParav Pandit 	RDMA_CM_ADDR_BOUND,
48218b9e3eSParav Pandit 	RDMA_CM_LISTEN,
49218b9e3eSParav Pandit 	RDMA_CM_DEVICE_REMOVAL,
50218b9e3eSParav Pandit 	RDMA_CM_DESTROYING
51218b9e3eSParav Pandit };
52218b9e3eSParav Pandit 
53a3b641afSSteve Wise struct rdma_id_private {
54a3b641afSSteve Wise 	struct rdma_cm_id	id;
55a3b641afSSteve Wise 
56a3b641afSSteve Wise 	struct rdma_bind_list	*bind_list;
57a3b641afSSteve Wise 	struct hlist_node	node;
5899cfddb8SJason Gunthorpe 	union {
5999cfddb8SJason Gunthorpe 		struct list_head device_item; /* On cma_device->id_list */
6099cfddb8SJason Gunthorpe 		struct list_head listen_any_item; /* On listen_any_list */
6199cfddb8SJason Gunthorpe 	};
6299cfddb8SJason Gunthorpe 	union {
6399cfddb8SJason Gunthorpe 		/* On rdma_id_private->listen_list */
6499cfddb8SJason Gunthorpe 		struct list_head listen_item;
6599cfddb8SJason Gunthorpe 		struct list_head listen_list;
6699cfddb8SJason Gunthorpe 	};
67*fc008bdbSPatrisious Haddad 	struct list_head        id_list_entry;
68a3b641afSSteve Wise 	struct cma_device	*cma_dev;
69a3b641afSSteve Wise 	struct list_head	mc_list;
70a3b641afSSteve Wise 
71a3b641afSSteve Wise 	int			internal_id;
72a3b641afSSteve Wise 	enum rdma_cm_state	state;
73a3b641afSSteve Wise 	spinlock_t		lock;
74a3b641afSSteve Wise 	struct mutex		qp_mutex;
75a3b641afSSteve Wise 
76a3b641afSSteve Wise 	struct completion	comp;
7743fb5892SParav Pandit 	refcount_t refcount;
78a3b641afSSteve Wise 	struct mutex		handler_mutex;
79a3b641afSSteve Wise 
80a3b641afSSteve Wise 	int			backlog;
81a3b641afSSteve Wise 	int			timeout_ms;
82a3b641afSSteve Wise 	struct ib_sa_query	*query;
83a3b641afSSteve Wise 	int			query_id;
84a3b641afSSteve Wise 	union {
85a3b641afSSteve Wise 		struct ib_cm_id	*ib;
86a3b641afSSteve Wise 		struct iw_cm_id	*iw;
87a3b641afSSteve Wise 	} cm_id;
88a3b641afSSteve Wise 
89a3b641afSSteve Wise 	u32			seq_num;
90a3b641afSSteve Wise 	u32			qkey;
91a3b641afSSteve Wise 	u32			qp_num;
92a3b641afSSteve Wise 	u32			options;
93a3b641afSSteve Wise 	u8			srq;
94a3b641afSSteve Wise 	u8			tos;
952c1619edSDanit Goldberg 	u8			tos_set:1;
962c1619edSDanit Goldberg 	u8                      timeout_set:1;
973aeffc46SHåkon Bugge 	u8			min_rnr_timer_set:1;
98a3b641afSSteve Wise 	u8			reuseaddr;
99a3b641afSSteve Wise 	u8			afonly;
1002c1619edSDanit Goldberg 	u8			timeout;
1013aeffc46SHåkon Bugge 	u8			min_rnr_timer;
102305d568bSJason Gunthorpe 	u8 used_resolve_ip;
103a3b641afSSteve Wise 	enum ib_gid_type	gid_type;
10400313983SSteve Wise 
10500313983SSteve Wise 	/*
10600313983SSteve Wise 	 * Internal to RDMA/core, don't use in the drivers
10700313983SSteve Wise 	 */
10800313983SSteve Wise 	struct rdma_restrack_entry     res;
10934e2ab57SLeon Romanovsky 	struct rdma_ucm_ece ece;
110a3b641afSSteve Wise };
111eeb8df87SParav Pandit 
112eeb8df87SParav Pandit #if IS_ENABLED(CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS)
113eeb8df87SParav Pandit int cma_configfs_init(void);
114eeb8df87SParav Pandit void cma_configfs_exit(void);
115eeb8df87SParav Pandit #else
cma_configfs_init(void)116eeb8df87SParav Pandit static inline int cma_configfs_init(void)
117eeb8df87SParav Pandit {
118eeb8df87SParav Pandit 	return 0;
119eeb8df87SParav Pandit }
120eeb8df87SParav Pandit 
cma_configfs_exit(void)121eeb8df87SParav Pandit static inline void cma_configfs_exit(void)
122eeb8df87SParav Pandit {
123eeb8df87SParav Pandit }
124eeb8df87SParav Pandit #endif
125eeb8df87SParav Pandit 
1265ff8c8faSParav Pandit void cma_dev_get(struct cma_device *dev);
1275ff8c8faSParav Pandit void cma_dev_put(struct cma_device *dev);
128eeb8df87SParav Pandit typedef bool (*cma_device_filter)(struct ib_device *, void *);
129eeb8df87SParav Pandit struct cma_device *cma_enum_devices_by_ibdev(cma_device_filter filter,
130eeb8df87SParav Pandit 					     void *cookie);
1311fb7f897SMark Bloch int cma_get_default_gid_type(struct cma_device *dev, u32 port);
1321fb7f897SMark Bloch int cma_set_default_gid_type(struct cma_device *dev, u32 port,
133eeb8df87SParav Pandit 			     enum ib_gid_type default_gid_type);
1341fb7f897SMark Bloch int cma_get_default_roce_tos(struct cma_device *dev, u32 port);
1351fb7f897SMark Bloch int cma_set_default_roce_tos(struct cma_device *dev, u32 port,
136eeb8df87SParav Pandit 			     u8 default_roce_tos);
137eeb8df87SParav Pandit struct ib_device *cma_get_ib_dev(struct cma_device *dev);
138eeb8df87SParav Pandit 
139a3b641afSSteve Wise #endif /* _CMA_PRIV_H */
140