xref: /openbmc/linux/drivers/iio/proximity/sx9500.c (revision b457f53a2afa7de3cecdec1772fbd522b98afc49)
14193c0f1SVlad Dogaru /*
24193c0f1SVlad Dogaru  * Copyright (c) 2014 Intel Corporation
34193c0f1SVlad Dogaru  *
44193c0f1SVlad Dogaru  * Driver for Semtech's SX9500 capacitive proximity/button solution.
54193c0f1SVlad Dogaru  * Datasheet available at
64193c0f1SVlad Dogaru  * <http://www.semtech.com/images/datasheet/sx9500.pdf>.
74193c0f1SVlad Dogaru  *
84193c0f1SVlad Dogaru  * This program is free software; you can redistribute it and/or modify it
94193c0f1SVlad Dogaru  * under the terms of the GNU General Public License version 2 as published by
104193c0f1SVlad Dogaru  * the Free Software Foundation.
114193c0f1SVlad Dogaru  */
124193c0f1SVlad Dogaru 
134193c0f1SVlad Dogaru #include <linux/kernel.h>
144193c0f1SVlad Dogaru #include <linux/slab.h>
154193c0f1SVlad Dogaru #include <linux/module.h>
164193c0f1SVlad Dogaru #include <linux/i2c.h>
174193c0f1SVlad Dogaru #include <linux/irq.h>
184193c0f1SVlad Dogaru #include <linux/acpi.h>
194193c0f1SVlad Dogaru #include <linux/gpio/consumer.h>
204193c0f1SVlad Dogaru #include <linux/regmap.h>
214193c0f1SVlad Dogaru 
224193c0f1SVlad Dogaru #include <linux/iio/iio.h>
234193c0f1SVlad Dogaru #include <linux/iio/buffer.h>
244193c0f1SVlad Dogaru #include <linux/iio/sysfs.h>
254193c0f1SVlad Dogaru #include <linux/iio/events.h>
264193c0f1SVlad Dogaru #include <linux/iio/trigger.h>
274193c0f1SVlad Dogaru #include <linux/iio/triggered_buffer.h>
284193c0f1SVlad Dogaru #include <linux/iio/trigger_consumer.h>
294193c0f1SVlad Dogaru 
304193c0f1SVlad Dogaru #define SX9500_DRIVER_NAME		"sx9500"
314193c0f1SVlad Dogaru #define SX9500_IRQ_NAME			"sx9500_event"
324193c0f1SVlad Dogaru #define SX9500_GPIO_NAME		"sx9500_gpio"
334193c0f1SVlad Dogaru 
344193c0f1SVlad Dogaru /* Register definitions. */
354193c0f1SVlad Dogaru #define SX9500_REG_IRQ_SRC		0x00
364193c0f1SVlad Dogaru #define SX9500_REG_STAT			0x01
374193c0f1SVlad Dogaru #define SX9500_REG_IRQ_MSK		0x03
384193c0f1SVlad Dogaru 
394193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL0		0x06
404193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL1		0x07
414193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL2		0x08
424193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL3		0x09
434193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL4		0x0a
444193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL5		0x0b
454193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL6		0x0c
464193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL7		0x0d
474193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL8		0x0e
484193c0f1SVlad Dogaru 
494193c0f1SVlad Dogaru #define SX9500_REG_SENSOR_SEL		0x20
504193c0f1SVlad Dogaru #define SX9500_REG_USE_MSB		0x21
514193c0f1SVlad Dogaru #define SX9500_REG_USE_LSB		0x22
524193c0f1SVlad Dogaru #define SX9500_REG_AVG_MSB		0x23
534193c0f1SVlad Dogaru #define SX9500_REG_AVG_LSB		0x24
544193c0f1SVlad Dogaru #define SX9500_REG_DIFF_MSB		0x25
554193c0f1SVlad Dogaru #define SX9500_REG_DIFF_LSB		0x26
564193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_MSB		0x27
574193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_LSB		0x28
584193c0f1SVlad Dogaru 
594193c0f1SVlad Dogaru #define SX9500_REG_RESET		0x7f
604193c0f1SVlad Dogaru 
614193c0f1SVlad Dogaru /* Write this to REG_RESET to do a soft reset. */
624193c0f1SVlad Dogaru #define SX9500_SOFT_RESET		0xde
634193c0f1SVlad Dogaru 
644193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_MASK		GENMASK(6, 4)
654193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_SHIFT	4
664193c0f1SVlad Dogaru 
674193c0f1SVlad Dogaru /*
684193c0f1SVlad Dogaru  * These serve for identifying IRQ source in the IRQ_SRC register, and
694193c0f1SVlad Dogaru  * also for masking the IRQs in the IRQ_MSK register.
704193c0f1SVlad Dogaru  */
714193c0f1SVlad Dogaru #define SX9500_CLOSE_IRQ		BIT(6)
724193c0f1SVlad Dogaru #define SX9500_FAR_IRQ			BIT(5)
734193c0f1SVlad Dogaru #define SX9500_CONVDONE_IRQ		BIT(3)
744193c0f1SVlad Dogaru 
754193c0f1SVlad Dogaru #define SX9500_PROXSTAT_SHIFT		4
764193c0f1SVlad Dogaru 
774193c0f1SVlad Dogaru #define SX9500_NUM_CHANNELS		4
784193c0f1SVlad Dogaru 
794193c0f1SVlad Dogaru struct sx9500_data {
804193c0f1SVlad Dogaru 	struct mutex mutex;
814193c0f1SVlad Dogaru 	struct i2c_client *client;
824193c0f1SVlad Dogaru 	struct iio_trigger *trig;
834193c0f1SVlad Dogaru 	struct regmap *regmap;
844193c0f1SVlad Dogaru 	/*
854193c0f1SVlad Dogaru 	 * Last reading of the proximity status for each channel.  We
864193c0f1SVlad Dogaru 	 * only send an event to user space when this changes.
874193c0f1SVlad Dogaru 	 */
884193c0f1SVlad Dogaru 	bool prox_stat[SX9500_NUM_CHANNELS];
894193c0f1SVlad Dogaru 	bool event_enabled[SX9500_NUM_CHANNELS];
904193c0f1SVlad Dogaru 	bool trigger_enabled;
914193c0f1SVlad Dogaru 	u16 *buffer;
924193c0f1SVlad Dogaru };
934193c0f1SVlad Dogaru 
944193c0f1SVlad Dogaru static const struct iio_event_spec sx9500_events[] = {
954193c0f1SVlad Dogaru 	{
964193c0f1SVlad Dogaru 		.type = IIO_EV_TYPE_THRESH,
974193c0f1SVlad Dogaru 		.dir = IIO_EV_DIR_EITHER,
984193c0f1SVlad Dogaru 		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
994193c0f1SVlad Dogaru 	},
1004193c0f1SVlad Dogaru };
1014193c0f1SVlad Dogaru 
1024193c0f1SVlad Dogaru #define SX9500_CHANNEL(idx)					\
1034193c0f1SVlad Dogaru 	{							\
1044193c0f1SVlad Dogaru 		.type = IIO_PROXIMITY,				\
1054193c0f1SVlad Dogaru 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
1064193c0f1SVlad Dogaru 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1074193c0f1SVlad Dogaru 		.indexed = 1,					\
1084193c0f1SVlad Dogaru 		.channel = idx,					\
1094193c0f1SVlad Dogaru 		.event_spec = sx9500_events,			\
1104193c0f1SVlad Dogaru 		.num_event_specs = ARRAY_SIZE(sx9500_events),	\
1114193c0f1SVlad Dogaru 		.scan_index = idx,				\
1124193c0f1SVlad Dogaru 		.scan_type = {					\
1134193c0f1SVlad Dogaru 			.sign = 'u',				\
1144193c0f1SVlad Dogaru 			.realbits = 16,				\
1154193c0f1SVlad Dogaru 			.storagebits = 16,			\
1164193c0f1SVlad Dogaru 			.shift = 0,				\
1174193c0f1SVlad Dogaru 		},						\
1184193c0f1SVlad Dogaru 	}
1194193c0f1SVlad Dogaru 
1204193c0f1SVlad Dogaru static const struct iio_chan_spec sx9500_channels[] = {
1214193c0f1SVlad Dogaru 	SX9500_CHANNEL(0),
1224193c0f1SVlad Dogaru 	SX9500_CHANNEL(1),
1234193c0f1SVlad Dogaru 	SX9500_CHANNEL(2),
1244193c0f1SVlad Dogaru 	SX9500_CHANNEL(3),
1254193c0f1SVlad Dogaru 	IIO_CHAN_SOFT_TIMESTAMP(4),
1264193c0f1SVlad Dogaru };
1274193c0f1SVlad Dogaru 
1284193c0f1SVlad Dogaru static const struct {
1294193c0f1SVlad Dogaru 	int val;
1304193c0f1SVlad Dogaru 	int val2;
1314193c0f1SVlad Dogaru } sx9500_samp_freq_table[] = {
1324193c0f1SVlad Dogaru 	{33, 333333},
1334193c0f1SVlad Dogaru 	{16, 666666},
1344193c0f1SVlad Dogaru 	{11, 111111},
1354193c0f1SVlad Dogaru 	{8, 333333},
1364193c0f1SVlad Dogaru 	{6, 666666},
1374193c0f1SVlad Dogaru 	{5, 0},
1384193c0f1SVlad Dogaru 	{3, 333333},
1394193c0f1SVlad Dogaru 	{2, 500000},
1404193c0f1SVlad Dogaru };
1414193c0f1SVlad Dogaru 
1424193c0f1SVlad Dogaru static const struct regmap_range sx9500_writable_reg_ranges[] = {
1434193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK, SX9500_REG_IRQ_MSK),
1444193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL0, SX9500_REG_PROX_CTRL8),
1454193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_SENSOR_SEL, SX9500_REG_SENSOR_SEL),
1464193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_MSB, SX9500_REG_OFFSET_LSB),
1474193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1484193c0f1SVlad Dogaru };
1494193c0f1SVlad Dogaru 
1504193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_writeable_regs = {
1514193c0f1SVlad Dogaru 	.yes_ranges = sx9500_writable_reg_ranges,
1524193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_writable_reg_ranges),
1534193c0f1SVlad Dogaru };
1544193c0f1SVlad Dogaru 
1554193c0f1SVlad Dogaru /*
1564193c0f1SVlad Dogaru  * All allocated registers are readable, so we just list unallocated
1574193c0f1SVlad Dogaru  * ones.
1584193c0f1SVlad Dogaru  */
1594193c0f1SVlad Dogaru static const struct regmap_range sx9500_non_readable_reg_ranges[] = {
1604193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_STAT + 1, SX9500_REG_STAT + 1),
1614193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK + 1, SX9500_REG_PROX_CTRL0 - 1),
1624193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL8 + 1, SX9500_REG_SENSOR_SEL - 1),
1634193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_LSB + 1, SX9500_REG_RESET - 1),
1644193c0f1SVlad Dogaru };
1654193c0f1SVlad Dogaru 
1664193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_readable_regs = {
1674193c0f1SVlad Dogaru 	.no_ranges = sx9500_non_readable_reg_ranges,
1684193c0f1SVlad Dogaru 	.n_no_ranges = ARRAY_SIZE(sx9500_non_readable_reg_ranges),
1694193c0f1SVlad Dogaru };
1704193c0f1SVlad Dogaru 
1714193c0f1SVlad Dogaru static const struct regmap_range sx9500_volatile_reg_ranges[] = {
1724193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_SRC, SX9500_REG_STAT),
1734193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_USE_MSB, SX9500_REG_OFFSET_LSB),
1744193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1754193c0f1SVlad Dogaru };
1764193c0f1SVlad Dogaru 
1774193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_volatile_regs = {
1784193c0f1SVlad Dogaru 	.yes_ranges = sx9500_volatile_reg_ranges,
1794193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_volatile_reg_ranges),
1804193c0f1SVlad Dogaru };
1814193c0f1SVlad Dogaru 
1824193c0f1SVlad Dogaru static const struct regmap_config sx9500_regmap_config = {
1834193c0f1SVlad Dogaru 	.reg_bits = 8,
1844193c0f1SVlad Dogaru 	.val_bits = 8,
1854193c0f1SVlad Dogaru 
1864193c0f1SVlad Dogaru 	.max_register = SX9500_REG_RESET,
1874193c0f1SVlad Dogaru 	.cache_type = REGCACHE_RBTREE,
1884193c0f1SVlad Dogaru 
1894193c0f1SVlad Dogaru 	.wr_table = &sx9500_writeable_regs,
1904193c0f1SVlad Dogaru 	.rd_table = &sx9500_readable_regs,
1914193c0f1SVlad Dogaru 	.volatile_table = &sx9500_volatile_regs,
1924193c0f1SVlad Dogaru };
1934193c0f1SVlad Dogaru 
1944193c0f1SVlad Dogaru static int sx9500_read_proximity(struct sx9500_data *data,
1954193c0f1SVlad Dogaru 				 const struct iio_chan_spec *chan,
1964193c0f1SVlad Dogaru 				 int *val)
1974193c0f1SVlad Dogaru {
1984193c0f1SVlad Dogaru 	int ret;
1994193c0f1SVlad Dogaru 	__be16 regval;
2004193c0f1SVlad Dogaru 
2014193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_SENSOR_SEL, chan->channel);
2024193c0f1SVlad Dogaru 	if (ret < 0)
2034193c0f1SVlad Dogaru 		return ret;
2044193c0f1SVlad Dogaru 
2054193c0f1SVlad Dogaru 	ret = regmap_bulk_read(data->regmap, SX9500_REG_USE_MSB, &regval, 2);
2064193c0f1SVlad Dogaru 	if (ret < 0)
2074193c0f1SVlad Dogaru 		return ret;
2084193c0f1SVlad Dogaru 
2094193c0f1SVlad Dogaru 	*val = 32767 - (s16)be16_to_cpu(regval);
2104193c0f1SVlad Dogaru 
2114193c0f1SVlad Dogaru 	return IIO_VAL_INT;
2124193c0f1SVlad Dogaru }
2134193c0f1SVlad Dogaru 
2144193c0f1SVlad Dogaru static int sx9500_read_samp_freq(struct sx9500_data *data,
2154193c0f1SVlad Dogaru 				 int *val, int *val2)
2164193c0f1SVlad Dogaru {
2174193c0f1SVlad Dogaru 	int ret;
2184193c0f1SVlad Dogaru 	unsigned int regval;
2194193c0f1SVlad Dogaru 
2204193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
2214193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &regval);
2224193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
2234193c0f1SVlad Dogaru 
2244193c0f1SVlad Dogaru 	if (ret < 0)
2254193c0f1SVlad Dogaru 		return ret;
2264193c0f1SVlad Dogaru 
2274193c0f1SVlad Dogaru 	regval = (regval & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
2284193c0f1SVlad Dogaru 	*val = sx9500_samp_freq_table[regval].val;
2294193c0f1SVlad Dogaru 	*val2 = sx9500_samp_freq_table[regval].val2;
2304193c0f1SVlad Dogaru 
2314193c0f1SVlad Dogaru 	return IIO_VAL_INT_PLUS_MICRO;
2324193c0f1SVlad Dogaru }
2334193c0f1SVlad Dogaru 
2344193c0f1SVlad Dogaru static int sx9500_read_raw(struct iio_dev *indio_dev,
2354193c0f1SVlad Dogaru 			   const struct iio_chan_spec *chan,
2364193c0f1SVlad Dogaru 			   int *val, int *val2, long mask)
2374193c0f1SVlad Dogaru {
2384193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
2394193c0f1SVlad Dogaru 	int ret;
2404193c0f1SVlad Dogaru 
2414193c0f1SVlad Dogaru 	switch (chan->type) {
2424193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
2434193c0f1SVlad Dogaru 		switch (mask) {
2444193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_RAW:
2454193c0f1SVlad Dogaru 			if (iio_buffer_enabled(indio_dev))
2464193c0f1SVlad Dogaru 				return -EBUSY;
2474193c0f1SVlad Dogaru 			mutex_lock(&data->mutex);
2484193c0f1SVlad Dogaru 			ret = sx9500_read_proximity(data, chan, val);
2494193c0f1SVlad Dogaru 			mutex_unlock(&data->mutex);
2504193c0f1SVlad Dogaru 			return ret;
2514193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
2524193c0f1SVlad Dogaru 			return sx9500_read_samp_freq(data, val, val2);
2534193c0f1SVlad Dogaru 		default:
2544193c0f1SVlad Dogaru 			return -EINVAL;
2554193c0f1SVlad Dogaru 		}
2564193c0f1SVlad Dogaru 	default:
2574193c0f1SVlad Dogaru 		return -EINVAL;
2584193c0f1SVlad Dogaru 	}
2594193c0f1SVlad Dogaru }
2604193c0f1SVlad Dogaru 
2614193c0f1SVlad Dogaru static int sx9500_set_samp_freq(struct sx9500_data *data,
2624193c0f1SVlad Dogaru 				int val, int val2)
2634193c0f1SVlad Dogaru {
2644193c0f1SVlad Dogaru 	int i, ret;
2654193c0f1SVlad Dogaru 
2664193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_samp_freq_table); i++)
2674193c0f1SVlad Dogaru 		if (val == sx9500_samp_freq_table[i].val &&
2684193c0f1SVlad Dogaru 		    val2 == sx9500_samp_freq_table[i].val2)
2694193c0f1SVlad Dogaru 			break;
2704193c0f1SVlad Dogaru 
2714193c0f1SVlad Dogaru 	if (i == ARRAY_SIZE(sx9500_samp_freq_table))
2724193c0f1SVlad Dogaru 		return -EINVAL;
2734193c0f1SVlad Dogaru 
2744193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
2754193c0f1SVlad Dogaru 
2764193c0f1SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
2774193c0f1SVlad Dogaru 				 SX9500_SCAN_PERIOD_MASK,
2784193c0f1SVlad Dogaru 				 i << SX9500_SCAN_PERIOD_SHIFT);
2794193c0f1SVlad Dogaru 
2804193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
2814193c0f1SVlad Dogaru 
2824193c0f1SVlad Dogaru 	return ret;
2834193c0f1SVlad Dogaru }
2844193c0f1SVlad Dogaru 
2854193c0f1SVlad Dogaru static int sx9500_write_raw(struct iio_dev *indio_dev,
2864193c0f1SVlad Dogaru 			    const struct iio_chan_spec *chan,
2874193c0f1SVlad Dogaru 			    int val, int val2, long mask)
2884193c0f1SVlad Dogaru {
2894193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
2904193c0f1SVlad Dogaru 
2914193c0f1SVlad Dogaru 	switch (chan->type) {
2924193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
2934193c0f1SVlad Dogaru 		switch (mask) {
2944193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
2954193c0f1SVlad Dogaru 			return sx9500_set_samp_freq(data, val, val2);
2964193c0f1SVlad Dogaru 		default:
2974193c0f1SVlad Dogaru 			return -EINVAL;
2984193c0f1SVlad Dogaru 		}
2994193c0f1SVlad Dogaru 	default:
3004193c0f1SVlad Dogaru 		return -EINVAL;
3014193c0f1SVlad Dogaru 	}
3024193c0f1SVlad Dogaru }
3034193c0f1SVlad Dogaru 
3044193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_handler(int irq, void *private)
3054193c0f1SVlad Dogaru {
3064193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = private;
3074193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
3084193c0f1SVlad Dogaru 
3094193c0f1SVlad Dogaru 	if (data->trigger_enabled)
3104193c0f1SVlad Dogaru 		iio_trigger_poll(data->trig);
3114193c0f1SVlad Dogaru 
3124193c0f1SVlad Dogaru 	/*
3134193c0f1SVlad Dogaru 	 * Even if no event is enabled, we need to wake the thread to
3144193c0f1SVlad Dogaru 	 * clear the interrupt state by reading SX9500_REG_IRQ_SRC.  It
3154193c0f1SVlad Dogaru 	 * is not possible to do that here because regmap_read takes a
3164193c0f1SVlad Dogaru 	 * mutex.
3174193c0f1SVlad Dogaru 	 */
3184193c0f1SVlad Dogaru 	return IRQ_WAKE_THREAD;
3194193c0f1SVlad Dogaru }
3204193c0f1SVlad Dogaru 
3214193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_thread_handler(int irq, void *private)
3224193c0f1SVlad Dogaru {
3234193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = private;
3244193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
3254193c0f1SVlad Dogaru 	int ret;
3264193c0f1SVlad Dogaru 	unsigned int val, chan;
3274193c0f1SVlad Dogaru 
3284193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
3294193c0f1SVlad Dogaru 
3304193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
3314193c0f1SVlad Dogaru 	if (ret < 0) {
3324193c0f1SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
3334193c0f1SVlad Dogaru 		goto out;
3344193c0f1SVlad Dogaru 	}
3354193c0f1SVlad Dogaru 
3364193c0f1SVlad Dogaru 	if (!(val & (SX9500_CLOSE_IRQ | SX9500_FAR_IRQ)))
3374193c0f1SVlad Dogaru 		goto out;
3384193c0f1SVlad Dogaru 
3394193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
3404193c0f1SVlad Dogaru 	if (ret < 0) {
3414193c0f1SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
3424193c0f1SVlad Dogaru 		goto out;
3434193c0f1SVlad Dogaru 	}
3444193c0f1SVlad Dogaru 
3454193c0f1SVlad Dogaru 	val >>= SX9500_PROXSTAT_SHIFT;
3464193c0f1SVlad Dogaru 	for (chan = 0; chan < SX9500_NUM_CHANNELS; chan++) {
3474193c0f1SVlad Dogaru 		int dir;
3484193c0f1SVlad Dogaru 		u64 ev;
3494193c0f1SVlad Dogaru 		bool new_prox = val & BIT(chan);
3504193c0f1SVlad Dogaru 
3514193c0f1SVlad Dogaru 		if (!data->event_enabled[chan])
3524193c0f1SVlad Dogaru 			continue;
3534193c0f1SVlad Dogaru 		if (new_prox == data->prox_stat[chan])
3544193c0f1SVlad Dogaru 			/* No change on this channel. */
3554193c0f1SVlad Dogaru 			continue;
3564193c0f1SVlad Dogaru 
3574193c0f1SVlad Dogaru 		dir = new_prox ? IIO_EV_DIR_FALLING :
3584193c0f1SVlad Dogaru 			IIO_EV_DIR_RISING;
3594193c0f1SVlad Dogaru 		ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY,
3604193c0f1SVlad Dogaru 					  chan,
3614193c0f1SVlad Dogaru 					  IIO_EV_TYPE_THRESH,
3624193c0f1SVlad Dogaru 					  dir);
3634193c0f1SVlad Dogaru 		iio_push_event(indio_dev, ev, iio_get_time_ns());
3644193c0f1SVlad Dogaru 		data->prox_stat[chan] = new_prox;
3654193c0f1SVlad Dogaru 	}
3664193c0f1SVlad Dogaru 
3674193c0f1SVlad Dogaru out:
3684193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
3694193c0f1SVlad Dogaru 
3704193c0f1SVlad Dogaru 	return IRQ_HANDLED;
3714193c0f1SVlad Dogaru }
3724193c0f1SVlad Dogaru 
3734193c0f1SVlad Dogaru static int sx9500_read_event_config(struct iio_dev *indio_dev,
3744193c0f1SVlad Dogaru 				    const struct iio_chan_spec *chan,
3754193c0f1SVlad Dogaru 				    enum iio_event_type type,
3764193c0f1SVlad Dogaru 				    enum iio_event_direction dir)
3774193c0f1SVlad Dogaru {
3784193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
3794193c0f1SVlad Dogaru 
3804193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
3814193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
3824193c0f1SVlad Dogaru 		return -EINVAL;
3834193c0f1SVlad Dogaru 
3844193c0f1SVlad Dogaru 	return data->event_enabled[chan->channel];
3854193c0f1SVlad Dogaru }
3864193c0f1SVlad Dogaru 
3874193c0f1SVlad Dogaru static int sx9500_write_event_config(struct iio_dev *indio_dev,
3884193c0f1SVlad Dogaru 				     const struct iio_chan_spec *chan,
3894193c0f1SVlad Dogaru 				     enum iio_event_type type,
3904193c0f1SVlad Dogaru 				     enum iio_event_direction dir,
3914193c0f1SVlad Dogaru 				     int state)
3924193c0f1SVlad Dogaru {
3934193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
3944193c0f1SVlad Dogaru 	int ret, i;
3954193c0f1SVlad Dogaru 	bool any_active = false;
3964193c0f1SVlad Dogaru 	unsigned int irqmask;
3974193c0f1SVlad Dogaru 
3984193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
3994193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
4004193c0f1SVlad Dogaru 		return -EINVAL;
4014193c0f1SVlad Dogaru 
4024193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
4034193c0f1SVlad Dogaru 
4044193c0f1SVlad Dogaru 	data->event_enabled[chan->channel] = state;
4054193c0f1SVlad Dogaru 
4064193c0f1SVlad Dogaru 	for (i = 0; i < SX9500_NUM_CHANNELS; i++)
4074193c0f1SVlad Dogaru 		if (data->event_enabled[i]) {
4084193c0f1SVlad Dogaru 			any_active = true;
4094193c0f1SVlad Dogaru 			break;
4104193c0f1SVlad Dogaru 		}
4114193c0f1SVlad Dogaru 
4124193c0f1SVlad Dogaru 	irqmask = SX9500_CLOSE_IRQ | SX9500_FAR_IRQ;
4134193c0f1SVlad Dogaru 	if (any_active)
4144193c0f1SVlad Dogaru 		ret = regmap_update_bits(data->regmap, SX9500_REG_IRQ_MSK,
4154193c0f1SVlad Dogaru 					 irqmask, irqmask);
4164193c0f1SVlad Dogaru 	else
4174193c0f1SVlad Dogaru 		ret = regmap_update_bits(data->regmap, SX9500_REG_IRQ_MSK,
4184193c0f1SVlad Dogaru 					 irqmask, 0);
4194193c0f1SVlad Dogaru 
4204193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
4214193c0f1SVlad Dogaru 
4224193c0f1SVlad Dogaru 	return ret;
4234193c0f1SVlad Dogaru }
4244193c0f1SVlad Dogaru 
4254193c0f1SVlad Dogaru static int sx9500_update_scan_mode(struct iio_dev *indio_dev,
4264193c0f1SVlad Dogaru 				   const unsigned long *scan_mask)
4274193c0f1SVlad Dogaru {
4284193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4294193c0f1SVlad Dogaru 
4304193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
4314193c0f1SVlad Dogaru 	kfree(data->buffer);
4324193c0f1SVlad Dogaru 	data->buffer = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
4334193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
4344193c0f1SVlad Dogaru 
4354193c0f1SVlad Dogaru 	if (data->buffer == NULL)
4364193c0f1SVlad Dogaru 		return -ENOMEM;
4374193c0f1SVlad Dogaru 
4384193c0f1SVlad Dogaru 	return 0;
4394193c0f1SVlad Dogaru }
4404193c0f1SVlad Dogaru 
4414193c0f1SVlad Dogaru static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
4424193c0f1SVlad Dogaru 	"2.500000 3.333333 5 6.666666 8.333333 11.111111 16.666666 33.333333");
4434193c0f1SVlad Dogaru 
4444193c0f1SVlad Dogaru static struct attribute *sx9500_attributes[] = {
4454193c0f1SVlad Dogaru 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
4464193c0f1SVlad Dogaru 	NULL,
4474193c0f1SVlad Dogaru };
4484193c0f1SVlad Dogaru 
4494193c0f1SVlad Dogaru static const struct attribute_group sx9500_attribute_group = {
4504193c0f1SVlad Dogaru 	.attrs = sx9500_attributes,
4514193c0f1SVlad Dogaru };
4524193c0f1SVlad Dogaru 
4534193c0f1SVlad Dogaru static const struct iio_info sx9500_info = {
4544193c0f1SVlad Dogaru 	.driver_module = THIS_MODULE,
4554193c0f1SVlad Dogaru 	.attrs = &sx9500_attribute_group,
4564193c0f1SVlad Dogaru 	.read_raw = &sx9500_read_raw,
4574193c0f1SVlad Dogaru 	.write_raw = &sx9500_write_raw,
4584193c0f1SVlad Dogaru 	.read_event_config = &sx9500_read_event_config,
4594193c0f1SVlad Dogaru 	.write_event_config = &sx9500_write_event_config,
4604193c0f1SVlad Dogaru 	.update_scan_mode = &sx9500_update_scan_mode,
4614193c0f1SVlad Dogaru };
4624193c0f1SVlad Dogaru 
4634193c0f1SVlad Dogaru static int sx9500_set_trigger_state(struct iio_trigger *trig,
4644193c0f1SVlad Dogaru 				    bool state)
4654193c0f1SVlad Dogaru {
4664193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
4674193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4684193c0f1SVlad Dogaru 	int ret;
4694193c0f1SVlad Dogaru 
4704193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
4714193c0f1SVlad Dogaru 
4724193c0f1SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_IRQ_MSK,
4734193c0f1SVlad Dogaru 				 SX9500_CONVDONE_IRQ,
4744193c0f1SVlad Dogaru 				 state ? SX9500_CONVDONE_IRQ : 0);
4754193c0f1SVlad Dogaru 	if (ret == 0)
4764193c0f1SVlad Dogaru 		data->trigger_enabled = state;
4774193c0f1SVlad Dogaru 
4784193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
4794193c0f1SVlad Dogaru 
4804193c0f1SVlad Dogaru 	return ret;
4814193c0f1SVlad Dogaru }
4824193c0f1SVlad Dogaru 
4834193c0f1SVlad Dogaru static const struct iio_trigger_ops sx9500_trigger_ops = {
4844193c0f1SVlad Dogaru 	.set_trigger_state = sx9500_set_trigger_state,
4854193c0f1SVlad Dogaru 	.owner = THIS_MODULE,
4864193c0f1SVlad Dogaru };
4874193c0f1SVlad Dogaru 
4884193c0f1SVlad Dogaru static irqreturn_t sx9500_trigger_handler(int irq, void *private)
4894193c0f1SVlad Dogaru {
4904193c0f1SVlad Dogaru 	struct iio_poll_func *pf = private;
4914193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = pf->indio_dev;
4924193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4934193c0f1SVlad Dogaru 	int val, bit, ret, i = 0;
4944193c0f1SVlad Dogaru 
4954193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
4964193c0f1SVlad Dogaru 
4974193c0f1SVlad Dogaru 	for_each_set_bit(bit, indio_dev->buffer->scan_mask,
4984193c0f1SVlad Dogaru 			 indio_dev->masklength) {
4994193c0f1SVlad Dogaru 		ret = sx9500_read_proximity(data, &indio_dev->channels[bit],
5004193c0f1SVlad Dogaru 					    &val);
5014193c0f1SVlad Dogaru 		if (ret < 0)
5024193c0f1SVlad Dogaru 			goto out;
5034193c0f1SVlad Dogaru 
5044193c0f1SVlad Dogaru 		data->buffer[i++] = val;
5054193c0f1SVlad Dogaru 	}
5064193c0f1SVlad Dogaru 
5074193c0f1SVlad Dogaru 	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
5084193c0f1SVlad Dogaru 					   iio_get_time_ns());
5094193c0f1SVlad Dogaru 
5104193c0f1SVlad Dogaru out:
5114193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5124193c0f1SVlad Dogaru 
5134193c0f1SVlad Dogaru 	iio_trigger_notify_done(indio_dev->trig);
5144193c0f1SVlad Dogaru 
5154193c0f1SVlad Dogaru 	return IRQ_HANDLED;
5164193c0f1SVlad Dogaru }
5174193c0f1SVlad Dogaru 
5184193c0f1SVlad Dogaru struct sx9500_reg_default {
5194193c0f1SVlad Dogaru 	u8 reg;
5204193c0f1SVlad Dogaru 	u8 def;
5214193c0f1SVlad Dogaru };
5224193c0f1SVlad Dogaru 
5234193c0f1SVlad Dogaru static const struct sx9500_reg_default sx9500_default_regs[] = {
5244193c0f1SVlad Dogaru 	{
5254193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL1,
5264193c0f1SVlad Dogaru 		/* Shield enabled, small range. */
5274193c0f1SVlad Dogaru 		.def = 0x43,
5284193c0f1SVlad Dogaru 	},
5294193c0f1SVlad Dogaru 	{
5304193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL2,
5314193c0f1SVlad Dogaru 		/* x8 gain, 167kHz frequency, finest resolution. */
5324193c0f1SVlad Dogaru 		.def = 0x77,
5334193c0f1SVlad Dogaru 	},
5344193c0f1SVlad Dogaru 	{
5354193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL3,
5364193c0f1SVlad Dogaru 		/* Doze enabled, 2x scan period doze, no raw filter. */
5374193c0f1SVlad Dogaru 		.def = 0x40,
5384193c0f1SVlad Dogaru 	},
5394193c0f1SVlad Dogaru 	{
5404193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL4,
5414193c0f1SVlad Dogaru 		/* Average threshold. */
5424193c0f1SVlad Dogaru 		.def = 0x30,
5434193c0f1SVlad Dogaru 	},
5444193c0f1SVlad Dogaru 	{
5454193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL5,
5464193c0f1SVlad Dogaru 		/*
5474193c0f1SVlad Dogaru 		 * Debouncer off, lowest average negative filter,
5484193c0f1SVlad Dogaru 		 * highest average postive filter.
5494193c0f1SVlad Dogaru 		 */
5504193c0f1SVlad Dogaru 		.def = 0x0f,
5514193c0f1SVlad Dogaru 	},
5524193c0f1SVlad Dogaru 	{
5534193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL6,
5544193c0f1SVlad Dogaru 		/* Proximity detection threshold: 280 */
5554193c0f1SVlad Dogaru 		.def = 0x0e,
5564193c0f1SVlad Dogaru 	},
5574193c0f1SVlad Dogaru 	{
5584193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL7,
5594193c0f1SVlad Dogaru 		/*
5604193c0f1SVlad Dogaru 		 * No automatic compensation, compensate each pin
5614193c0f1SVlad Dogaru 		 * independently, proximity hysteresis: 32, close
5624193c0f1SVlad Dogaru 		 * debouncer off, far debouncer off.
5634193c0f1SVlad Dogaru 		 */
5644193c0f1SVlad Dogaru 		.def = 0x00,
5654193c0f1SVlad Dogaru 	},
5664193c0f1SVlad Dogaru 	{
5674193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL8,
5684193c0f1SVlad Dogaru 		/* No stuck timeout, no periodic compensation. */
5694193c0f1SVlad Dogaru 		.def = 0x00,
5704193c0f1SVlad Dogaru 	},
5714193c0f1SVlad Dogaru 	{
5724193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL0,
5734193c0f1SVlad Dogaru 		/* Scan period: 30ms, all sensors enabled. */
5744193c0f1SVlad Dogaru 		.def = 0x0f,
5754193c0f1SVlad Dogaru 	},
5764193c0f1SVlad Dogaru };
5774193c0f1SVlad Dogaru 
5784193c0f1SVlad Dogaru static int sx9500_init_device(struct iio_dev *indio_dev)
5794193c0f1SVlad Dogaru {
5804193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
5814193c0f1SVlad Dogaru 	int ret, i;
5824193c0f1SVlad Dogaru 	unsigned int val;
5834193c0f1SVlad Dogaru 
5844193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_IRQ_MSK, 0);
5854193c0f1SVlad Dogaru 	if (ret < 0)
5864193c0f1SVlad Dogaru 		return ret;
5874193c0f1SVlad Dogaru 
5884193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_RESET,
5894193c0f1SVlad Dogaru 			   SX9500_SOFT_RESET);
5904193c0f1SVlad Dogaru 	if (ret < 0)
5914193c0f1SVlad Dogaru 		return ret;
5924193c0f1SVlad Dogaru 
5934193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
5944193c0f1SVlad Dogaru 	if (ret < 0)
5954193c0f1SVlad Dogaru 		return ret;
5964193c0f1SVlad Dogaru 
5974193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_default_regs); i++) {
5984193c0f1SVlad Dogaru 		ret = regmap_write(data->regmap,
5994193c0f1SVlad Dogaru 				   sx9500_default_regs[i].reg,
6004193c0f1SVlad Dogaru 				   sx9500_default_regs[i].def);
6014193c0f1SVlad Dogaru 		if (ret < 0)
6024193c0f1SVlad Dogaru 			return ret;
6034193c0f1SVlad Dogaru 	}
6044193c0f1SVlad Dogaru 
6054193c0f1SVlad Dogaru 	return 0;
6064193c0f1SVlad Dogaru }
6074193c0f1SVlad Dogaru 
6084193c0f1SVlad Dogaru static int sx9500_gpio_probe(struct i2c_client *client,
6094193c0f1SVlad Dogaru 			     struct sx9500_data *data)
6104193c0f1SVlad Dogaru {
6114193c0f1SVlad Dogaru 	struct device *dev;
6124193c0f1SVlad Dogaru 	struct gpio_desc *gpio;
6134193c0f1SVlad Dogaru 	int ret;
6144193c0f1SVlad Dogaru 
6154193c0f1SVlad Dogaru 	if (!client)
6164193c0f1SVlad Dogaru 		return -EINVAL;
6174193c0f1SVlad Dogaru 
6184193c0f1SVlad Dogaru 	dev = &client->dev;
6194193c0f1SVlad Dogaru 
6204193c0f1SVlad Dogaru 	/* data ready gpio interrupt pin */
621*b457f53aSUwe Kleine-König 	gpio = devm_gpiod_get_index(dev, SX9500_GPIO_NAME, 0, GPIOD_IN);
6224193c0f1SVlad Dogaru 	if (IS_ERR(gpio)) {
6234193c0f1SVlad Dogaru 		dev_err(dev, "acpi gpio get index failed\n");
6244193c0f1SVlad Dogaru 		return PTR_ERR(gpio);
6254193c0f1SVlad Dogaru 	}
6264193c0f1SVlad Dogaru 
6274193c0f1SVlad Dogaru 	ret = gpiod_to_irq(gpio);
6284193c0f1SVlad Dogaru 
6294193c0f1SVlad Dogaru 	dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
6304193c0f1SVlad Dogaru 
6314193c0f1SVlad Dogaru 	return ret;
6324193c0f1SVlad Dogaru }
6334193c0f1SVlad Dogaru 
6344193c0f1SVlad Dogaru static int sx9500_probe(struct i2c_client *client,
6354193c0f1SVlad Dogaru 			const struct i2c_device_id *id)
6364193c0f1SVlad Dogaru {
6374193c0f1SVlad Dogaru 	int ret;
6384193c0f1SVlad Dogaru 	struct iio_dev *indio_dev;
6394193c0f1SVlad Dogaru 	struct sx9500_data *data;
6404193c0f1SVlad Dogaru 
6414193c0f1SVlad Dogaru 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
6424193c0f1SVlad Dogaru 	if (indio_dev == NULL)
6434193c0f1SVlad Dogaru 		return -ENOMEM;
6444193c0f1SVlad Dogaru 
6454193c0f1SVlad Dogaru 	data = iio_priv(indio_dev);
6464193c0f1SVlad Dogaru 	data->client = client;
6474193c0f1SVlad Dogaru 	mutex_init(&data->mutex);
6484193c0f1SVlad Dogaru 	data->trigger_enabled = false;
6494193c0f1SVlad Dogaru 
6504193c0f1SVlad Dogaru 	data->regmap = devm_regmap_init_i2c(client, &sx9500_regmap_config);
6514193c0f1SVlad Dogaru 	if (IS_ERR(data->regmap))
6524193c0f1SVlad Dogaru 		return PTR_ERR(data->regmap);
6534193c0f1SVlad Dogaru 
6544193c0f1SVlad Dogaru 	sx9500_init_device(indio_dev);
6554193c0f1SVlad Dogaru 
6564193c0f1SVlad Dogaru 	indio_dev->dev.parent = &client->dev;
6574193c0f1SVlad Dogaru 	indio_dev->name = SX9500_DRIVER_NAME;
6584193c0f1SVlad Dogaru 	indio_dev->channels = sx9500_channels;
6594193c0f1SVlad Dogaru 	indio_dev->num_channels = ARRAY_SIZE(sx9500_channels);
6604193c0f1SVlad Dogaru 	indio_dev->info = &sx9500_info;
6614193c0f1SVlad Dogaru 	indio_dev->modes = INDIO_DIRECT_MODE;
6624193c0f1SVlad Dogaru 	i2c_set_clientdata(client, indio_dev);
6634193c0f1SVlad Dogaru 
6644193c0f1SVlad Dogaru 	if (client->irq <= 0)
6654193c0f1SVlad Dogaru 		client->irq = sx9500_gpio_probe(client, data);
6664193c0f1SVlad Dogaru 
6674193c0f1SVlad Dogaru 	if (client->irq > 0) {
6684193c0f1SVlad Dogaru 		ret = devm_request_threaded_irq(&client->dev, client->irq,
6694193c0f1SVlad Dogaru 				sx9500_irq_handler, sx9500_irq_thread_handler,
6704193c0f1SVlad Dogaru 				IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
6714193c0f1SVlad Dogaru 				SX9500_IRQ_NAME, indio_dev);
6724193c0f1SVlad Dogaru 		if (ret < 0)
6734193c0f1SVlad Dogaru 			return ret;
6744193c0f1SVlad Dogaru 
6754193c0f1SVlad Dogaru 		data->trig = devm_iio_trigger_alloc(&client->dev,
6764193c0f1SVlad Dogaru 				"%s-dev%d", indio_dev->name, indio_dev->id);
6774193c0f1SVlad Dogaru 		if (!data->trig)
6784193c0f1SVlad Dogaru 			return -ENOMEM;
6794193c0f1SVlad Dogaru 
6804193c0f1SVlad Dogaru 		data->trig->dev.parent = &client->dev;
6814193c0f1SVlad Dogaru 		data->trig->ops = &sx9500_trigger_ops;
6824193c0f1SVlad Dogaru 		iio_trigger_set_drvdata(data->trig, indio_dev);
6834193c0f1SVlad Dogaru 
6844193c0f1SVlad Dogaru 		ret = iio_trigger_register(data->trig);
6854193c0f1SVlad Dogaru 		if (ret)
6864193c0f1SVlad Dogaru 			return ret;
6874193c0f1SVlad Dogaru 	}
6884193c0f1SVlad Dogaru 
6894193c0f1SVlad Dogaru 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
6904193c0f1SVlad Dogaru 					 sx9500_trigger_handler, NULL);
6914193c0f1SVlad Dogaru 	if (ret < 0)
6924193c0f1SVlad Dogaru 		goto out_trigger_unregister;
6934193c0f1SVlad Dogaru 
6944193c0f1SVlad Dogaru 	ret = iio_device_register(indio_dev);
6954193c0f1SVlad Dogaru 	if (ret < 0)
6964193c0f1SVlad Dogaru 		goto out_buffer_cleanup;
6974193c0f1SVlad Dogaru 
6984193c0f1SVlad Dogaru 	return 0;
6994193c0f1SVlad Dogaru 
7004193c0f1SVlad Dogaru out_buffer_cleanup:
7014193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
7024193c0f1SVlad Dogaru out_trigger_unregister:
7034193c0f1SVlad Dogaru 	if (client->irq > 0)
7044193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
7054193c0f1SVlad Dogaru 
7064193c0f1SVlad Dogaru 	return ret;
7074193c0f1SVlad Dogaru }
7084193c0f1SVlad Dogaru 
7094193c0f1SVlad Dogaru static int sx9500_remove(struct i2c_client *client)
7104193c0f1SVlad Dogaru {
7114193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
7124193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
7134193c0f1SVlad Dogaru 
7144193c0f1SVlad Dogaru 	iio_device_unregister(indio_dev);
7154193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
7164193c0f1SVlad Dogaru 	if (client->irq > 0)
7174193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
7184193c0f1SVlad Dogaru 	kfree(data->buffer);
7194193c0f1SVlad Dogaru 
7204193c0f1SVlad Dogaru 	return 0;
7214193c0f1SVlad Dogaru }
7224193c0f1SVlad Dogaru 
7234193c0f1SVlad Dogaru static const struct acpi_device_id sx9500_acpi_match[] = {
7244193c0f1SVlad Dogaru 	{"SSX9500", 0},
7254193c0f1SVlad Dogaru 	{ },
7264193c0f1SVlad Dogaru };
7274193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(acpi, sx9500_acpi_match);
7284193c0f1SVlad Dogaru 
7294193c0f1SVlad Dogaru static const struct i2c_device_id sx9500_id[] = {
7304193c0f1SVlad Dogaru 	{"sx9500", 0},
7314193c0f1SVlad Dogaru 	{}
7324193c0f1SVlad Dogaru };
7334193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(i2c, sx9500_id);
7344193c0f1SVlad Dogaru 
7354193c0f1SVlad Dogaru static struct i2c_driver sx9500_driver = {
7364193c0f1SVlad Dogaru 	.driver = {
7374193c0f1SVlad Dogaru 		.name	= SX9500_DRIVER_NAME,
7384193c0f1SVlad Dogaru 		.acpi_match_table = ACPI_PTR(sx9500_acpi_match),
7394193c0f1SVlad Dogaru 	},
7404193c0f1SVlad Dogaru 	.probe		= sx9500_probe,
7414193c0f1SVlad Dogaru 	.remove		= sx9500_remove,
7424193c0f1SVlad Dogaru 	.id_table	= sx9500_id,
7434193c0f1SVlad Dogaru };
7444193c0f1SVlad Dogaru module_i2c_driver(sx9500_driver);
7454193c0f1SVlad Dogaru 
7464193c0f1SVlad Dogaru MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
7474193c0f1SVlad Dogaru MODULE_DESCRIPTION("Driver for Semtech SX9500 proximity sensor");
7484193c0f1SVlad Dogaru MODULE_LICENSE("GPL v2");
749