xref: /openbmc/linux/drivers/iio/proximity/sx9500.c (revision 8c11e16177b16c0aa0c3b08987f316fd89aa1ead)
14193c0f1SVlad Dogaru /*
24193c0f1SVlad Dogaru  * Copyright (c) 2014 Intel Corporation
34193c0f1SVlad Dogaru  *
44193c0f1SVlad Dogaru  * Driver for Semtech's SX9500 capacitive proximity/button solution.
54193c0f1SVlad Dogaru  * Datasheet available at
64193c0f1SVlad Dogaru  * <http://www.semtech.com/images/datasheet/sx9500.pdf>.
74193c0f1SVlad Dogaru  *
84193c0f1SVlad Dogaru  * This program is free software; you can redistribute it and/or modify it
94193c0f1SVlad Dogaru  * under the terms of the GNU General Public License version 2 as published by
104193c0f1SVlad Dogaru  * the Free Software Foundation.
114193c0f1SVlad Dogaru  */
124193c0f1SVlad Dogaru 
134193c0f1SVlad Dogaru #include <linux/kernel.h>
144193c0f1SVlad Dogaru #include <linux/slab.h>
154193c0f1SVlad Dogaru #include <linux/module.h>
164193c0f1SVlad Dogaru #include <linux/i2c.h>
174193c0f1SVlad Dogaru #include <linux/irq.h>
184193c0f1SVlad Dogaru #include <linux/acpi.h>
194193c0f1SVlad Dogaru #include <linux/gpio/consumer.h>
204193c0f1SVlad Dogaru #include <linux/regmap.h>
217840ffeeSVlad Dogaru #include <linux/pm.h>
2259bd0427SVlad Dogaru #include <linux/delay.h>
234193c0f1SVlad Dogaru 
244193c0f1SVlad Dogaru #include <linux/iio/iio.h>
254193c0f1SVlad Dogaru #include <linux/iio/buffer.h>
264193c0f1SVlad Dogaru #include <linux/iio/sysfs.h>
274193c0f1SVlad Dogaru #include <linux/iio/events.h>
284193c0f1SVlad Dogaru #include <linux/iio/trigger.h>
294193c0f1SVlad Dogaru #include <linux/iio/triggered_buffer.h>
304193c0f1SVlad Dogaru #include <linux/iio/trigger_consumer.h>
314193c0f1SVlad Dogaru 
324193c0f1SVlad Dogaru #define SX9500_DRIVER_NAME		"sx9500"
334193c0f1SVlad Dogaru #define SX9500_IRQ_NAME			"sx9500_event"
3463de9f92SVlad Dogaru 
35821ace29SVlad Dogaru #define SX9500_GPIO_INT			"interrupt"
3645fd5f8eSVlad Dogaru #define SX9500_GPIO_RESET		"reset"
374193c0f1SVlad Dogaru 
384193c0f1SVlad Dogaru /* Register definitions. */
394193c0f1SVlad Dogaru #define SX9500_REG_IRQ_SRC		0x00
404193c0f1SVlad Dogaru #define SX9500_REG_STAT			0x01
414193c0f1SVlad Dogaru #define SX9500_REG_IRQ_MSK		0x03
424193c0f1SVlad Dogaru 
434193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL0		0x06
444193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL1		0x07
454193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL2		0x08
464193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL3		0x09
474193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL4		0x0a
484193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL5		0x0b
494193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL6		0x0c
504193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL7		0x0d
514193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL8		0x0e
524193c0f1SVlad Dogaru 
534193c0f1SVlad Dogaru #define SX9500_REG_SENSOR_SEL		0x20
544193c0f1SVlad Dogaru #define SX9500_REG_USE_MSB		0x21
554193c0f1SVlad Dogaru #define SX9500_REG_USE_LSB		0x22
564193c0f1SVlad Dogaru #define SX9500_REG_AVG_MSB		0x23
574193c0f1SVlad Dogaru #define SX9500_REG_AVG_LSB		0x24
584193c0f1SVlad Dogaru #define SX9500_REG_DIFF_MSB		0x25
594193c0f1SVlad Dogaru #define SX9500_REG_DIFF_LSB		0x26
604193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_MSB		0x27
614193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_LSB		0x28
624193c0f1SVlad Dogaru 
634193c0f1SVlad Dogaru #define SX9500_REG_RESET		0x7f
644193c0f1SVlad Dogaru 
654193c0f1SVlad Dogaru /* Write this to REG_RESET to do a soft reset. */
664193c0f1SVlad Dogaru #define SX9500_SOFT_RESET		0xde
674193c0f1SVlad Dogaru 
684193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_MASK		GENMASK(6, 4)
694193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_SHIFT	4
704193c0f1SVlad Dogaru 
714193c0f1SVlad Dogaru /*
724193c0f1SVlad Dogaru  * These serve for identifying IRQ source in the IRQ_SRC register, and
734193c0f1SVlad Dogaru  * also for masking the IRQs in the IRQ_MSK register.
744193c0f1SVlad Dogaru  */
754193c0f1SVlad Dogaru #define SX9500_CLOSE_IRQ		BIT(6)
764193c0f1SVlad Dogaru #define SX9500_FAR_IRQ			BIT(5)
774193c0f1SVlad Dogaru #define SX9500_CONVDONE_IRQ		BIT(3)
784193c0f1SVlad Dogaru 
794193c0f1SVlad Dogaru #define SX9500_PROXSTAT_SHIFT		4
8059bd0427SVlad Dogaru #define SX9500_COMPSTAT_MASK		GENMASK(3, 0)
814193c0f1SVlad Dogaru 
824193c0f1SVlad Dogaru #define SX9500_NUM_CHANNELS		4
8368958bd5SVlad Dogaru #define SX9500_CHAN_MASK		GENMASK(SX9500_NUM_CHANNELS - 1, 0)
844193c0f1SVlad Dogaru 
854193c0f1SVlad Dogaru struct sx9500_data {
864193c0f1SVlad Dogaru 	struct mutex mutex;
874193c0f1SVlad Dogaru 	struct i2c_client *client;
884193c0f1SVlad Dogaru 	struct iio_trigger *trig;
894193c0f1SVlad Dogaru 	struct regmap *regmap;
9045fd5f8eSVlad Dogaru 	struct gpio_desc *gpiod_rst;
914193c0f1SVlad Dogaru 	/*
924193c0f1SVlad Dogaru 	 * Last reading of the proximity status for each channel.  We
934193c0f1SVlad Dogaru 	 * only send an event to user space when this changes.
944193c0f1SVlad Dogaru 	 */
954193c0f1SVlad Dogaru 	bool prox_stat[SX9500_NUM_CHANNELS];
964193c0f1SVlad Dogaru 	bool event_enabled[SX9500_NUM_CHANNELS];
974193c0f1SVlad Dogaru 	bool trigger_enabled;
984193c0f1SVlad Dogaru 	u16 *buffer;
997840ffeeSVlad Dogaru 	/* Remember enabled channels and sample rate during suspend. */
1007840ffeeSVlad Dogaru 	unsigned int suspend_ctrl0;
10159bd0427SVlad Dogaru 	struct completion completion;
10259bd0427SVlad Dogaru 	int data_rdy_users, close_far_users;
10359bd0427SVlad Dogaru 	int channel_users[SX9500_NUM_CHANNELS];
1044193c0f1SVlad Dogaru };
1054193c0f1SVlad Dogaru 
1064193c0f1SVlad Dogaru static const struct iio_event_spec sx9500_events[] = {
1074193c0f1SVlad Dogaru 	{
1084193c0f1SVlad Dogaru 		.type = IIO_EV_TYPE_THRESH,
1094193c0f1SVlad Dogaru 		.dir = IIO_EV_DIR_EITHER,
1104193c0f1SVlad Dogaru 		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
1114193c0f1SVlad Dogaru 	},
1124193c0f1SVlad Dogaru };
1134193c0f1SVlad Dogaru 
1144193c0f1SVlad Dogaru #define SX9500_CHANNEL(idx)					\
1154193c0f1SVlad Dogaru 	{							\
1164193c0f1SVlad Dogaru 		.type = IIO_PROXIMITY,				\
1174193c0f1SVlad Dogaru 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
1184193c0f1SVlad Dogaru 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1194193c0f1SVlad Dogaru 		.indexed = 1,					\
1204193c0f1SVlad Dogaru 		.channel = idx,					\
1214193c0f1SVlad Dogaru 		.event_spec = sx9500_events,			\
1224193c0f1SVlad Dogaru 		.num_event_specs = ARRAY_SIZE(sx9500_events),	\
1234193c0f1SVlad Dogaru 		.scan_index = idx,				\
1244193c0f1SVlad Dogaru 		.scan_type = {					\
1254193c0f1SVlad Dogaru 			.sign = 'u',				\
1264193c0f1SVlad Dogaru 			.realbits = 16,				\
1274193c0f1SVlad Dogaru 			.storagebits = 16,			\
1284193c0f1SVlad Dogaru 			.shift = 0,				\
1294193c0f1SVlad Dogaru 		},						\
1304193c0f1SVlad Dogaru 	}
1314193c0f1SVlad Dogaru 
1324193c0f1SVlad Dogaru static const struct iio_chan_spec sx9500_channels[] = {
1334193c0f1SVlad Dogaru 	SX9500_CHANNEL(0),
1344193c0f1SVlad Dogaru 	SX9500_CHANNEL(1),
1354193c0f1SVlad Dogaru 	SX9500_CHANNEL(2),
1364193c0f1SVlad Dogaru 	SX9500_CHANNEL(3),
1374193c0f1SVlad Dogaru 	IIO_CHAN_SOFT_TIMESTAMP(4),
1384193c0f1SVlad Dogaru };
1394193c0f1SVlad Dogaru 
1404193c0f1SVlad Dogaru static const struct {
1414193c0f1SVlad Dogaru 	int val;
1424193c0f1SVlad Dogaru 	int val2;
1434193c0f1SVlad Dogaru } sx9500_samp_freq_table[] = {
1444193c0f1SVlad Dogaru 	{33, 333333},
1454193c0f1SVlad Dogaru 	{16, 666666},
1464193c0f1SVlad Dogaru 	{11, 111111},
1474193c0f1SVlad Dogaru 	{8, 333333},
1484193c0f1SVlad Dogaru 	{6, 666666},
1494193c0f1SVlad Dogaru 	{5, 0},
1504193c0f1SVlad Dogaru 	{3, 333333},
1514193c0f1SVlad Dogaru 	{2, 500000},
1524193c0f1SVlad Dogaru };
1534193c0f1SVlad Dogaru 
15459bd0427SVlad Dogaru static const unsigned int sx9500_scan_period_table[] = {
15559bd0427SVlad Dogaru 	30, 60, 90, 120, 150, 200, 300, 400,
15659bd0427SVlad Dogaru };
15759bd0427SVlad Dogaru 
1584193c0f1SVlad Dogaru static const struct regmap_range sx9500_writable_reg_ranges[] = {
1594193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK, SX9500_REG_IRQ_MSK),
1604193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL0, SX9500_REG_PROX_CTRL8),
1614193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_SENSOR_SEL, SX9500_REG_SENSOR_SEL),
1624193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_MSB, SX9500_REG_OFFSET_LSB),
1634193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1644193c0f1SVlad Dogaru };
1654193c0f1SVlad Dogaru 
1664193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_writeable_regs = {
1674193c0f1SVlad Dogaru 	.yes_ranges = sx9500_writable_reg_ranges,
1684193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_writable_reg_ranges),
1694193c0f1SVlad Dogaru };
1704193c0f1SVlad Dogaru 
1714193c0f1SVlad Dogaru /*
1724193c0f1SVlad Dogaru  * All allocated registers are readable, so we just list unallocated
1734193c0f1SVlad Dogaru  * ones.
1744193c0f1SVlad Dogaru  */
1754193c0f1SVlad Dogaru static const struct regmap_range sx9500_non_readable_reg_ranges[] = {
1764193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_STAT + 1, SX9500_REG_STAT + 1),
1774193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK + 1, SX9500_REG_PROX_CTRL0 - 1),
1784193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL8 + 1, SX9500_REG_SENSOR_SEL - 1),
1794193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_LSB + 1, SX9500_REG_RESET - 1),
1804193c0f1SVlad Dogaru };
1814193c0f1SVlad Dogaru 
1824193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_readable_regs = {
1834193c0f1SVlad Dogaru 	.no_ranges = sx9500_non_readable_reg_ranges,
1844193c0f1SVlad Dogaru 	.n_no_ranges = ARRAY_SIZE(sx9500_non_readable_reg_ranges),
1854193c0f1SVlad Dogaru };
1864193c0f1SVlad Dogaru 
1874193c0f1SVlad Dogaru static const struct regmap_range sx9500_volatile_reg_ranges[] = {
1884193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_SRC, SX9500_REG_STAT),
1894193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_USE_MSB, SX9500_REG_OFFSET_LSB),
1904193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1914193c0f1SVlad Dogaru };
1924193c0f1SVlad Dogaru 
1934193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_volatile_regs = {
1944193c0f1SVlad Dogaru 	.yes_ranges = sx9500_volatile_reg_ranges,
1954193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_volatile_reg_ranges),
1964193c0f1SVlad Dogaru };
1974193c0f1SVlad Dogaru 
1984193c0f1SVlad Dogaru static const struct regmap_config sx9500_regmap_config = {
1994193c0f1SVlad Dogaru 	.reg_bits = 8,
2004193c0f1SVlad Dogaru 	.val_bits = 8,
2014193c0f1SVlad Dogaru 
2024193c0f1SVlad Dogaru 	.max_register = SX9500_REG_RESET,
2034193c0f1SVlad Dogaru 	.cache_type = REGCACHE_RBTREE,
2044193c0f1SVlad Dogaru 
2054193c0f1SVlad Dogaru 	.wr_table = &sx9500_writeable_regs,
2064193c0f1SVlad Dogaru 	.rd_table = &sx9500_readable_regs,
2074193c0f1SVlad Dogaru 	.volatile_table = &sx9500_volatile_regs,
2084193c0f1SVlad Dogaru };
2094193c0f1SVlad Dogaru 
21059bd0427SVlad Dogaru static int sx9500_inc_users(struct sx9500_data *data, int *counter,
21159bd0427SVlad Dogaru 			    unsigned int reg, unsigned int bitmask)
21259bd0427SVlad Dogaru {
21359bd0427SVlad Dogaru 	(*counter)++;
21459bd0427SVlad Dogaru 	if (*counter != 1)
21559bd0427SVlad Dogaru 		/* Bit is already active, nothing to do. */
21659bd0427SVlad Dogaru 		return 0;
21759bd0427SVlad Dogaru 
21859bd0427SVlad Dogaru 	return regmap_update_bits(data->regmap, reg, bitmask, bitmask);
21959bd0427SVlad Dogaru }
22059bd0427SVlad Dogaru 
22159bd0427SVlad Dogaru static int sx9500_dec_users(struct sx9500_data *data, int *counter,
22259bd0427SVlad Dogaru 			    unsigned int reg, unsigned int bitmask)
22359bd0427SVlad Dogaru {
22459bd0427SVlad Dogaru 	(*counter)--;
22559bd0427SVlad Dogaru 	if (*counter != 0)
22659bd0427SVlad Dogaru 		/* There are more users, do not deactivate. */
22759bd0427SVlad Dogaru 		return 0;
22859bd0427SVlad Dogaru 
22959bd0427SVlad Dogaru 	return regmap_update_bits(data->regmap, reg, bitmask, 0);
23059bd0427SVlad Dogaru }
23159bd0427SVlad Dogaru 
23259bd0427SVlad Dogaru static int sx9500_inc_chan_users(struct sx9500_data *data, int chan)
23359bd0427SVlad Dogaru {
23459bd0427SVlad Dogaru 	return sx9500_inc_users(data, &data->channel_users[chan],
23559bd0427SVlad Dogaru 				SX9500_REG_PROX_CTRL0, BIT(chan));
23659bd0427SVlad Dogaru }
23759bd0427SVlad Dogaru 
23859bd0427SVlad Dogaru static int sx9500_dec_chan_users(struct sx9500_data *data, int chan)
23959bd0427SVlad Dogaru {
24059bd0427SVlad Dogaru 	return sx9500_dec_users(data, &data->channel_users[chan],
24159bd0427SVlad Dogaru 				SX9500_REG_PROX_CTRL0, BIT(chan));
24259bd0427SVlad Dogaru }
24359bd0427SVlad Dogaru 
24459bd0427SVlad Dogaru static int sx9500_inc_data_rdy_users(struct sx9500_data *data)
24559bd0427SVlad Dogaru {
24659bd0427SVlad Dogaru 	return sx9500_inc_users(data, &data->data_rdy_users,
24759bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK, SX9500_CONVDONE_IRQ);
24859bd0427SVlad Dogaru }
24959bd0427SVlad Dogaru 
25059bd0427SVlad Dogaru static int sx9500_dec_data_rdy_users(struct sx9500_data *data)
25159bd0427SVlad Dogaru {
25259bd0427SVlad Dogaru 	return sx9500_dec_users(data, &data->data_rdy_users,
25359bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK, SX9500_CONVDONE_IRQ);
25459bd0427SVlad Dogaru }
25559bd0427SVlad Dogaru 
25659bd0427SVlad Dogaru static int sx9500_inc_close_far_users(struct sx9500_data *data)
25759bd0427SVlad Dogaru {
25859bd0427SVlad Dogaru 	return sx9500_inc_users(data, &data->close_far_users,
25959bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK,
26059bd0427SVlad Dogaru 				SX9500_CLOSE_IRQ | SX9500_FAR_IRQ);
26159bd0427SVlad Dogaru }
26259bd0427SVlad Dogaru 
26359bd0427SVlad Dogaru static int sx9500_dec_close_far_users(struct sx9500_data *data)
26459bd0427SVlad Dogaru {
26559bd0427SVlad Dogaru 	return sx9500_dec_users(data, &data->close_far_users,
26659bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK,
26759bd0427SVlad Dogaru 				SX9500_CLOSE_IRQ | SX9500_FAR_IRQ);
26859bd0427SVlad Dogaru }
26959bd0427SVlad Dogaru 
27059bd0427SVlad Dogaru static int sx9500_read_prox_data(struct sx9500_data *data,
2714193c0f1SVlad Dogaru 				 const struct iio_chan_spec *chan,
2724193c0f1SVlad Dogaru 				 int *val)
2734193c0f1SVlad Dogaru {
2744193c0f1SVlad Dogaru 	int ret;
2754193c0f1SVlad Dogaru 	__be16 regval;
2764193c0f1SVlad Dogaru 
2774193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_SENSOR_SEL, chan->channel);
2784193c0f1SVlad Dogaru 	if (ret < 0)
2794193c0f1SVlad Dogaru 		return ret;
2804193c0f1SVlad Dogaru 
2814193c0f1SVlad Dogaru 	ret = regmap_bulk_read(data->regmap, SX9500_REG_USE_MSB, &regval, 2);
2824193c0f1SVlad Dogaru 	if (ret < 0)
2834193c0f1SVlad Dogaru 		return ret;
2844193c0f1SVlad Dogaru 
285fd1883f0SDaniel Baluta 	*val = be16_to_cpu(regval);
2864193c0f1SVlad Dogaru 
2874193c0f1SVlad Dogaru 	return IIO_VAL_INT;
2884193c0f1SVlad Dogaru }
2894193c0f1SVlad Dogaru 
29059bd0427SVlad Dogaru /*
29159bd0427SVlad Dogaru  * If we have no interrupt support, we have to wait for a scan period
29259bd0427SVlad Dogaru  * after enabling a channel to get a result.
29359bd0427SVlad Dogaru  */
29459bd0427SVlad Dogaru static int sx9500_wait_for_sample(struct sx9500_data *data)
29559bd0427SVlad Dogaru {
29659bd0427SVlad Dogaru 	int ret;
29759bd0427SVlad Dogaru 	unsigned int val;
29859bd0427SVlad Dogaru 
29959bd0427SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &val);
30059bd0427SVlad Dogaru 	if (ret < 0)
30159bd0427SVlad Dogaru 		return ret;
30259bd0427SVlad Dogaru 
30359bd0427SVlad Dogaru 	val = (val & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
30459bd0427SVlad Dogaru 
30559bd0427SVlad Dogaru 	msleep(sx9500_scan_period_table[val]);
30659bd0427SVlad Dogaru 
30759bd0427SVlad Dogaru 	return 0;
30859bd0427SVlad Dogaru }
30959bd0427SVlad Dogaru 
31059bd0427SVlad Dogaru static int sx9500_read_proximity(struct sx9500_data *data,
31159bd0427SVlad Dogaru 				 const struct iio_chan_spec *chan,
31259bd0427SVlad Dogaru 				 int *val)
31359bd0427SVlad Dogaru {
31459bd0427SVlad Dogaru 	int ret;
31559bd0427SVlad Dogaru 
31659bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
31759bd0427SVlad Dogaru 
31859bd0427SVlad Dogaru 	ret = sx9500_inc_chan_users(data, chan->channel);
31959bd0427SVlad Dogaru 	if (ret < 0)
32059bd0427SVlad Dogaru 		goto out;
32159bd0427SVlad Dogaru 
32259bd0427SVlad Dogaru 	ret = sx9500_inc_data_rdy_users(data);
32359bd0427SVlad Dogaru 	if (ret < 0)
32459bd0427SVlad Dogaru 		goto out_dec_chan;
32559bd0427SVlad Dogaru 
32659bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
32759bd0427SVlad Dogaru 
32859bd0427SVlad Dogaru 	if (data->client->irq > 0)
32959bd0427SVlad Dogaru 		ret = wait_for_completion_interruptible(&data->completion);
33059bd0427SVlad Dogaru 	else
33159bd0427SVlad Dogaru 		ret = sx9500_wait_for_sample(data);
33259bd0427SVlad Dogaru 
33359bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
33459bd0427SVlad Dogaru 
335657c7ff5SVlad Dogaru 	if (ret < 0)
336657c7ff5SVlad Dogaru 		goto out_dec_data_rdy;
337657c7ff5SVlad Dogaru 
33859bd0427SVlad Dogaru 	ret = sx9500_read_prox_data(data, chan, val);
33959bd0427SVlad Dogaru 	if (ret < 0)
340657c7ff5SVlad Dogaru 		goto out_dec_data_rdy;
34159bd0427SVlad Dogaru 
34259bd0427SVlad Dogaru 	ret = sx9500_dec_data_rdy_users(data);
34359bd0427SVlad Dogaru 	if (ret < 0)
344657c7ff5SVlad Dogaru 		goto out_dec_chan;
345657c7ff5SVlad Dogaru 
346657c7ff5SVlad Dogaru 	ret = sx9500_dec_chan_users(data, chan->channel);
347657c7ff5SVlad Dogaru 	if (ret < 0)
34859bd0427SVlad Dogaru 		goto out;
34959bd0427SVlad Dogaru 
35059bd0427SVlad Dogaru 	ret = IIO_VAL_INT;
35159bd0427SVlad Dogaru 
35259bd0427SVlad Dogaru 	goto out;
35359bd0427SVlad Dogaru 
354657c7ff5SVlad Dogaru out_dec_data_rdy:
355657c7ff5SVlad Dogaru 	sx9500_dec_data_rdy_users(data);
35659bd0427SVlad Dogaru out_dec_chan:
35759bd0427SVlad Dogaru 	sx9500_dec_chan_users(data, chan->channel);
35859bd0427SVlad Dogaru out:
35959bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
36059bd0427SVlad Dogaru 	reinit_completion(&data->completion);
36159bd0427SVlad Dogaru 
36259bd0427SVlad Dogaru 	return ret;
36359bd0427SVlad Dogaru }
36459bd0427SVlad Dogaru 
3654193c0f1SVlad Dogaru static int sx9500_read_samp_freq(struct sx9500_data *data,
3664193c0f1SVlad Dogaru 				 int *val, int *val2)
3674193c0f1SVlad Dogaru {
3684193c0f1SVlad Dogaru 	int ret;
3694193c0f1SVlad Dogaru 	unsigned int regval;
3704193c0f1SVlad Dogaru 
3714193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
3724193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &regval);
3734193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
3744193c0f1SVlad Dogaru 
3754193c0f1SVlad Dogaru 	if (ret < 0)
3764193c0f1SVlad Dogaru 		return ret;
3774193c0f1SVlad Dogaru 
3784193c0f1SVlad Dogaru 	regval = (regval & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
3794193c0f1SVlad Dogaru 	*val = sx9500_samp_freq_table[regval].val;
3804193c0f1SVlad Dogaru 	*val2 = sx9500_samp_freq_table[regval].val2;
3814193c0f1SVlad Dogaru 
3824193c0f1SVlad Dogaru 	return IIO_VAL_INT_PLUS_MICRO;
3834193c0f1SVlad Dogaru }
3844193c0f1SVlad Dogaru 
3854193c0f1SVlad Dogaru static int sx9500_read_raw(struct iio_dev *indio_dev,
3864193c0f1SVlad Dogaru 			   const struct iio_chan_spec *chan,
3874193c0f1SVlad Dogaru 			   int *val, int *val2, long mask)
3884193c0f1SVlad Dogaru {
3894193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
3904193c0f1SVlad Dogaru 
3914193c0f1SVlad Dogaru 	switch (chan->type) {
3924193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
3934193c0f1SVlad Dogaru 		switch (mask) {
3944193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_RAW:
3954193c0f1SVlad Dogaru 			if (iio_buffer_enabled(indio_dev))
3964193c0f1SVlad Dogaru 				return -EBUSY;
39759bd0427SVlad Dogaru 			return sx9500_read_proximity(data, chan, val);
3984193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
3994193c0f1SVlad Dogaru 			return sx9500_read_samp_freq(data, val, val2);
4004193c0f1SVlad Dogaru 		default:
4014193c0f1SVlad Dogaru 			return -EINVAL;
4024193c0f1SVlad Dogaru 		}
4034193c0f1SVlad Dogaru 	default:
4044193c0f1SVlad Dogaru 		return -EINVAL;
4054193c0f1SVlad Dogaru 	}
4064193c0f1SVlad Dogaru }
4074193c0f1SVlad Dogaru 
4084193c0f1SVlad Dogaru static int sx9500_set_samp_freq(struct sx9500_data *data,
4094193c0f1SVlad Dogaru 				int val, int val2)
4104193c0f1SVlad Dogaru {
4114193c0f1SVlad Dogaru 	int i, ret;
4124193c0f1SVlad Dogaru 
4134193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_samp_freq_table); i++)
4144193c0f1SVlad Dogaru 		if (val == sx9500_samp_freq_table[i].val &&
4154193c0f1SVlad Dogaru 		    val2 == sx9500_samp_freq_table[i].val2)
4164193c0f1SVlad Dogaru 			break;
4174193c0f1SVlad Dogaru 
4184193c0f1SVlad Dogaru 	if (i == ARRAY_SIZE(sx9500_samp_freq_table))
4194193c0f1SVlad Dogaru 		return -EINVAL;
4204193c0f1SVlad Dogaru 
4214193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
4224193c0f1SVlad Dogaru 
4234193c0f1SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
4244193c0f1SVlad Dogaru 				 SX9500_SCAN_PERIOD_MASK,
4254193c0f1SVlad Dogaru 				 i << SX9500_SCAN_PERIOD_SHIFT);
4264193c0f1SVlad Dogaru 
4274193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
4284193c0f1SVlad Dogaru 
4294193c0f1SVlad Dogaru 	return ret;
4304193c0f1SVlad Dogaru }
4314193c0f1SVlad Dogaru 
4324193c0f1SVlad Dogaru static int sx9500_write_raw(struct iio_dev *indio_dev,
4334193c0f1SVlad Dogaru 			    const struct iio_chan_spec *chan,
4344193c0f1SVlad Dogaru 			    int val, int val2, long mask)
4354193c0f1SVlad Dogaru {
4364193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4374193c0f1SVlad Dogaru 
4384193c0f1SVlad Dogaru 	switch (chan->type) {
4394193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
4404193c0f1SVlad Dogaru 		switch (mask) {
4414193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
4424193c0f1SVlad Dogaru 			return sx9500_set_samp_freq(data, val, val2);
4434193c0f1SVlad Dogaru 		default:
4444193c0f1SVlad Dogaru 			return -EINVAL;
4454193c0f1SVlad Dogaru 		}
4464193c0f1SVlad Dogaru 	default:
4474193c0f1SVlad Dogaru 		return -EINVAL;
4484193c0f1SVlad Dogaru 	}
4494193c0f1SVlad Dogaru }
4504193c0f1SVlad Dogaru 
4514193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_handler(int irq, void *private)
4524193c0f1SVlad Dogaru {
4534193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = private;
4544193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4554193c0f1SVlad Dogaru 
4564193c0f1SVlad Dogaru 	if (data->trigger_enabled)
4574193c0f1SVlad Dogaru 		iio_trigger_poll(data->trig);
4584193c0f1SVlad Dogaru 
4594193c0f1SVlad Dogaru 	/*
4604193c0f1SVlad Dogaru 	 * Even if no event is enabled, we need to wake the thread to
4614193c0f1SVlad Dogaru 	 * clear the interrupt state by reading SX9500_REG_IRQ_SRC.  It
4624193c0f1SVlad Dogaru 	 * is not possible to do that here because regmap_read takes a
4634193c0f1SVlad Dogaru 	 * mutex.
4644193c0f1SVlad Dogaru 	 */
4654193c0f1SVlad Dogaru 	return IRQ_WAKE_THREAD;
4664193c0f1SVlad Dogaru }
4674193c0f1SVlad Dogaru 
46859bd0427SVlad Dogaru static void sx9500_push_events(struct iio_dev *indio_dev)
4694193c0f1SVlad Dogaru {
4704193c0f1SVlad Dogaru 	int ret;
4714193c0f1SVlad Dogaru 	unsigned int val, chan;
47259bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4734193c0f1SVlad Dogaru 
4744193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
4754193c0f1SVlad Dogaru 	if (ret < 0) {
4764193c0f1SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
47759bd0427SVlad Dogaru 		return;
4784193c0f1SVlad Dogaru 	}
4794193c0f1SVlad Dogaru 
4804193c0f1SVlad Dogaru 	val >>= SX9500_PROXSTAT_SHIFT;
4814193c0f1SVlad Dogaru 	for (chan = 0; chan < SX9500_NUM_CHANNELS; chan++) {
4824193c0f1SVlad Dogaru 		int dir;
4834193c0f1SVlad Dogaru 		u64 ev;
4844193c0f1SVlad Dogaru 		bool new_prox = val & BIT(chan);
4854193c0f1SVlad Dogaru 
4864193c0f1SVlad Dogaru 		if (!data->event_enabled[chan])
4874193c0f1SVlad Dogaru 			continue;
4884193c0f1SVlad Dogaru 		if (new_prox == data->prox_stat[chan])
4894193c0f1SVlad Dogaru 			/* No change on this channel. */
4904193c0f1SVlad Dogaru 			continue;
4914193c0f1SVlad Dogaru 
49259bd0427SVlad Dogaru 		dir = new_prox ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
49359bd0427SVlad Dogaru 		ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,
49459bd0427SVlad Dogaru 					  IIO_EV_TYPE_THRESH, dir);
495bc2b7dabSGregor Boirie 		iio_push_event(indio_dev, ev, iio_get_time_ns(indio_dev));
4964193c0f1SVlad Dogaru 		data->prox_stat[chan] = new_prox;
4974193c0f1SVlad Dogaru 	}
49859bd0427SVlad Dogaru }
49959bd0427SVlad Dogaru 
50059bd0427SVlad Dogaru static irqreturn_t sx9500_irq_thread_handler(int irq, void *private)
50159bd0427SVlad Dogaru {
50259bd0427SVlad Dogaru 	struct iio_dev *indio_dev = private;
50359bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
50459bd0427SVlad Dogaru 	int ret;
50559bd0427SVlad Dogaru 	unsigned int val;
50659bd0427SVlad Dogaru 
50759bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
50859bd0427SVlad Dogaru 
50959bd0427SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
51059bd0427SVlad Dogaru 	if (ret < 0) {
51159bd0427SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
51259bd0427SVlad Dogaru 		goto out;
51359bd0427SVlad Dogaru 	}
51459bd0427SVlad Dogaru 
51559bd0427SVlad Dogaru 	if (val & (SX9500_CLOSE_IRQ | SX9500_FAR_IRQ))
51659bd0427SVlad Dogaru 		sx9500_push_events(indio_dev);
51759bd0427SVlad Dogaru 
51859bd0427SVlad Dogaru 	if (val & SX9500_CONVDONE_IRQ)
519*8c11e161SDaniel Wagner 		complete(&data->completion);
5204193c0f1SVlad Dogaru 
5214193c0f1SVlad Dogaru out:
5224193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5234193c0f1SVlad Dogaru 
5244193c0f1SVlad Dogaru 	return IRQ_HANDLED;
5254193c0f1SVlad Dogaru }
5264193c0f1SVlad Dogaru 
5274193c0f1SVlad Dogaru static int sx9500_read_event_config(struct iio_dev *indio_dev,
5284193c0f1SVlad Dogaru 				    const struct iio_chan_spec *chan,
5294193c0f1SVlad Dogaru 				    enum iio_event_type type,
5304193c0f1SVlad Dogaru 				    enum iio_event_direction dir)
5314193c0f1SVlad Dogaru {
5324193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
5334193c0f1SVlad Dogaru 
5344193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
5354193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
5364193c0f1SVlad Dogaru 		return -EINVAL;
5374193c0f1SVlad Dogaru 
5384193c0f1SVlad Dogaru 	return data->event_enabled[chan->channel];
5394193c0f1SVlad Dogaru }
5404193c0f1SVlad Dogaru 
5414193c0f1SVlad Dogaru static int sx9500_write_event_config(struct iio_dev *indio_dev,
5424193c0f1SVlad Dogaru 				     const struct iio_chan_spec *chan,
5434193c0f1SVlad Dogaru 				     enum iio_event_type type,
5444193c0f1SVlad Dogaru 				     enum iio_event_direction dir,
5454193c0f1SVlad Dogaru 				     int state)
5464193c0f1SVlad Dogaru {
5474193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
54859bd0427SVlad Dogaru 	int ret;
5494193c0f1SVlad Dogaru 
5504193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
5514193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
5524193c0f1SVlad Dogaru 		return -EINVAL;
5534193c0f1SVlad Dogaru 
5544193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
5554193c0f1SVlad Dogaru 
55659bd0427SVlad Dogaru 	if (state == 1) {
55759bd0427SVlad Dogaru 		ret = sx9500_inc_chan_users(data, chan->channel);
55859bd0427SVlad Dogaru 		if (ret < 0)
55959bd0427SVlad Dogaru 			goto out_unlock;
56059bd0427SVlad Dogaru 		ret = sx9500_inc_close_far_users(data);
56159bd0427SVlad Dogaru 		if (ret < 0)
56259bd0427SVlad Dogaru 			goto out_undo_chan;
56359bd0427SVlad Dogaru 	} else {
56459bd0427SVlad Dogaru 		ret = sx9500_dec_chan_users(data, chan->channel);
56559bd0427SVlad Dogaru 		if (ret < 0)
56659bd0427SVlad Dogaru 			goto out_unlock;
56759bd0427SVlad Dogaru 		ret = sx9500_dec_close_far_users(data);
56859bd0427SVlad Dogaru 		if (ret < 0)
56959bd0427SVlad Dogaru 			goto out_undo_chan;
5704193c0f1SVlad Dogaru 	}
5714193c0f1SVlad Dogaru 
57259bd0427SVlad Dogaru 	data->event_enabled[chan->channel] = state;
57359bd0427SVlad Dogaru 	goto out_unlock;
57459bd0427SVlad Dogaru 
57559bd0427SVlad Dogaru out_undo_chan:
57659bd0427SVlad Dogaru 	if (state == 1)
57759bd0427SVlad Dogaru 		sx9500_dec_chan_users(data, chan->channel);
5784193c0f1SVlad Dogaru 	else
57959bd0427SVlad Dogaru 		sx9500_inc_chan_users(data, chan->channel);
58059bd0427SVlad Dogaru out_unlock:
5814193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5824193c0f1SVlad Dogaru 	return ret;
5834193c0f1SVlad Dogaru }
5844193c0f1SVlad Dogaru 
5854193c0f1SVlad Dogaru static int sx9500_update_scan_mode(struct iio_dev *indio_dev,
5864193c0f1SVlad Dogaru 				   const unsigned long *scan_mask)
5874193c0f1SVlad Dogaru {
5884193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
5894193c0f1SVlad Dogaru 
5904193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
5914193c0f1SVlad Dogaru 	kfree(data->buffer);
5924193c0f1SVlad Dogaru 	data->buffer = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
5934193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5944193c0f1SVlad Dogaru 
5954193c0f1SVlad Dogaru 	if (data->buffer == NULL)
5964193c0f1SVlad Dogaru 		return -ENOMEM;
5974193c0f1SVlad Dogaru 
5984193c0f1SVlad Dogaru 	return 0;
5994193c0f1SVlad Dogaru }
6004193c0f1SVlad Dogaru 
6014193c0f1SVlad Dogaru static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
6024193c0f1SVlad Dogaru 	"2.500000 3.333333 5 6.666666 8.333333 11.111111 16.666666 33.333333");
6034193c0f1SVlad Dogaru 
6044193c0f1SVlad Dogaru static struct attribute *sx9500_attributes[] = {
6054193c0f1SVlad Dogaru 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
6064193c0f1SVlad Dogaru 	NULL,
6074193c0f1SVlad Dogaru };
6084193c0f1SVlad Dogaru 
6094193c0f1SVlad Dogaru static const struct attribute_group sx9500_attribute_group = {
6104193c0f1SVlad Dogaru 	.attrs = sx9500_attributes,
6114193c0f1SVlad Dogaru };
6124193c0f1SVlad Dogaru 
6134193c0f1SVlad Dogaru static const struct iio_info sx9500_info = {
6144193c0f1SVlad Dogaru 	.driver_module = THIS_MODULE,
6154193c0f1SVlad Dogaru 	.attrs = &sx9500_attribute_group,
6164193c0f1SVlad Dogaru 	.read_raw = &sx9500_read_raw,
6174193c0f1SVlad Dogaru 	.write_raw = &sx9500_write_raw,
6184193c0f1SVlad Dogaru 	.read_event_config = &sx9500_read_event_config,
6194193c0f1SVlad Dogaru 	.write_event_config = &sx9500_write_event_config,
6204193c0f1SVlad Dogaru 	.update_scan_mode = &sx9500_update_scan_mode,
6214193c0f1SVlad Dogaru };
6224193c0f1SVlad Dogaru 
6234193c0f1SVlad Dogaru static int sx9500_set_trigger_state(struct iio_trigger *trig,
6244193c0f1SVlad Dogaru 				    bool state)
6254193c0f1SVlad Dogaru {
6264193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
6274193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
6284193c0f1SVlad Dogaru 	int ret;
6294193c0f1SVlad Dogaru 
6304193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
6314193c0f1SVlad Dogaru 
63259bd0427SVlad Dogaru 	if (state)
63359bd0427SVlad Dogaru 		ret = sx9500_inc_data_rdy_users(data);
63459bd0427SVlad Dogaru 	else
63559bd0427SVlad Dogaru 		ret = sx9500_dec_data_rdy_users(data);
63659bd0427SVlad Dogaru 	if (ret < 0)
63759bd0427SVlad Dogaru 		goto out;
63859bd0427SVlad Dogaru 
6394193c0f1SVlad Dogaru 	data->trigger_enabled = state;
6404193c0f1SVlad Dogaru 
64159bd0427SVlad Dogaru out:
6424193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
6434193c0f1SVlad Dogaru 
6444193c0f1SVlad Dogaru 	return ret;
6454193c0f1SVlad Dogaru }
6464193c0f1SVlad Dogaru 
6474193c0f1SVlad Dogaru static const struct iio_trigger_ops sx9500_trigger_ops = {
6484193c0f1SVlad Dogaru 	.set_trigger_state = sx9500_set_trigger_state,
6494193c0f1SVlad Dogaru 	.owner = THIS_MODULE,
6504193c0f1SVlad Dogaru };
6514193c0f1SVlad Dogaru 
6524193c0f1SVlad Dogaru static irqreturn_t sx9500_trigger_handler(int irq, void *private)
6534193c0f1SVlad Dogaru {
6544193c0f1SVlad Dogaru 	struct iio_poll_func *pf = private;
6554193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = pf->indio_dev;
6564193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
6574193c0f1SVlad Dogaru 	int val, bit, ret, i = 0;
6584193c0f1SVlad Dogaru 
6594193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
6604193c0f1SVlad Dogaru 
66170dddeeeSOctavian Purdila 	for_each_set_bit(bit, indio_dev->active_scan_mask,
6624193c0f1SVlad Dogaru 			 indio_dev->masklength) {
66359bd0427SVlad Dogaru 		ret = sx9500_read_prox_data(data, &indio_dev->channels[bit],
6644193c0f1SVlad Dogaru 					    &val);
6654193c0f1SVlad Dogaru 		if (ret < 0)
6664193c0f1SVlad Dogaru 			goto out;
6674193c0f1SVlad Dogaru 
6684193c0f1SVlad Dogaru 		data->buffer[i++] = val;
6694193c0f1SVlad Dogaru 	}
6704193c0f1SVlad Dogaru 
6714193c0f1SVlad Dogaru 	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
672bc2b7dabSGregor Boirie 					   iio_get_time_ns(indio_dev));
6734193c0f1SVlad Dogaru 
6744193c0f1SVlad Dogaru out:
6754193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
6764193c0f1SVlad Dogaru 
6774193c0f1SVlad Dogaru 	iio_trigger_notify_done(indio_dev->trig);
6784193c0f1SVlad Dogaru 
6794193c0f1SVlad Dogaru 	return IRQ_HANDLED;
6804193c0f1SVlad Dogaru }
6814193c0f1SVlad Dogaru 
68259bd0427SVlad Dogaru static int sx9500_buffer_preenable(struct iio_dev *indio_dev)
68359bd0427SVlad Dogaru {
68459bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
685897993feSGeert Uytterhoeven 	int ret = 0, i;
68659bd0427SVlad Dogaru 
68759bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
68859bd0427SVlad Dogaru 
68959bd0427SVlad Dogaru 	for (i = 0; i < SX9500_NUM_CHANNELS; i++)
69059bd0427SVlad Dogaru 		if (test_bit(i, indio_dev->active_scan_mask)) {
69159bd0427SVlad Dogaru 			ret = sx9500_inc_chan_users(data, i);
69259bd0427SVlad Dogaru 			if (ret)
69359bd0427SVlad Dogaru 				break;
69459bd0427SVlad Dogaru 		}
69559bd0427SVlad Dogaru 
69659bd0427SVlad Dogaru 	if (ret)
69759bd0427SVlad Dogaru 		for (i = i - 1; i >= 0; i--)
69859bd0427SVlad Dogaru 			if (test_bit(i, indio_dev->active_scan_mask))
69959bd0427SVlad Dogaru 				sx9500_dec_chan_users(data, i);
70059bd0427SVlad Dogaru 
70159bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
70259bd0427SVlad Dogaru 
70359bd0427SVlad Dogaru 	return ret;
70459bd0427SVlad Dogaru }
70559bd0427SVlad Dogaru 
70659bd0427SVlad Dogaru static int sx9500_buffer_predisable(struct iio_dev *indio_dev)
70759bd0427SVlad Dogaru {
70859bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
709897993feSGeert Uytterhoeven 	int ret = 0, i;
71059bd0427SVlad Dogaru 
71159bd0427SVlad Dogaru 	iio_triggered_buffer_predisable(indio_dev);
71259bd0427SVlad Dogaru 
71359bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
71459bd0427SVlad Dogaru 
71559bd0427SVlad Dogaru 	for (i = 0; i < SX9500_NUM_CHANNELS; i++)
71659bd0427SVlad Dogaru 		if (test_bit(i, indio_dev->active_scan_mask)) {
71759bd0427SVlad Dogaru 			ret = sx9500_dec_chan_users(data, i);
71859bd0427SVlad Dogaru 			if (ret)
71959bd0427SVlad Dogaru 				break;
72059bd0427SVlad Dogaru 		}
72159bd0427SVlad Dogaru 
72259bd0427SVlad Dogaru 	if (ret)
72359bd0427SVlad Dogaru 		for (i = i - 1; i >= 0; i--)
72459bd0427SVlad Dogaru 			if (test_bit(i, indio_dev->active_scan_mask))
72559bd0427SVlad Dogaru 				sx9500_inc_chan_users(data, i);
72659bd0427SVlad Dogaru 
72759bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
72859bd0427SVlad Dogaru 
72959bd0427SVlad Dogaru 	return ret;
73059bd0427SVlad Dogaru }
73159bd0427SVlad Dogaru 
73259bd0427SVlad Dogaru static const struct iio_buffer_setup_ops sx9500_buffer_setup_ops = {
73359bd0427SVlad Dogaru 	.preenable = sx9500_buffer_preenable,
73459bd0427SVlad Dogaru 	.postenable = iio_triggered_buffer_postenable,
73559bd0427SVlad Dogaru 	.predisable = sx9500_buffer_predisable,
73659bd0427SVlad Dogaru };
73759bd0427SVlad Dogaru 
7384193c0f1SVlad Dogaru struct sx9500_reg_default {
7394193c0f1SVlad Dogaru 	u8 reg;
7404193c0f1SVlad Dogaru 	u8 def;
7414193c0f1SVlad Dogaru };
7424193c0f1SVlad Dogaru 
7434193c0f1SVlad Dogaru static const struct sx9500_reg_default sx9500_default_regs[] = {
7444193c0f1SVlad Dogaru 	{
7454193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL1,
7464193c0f1SVlad Dogaru 		/* Shield enabled, small range. */
7474193c0f1SVlad Dogaru 		.def = 0x43,
7484193c0f1SVlad Dogaru 	},
7494193c0f1SVlad Dogaru 	{
7504193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL2,
7514193c0f1SVlad Dogaru 		/* x8 gain, 167kHz frequency, finest resolution. */
7524193c0f1SVlad Dogaru 		.def = 0x77,
7534193c0f1SVlad Dogaru 	},
7544193c0f1SVlad Dogaru 	{
7554193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL3,
7564193c0f1SVlad Dogaru 		/* Doze enabled, 2x scan period doze, no raw filter. */
7574193c0f1SVlad Dogaru 		.def = 0x40,
7584193c0f1SVlad Dogaru 	},
7594193c0f1SVlad Dogaru 	{
7604193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL4,
7614193c0f1SVlad Dogaru 		/* Average threshold. */
7624193c0f1SVlad Dogaru 		.def = 0x30,
7634193c0f1SVlad Dogaru 	},
7644193c0f1SVlad Dogaru 	{
7654193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL5,
7664193c0f1SVlad Dogaru 		/*
7674193c0f1SVlad Dogaru 		 * Debouncer off, lowest average negative filter,
7684193c0f1SVlad Dogaru 		 * highest average postive filter.
7694193c0f1SVlad Dogaru 		 */
7704193c0f1SVlad Dogaru 		.def = 0x0f,
7714193c0f1SVlad Dogaru 	},
7724193c0f1SVlad Dogaru 	{
7734193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL6,
7744193c0f1SVlad Dogaru 		/* Proximity detection threshold: 280 */
7754193c0f1SVlad Dogaru 		.def = 0x0e,
7764193c0f1SVlad Dogaru 	},
7774193c0f1SVlad Dogaru 	{
7784193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL7,
7794193c0f1SVlad Dogaru 		/*
7804193c0f1SVlad Dogaru 		 * No automatic compensation, compensate each pin
7814193c0f1SVlad Dogaru 		 * independently, proximity hysteresis: 32, close
7824193c0f1SVlad Dogaru 		 * debouncer off, far debouncer off.
7834193c0f1SVlad Dogaru 		 */
7844193c0f1SVlad Dogaru 		.def = 0x00,
7854193c0f1SVlad Dogaru 	},
7864193c0f1SVlad Dogaru 	{
7874193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL8,
7884193c0f1SVlad Dogaru 		/* No stuck timeout, no periodic compensation. */
7894193c0f1SVlad Dogaru 		.def = 0x00,
7904193c0f1SVlad Dogaru 	},
7914193c0f1SVlad Dogaru 	{
7924193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL0,
79359bd0427SVlad Dogaru 		/* Scan period: 30ms, all sensors disabled. */
79459bd0427SVlad Dogaru 		.def = 0x00,
7954193c0f1SVlad Dogaru 	},
7964193c0f1SVlad Dogaru };
7974193c0f1SVlad Dogaru 
79859bd0427SVlad Dogaru /* Activate all channels and perform an initial compensation. */
79959bd0427SVlad Dogaru static int sx9500_init_compensation(struct iio_dev *indio_dev)
80059bd0427SVlad Dogaru {
80159bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
80259bd0427SVlad Dogaru 	int i, ret;
80359bd0427SVlad Dogaru 	unsigned int val;
80459bd0427SVlad Dogaru 
80559bd0427SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
80668958bd5SVlad Dogaru 				 SX9500_CHAN_MASK, SX9500_CHAN_MASK);
80759bd0427SVlad Dogaru 	if (ret < 0)
80859bd0427SVlad Dogaru 		return ret;
80959bd0427SVlad Dogaru 
81059bd0427SVlad Dogaru 	for (i = 10; i >= 0; i--) {
81159bd0427SVlad Dogaru 		usleep_range(10000, 20000);
81259bd0427SVlad Dogaru 		ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
81359bd0427SVlad Dogaru 		if (ret < 0)
81459bd0427SVlad Dogaru 			goto out;
81559bd0427SVlad Dogaru 		if (!(val & SX9500_COMPSTAT_MASK))
81659bd0427SVlad Dogaru 			break;
81759bd0427SVlad Dogaru 	}
81859bd0427SVlad Dogaru 
81959bd0427SVlad Dogaru 	if (i < 0) {
82059bd0427SVlad Dogaru 		dev_err(&data->client->dev, "initial compensation timed out");
82159bd0427SVlad Dogaru 		ret = -ETIMEDOUT;
82259bd0427SVlad Dogaru 	}
82359bd0427SVlad Dogaru 
82459bd0427SVlad Dogaru out:
82559bd0427SVlad Dogaru 	regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
82668958bd5SVlad Dogaru 			   SX9500_CHAN_MASK, 0);
82759bd0427SVlad Dogaru 	return ret;
82859bd0427SVlad Dogaru }
82959bd0427SVlad Dogaru 
8304193c0f1SVlad Dogaru static int sx9500_init_device(struct iio_dev *indio_dev)
8314193c0f1SVlad Dogaru {
8324193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
8334193c0f1SVlad Dogaru 	int ret, i;
8344193c0f1SVlad Dogaru 	unsigned int val;
8354193c0f1SVlad Dogaru 
83645fd5f8eSVlad Dogaru 	if (data->gpiod_rst) {
83745fd5f8eSVlad Dogaru 		gpiod_set_value_cansleep(data->gpiod_rst, 0);
83845fd5f8eSVlad Dogaru 		usleep_range(1000, 2000);
83945fd5f8eSVlad Dogaru 		gpiod_set_value_cansleep(data->gpiod_rst, 1);
84045fd5f8eSVlad Dogaru 		usleep_range(1000, 2000);
84145fd5f8eSVlad Dogaru 	}
84245fd5f8eSVlad Dogaru 
8434193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_IRQ_MSK, 0);
8444193c0f1SVlad Dogaru 	if (ret < 0)
8454193c0f1SVlad Dogaru 		return ret;
8464193c0f1SVlad Dogaru 
8474193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_RESET,
8484193c0f1SVlad Dogaru 			   SX9500_SOFT_RESET);
8494193c0f1SVlad Dogaru 	if (ret < 0)
8504193c0f1SVlad Dogaru 		return ret;
8514193c0f1SVlad Dogaru 
8524193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
8534193c0f1SVlad Dogaru 	if (ret < 0)
8544193c0f1SVlad Dogaru 		return ret;
8554193c0f1SVlad Dogaru 
8564193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_default_regs); i++) {
8574193c0f1SVlad Dogaru 		ret = regmap_write(data->regmap,
8584193c0f1SVlad Dogaru 				   sx9500_default_regs[i].reg,
8594193c0f1SVlad Dogaru 				   sx9500_default_regs[i].def);
8604193c0f1SVlad Dogaru 		if (ret < 0)
8614193c0f1SVlad Dogaru 			return ret;
8624193c0f1SVlad Dogaru 	}
8634193c0f1SVlad Dogaru 
8641a30295aSJonathan Cameron 	return sx9500_init_compensation(indio_dev);
8654193c0f1SVlad Dogaru }
8664193c0f1SVlad Dogaru 
867821ace29SVlad Dogaru static void sx9500_gpio_probe(struct i2c_client *client,
8684193c0f1SVlad Dogaru 			      struct sx9500_data *data)
8694193c0f1SVlad Dogaru {
8704193c0f1SVlad Dogaru 	struct device *dev;
8714193c0f1SVlad Dogaru 
8724193c0f1SVlad Dogaru 	if (!client)
873821ace29SVlad Dogaru 		return;
8744193c0f1SVlad Dogaru 
8754193c0f1SVlad Dogaru 	dev = &client->dev;
8764193c0f1SVlad Dogaru 
87745fd5f8eSVlad Dogaru 	data->gpiod_rst = devm_gpiod_get_index(dev, SX9500_GPIO_RESET,
87845fd5f8eSVlad Dogaru 					       0, GPIOD_OUT_HIGH);
87945fd5f8eSVlad Dogaru 	if (IS_ERR(data->gpiod_rst)) {
88045fd5f8eSVlad Dogaru 		dev_warn(dev, "gpio get reset pin failed\n");
88145fd5f8eSVlad Dogaru 		data->gpiod_rst = NULL;
88245fd5f8eSVlad Dogaru 	}
8834193c0f1SVlad Dogaru }
8844193c0f1SVlad Dogaru 
8854193c0f1SVlad Dogaru static int sx9500_probe(struct i2c_client *client,
8864193c0f1SVlad Dogaru 			const struct i2c_device_id *id)
8874193c0f1SVlad Dogaru {
8884193c0f1SVlad Dogaru 	int ret;
8894193c0f1SVlad Dogaru 	struct iio_dev *indio_dev;
8904193c0f1SVlad Dogaru 	struct sx9500_data *data;
8914193c0f1SVlad Dogaru 
8924193c0f1SVlad Dogaru 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
8934193c0f1SVlad Dogaru 	if (indio_dev == NULL)
8944193c0f1SVlad Dogaru 		return -ENOMEM;
8954193c0f1SVlad Dogaru 
8964193c0f1SVlad Dogaru 	data = iio_priv(indio_dev);
8974193c0f1SVlad Dogaru 	data->client = client;
8984193c0f1SVlad Dogaru 	mutex_init(&data->mutex);
89959bd0427SVlad Dogaru 	init_completion(&data->completion);
9004193c0f1SVlad Dogaru 	data->trigger_enabled = false;
9014193c0f1SVlad Dogaru 
9024193c0f1SVlad Dogaru 	data->regmap = devm_regmap_init_i2c(client, &sx9500_regmap_config);
9034193c0f1SVlad Dogaru 	if (IS_ERR(data->regmap))
9044193c0f1SVlad Dogaru 		return PTR_ERR(data->regmap);
9054193c0f1SVlad Dogaru 
9064193c0f1SVlad Dogaru 	indio_dev->dev.parent = &client->dev;
9074193c0f1SVlad Dogaru 	indio_dev->name = SX9500_DRIVER_NAME;
9084193c0f1SVlad Dogaru 	indio_dev->channels = sx9500_channels;
9094193c0f1SVlad Dogaru 	indio_dev->num_channels = ARRAY_SIZE(sx9500_channels);
9104193c0f1SVlad Dogaru 	indio_dev->info = &sx9500_info;
9114193c0f1SVlad Dogaru 	indio_dev->modes = INDIO_DIRECT_MODE;
9124193c0f1SVlad Dogaru 	i2c_set_clientdata(client, indio_dev);
9134193c0f1SVlad Dogaru 
914821ace29SVlad Dogaru 	sx9500_gpio_probe(client, data);
9154193c0f1SVlad Dogaru 
91645fd5f8eSVlad Dogaru 	ret = sx9500_init_device(indio_dev);
91745fd5f8eSVlad Dogaru 	if (ret < 0)
91845fd5f8eSVlad Dogaru 		return ret;
91945fd5f8eSVlad Dogaru 
92059bd0427SVlad Dogaru 	if (client->irq <= 0)
92159bd0427SVlad Dogaru 		dev_warn(&client->dev, "no valid irq found\n");
92259bd0427SVlad Dogaru 	else {
9234193c0f1SVlad Dogaru 		ret = devm_request_threaded_irq(&client->dev, client->irq,
9244193c0f1SVlad Dogaru 				sx9500_irq_handler, sx9500_irq_thread_handler,
9254193c0f1SVlad Dogaru 				IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
9264193c0f1SVlad Dogaru 				SX9500_IRQ_NAME, indio_dev);
9274193c0f1SVlad Dogaru 		if (ret < 0)
9284193c0f1SVlad Dogaru 			return ret;
9294193c0f1SVlad Dogaru 
9304193c0f1SVlad Dogaru 		data->trig = devm_iio_trigger_alloc(&client->dev,
9314193c0f1SVlad Dogaru 				"%s-dev%d", indio_dev->name, indio_dev->id);
9324193c0f1SVlad Dogaru 		if (!data->trig)
9334193c0f1SVlad Dogaru 			return -ENOMEM;
9344193c0f1SVlad Dogaru 
9354193c0f1SVlad Dogaru 		data->trig->dev.parent = &client->dev;
9364193c0f1SVlad Dogaru 		data->trig->ops = &sx9500_trigger_ops;
9374193c0f1SVlad Dogaru 		iio_trigger_set_drvdata(data->trig, indio_dev);
9384193c0f1SVlad Dogaru 
9394193c0f1SVlad Dogaru 		ret = iio_trigger_register(data->trig);
9404193c0f1SVlad Dogaru 		if (ret)
9414193c0f1SVlad Dogaru 			return ret;
9424193c0f1SVlad Dogaru 	}
9434193c0f1SVlad Dogaru 
9444193c0f1SVlad Dogaru 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
94559bd0427SVlad Dogaru 					 sx9500_trigger_handler,
94659bd0427SVlad Dogaru 					 &sx9500_buffer_setup_ops);
9474193c0f1SVlad Dogaru 	if (ret < 0)
9484193c0f1SVlad Dogaru 		goto out_trigger_unregister;
9494193c0f1SVlad Dogaru 
9504193c0f1SVlad Dogaru 	ret = iio_device_register(indio_dev);
9514193c0f1SVlad Dogaru 	if (ret < 0)
9524193c0f1SVlad Dogaru 		goto out_buffer_cleanup;
9534193c0f1SVlad Dogaru 
9544193c0f1SVlad Dogaru 	return 0;
9554193c0f1SVlad Dogaru 
9564193c0f1SVlad Dogaru out_buffer_cleanup:
9574193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
9584193c0f1SVlad Dogaru out_trigger_unregister:
9594193c0f1SVlad Dogaru 	if (client->irq > 0)
9604193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
9614193c0f1SVlad Dogaru 
9624193c0f1SVlad Dogaru 	return ret;
9634193c0f1SVlad Dogaru }
9644193c0f1SVlad Dogaru 
9654193c0f1SVlad Dogaru static int sx9500_remove(struct i2c_client *client)
9664193c0f1SVlad Dogaru {
9674193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
9684193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
9694193c0f1SVlad Dogaru 
9704193c0f1SVlad Dogaru 	iio_device_unregister(indio_dev);
9714193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
9724193c0f1SVlad Dogaru 	if (client->irq > 0)
9734193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
9744193c0f1SVlad Dogaru 	kfree(data->buffer);
9754193c0f1SVlad Dogaru 
9764193c0f1SVlad Dogaru 	return 0;
9774193c0f1SVlad Dogaru }
9784193c0f1SVlad Dogaru 
9797840ffeeSVlad Dogaru #ifdef CONFIG_PM_SLEEP
9807840ffeeSVlad Dogaru static int sx9500_suspend(struct device *dev)
9817840ffeeSVlad Dogaru {
9827840ffeeSVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
9837840ffeeSVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
9847840ffeeSVlad Dogaru 	int ret;
9857840ffeeSVlad Dogaru 
9867840ffeeSVlad Dogaru 	mutex_lock(&data->mutex);
9877840ffeeSVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0,
9887840ffeeSVlad Dogaru 			  &data->suspend_ctrl0);
9897840ffeeSVlad Dogaru 	if (ret < 0)
9907840ffeeSVlad Dogaru 		goto out;
9917840ffeeSVlad Dogaru 
9927840ffeeSVlad Dogaru 	/*
9937840ffeeSVlad Dogaru 	 * Scan period doesn't matter because when all the sensors are
9947840ffeeSVlad Dogaru 	 * deactivated the device is in sleep mode.
9957840ffeeSVlad Dogaru 	 */
9967840ffeeSVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_PROX_CTRL0, 0);
9977840ffeeSVlad Dogaru 
9987840ffeeSVlad Dogaru out:
9997840ffeeSVlad Dogaru 	mutex_unlock(&data->mutex);
10007840ffeeSVlad Dogaru 	return ret;
10017840ffeeSVlad Dogaru }
10027840ffeeSVlad Dogaru 
10037840ffeeSVlad Dogaru static int sx9500_resume(struct device *dev)
10047840ffeeSVlad Dogaru {
10057840ffeeSVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
10067840ffeeSVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
10077840ffeeSVlad Dogaru 	int ret;
10087840ffeeSVlad Dogaru 
10097840ffeeSVlad Dogaru 	mutex_lock(&data->mutex);
10107840ffeeSVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_PROX_CTRL0,
10117840ffeeSVlad Dogaru 			   data->suspend_ctrl0);
10127840ffeeSVlad Dogaru 	mutex_unlock(&data->mutex);
10137840ffeeSVlad Dogaru 
10147840ffeeSVlad Dogaru 	return ret;
10157840ffeeSVlad Dogaru }
10167840ffeeSVlad Dogaru #endif /* CONFIG_PM_SLEEP */
10177840ffeeSVlad Dogaru 
10187840ffeeSVlad Dogaru static const struct dev_pm_ops sx9500_pm_ops = {
10197840ffeeSVlad Dogaru 	SET_SYSTEM_SLEEP_PM_OPS(sx9500_suspend, sx9500_resume)
10207840ffeeSVlad Dogaru };
10217840ffeeSVlad Dogaru 
10224193c0f1SVlad Dogaru static const struct acpi_device_id sx9500_acpi_match[] = {
10234193c0f1SVlad Dogaru 	{"SSX9500", 0},
10244193c0f1SVlad Dogaru 	{ },
10254193c0f1SVlad Dogaru };
10264193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(acpi, sx9500_acpi_match);
10274193c0f1SVlad Dogaru 
10284193c0f1SVlad Dogaru static const struct i2c_device_id sx9500_id[] = {
10294193c0f1SVlad Dogaru 	{"sx9500", 0},
1030a40c0ac1SVlad Dogaru 	{ },
10314193c0f1SVlad Dogaru };
10324193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(i2c, sx9500_id);
10334193c0f1SVlad Dogaru 
10344193c0f1SVlad Dogaru static struct i2c_driver sx9500_driver = {
10354193c0f1SVlad Dogaru 	.driver = {
10364193c0f1SVlad Dogaru 		.name	= SX9500_DRIVER_NAME,
10374193c0f1SVlad Dogaru 		.acpi_match_table = ACPI_PTR(sx9500_acpi_match),
10387840ffeeSVlad Dogaru 		.pm = &sx9500_pm_ops,
10394193c0f1SVlad Dogaru 	},
10404193c0f1SVlad Dogaru 	.probe		= sx9500_probe,
10414193c0f1SVlad Dogaru 	.remove		= sx9500_remove,
10424193c0f1SVlad Dogaru 	.id_table	= sx9500_id,
10434193c0f1SVlad Dogaru };
10444193c0f1SVlad Dogaru module_i2c_driver(sx9500_driver);
10454193c0f1SVlad Dogaru 
10464193c0f1SVlad Dogaru MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
10474193c0f1SVlad Dogaru MODULE_DESCRIPTION("Driver for Semtech SX9500 proximity sensor");
10484193c0f1SVlad Dogaru MODULE_LICENSE("GPL v2");
1049