xref: /openbmc/linux/drivers/iio/proximity/sx9500.c (revision 59bd0427c01cf0172055a1b99457bee6fd75d865)
14193c0f1SVlad Dogaru /*
24193c0f1SVlad Dogaru  * Copyright (c) 2014 Intel Corporation
34193c0f1SVlad Dogaru  *
44193c0f1SVlad Dogaru  * Driver for Semtech's SX9500 capacitive proximity/button solution.
54193c0f1SVlad Dogaru  * Datasheet available at
64193c0f1SVlad Dogaru  * <http://www.semtech.com/images/datasheet/sx9500.pdf>.
74193c0f1SVlad Dogaru  *
84193c0f1SVlad Dogaru  * This program is free software; you can redistribute it and/or modify it
94193c0f1SVlad Dogaru  * under the terms of the GNU General Public License version 2 as published by
104193c0f1SVlad Dogaru  * the Free Software Foundation.
114193c0f1SVlad Dogaru  */
124193c0f1SVlad Dogaru 
134193c0f1SVlad Dogaru #include <linux/kernel.h>
144193c0f1SVlad Dogaru #include <linux/slab.h>
154193c0f1SVlad Dogaru #include <linux/module.h>
164193c0f1SVlad Dogaru #include <linux/i2c.h>
174193c0f1SVlad Dogaru #include <linux/irq.h>
184193c0f1SVlad Dogaru #include <linux/acpi.h>
194193c0f1SVlad Dogaru #include <linux/gpio/consumer.h>
204193c0f1SVlad Dogaru #include <linux/regmap.h>
217840ffeeSVlad Dogaru #include <linux/pm.h>
22*59bd0427SVlad Dogaru #include <linux/delay.h>
234193c0f1SVlad Dogaru 
244193c0f1SVlad Dogaru #include <linux/iio/iio.h>
254193c0f1SVlad Dogaru #include <linux/iio/buffer.h>
264193c0f1SVlad Dogaru #include <linux/iio/sysfs.h>
274193c0f1SVlad Dogaru #include <linux/iio/events.h>
284193c0f1SVlad Dogaru #include <linux/iio/trigger.h>
294193c0f1SVlad Dogaru #include <linux/iio/triggered_buffer.h>
304193c0f1SVlad Dogaru #include <linux/iio/trigger_consumer.h>
314193c0f1SVlad Dogaru 
324193c0f1SVlad Dogaru #define SX9500_DRIVER_NAME		"sx9500"
334193c0f1SVlad Dogaru #define SX9500_IRQ_NAME			"sx9500_event"
3463de9f92SVlad Dogaru 
3563de9f92SVlad Dogaru #define SX9500_GPIO_NAME		"interrupt"
364193c0f1SVlad Dogaru 
374193c0f1SVlad Dogaru /* Register definitions. */
384193c0f1SVlad Dogaru #define SX9500_REG_IRQ_SRC		0x00
394193c0f1SVlad Dogaru #define SX9500_REG_STAT			0x01
404193c0f1SVlad Dogaru #define SX9500_REG_IRQ_MSK		0x03
414193c0f1SVlad Dogaru 
424193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL0		0x06
434193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL1		0x07
444193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL2		0x08
454193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL3		0x09
464193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL4		0x0a
474193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL5		0x0b
484193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL6		0x0c
494193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL7		0x0d
504193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL8		0x0e
514193c0f1SVlad Dogaru 
524193c0f1SVlad Dogaru #define SX9500_REG_SENSOR_SEL		0x20
534193c0f1SVlad Dogaru #define SX9500_REG_USE_MSB		0x21
544193c0f1SVlad Dogaru #define SX9500_REG_USE_LSB		0x22
554193c0f1SVlad Dogaru #define SX9500_REG_AVG_MSB		0x23
564193c0f1SVlad Dogaru #define SX9500_REG_AVG_LSB		0x24
574193c0f1SVlad Dogaru #define SX9500_REG_DIFF_MSB		0x25
584193c0f1SVlad Dogaru #define SX9500_REG_DIFF_LSB		0x26
594193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_MSB		0x27
604193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_LSB		0x28
614193c0f1SVlad Dogaru 
624193c0f1SVlad Dogaru #define SX9500_REG_RESET		0x7f
634193c0f1SVlad Dogaru 
644193c0f1SVlad Dogaru /* Write this to REG_RESET to do a soft reset. */
654193c0f1SVlad Dogaru #define SX9500_SOFT_RESET		0xde
664193c0f1SVlad Dogaru 
674193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_MASK		GENMASK(6, 4)
684193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_SHIFT	4
694193c0f1SVlad Dogaru 
704193c0f1SVlad Dogaru /*
714193c0f1SVlad Dogaru  * These serve for identifying IRQ source in the IRQ_SRC register, and
724193c0f1SVlad Dogaru  * also for masking the IRQs in the IRQ_MSK register.
734193c0f1SVlad Dogaru  */
744193c0f1SVlad Dogaru #define SX9500_CLOSE_IRQ		BIT(6)
754193c0f1SVlad Dogaru #define SX9500_FAR_IRQ			BIT(5)
764193c0f1SVlad Dogaru #define SX9500_CONVDONE_IRQ		BIT(3)
774193c0f1SVlad Dogaru 
784193c0f1SVlad Dogaru #define SX9500_PROXSTAT_SHIFT		4
79*59bd0427SVlad Dogaru #define SX9500_COMPSTAT_MASK		GENMASK(3, 0)
804193c0f1SVlad Dogaru 
814193c0f1SVlad Dogaru #define SX9500_NUM_CHANNELS		4
824193c0f1SVlad Dogaru 
834193c0f1SVlad Dogaru struct sx9500_data {
844193c0f1SVlad Dogaru 	struct mutex mutex;
854193c0f1SVlad Dogaru 	struct i2c_client *client;
864193c0f1SVlad Dogaru 	struct iio_trigger *trig;
874193c0f1SVlad Dogaru 	struct regmap *regmap;
884193c0f1SVlad Dogaru 	/*
894193c0f1SVlad Dogaru 	 * Last reading of the proximity status for each channel.  We
904193c0f1SVlad Dogaru 	 * only send an event to user space when this changes.
914193c0f1SVlad Dogaru 	 */
924193c0f1SVlad Dogaru 	bool prox_stat[SX9500_NUM_CHANNELS];
934193c0f1SVlad Dogaru 	bool event_enabled[SX9500_NUM_CHANNELS];
944193c0f1SVlad Dogaru 	bool trigger_enabled;
954193c0f1SVlad Dogaru 	u16 *buffer;
967840ffeeSVlad Dogaru 	/* Remember enabled channels and sample rate during suspend. */
977840ffeeSVlad Dogaru 	unsigned int suspend_ctrl0;
98*59bd0427SVlad Dogaru 	struct completion completion;
99*59bd0427SVlad Dogaru 	int data_rdy_users, close_far_users;
100*59bd0427SVlad Dogaru 	int channel_users[SX9500_NUM_CHANNELS];
1014193c0f1SVlad Dogaru };
1024193c0f1SVlad Dogaru 
1034193c0f1SVlad Dogaru static const struct iio_event_spec sx9500_events[] = {
1044193c0f1SVlad Dogaru 	{
1054193c0f1SVlad Dogaru 		.type = IIO_EV_TYPE_THRESH,
1064193c0f1SVlad Dogaru 		.dir = IIO_EV_DIR_EITHER,
1074193c0f1SVlad Dogaru 		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
1084193c0f1SVlad Dogaru 	},
1094193c0f1SVlad Dogaru };
1104193c0f1SVlad Dogaru 
1114193c0f1SVlad Dogaru #define SX9500_CHANNEL(idx)					\
1124193c0f1SVlad Dogaru 	{							\
1134193c0f1SVlad Dogaru 		.type = IIO_PROXIMITY,				\
1144193c0f1SVlad Dogaru 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
1154193c0f1SVlad Dogaru 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1164193c0f1SVlad Dogaru 		.indexed = 1,					\
1174193c0f1SVlad Dogaru 		.channel = idx,					\
1184193c0f1SVlad Dogaru 		.event_spec = sx9500_events,			\
1194193c0f1SVlad Dogaru 		.num_event_specs = ARRAY_SIZE(sx9500_events),	\
1204193c0f1SVlad Dogaru 		.scan_index = idx,				\
1214193c0f1SVlad Dogaru 		.scan_type = {					\
1224193c0f1SVlad Dogaru 			.sign = 'u',				\
1234193c0f1SVlad Dogaru 			.realbits = 16,				\
1244193c0f1SVlad Dogaru 			.storagebits = 16,			\
1254193c0f1SVlad Dogaru 			.shift = 0,				\
1264193c0f1SVlad Dogaru 		},						\
1274193c0f1SVlad Dogaru 	}
1284193c0f1SVlad Dogaru 
1294193c0f1SVlad Dogaru static const struct iio_chan_spec sx9500_channels[] = {
1304193c0f1SVlad Dogaru 	SX9500_CHANNEL(0),
1314193c0f1SVlad Dogaru 	SX9500_CHANNEL(1),
1324193c0f1SVlad Dogaru 	SX9500_CHANNEL(2),
1334193c0f1SVlad Dogaru 	SX9500_CHANNEL(3),
1344193c0f1SVlad Dogaru 	IIO_CHAN_SOFT_TIMESTAMP(4),
1354193c0f1SVlad Dogaru };
1364193c0f1SVlad Dogaru 
1374193c0f1SVlad Dogaru static const struct {
1384193c0f1SVlad Dogaru 	int val;
1394193c0f1SVlad Dogaru 	int val2;
1404193c0f1SVlad Dogaru } sx9500_samp_freq_table[] = {
1414193c0f1SVlad Dogaru 	{33, 333333},
1424193c0f1SVlad Dogaru 	{16, 666666},
1434193c0f1SVlad Dogaru 	{11, 111111},
1444193c0f1SVlad Dogaru 	{8, 333333},
1454193c0f1SVlad Dogaru 	{6, 666666},
1464193c0f1SVlad Dogaru 	{5, 0},
1474193c0f1SVlad Dogaru 	{3, 333333},
1484193c0f1SVlad Dogaru 	{2, 500000},
1494193c0f1SVlad Dogaru };
1504193c0f1SVlad Dogaru 
151*59bd0427SVlad Dogaru static const unsigned int sx9500_scan_period_table[] = {
152*59bd0427SVlad Dogaru 	30, 60, 90, 120, 150, 200, 300, 400,
153*59bd0427SVlad Dogaru };
154*59bd0427SVlad Dogaru 
1554193c0f1SVlad Dogaru static const struct regmap_range sx9500_writable_reg_ranges[] = {
1564193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK, SX9500_REG_IRQ_MSK),
1574193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL0, SX9500_REG_PROX_CTRL8),
1584193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_SENSOR_SEL, SX9500_REG_SENSOR_SEL),
1594193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_MSB, SX9500_REG_OFFSET_LSB),
1604193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1614193c0f1SVlad Dogaru };
1624193c0f1SVlad Dogaru 
1634193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_writeable_regs = {
1644193c0f1SVlad Dogaru 	.yes_ranges = sx9500_writable_reg_ranges,
1654193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_writable_reg_ranges),
1664193c0f1SVlad Dogaru };
1674193c0f1SVlad Dogaru 
1684193c0f1SVlad Dogaru /*
1694193c0f1SVlad Dogaru  * All allocated registers are readable, so we just list unallocated
1704193c0f1SVlad Dogaru  * ones.
1714193c0f1SVlad Dogaru  */
1724193c0f1SVlad Dogaru static const struct regmap_range sx9500_non_readable_reg_ranges[] = {
1734193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_STAT + 1, SX9500_REG_STAT + 1),
1744193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK + 1, SX9500_REG_PROX_CTRL0 - 1),
1754193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL8 + 1, SX9500_REG_SENSOR_SEL - 1),
1764193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_LSB + 1, SX9500_REG_RESET - 1),
1774193c0f1SVlad Dogaru };
1784193c0f1SVlad Dogaru 
1794193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_readable_regs = {
1804193c0f1SVlad Dogaru 	.no_ranges = sx9500_non_readable_reg_ranges,
1814193c0f1SVlad Dogaru 	.n_no_ranges = ARRAY_SIZE(sx9500_non_readable_reg_ranges),
1824193c0f1SVlad Dogaru };
1834193c0f1SVlad Dogaru 
1844193c0f1SVlad Dogaru static const struct regmap_range sx9500_volatile_reg_ranges[] = {
1854193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_SRC, SX9500_REG_STAT),
1864193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_USE_MSB, SX9500_REG_OFFSET_LSB),
1874193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1884193c0f1SVlad Dogaru };
1894193c0f1SVlad Dogaru 
1904193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_volatile_regs = {
1914193c0f1SVlad Dogaru 	.yes_ranges = sx9500_volatile_reg_ranges,
1924193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_volatile_reg_ranges),
1934193c0f1SVlad Dogaru };
1944193c0f1SVlad Dogaru 
1954193c0f1SVlad Dogaru static const struct regmap_config sx9500_regmap_config = {
1964193c0f1SVlad Dogaru 	.reg_bits = 8,
1974193c0f1SVlad Dogaru 	.val_bits = 8,
1984193c0f1SVlad Dogaru 
1994193c0f1SVlad Dogaru 	.max_register = SX9500_REG_RESET,
2004193c0f1SVlad Dogaru 	.cache_type = REGCACHE_RBTREE,
2014193c0f1SVlad Dogaru 
2024193c0f1SVlad Dogaru 	.wr_table = &sx9500_writeable_regs,
2034193c0f1SVlad Dogaru 	.rd_table = &sx9500_readable_regs,
2044193c0f1SVlad Dogaru 	.volatile_table = &sx9500_volatile_regs,
2054193c0f1SVlad Dogaru };
2064193c0f1SVlad Dogaru 
207*59bd0427SVlad Dogaru static int sx9500_inc_users(struct sx9500_data *data, int *counter,
208*59bd0427SVlad Dogaru 			    unsigned int reg, unsigned int bitmask)
209*59bd0427SVlad Dogaru {
210*59bd0427SVlad Dogaru 	(*counter)++;
211*59bd0427SVlad Dogaru 	if (*counter != 1)
212*59bd0427SVlad Dogaru 		/* Bit is already active, nothing to do. */
213*59bd0427SVlad Dogaru 		return 0;
214*59bd0427SVlad Dogaru 
215*59bd0427SVlad Dogaru 	return regmap_update_bits(data->regmap, reg, bitmask, bitmask);
216*59bd0427SVlad Dogaru }
217*59bd0427SVlad Dogaru 
218*59bd0427SVlad Dogaru static int sx9500_dec_users(struct sx9500_data *data, int *counter,
219*59bd0427SVlad Dogaru 			    unsigned int reg, unsigned int bitmask)
220*59bd0427SVlad Dogaru {
221*59bd0427SVlad Dogaru 	(*counter)--;
222*59bd0427SVlad Dogaru 	if (*counter != 0)
223*59bd0427SVlad Dogaru 		/* There are more users, do not deactivate. */
224*59bd0427SVlad Dogaru 		return 0;
225*59bd0427SVlad Dogaru 
226*59bd0427SVlad Dogaru 	return regmap_update_bits(data->regmap, reg, bitmask, 0);
227*59bd0427SVlad Dogaru }
228*59bd0427SVlad Dogaru 
229*59bd0427SVlad Dogaru static int sx9500_inc_chan_users(struct sx9500_data *data, int chan)
230*59bd0427SVlad Dogaru {
231*59bd0427SVlad Dogaru 	return sx9500_inc_users(data, &data->channel_users[chan],
232*59bd0427SVlad Dogaru 				SX9500_REG_PROX_CTRL0, BIT(chan));
233*59bd0427SVlad Dogaru }
234*59bd0427SVlad Dogaru 
235*59bd0427SVlad Dogaru static int sx9500_dec_chan_users(struct sx9500_data *data, int chan)
236*59bd0427SVlad Dogaru {
237*59bd0427SVlad Dogaru 	return sx9500_dec_users(data, &data->channel_users[chan],
238*59bd0427SVlad Dogaru 				SX9500_REG_PROX_CTRL0, BIT(chan));
239*59bd0427SVlad Dogaru }
240*59bd0427SVlad Dogaru 
241*59bd0427SVlad Dogaru static int sx9500_inc_data_rdy_users(struct sx9500_data *data)
242*59bd0427SVlad Dogaru {
243*59bd0427SVlad Dogaru 	return sx9500_inc_users(data, &data->data_rdy_users,
244*59bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK, SX9500_CONVDONE_IRQ);
245*59bd0427SVlad Dogaru }
246*59bd0427SVlad Dogaru 
247*59bd0427SVlad Dogaru static int sx9500_dec_data_rdy_users(struct sx9500_data *data)
248*59bd0427SVlad Dogaru {
249*59bd0427SVlad Dogaru 	return sx9500_dec_users(data, &data->data_rdy_users,
250*59bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK, SX9500_CONVDONE_IRQ);
251*59bd0427SVlad Dogaru }
252*59bd0427SVlad Dogaru 
253*59bd0427SVlad Dogaru static int sx9500_inc_close_far_users(struct sx9500_data *data)
254*59bd0427SVlad Dogaru {
255*59bd0427SVlad Dogaru 	return sx9500_inc_users(data, &data->close_far_users,
256*59bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK,
257*59bd0427SVlad Dogaru 				SX9500_CLOSE_IRQ | SX9500_FAR_IRQ);
258*59bd0427SVlad Dogaru }
259*59bd0427SVlad Dogaru 
260*59bd0427SVlad Dogaru static int sx9500_dec_close_far_users(struct sx9500_data *data)
261*59bd0427SVlad Dogaru {
262*59bd0427SVlad Dogaru 	return sx9500_dec_users(data, &data->close_far_users,
263*59bd0427SVlad Dogaru 				SX9500_REG_IRQ_MSK,
264*59bd0427SVlad Dogaru 				SX9500_CLOSE_IRQ | SX9500_FAR_IRQ);
265*59bd0427SVlad Dogaru }
266*59bd0427SVlad Dogaru 
267*59bd0427SVlad Dogaru static int sx9500_read_prox_data(struct sx9500_data *data,
2684193c0f1SVlad Dogaru 				 const struct iio_chan_spec *chan,
2694193c0f1SVlad Dogaru 				 int *val)
2704193c0f1SVlad Dogaru {
2714193c0f1SVlad Dogaru 	int ret;
2724193c0f1SVlad Dogaru 	__be16 regval;
2734193c0f1SVlad Dogaru 
2744193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_SENSOR_SEL, chan->channel);
2754193c0f1SVlad Dogaru 	if (ret < 0)
2764193c0f1SVlad Dogaru 		return ret;
2774193c0f1SVlad Dogaru 
2784193c0f1SVlad Dogaru 	ret = regmap_bulk_read(data->regmap, SX9500_REG_USE_MSB, &regval, 2);
2794193c0f1SVlad Dogaru 	if (ret < 0)
2804193c0f1SVlad Dogaru 		return ret;
2814193c0f1SVlad Dogaru 
2824193c0f1SVlad Dogaru 	*val = 32767 - (s16)be16_to_cpu(regval);
2834193c0f1SVlad Dogaru 
2844193c0f1SVlad Dogaru 	return IIO_VAL_INT;
2854193c0f1SVlad Dogaru }
2864193c0f1SVlad Dogaru 
287*59bd0427SVlad Dogaru /*
288*59bd0427SVlad Dogaru  * If we have no interrupt support, we have to wait for a scan period
289*59bd0427SVlad Dogaru  * after enabling a channel to get a result.
290*59bd0427SVlad Dogaru  */
291*59bd0427SVlad Dogaru static int sx9500_wait_for_sample(struct sx9500_data *data)
292*59bd0427SVlad Dogaru {
293*59bd0427SVlad Dogaru 	int ret;
294*59bd0427SVlad Dogaru 	unsigned int val;
295*59bd0427SVlad Dogaru 
296*59bd0427SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &val);
297*59bd0427SVlad Dogaru 	if (ret < 0)
298*59bd0427SVlad Dogaru 		return ret;
299*59bd0427SVlad Dogaru 
300*59bd0427SVlad Dogaru 	val = (val & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
301*59bd0427SVlad Dogaru 
302*59bd0427SVlad Dogaru 	msleep(sx9500_scan_period_table[val]);
303*59bd0427SVlad Dogaru 
304*59bd0427SVlad Dogaru 	return 0;
305*59bd0427SVlad Dogaru }
306*59bd0427SVlad Dogaru 
307*59bd0427SVlad Dogaru static int sx9500_read_proximity(struct sx9500_data *data,
308*59bd0427SVlad Dogaru 				 const struct iio_chan_spec *chan,
309*59bd0427SVlad Dogaru 				 int *val)
310*59bd0427SVlad Dogaru {
311*59bd0427SVlad Dogaru 	int ret;
312*59bd0427SVlad Dogaru 
313*59bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
314*59bd0427SVlad Dogaru 
315*59bd0427SVlad Dogaru 	ret = sx9500_inc_chan_users(data, chan->channel);
316*59bd0427SVlad Dogaru 	if (ret < 0)
317*59bd0427SVlad Dogaru 		goto out;
318*59bd0427SVlad Dogaru 
319*59bd0427SVlad Dogaru 	ret = sx9500_inc_data_rdy_users(data);
320*59bd0427SVlad Dogaru 	if (ret < 0)
321*59bd0427SVlad Dogaru 		goto out_dec_chan;
322*59bd0427SVlad Dogaru 
323*59bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
324*59bd0427SVlad Dogaru 
325*59bd0427SVlad Dogaru 	if (data->client->irq > 0)
326*59bd0427SVlad Dogaru 		ret = wait_for_completion_interruptible(&data->completion);
327*59bd0427SVlad Dogaru 	else
328*59bd0427SVlad Dogaru 		ret = sx9500_wait_for_sample(data);
329*59bd0427SVlad Dogaru 
330*59bd0427SVlad Dogaru 	if (ret < 0)
331*59bd0427SVlad Dogaru 		return ret;
332*59bd0427SVlad Dogaru 
333*59bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
334*59bd0427SVlad Dogaru 
335*59bd0427SVlad Dogaru 	ret = sx9500_read_prox_data(data, chan, val);
336*59bd0427SVlad Dogaru 	if (ret < 0)
337*59bd0427SVlad Dogaru 		goto out;
338*59bd0427SVlad Dogaru 
339*59bd0427SVlad Dogaru 	ret = sx9500_dec_chan_users(data, chan->channel);
340*59bd0427SVlad Dogaru 	if (ret < 0)
341*59bd0427SVlad Dogaru 		goto out;
342*59bd0427SVlad Dogaru 
343*59bd0427SVlad Dogaru 	ret = sx9500_dec_data_rdy_users(data);
344*59bd0427SVlad Dogaru 	if (ret < 0)
345*59bd0427SVlad Dogaru 		goto out;
346*59bd0427SVlad Dogaru 
347*59bd0427SVlad Dogaru 	ret = IIO_VAL_INT;
348*59bd0427SVlad Dogaru 
349*59bd0427SVlad Dogaru 	goto out;
350*59bd0427SVlad Dogaru 
351*59bd0427SVlad Dogaru out_dec_chan:
352*59bd0427SVlad Dogaru 	sx9500_dec_chan_users(data, chan->channel);
353*59bd0427SVlad Dogaru out:
354*59bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
355*59bd0427SVlad Dogaru 	reinit_completion(&data->completion);
356*59bd0427SVlad Dogaru 
357*59bd0427SVlad Dogaru 	return ret;
358*59bd0427SVlad Dogaru }
359*59bd0427SVlad Dogaru 
3604193c0f1SVlad Dogaru static int sx9500_read_samp_freq(struct sx9500_data *data,
3614193c0f1SVlad Dogaru 				 int *val, int *val2)
3624193c0f1SVlad Dogaru {
3634193c0f1SVlad Dogaru 	int ret;
3644193c0f1SVlad Dogaru 	unsigned int regval;
3654193c0f1SVlad Dogaru 
3664193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
3674193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &regval);
3684193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
3694193c0f1SVlad Dogaru 
3704193c0f1SVlad Dogaru 	if (ret < 0)
3714193c0f1SVlad Dogaru 		return ret;
3724193c0f1SVlad Dogaru 
3734193c0f1SVlad Dogaru 	regval = (regval & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
3744193c0f1SVlad Dogaru 	*val = sx9500_samp_freq_table[regval].val;
3754193c0f1SVlad Dogaru 	*val2 = sx9500_samp_freq_table[regval].val2;
3764193c0f1SVlad Dogaru 
3774193c0f1SVlad Dogaru 	return IIO_VAL_INT_PLUS_MICRO;
3784193c0f1SVlad Dogaru }
3794193c0f1SVlad Dogaru 
3804193c0f1SVlad Dogaru static int sx9500_read_raw(struct iio_dev *indio_dev,
3814193c0f1SVlad Dogaru 			   const struct iio_chan_spec *chan,
3824193c0f1SVlad Dogaru 			   int *val, int *val2, long mask)
3834193c0f1SVlad Dogaru {
3844193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
3854193c0f1SVlad Dogaru 
3864193c0f1SVlad Dogaru 	switch (chan->type) {
3874193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
3884193c0f1SVlad Dogaru 		switch (mask) {
3894193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_RAW:
3904193c0f1SVlad Dogaru 			if (iio_buffer_enabled(indio_dev))
3914193c0f1SVlad Dogaru 				return -EBUSY;
392*59bd0427SVlad Dogaru 			return sx9500_read_proximity(data, chan, val);
3934193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
3944193c0f1SVlad Dogaru 			return sx9500_read_samp_freq(data, val, val2);
3954193c0f1SVlad Dogaru 		default:
3964193c0f1SVlad Dogaru 			return -EINVAL;
3974193c0f1SVlad Dogaru 		}
3984193c0f1SVlad Dogaru 	default:
3994193c0f1SVlad Dogaru 		return -EINVAL;
4004193c0f1SVlad Dogaru 	}
4014193c0f1SVlad Dogaru }
4024193c0f1SVlad Dogaru 
4034193c0f1SVlad Dogaru static int sx9500_set_samp_freq(struct sx9500_data *data,
4044193c0f1SVlad Dogaru 				int val, int val2)
4054193c0f1SVlad Dogaru {
4064193c0f1SVlad Dogaru 	int i, ret;
4074193c0f1SVlad Dogaru 
4084193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_samp_freq_table); i++)
4094193c0f1SVlad Dogaru 		if (val == sx9500_samp_freq_table[i].val &&
4104193c0f1SVlad Dogaru 		    val2 == sx9500_samp_freq_table[i].val2)
4114193c0f1SVlad Dogaru 			break;
4124193c0f1SVlad Dogaru 
4134193c0f1SVlad Dogaru 	if (i == ARRAY_SIZE(sx9500_samp_freq_table))
4144193c0f1SVlad Dogaru 		return -EINVAL;
4154193c0f1SVlad Dogaru 
4164193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
4174193c0f1SVlad Dogaru 
4184193c0f1SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
4194193c0f1SVlad Dogaru 				 SX9500_SCAN_PERIOD_MASK,
4204193c0f1SVlad Dogaru 				 i << SX9500_SCAN_PERIOD_SHIFT);
4214193c0f1SVlad Dogaru 
4224193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
4234193c0f1SVlad Dogaru 
4244193c0f1SVlad Dogaru 	return ret;
4254193c0f1SVlad Dogaru }
4264193c0f1SVlad Dogaru 
4274193c0f1SVlad Dogaru static int sx9500_write_raw(struct iio_dev *indio_dev,
4284193c0f1SVlad Dogaru 			    const struct iio_chan_spec *chan,
4294193c0f1SVlad Dogaru 			    int val, int val2, long mask)
4304193c0f1SVlad Dogaru {
4314193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4324193c0f1SVlad Dogaru 
4334193c0f1SVlad Dogaru 	switch (chan->type) {
4344193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
4354193c0f1SVlad Dogaru 		switch (mask) {
4364193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
4374193c0f1SVlad Dogaru 			return sx9500_set_samp_freq(data, val, val2);
4384193c0f1SVlad Dogaru 		default:
4394193c0f1SVlad Dogaru 			return -EINVAL;
4404193c0f1SVlad Dogaru 		}
4414193c0f1SVlad Dogaru 	default:
4424193c0f1SVlad Dogaru 		return -EINVAL;
4434193c0f1SVlad Dogaru 	}
4444193c0f1SVlad Dogaru }
4454193c0f1SVlad Dogaru 
4464193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_handler(int irq, void *private)
4474193c0f1SVlad Dogaru {
4484193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = private;
4494193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4504193c0f1SVlad Dogaru 
4514193c0f1SVlad Dogaru 	if (data->trigger_enabled)
4524193c0f1SVlad Dogaru 		iio_trigger_poll(data->trig);
4534193c0f1SVlad Dogaru 
4544193c0f1SVlad Dogaru 	/*
4554193c0f1SVlad Dogaru 	 * Even if no event is enabled, we need to wake the thread to
4564193c0f1SVlad Dogaru 	 * clear the interrupt state by reading SX9500_REG_IRQ_SRC.  It
4574193c0f1SVlad Dogaru 	 * is not possible to do that here because regmap_read takes a
4584193c0f1SVlad Dogaru 	 * mutex.
4594193c0f1SVlad Dogaru 	 */
4604193c0f1SVlad Dogaru 	return IRQ_WAKE_THREAD;
4614193c0f1SVlad Dogaru }
4624193c0f1SVlad Dogaru 
463*59bd0427SVlad Dogaru static void sx9500_push_events(struct iio_dev *indio_dev)
4644193c0f1SVlad Dogaru {
4654193c0f1SVlad Dogaru 	int ret;
4664193c0f1SVlad Dogaru 	unsigned int val, chan;
467*59bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
4684193c0f1SVlad Dogaru 
4694193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
4704193c0f1SVlad Dogaru 	if (ret < 0) {
4714193c0f1SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
472*59bd0427SVlad Dogaru 		return;
4734193c0f1SVlad Dogaru 	}
4744193c0f1SVlad Dogaru 
4754193c0f1SVlad Dogaru 	val >>= SX9500_PROXSTAT_SHIFT;
4764193c0f1SVlad Dogaru 	for (chan = 0; chan < SX9500_NUM_CHANNELS; chan++) {
4774193c0f1SVlad Dogaru 		int dir;
4784193c0f1SVlad Dogaru 		u64 ev;
4794193c0f1SVlad Dogaru 		bool new_prox = val & BIT(chan);
4804193c0f1SVlad Dogaru 
4814193c0f1SVlad Dogaru 		if (!data->event_enabled[chan])
4824193c0f1SVlad Dogaru 			continue;
4834193c0f1SVlad Dogaru 		if (new_prox == data->prox_stat[chan])
4844193c0f1SVlad Dogaru 			/* No change on this channel. */
4854193c0f1SVlad Dogaru 			continue;
4864193c0f1SVlad Dogaru 
487*59bd0427SVlad Dogaru 		dir = new_prox ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
488*59bd0427SVlad Dogaru 		ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,
489*59bd0427SVlad Dogaru 					  IIO_EV_TYPE_THRESH, dir);
4904193c0f1SVlad Dogaru 		iio_push_event(indio_dev, ev, iio_get_time_ns());
4914193c0f1SVlad Dogaru 		data->prox_stat[chan] = new_prox;
4924193c0f1SVlad Dogaru 	}
493*59bd0427SVlad Dogaru }
494*59bd0427SVlad Dogaru 
495*59bd0427SVlad Dogaru static irqreturn_t sx9500_irq_thread_handler(int irq, void *private)
496*59bd0427SVlad Dogaru {
497*59bd0427SVlad Dogaru 	struct iio_dev *indio_dev = private;
498*59bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
499*59bd0427SVlad Dogaru 	int ret;
500*59bd0427SVlad Dogaru 	unsigned int val;
501*59bd0427SVlad Dogaru 
502*59bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
503*59bd0427SVlad Dogaru 
504*59bd0427SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
505*59bd0427SVlad Dogaru 	if (ret < 0) {
506*59bd0427SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
507*59bd0427SVlad Dogaru 		goto out;
508*59bd0427SVlad Dogaru 	}
509*59bd0427SVlad Dogaru 
510*59bd0427SVlad Dogaru 	if (val & (SX9500_CLOSE_IRQ | SX9500_FAR_IRQ))
511*59bd0427SVlad Dogaru 		sx9500_push_events(indio_dev);
512*59bd0427SVlad Dogaru 
513*59bd0427SVlad Dogaru 	if (val & SX9500_CONVDONE_IRQ)
514*59bd0427SVlad Dogaru 		complete_all(&data->completion);
5154193c0f1SVlad Dogaru 
5164193c0f1SVlad Dogaru out:
5174193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5184193c0f1SVlad Dogaru 
5194193c0f1SVlad Dogaru 	return IRQ_HANDLED;
5204193c0f1SVlad Dogaru }
5214193c0f1SVlad Dogaru 
5224193c0f1SVlad Dogaru static int sx9500_read_event_config(struct iio_dev *indio_dev,
5234193c0f1SVlad Dogaru 				    const struct iio_chan_spec *chan,
5244193c0f1SVlad Dogaru 				    enum iio_event_type type,
5254193c0f1SVlad Dogaru 				    enum iio_event_direction dir)
5264193c0f1SVlad Dogaru {
5274193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
5284193c0f1SVlad Dogaru 
5294193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
5304193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
5314193c0f1SVlad Dogaru 		return -EINVAL;
5324193c0f1SVlad Dogaru 
5334193c0f1SVlad Dogaru 	return data->event_enabled[chan->channel];
5344193c0f1SVlad Dogaru }
5354193c0f1SVlad Dogaru 
5364193c0f1SVlad Dogaru static int sx9500_write_event_config(struct iio_dev *indio_dev,
5374193c0f1SVlad Dogaru 				     const struct iio_chan_spec *chan,
5384193c0f1SVlad Dogaru 				     enum iio_event_type type,
5394193c0f1SVlad Dogaru 				     enum iio_event_direction dir,
5404193c0f1SVlad Dogaru 				     int state)
5414193c0f1SVlad Dogaru {
5424193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
543*59bd0427SVlad Dogaru 	int ret;
5444193c0f1SVlad Dogaru 
5454193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
5464193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
5474193c0f1SVlad Dogaru 		return -EINVAL;
5484193c0f1SVlad Dogaru 
5494193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
5504193c0f1SVlad Dogaru 
551*59bd0427SVlad Dogaru 	if (state == 1) {
552*59bd0427SVlad Dogaru 		ret = sx9500_inc_chan_users(data, chan->channel);
553*59bd0427SVlad Dogaru 		if (ret < 0)
554*59bd0427SVlad Dogaru 			goto out_unlock;
555*59bd0427SVlad Dogaru 		ret = sx9500_inc_close_far_users(data);
556*59bd0427SVlad Dogaru 		if (ret < 0)
557*59bd0427SVlad Dogaru 			goto out_undo_chan;
558*59bd0427SVlad Dogaru 	} else {
559*59bd0427SVlad Dogaru 		ret = sx9500_dec_chan_users(data, chan->channel);
560*59bd0427SVlad Dogaru 		if (ret < 0)
561*59bd0427SVlad Dogaru 			goto out_unlock;
562*59bd0427SVlad Dogaru 		ret = sx9500_dec_close_far_users(data);
563*59bd0427SVlad Dogaru 		if (ret < 0)
564*59bd0427SVlad Dogaru 			goto out_undo_chan;
5654193c0f1SVlad Dogaru 	}
5664193c0f1SVlad Dogaru 
567*59bd0427SVlad Dogaru 	data->event_enabled[chan->channel] = state;
568*59bd0427SVlad Dogaru 	goto out_unlock;
569*59bd0427SVlad Dogaru 
570*59bd0427SVlad Dogaru out_undo_chan:
571*59bd0427SVlad Dogaru 	if (state == 1)
572*59bd0427SVlad Dogaru 		sx9500_dec_chan_users(data, chan->channel);
5734193c0f1SVlad Dogaru 	else
574*59bd0427SVlad Dogaru 		sx9500_inc_chan_users(data, chan->channel);
575*59bd0427SVlad Dogaru out_unlock:
5764193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5774193c0f1SVlad Dogaru 	return ret;
5784193c0f1SVlad Dogaru }
5794193c0f1SVlad Dogaru 
5804193c0f1SVlad Dogaru static int sx9500_update_scan_mode(struct iio_dev *indio_dev,
5814193c0f1SVlad Dogaru 				   const unsigned long *scan_mask)
5824193c0f1SVlad Dogaru {
5834193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
5844193c0f1SVlad Dogaru 
5854193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
5864193c0f1SVlad Dogaru 	kfree(data->buffer);
5874193c0f1SVlad Dogaru 	data->buffer = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
5884193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
5894193c0f1SVlad Dogaru 
5904193c0f1SVlad Dogaru 	if (data->buffer == NULL)
5914193c0f1SVlad Dogaru 		return -ENOMEM;
5924193c0f1SVlad Dogaru 
5934193c0f1SVlad Dogaru 	return 0;
5944193c0f1SVlad Dogaru }
5954193c0f1SVlad Dogaru 
5964193c0f1SVlad Dogaru static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
5974193c0f1SVlad Dogaru 	"2.500000 3.333333 5 6.666666 8.333333 11.111111 16.666666 33.333333");
5984193c0f1SVlad Dogaru 
5994193c0f1SVlad Dogaru static struct attribute *sx9500_attributes[] = {
6004193c0f1SVlad Dogaru 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
6014193c0f1SVlad Dogaru 	NULL,
6024193c0f1SVlad Dogaru };
6034193c0f1SVlad Dogaru 
6044193c0f1SVlad Dogaru static const struct attribute_group sx9500_attribute_group = {
6054193c0f1SVlad Dogaru 	.attrs = sx9500_attributes,
6064193c0f1SVlad Dogaru };
6074193c0f1SVlad Dogaru 
6084193c0f1SVlad Dogaru static const struct iio_info sx9500_info = {
6094193c0f1SVlad Dogaru 	.driver_module = THIS_MODULE,
6104193c0f1SVlad Dogaru 	.attrs = &sx9500_attribute_group,
6114193c0f1SVlad Dogaru 	.read_raw = &sx9500_read_raw,
6124193c0f1SVlad Dogaru 	.write_raw = &sx9500_write_raw,
6134193c0f1SVlad Dogaru 	.read_event_config = &sx9500_read_event_config,
6144193c0f1SVlad Dogaru 	.write_event_config = &sx9500_write_event_config,
6154193c0f1SVlad Dogaru 	.update_scan_mode = &sx9500_update_scan_mode,
6164193c0f1SVlad Dogaru };
6174193c0f1SVlad Dogaru 
6184193c0f1SVlad Dogaru static int sx9500_set_trigger_state(struct iio_trigger *trig,
6194193c0f1SVlad Dogaru 				    bool state)
6204193c0f1SVlad Dogaru {
6214193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
6224193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
6234193c0f1SVlad Dogaru 	int ret;
6244193c0f1SVlad Dogaru 
6254193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
6264193c0f1SVlad Dogaru 
627*59bd0427SVlad Dogaru 	if (state)
628*59bd0427SVlad Dogaru 		ret = sx9500_inc_data_rdy_users(data);
629*59bd0427SVlad Dogaru 	else
630*59bd0427SVlad Dogaru 		ret = sx9500_dec_data_rdy_users(data);
631*59bd0427SVlad Dogaru 	if (ret < 0)
632*59bd0427SVlad Dogaru 		goto out;
633*59bd0427SVlad Dogaru 
6344193c0f1SVlad Dogaru 	data->trigger_enabled = state;
6354193c0f1SVlad Dogaru 
636*59bd0427SVlad Dogaru out:
6374193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
6384193c0f1SVlad Dogaru 
6394193c0f1SVlad Dogaru 	return ret;
6404193c0f1SVlad Dogaru }
6414193c0f1SVlad Dogaru 
6424193c0f1SVlad Dogaru static const struct iio_trigger_ops sx9500_trigger_ops = {
6434193c0f1SVlad Dogaru 	.set_trigger_state = sx9500_set_trigger_state,
6444193c0f1SVlad Dogaru 	.owner = THIS_MODULE,
6454193c0f1SVlad Dogaru };
6464193c0f1SVlad Dogaru 
6474193c0f1SVlad Dogaru static irqreturn_t sx9500_trigger_handler(int irq, void *private)
6484193c0f1SVlad Dogaru {
6494193c0f1SVlad Dogaru 	struct iio_poll_func *pf = private;
6504193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = pf->indio_dev;
6514193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
6524193c0f1SVlad Dogaru 	int val, bit, ret, i = 0;
6534193c0f1SVlad Dogaru 
6544193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
6554193c0f1SVlad Dogaru 
65670dddeeeSOctavian Purdila 	for_each_set_bit(bit, indio_dev->active_scan_mask,
6574193c0f1SVlad Dogaru 			 indio_dev->masklength) {
658*59bd0427SVlad Dogaru 		ret = sx9500_read_prox_data(data, &indio_dev->channels[bit],
6594193c0f1SVlad Dogaru 					    &val);
6604193c0f1SVlad Dogaru 		if (ret < 0)
6614193c0f1SVlad Dogaru 			goto out;
6624193c0f1SVlad Dogaru 
6634193c0f1SVlad Dogaru 		data->buffer[i++] = val;
6644193c0f1SVlad Dogaru 	}
6654193c0f1SVlad Dogaru 
6664193c0f1SVlad Dogaru 	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
6674193c0f1SVlad Dogaru 					   iio_get_time_ns());
6684193c0f1SVlad Dogaru 
6694193c0f1SVlad Dogaru out:
6704193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
6714193c0f1SVlad Dogaru 
6724193c0f1SVlad Dogaru 	iio_trigger_notify_done(indio_dev->trig);
6734193c0f1SVlad Dogaru 
6744193c0f1SVlad Dogaru 	return IRQ_HANDLED;
6754193c0f1SVlad Dogaru }
6764193c0f1SVlad Dogaru 
677*59bd0427SVlad Dogaru static int sx9500_buffer_preenable(struct iio_dev *indio_dev)
678*59bd0427SVlad Dogaru {
679*59bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
680*59bd0427SVlad Dogaru 	int ret, i;
681*59bd0427SVlad Dogaru 
682*59bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
683*59bd0427SVlad Dogaru 
684*59bd0427SVlad Dogaru 	for (i = 0; i < SX9500_NUM_CHANNELS; i++)
685*59bd0427SVlad Dogaru 		if (test_bit(i, indio_dev->active_scan_mask)) {
686*59bd0427SVlad Dogaru 			ret = sx9500_inc_chan_users(data, i);
687*59bd0427SVlad Dogaru 			if (ret)
688*59bd0427SVlad Dogaru 				break;
689*59bd0427SVlad Dogaru 		}
690*59bd0427SVlad Dogaru 
691*59bd0427SVlad Dogaru 	if (ret)
692*59bd0427SVlad Dogaru 		for (i = i - 1; i >= 0; i--)
693*59bd0427SVlad Dogaru 			if (test_bit(i, indio_dev->active_scan_mask))
694*59bd0427SVlad Dogaru 				sx9500_dec_chan_users(data, i);
695*59bd0427SVlad Dogaru 
696*59bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
697*59bd0427SVlad Dogaru 
698*59bd0427SVlad Dogaru 	return ret;
699*59bd0427SVlad Dogaru }
700*59bd0427SVlad Dogaru 
701*59bd0427SVlad Dogaru static int sx9500_buffer_predisable(struct iio_dev *indio_dev)
702*59bd0427SVlad Dogaru {
703*59bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
704*59bd0427SVlad Dogaru 	int ret, i;
705*59bd0427SVlad Dogaru 
706*59bd0427SVlad Dogaru 	iio_triggered_buffer_predisable(indio_dev);
707*59bd0427SVlad Dogaru 
708*59bd0427SVlad Dogaru 	mutex_lock(&data->mutex);
709*59bd0427SVlad Dogaru 
710*59bd0427SVlad Dogaru 	for (i = 0; i < SX9500_NUM_CHANNELS; i++)
711*59bd0427SVlad Dogaru 		if (test_bit(i, indio_dev->active_scan_mask)) {
712*59bd0427SVlad Dogaru 			ret = sx9500_dec_chan_users(data, i);
713*59bd0427SVlad Dogaru 			if (ret)
714*59bd0427SVlad Dogaru 				break;
715*59bd0427SVlad Dogaru 		}
716*59bd0427SVlad Dogaru 
717*59bd0427SVlad Dogaru 	if (ret)
718*59bd0427SVlad Dogaru 		for (i = i - 1; i >= 0; i--)
719*59bd0427SVlad Dogaru 			if (test_bit(i, indio_dev->active_scan_mask))
720*59bd0427SVlad Dogaru 				sx9500_inc_chan_users(data, i);
721*59bd0427SVlad Dogaru 
722*59bd0427SVlad Dogaru 	mutex_unlock(&data->mutex);
723*59bd0427SVlad Dogaru 
724*59bd0427SVlad Dogaru 	return ret;
725*59bd0427SVlad Dogaru }
726*59bd0427SVlad Dogaru 
727*59bd0427SVlad Dogaru static const struct iio_buffer_setup_ops sx9500_buffer_setup_ops = {
728*59bd0427SVlad Dogaru 	.preenable = sx9500_buffer_preenable,
729*59bd0427SVlad Dogaru 	.postenable = iio_triggered_buffer_postenable,
730*59bd0427SVlad Dogaru 	.predisable = sx9500_buffer_predisable,
731*59bd0427SVlad Dogaru };
732*59bd0427SVlad Dogaru 
7334193c0f1SVlad Dogaru struct sx9500_reg_default {
7344193c0f1SVlad Dogaru 	u8 reg;
7354193c0f1SVlad Dogaru 	u8 def;
7364193c0f1SVlad Dogaru };
7374193c0f1SVlad Dogaru 
7384193c0f1SVlad Dogaru static const struct sx9500_reg_default sx9500_default_regs[] = {
7394193c0f1SVlad Dogaru 	{
7404193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL1,
7414193c0f1SVlad Dogaru 		/* Shield enabled, small range. */
7424193c0f1SVlad Dogaru 		.def = 0x43,
7434193c0f1SVlad Dogaru 	},
7444193c0f1SVlad Dogaru 	{
7454193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL2,
7464193c0f1SVlad Dogaru 		/* x8 gain, 167kHz frequency, finest resolution. */
7474193c0f1SVlad Dogaru 		.def = 0x77,
7484193c0f1SVlad Dogaru 	},
7494193c0f1SVlad Dogaru 	{
7504193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL3,
7514193c0f1SVlad Dogaru 		/* Doze enabled, 2x scan period doze, no raw filter. */
7524193c0f1SVlad Dogaru 		.def = 0x40,
7534193c0f1SVlad Dogaru 	},
7544193c0f1SVlad Dogaru 	{
7554193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL4,
7564193c0f1SVlad Dogaru 		/* Average threshold. */
7574193c0f1SVlad Dogaru 		.def = 0x30,
7584193c0f1SVlad Dogaru 	},
7594193c0f1SVlad Dogaru 	{
7604193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL5,
7614193c0f1SVlad Dogaru 		/*
7624193c0f1SVlad Dogaru 		 * Debouncer off, lowest average negative filter,
7634193c0f1SVlad Dogaru 		 * highest average postive filter.
7644193c0f1SVlad Dogaru 		 */
7654193c0f1SVlad Dogaru 		.def = 0x0f,
7664193c0f1SVlad Dogaru 	},
7674193c0f1SVlad Dogaru 	{
7684193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL6,
7694193c0f1SVlad Dogaru 		/* Proximity detection threshold: 280 */
7704193c0f1SVlad Dogaru 		.def = 0x0e,
7714193c0f1SVlad Dogaru 	},
7724193c0f1SVlad Dogaru 	{
7734193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL7,
7744193c0f1SVlad Dogaru 		/*
7754193c0f1SVlad Dogaru 		 * No automatic compensation, compensate each pin
7764193c0f1SVlad Dogaru 		 * independently, proximity hysteresis: 32, close
7774193c0f1SVlad Dogaru 		 * debouncer off, far debouncer off.
7784193c0f1SVlad Dogaru 		 */
7794193c0f1SVlad Dogaru 		.def = 0x00,
7804193c0f1SVlad Dogaru 	},
7814193c0f1SVlad Dogaru 	{
7824193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL8,
7834193c0f1SVlad Dogaru 		/* No stuck timeout, no periodic compensation. */
7844193c0f1SVlad Dogaru 		.def = 0x00,
7854193c0f1SVlad Dogaru 	},
7864193c0f1SVlad Dogaru 	{
7874193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL0,
788*59bd0427SVlad Dogaru 		/* Scan period: 30ms, all sensors disabled. */
789*59bd0427SVlad Dogaru 		.def = 0x00,
7904193c0f1SVlad Dogaru 	},
7914193c0f1SVlad Dogaru };
7924193c0f1SVlad Dogaru 
793*59bd0427SVlad Dogaru /* Activate all channels and perform an initial compensation. */
794*59bd0427SVlad Dogaru static int sx9500_init_compensation(struct iio_dev *indio_dev)
795*59bd0427SVlad Dogaru {
796*59bd0427SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
797*59bd0427SVlad Dogaru 	int i, ret;
798*59bd0427SVlad Dogaru 	unsigned int val;
799*59bd0427SVlad Dogaru 
800*59bd0427SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
801*59bd0427SVlad Dogaru 				 GENMASK(SX9500_NUM_CHANNELS, 0),
802*59bd0427SVlad Dogaru 				 GENMASK(SX9500_NUM_CHANNELS, 0));
803*59bd0427SVlad Dogaru 	if (ret < 0)
804*59bd0427SVlad Dogaru 		return ret;
805*59bd0427SVlad Dogaru 
806*59bd0427SVlad Dogaru 	for (i = 10; i >= 0; i--) {
807*59bd0427SVlad Dogaru 		usleep_range(10000, 20000);
808*59bd0427SVlad Dogaru 		ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
809*59bd0427SVlad Dogaru 		if (ret < 0)
810*59bd0427SVlad Dogaru 			goto out;
811*59bd0427SVlad Dogaru 		if (!(val & SX9500_COMPSTAT_MASK))
812*59bd0427SVlad Dogaru 			break;
813*59bd0427SVlad Dogaru 	}
814*59bd0427SVlad Dogaru 
815*59bd0427SVlad Dogaru 	if (i < 0) {
816*59bd0427SVlad Dogaru 		dev_err(&data->client->dev, "initial compensation timed out");
817*59bd0427SVlad Dogaru 		ret = -ETIMEDOUT;
818*59bd0427SVlad Dogaru 	}
819*59bd0427SVlad Dogaru 
820*59bd0427SVlad Dogaru out:
821*59bd0427SVlad Dogaru 	regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
822*59bd0427SVlad Dogaru 			   GENMASK(SX9500_NUM_CHANNELS, 0), 0);
823*59bd0427SVlad Dogaru 	return ret;
824*59bd0427SVlad Dogaru }
825*59bd0427SVlad Dogaru 
8264193c0f1SVlad Dogaru static int sx9500_init_device(struct iio_dev *indio_dev)
8274193c0f1SVlad Dogaru {
8284193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
8294193c0f1SVlad Dogaru 	int ret, i;
8304193c0f1SVlad Dogaru 	unsigned int val;
8314193c0f1SVlad Dogaru 
8324193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_IRQ_MSK, 0);
8334193c0f1SVlad Dogaru 	if (ret < 0)
8344193c0f1SVlad Dogaru 		return ret;
8354193c0f1SVlad Dogaru 
8364193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_RESET,
8374193c0f1SVlad Dogaru 			   SX9500_SOFT_RESET);
8384193c0f1SVlad Dogaru 	if (ret < 0)
8394193c0f1SVlad Dogaru 		return ret;
8404193c0f1SVlad Dogaru 
8414193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
8424193c0f1SVlad Dogaru 	if (ret < 0)
8434193c0f1SVlad Dogaru 		return ret;
8444193c0f1SVlad Dogaru 
8454193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_default_regs); i++) {
8464193c0f1SVlad Dogaru 		ret = regmap_write(data->regmap,
8474193c0f1SVlad Dogaru 				   sx9500_default_regs[i].reg,
8484193c0f1SVlad Dogaru 				   sx9500_default_regs[i].def);
8494193c0f1SVlad Dogaru 		if (ret < 0)
8504193c0f1SVlad Dogaru 			return ret;
8514193c0f1SVlad Dogaru 	}
8524193c0f1SVlad Dogaru 
853*59bd0427SVlad Dogaru 	ret = sx9500_init_compensation(indio_dev);
854*59bd0427SVlad Dogaru 	if (ret < 0)
855*59bd0427SVlad Dogaru 		return ret;
856*59bd0427SVlad Dogaru 
8574193c0f1SVlad Dogaru 	return 0;
8584193c0f1SVlad Dogaru }
8594193c0f1SVlad Dogaru 
8604193c0f1SVlad Dogaru static int sx9500_gpio_probe(struct i2c_client *client,
8614193c0f1SVlad Dogaru 			     struct sx9500_data *data)
8624193c0f1SVlad Dogaru {
8634193c0f1SVlad Dogaru 	struct device *dev;
8644193c0f1SVlad Dogaru 	struct gpio_desc *gpio;
8654193c0f1SVlad Dogaru 	int ret;
8664193c0f1SVlad Dogaru 
8674193c0f1SVlad Dogaru 	if (!client)
8684193c0f1SVlad Dogaru 		return -EINVAL;
8694193c0f1SVlad Dogaru 
8704193c0f1SVlad Dogaru 	dev = &client->dev;
8714193c0f1SVlad Dogaru 
8724193c0f1SVlad Dogaru 	/* data ready gpio interrupt pin */
873b457f53aSUwe Kleine-König 	gpio = devm_gpiod_get_index(dev, SX9500_GPIO_NAME, 0, GPIOD_IN);
8744193c0f1SVlad Dogaru 	if (IS_ERR(gpio)) {
8754193c0f1SVlad Dogaru 		dev_err(dev, "acpi gpio get index failed\n");
8764193c0f1SVlad Dogaru 		return PTR_ERR(gpio);
8774193c0f1SVlad Dogaru 	}
8784193c0f1SVlad Dogaru 
8794193c0f1SVlad Dogaru 	ret = gpiod_to_irq(gpio);
8804193c0f1SVlad Dogaru 
8814193c0f1SVlad Dogaru 	dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
8824193c0f1SVlad Dogaru 
8834193c0f1SVlad Dogaru 	return ret;
8844193c0f1SVlad Dogaru }
8854193c0f1SVlad Dogaru 
8864193c0f1SVlad Dogaru static int sx9500_probe(struct i2c_client *client,
8874193c0f1SVlad Dogaru 			const struct i2c_device_id *id)
8884193c0f1SVlad Dogaru {
8894193c0f1SVlad Dogaru 	int ret;
8904193c0f1SVlad Dogaru 	struct iio_dev *indio_dev;
8914193c0f1SVlad Dogaru 	struct sx9500_data *data;
8924193c0f1SVlad Dogaru 
8934193c0f1SVlad Dogaru 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
8944193c0f1SVlad Dogaru 	if (indio_dev == NULL)
8954193c0f1SVlad Dogaru 		return -ENOMEM;
8964193c0f1SVlad Dogaru 
8974193c0f1SVlad Dogaru 	data = iio_priv(indio_dev);
8984193c0f1SVlad Dogaru 	data->client = client;
8994193c0f1SVlad Dogaru 	mutex_init(&data->mutex);
900*59bd0427SVlad Dogaru 	init_completion(&data->completion);
9014193c0f1SVlad Dogaru 	data->trigger_enabled = false;
9024193c0f1SVlad Dogaru 
9034193c0f1SVlad Dogaru 	data->regmap = devm_regmap_init_i2c(client, &sx9500_regmap_config);
9044193c0f1SVlad Dogaru 	if (IS_ERR(data->regmap))
9054193c0f1SVlad Dogaru 		return PTR_ERR(data->regmap);
9064193c0f1SVlad Dogaru 
9074193c0f1SVlad Dogaru 	sx9500_init_device(indio_dev);
9084193c0f1SVlad Dogaru 
9094193c0f1SVlad Dogaru 	indio_dev->dev.parent = &client->dev;
9104193c0f1SVlad Dogaru 	indio_dev->name = SX9500_DRIVER_NAME;
9114193c0f1SVlad Dogaru 	indio_dev->channels = sx9500_channels;
9124193c0f1SVlad Dogaru 	indio_dev->num_channels = ARRAY_SIZE(sx9500_channels);
9134193c0f1SVlad Dogaru 	indio_dev->info = &sx9500_info;
9144193c0f1SVlad Dogaru 	indio_dev->modes = INDIO_DIRECT_MODE;
9154193c0f1SVlad Dogaru 	i2c_set_clientdata(client, indio_dev);
9164193c0f1SVlad Dogaru 
9174193c0f1SVlad Dogaru 	if (client->irq <= 0)
9184193c0f1SVlad Dogaru 		client->irq = sx9500_gpio_probe(client, data);
9194193c0f1SVlad Dogaru 
920*59bd0427SVlad Dogaru 	if (client->irq <= 0)
921*59bd0427SVlad Dogaru 		dev_warn(&client->dev, "no valid irq found\n");
922*59bd0427SVlad Dogaru 	else {
9234193c0f1SVlad Dogaru 		ret = devm_request_threaded_irq(&client->dev, client->irq,
9244193c0f1SVlad Dogaru 				sx9500_irq_handler, sx9500_irq_thread_handler,
9254193c0f1SVlad Dogaru 				IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
9264193c0f1SVlad Dogaru 				SX9500_IRQ_NAME, indio_dev);
9274193c0f1SVlad Dogaru 		if (ret < 0)
9284193c0f1SVlad Dogaru 			return ret;
9294193c0f1SVlad Dogaru 
9304193c0f1SVlad Dogaru 		data->trig = devm_iio_trigger_alloc(&client->dev,
9314193c0f1SVlad Dogaru 				"%s-dev%d", indio_dev->name, indio_dev->id);
9324193c0f1SVlad Dogaru 		if (!data->trig)
9334193c0f1SVlad Dogaru 			return -ENOMEM;
9344193c0f1SVlad Dogaru 
9354193c0f1SVlad Dogaru 		data->trig->dev.parent = &client->dev;
9364193c0f1SVlad Dogaru 		data->trig->ops = &sx9500_trigger_ops;
9374193c0f1SVlad Dogaru 		iio_trigger_set_drvdata(data->trig, indio_dev);
9384193c0f1SVlad Dogaru 
9394193c0f1SVlad Dogaru 		ret = iio_trigger_register(data->trig);
9404193c0f1SVlad Dogaru 		if (ret)
9414193c0f1SVlad Dogaru 			return ret;
9424193c0f1SVlad Dogaru 	}
9434193c0f1SVlad Dogaru 
9444193c0f1SVlad Dogaru 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
945*59bd0427SVlad Dogaru 					 sx9500_trigger_handler,
946*59bd0427SVlad Dogaru 					 &sx9500_buffer_setup_ops);
9474193c0f1SVlad Dogaru 	if (ret < 0)
9484193c0f1SVlad Dogaru 		goto out_trigger_unregister;
9494193c0f1SVlad Dogaru 
9504193c0f1SVlad Dogaru 	ret = iio_device_register(indio_dev);
9514193c0f1SVlad Dogaru 	if (ret < 0)
9524193c0f1SVlad Dogaru 		goto out_buffer_cleanup;
9534193c0f1SVlad Dogaru 
9544193c0f1SVlad Dogaru 	return 0;
9554193c0f1SVlad Dogaru 
9564193c0f1SVlad Dogaru out_buffer_cleanup:
9574193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
9584193c0f1SVlad Dogaru out_trigger_unregister:
9594193c0f1SVlad Dogaru 	if (client->irq > 0)
9604193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
9614193c0f1SVlad Dogaru 
9624193c0f1SVlad Dogaru 	return ret;
9634193c0f1SVlad Dogaru }
9644193c0f1SVlad Dogaru 
9654193c0f1SVlad Dogaru static int sx9500_remove(struct i2c_client *client)
9664193c0f1SVlad Dogaru {
9674193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
9684193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
9694193c0f1SVlad Dogaru 
9704193c0f1SVlad Dogaru 	iio_device_unregister(indio_dev);
9714193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
9724193c0f1SVlad Dogaru 	if (client->irq > 0)
9734193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
9744193c0f1SVlad Dogaru 	kfree(data->buffer);
9754193c0f1SVlad Dogaru 
9764193c0f1SVlad Dogaru 	return 0;
9774193c0f1SVlad Dogaru }
9784193c0f1SVlad Dogaru 
9797840ffeeSVlad Dogaru #ifdef CONFIG_PM_SLEEP
9807840ffeeSVlad Dogaru static int sx9500_suspend(struct device *dev)
9817840ffeeSVlad Dogaru {
9827840ffeeSVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
9837840ffeeSVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
9847840ffeeSVlad Dogaru 	int ret;
9857840ffeeSVlad Dogaru 
9867840ffeeSVlad Dogaru 	mutex_lock(&data->mutex);
9877840ffeeSVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0,
9887840ffeeSVlad Dogaru 			  &data->suspend_ctrl0);
9897840ffeeSVlad Dogaru 	if (ret < 0)
9907840ffeeSVlad Dogaru 		goto out;
9917840ffeeSVlad Dogaru 
9927840ffeeSVlad Dogaru 	/*
9937840ffeeSVlad Dogaru 	 * Scan period doesn't matter because when all the sensors are
9947840ffeeSVlad Dogaru 	 * deactivated the device is in sleep mode.
9957840ffeeSVlad Dogaru 	 */
9967840ffeeSVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_PROX_CTRL0, 0);
9977840ffeeSVlad Dogaru 
9987840ffeeSVlad Dogaru out:
9997840ffeeSVlad Dogaru 	mutex_unlock(&data->mutex);
10007840ffeeSVlad Dogaru 	return ret;
10017840ffeeSVlad Dogaru }
10027840ffeeSVlad Dogaru 
10037840ffeeSVlad Dogaru static int sx9500_resume(struct device *dev)
10047840ffeeSVlad Dogaru {
10057840ffeeSVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
10067840ffeeSVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
10077840ffeeSVlad Dogaru 	int ret;
10087840ffeeSVlad Dogaru 
10097840ffeeSVlad Dogaru 	mutex_lock(&data->mutex);
10107840ffeeSVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_PROX_CTRL0,
10117840ffeeSVlad Dogaru 			   data->suspend_ctrl0);
10127840ffeeSVlad Dogaru 	mutex_unlock(&data->mutex);
10137840ffeeSVlad Dogaru 
10147840ffeeSVlad Dogaru 	return ret;
10157840ffeeSVlad Dogaru }
10167840ffeeSVlad Dogaru #endif /* CONFIG_PM_SLEEP */
10177840ffeeSVlad Dogaru 
10187840ffeeSVlad Dogaru static const struct dev_pm_ops sx9500_pm_ops = {
10197840ffeeSVlad Dogaru 	SET_SYSTEM_SLEEP_PM_OPS(sx9500_suspend, sx9500_resume)
10207840ffeeSVlad Dogaru };
10217840ffeeSVlad Dogaru 
10224193c0f1SVlad Dogaru static const struct acpi_device_id sx9500_acpi_match[] = {
10234193c0f1SVlad Dogaru 	{"SSX9500", 0},
10244193c0f1SVlad Dogaru 	{ },
10254193c0f1SVlad Dogaru };
10264193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(acpi, sx9500_acpi_match);
10274193c0f1SVlad Dogaru 
10284193c0f1SVlad Dogaru static const struct i2c_device_id sx9500_id[] = {
10294193c0f1SVlad Dogaru 	{"sx9500", 0},
1030a40c0ac1SVlad Dogaru 	{ },
10314193c0f1SVlad Dogaru };
10324193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(i2c, sx9500_id);
10334193c0f1SVlad Dogaru 
10344193c0f1SVlad Dogaru static struct i2c_driver sx9500_driver = {
10354193c0f1SVlad Dogaru 	.driver = {
10364193c0f1SVlad Dogaru 		.name	= SX9500_DRIVER_NAME,
10374193c0f1SVlad Dogaru 		.acpi_match_table = ACPI_PTR(sx9500_acpi_match),
10387840ffeeSVlad Dogaru 		.pm = &sx9500_pm_ops,
10394193c0f1SVlad Dogaru 	},
10404193c0f1SVlad Dogaru 	.probe		= sx9500_probe,
10414193c0f1SVlad Dogaru 	.remove		= sx9500_remove,
10424193c0f1SVlad Dogaru 	.id_table	= sx9500_id,
10434193c0f1SVlad Dogaru };
10444193c0f1SVlad Dogaru module_i2c_driver(sx9500_driver);
10454193c0f1SVlad Dogaru 
10464193c0f1SVlad Dogaru MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
10474193c0f1SVlad Dogaru MODULE_DESCRIPTION("Driver for Semtech SX9500 proximity sensor");
10484193c0f1SVlad Dogaru MODULE_LICENSE("GPL v2");
1049