1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 214e8015fSLinus Walleij #include <linux/bitops.h> 314e8015fSLinus Walleij #include <linux/device.h> 40b0b7726SAngel Iglesias #include <linux/iio/iio.h> 514e8015fSLinus Walleij #include <linux/regmap.h> 60b0b7726SAngel Iglesias #include <linux/regulator/consumer.h> 70b0b7726SAngel Iglesias 814e8015fSLinus Walleij 9597dfb2aSAngel Iglesias /* BMP580 specific registers */ 10597dfb2aSAngel Iglesias #define BMP580_REG_CMD 0x7E 11597dfb2aSAngel Iglesias #define BMP580_REG_EFF_OSR 0x38 12597dfb2aSAngel Iglesias #define BMP580_REG_ODR_CONFIG 0x37 13597dfb2aSAngel Iglesias #define BMP580_REG_OSR_CONFIG 0x36 14597dfb2aSAngel Iglesias #define BMP580_REG_IF_CONFIG 0x13 15597dfb2aSAngel Iglesias #define BMP580_REG_REV_ID 0x02 16597dfb2aSAngel Iglesias #define BMP580_REG_CHIP_ID 0x01 17597dfb2aSAngel Iglesias /* OOR allows to configure a pressure alarm */ 18597dfb2aSAngel Iglesias #define BMP580_REG_OOR_CONFIG 0x35 19597dfb2aSAngel Iglesias #define BMP580_REG_OOR_RANGE 0x34 20597dfb2aSAngel Iglesias #define BMP580_REG_OOR_THR_MSB 0x33 21597dfb2aSAngel Iglesias #define BMP580_REG_OOR_THR_LSB 0x32 22597dfb2aSAngel Iglesias /* DSP registers (IIR filters) */ 23597dfb2aSAngel Iglesias #define BMP580_REG_DSP_IIR 0x31 24597dfb2aSAngel Iglesias #define BMP580_REG_DSP_CONFIG 0x30 25597dfb2aSAngel Iglesias /* NVM access registers */ 26597dfb2aSAngel Iglesias #define BMP580_REG_NVM_DATA_MSB 0x2D 27597dfb2aSAngel Iglesias #define BMP580_REG_NVM_DATA_LSB 0x2C 28597dfb2aSAngel Iglesias #define BMP580_REG_NVM_ADDR 0x2B 29597dfb2aSAngel Iglesias /* Status registers */ 30597dfb2aSAngel Iglesias #define BMP580_REG_STATUS 0x28 31597dfb2aSAngel Iglesias #define BMP580_REG_INT_STATUS 0x27 32597dfb2aSAngel Iglesias #define BMP580_REG_CHIP_STATUS 0x11 33597dfb2aSAngel Iglesias /* Data registers */ 34597dfb2aSAngel Iglesias #define BMP580_REG_FIFO_DATA 0x29 35597dfb2aSAngel Iglesias #define BMP580_REG_PRESS_MSB 0x22 36597dfb2aSAngel Iglesias #define BMP580_REG_PRESS_LSB 0x21 37597dfb2aSAngel Iglesias #define BMP580_REG_PRESS_XLSB 0x20 38597dfb2aSAngel Iglesias #define BMP580_REG_TEMP_MSB 0x1F 39597dfb2aSAngel Iglesias #define BMP580_REG_TEMP_LSB 0x1E 40597dfb2aSAngel Iglesias #define BMP580_REG_TEMP_XLSB 0x1D 41597dfb2aSAngel Iglesias /* FIFO config registers */ 42597dfb2aSAngel Iglesias #define BMP580_REG_FIFO_SEL 0x18 43597dfb2aSAngel Iglesias #define BMP580_REG_FIFO_COUNT 0x17 44597dfb2aSAngel Iglesias #define BMP580_REG_FIFO_CONFIG 0x16 45597dfb2aSAngel Iglesias /* Interruptions config registers */ 46597dfb2aSAngel Iglesias #define BMP580_REG_INT_SOURCE 0x15 47597dfb2aSAngel Iglesias #define BMP580_REG_INT_CONFIG 0x14 48597dfb2aSAngel Iglesias 49597dfb2aSAngel Iglesias #define BMP580_CMD_NOOP 0x00 50597dfb2aSAngel Iglesias #define BMP580_CMD_EXTMODE_SEQ_0 0x73 51597dfb2aSAngel Iglesias #define BMP580_CMD_EXTMODE_SEQ_1 0xB4 52597dfb2aSAngel Iglesias #define BMP580_CMD_EXTMODE_SEQ_2 0x69 53597dfb2aSAngel Iglesias #define BMP580_CMD_NVM_OP_SEQ_0 0x5D 54597dfb2aSAngel Iglesias #define BMP580_CMD_NVM_READ_SEQ_1 0xA5 55597dfb2aSAngel Iglesias #define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0 56597dfb2aSAngel Iglesias #define BMP580_CMD_SOFT_RESET 0xB6 57597dfb2aSAngel Iglesias 58597dfb2aSAngel Iglesias #define BMP580_INT_STATUS_POR_MASK BIT(4) 59597dfb2aSAngel Iglesias 60597dfb2aSAngel Iglesias #define BMP580_STATUS_CORE_RDY_MASK BIT(0) 61597dfb2aSAngel Iglesias #define BMP580_STATUS_NVM_RDY_MASK BIT(1) 62597dfb2aSAngel Iglesias #define BMP580_STATUS_NVM_ERR_MASK BIT(2) 63597dfb2aSAngel Iglesias #define BMP580_STATUS_NVM_CMD_ERR_MASK BIT(3) 64597dfb2aSAngel Iglesias 65597dfb2aSAngel Iglesias #define BMP580_OSR_PRESS_MASK GENMASK(5, 3) 66597dfb2aSAngel Iglesias #define BMP580_OSR_TEMP_MASK GENMASK(2, 0) 67597dfb2aSAngel Iglesias #define BMP580_OSR_PRESS_EN BIT(6) 68597dfb2aSAngel Iglesias #define BMP580_EFF_OSR_PRESS_MASK GENMASK(5, 3) 69597dfb2aSAngel Iglesias #define BMP580_EFF_OSR_TEMP_MASK GENMASK(2, 0) 70597dfb2aSAngel Iglesias #define BMP580_EFF_OSR_VALID_ODR BIT(7) 71597dfb2aSAngel Iglesias 72597dfb2aSAngel Iglesias #define BMP580_ODR_MASK GENMASK(6, 2) 73597dfb2aSAngel Iglesias #define BMP580_MODE_MASK GENMASK(1, 0) 74597dfb2aSAngel Iglesias #define BMP580_MODE_SLEEP 0 75597dfb2aSAngel Iglesias #define BMP580_MODE_NORMAL 1 76597dfb2aSAngel Iglesias #define BMP580_MODE_FORCED 2 77597dfb2aSAngel Iglesias #define BMP580_MODE_CONTINOUS 3 78597dfb2aSAngel Iglesias #define BMP580_ODR_DEEPSLEEP_DIS BIT(7) 79597dfb2aSAngel Iglesias 80597dfb2aSAngel Iglesias #define BMP580_DSP_COMP_MASK GENMASK(1, 0) 81597dfb2aSAngel Iglesias #define BMP580_DSP_COMP_DIS 0 82597dfb2aSAngel Iglesias #define BMP580_DSP_TEMP_COMP_EN 1 83597dfb2aSAngel Iglesias /* 84597dfb2aSAngel Iglesias * In section 7.27 of datasheet, modes 2 and 3 are technically the same. 85597dfb2aSAngel Iglesias * Pressure compensation means also enabling temperature compensation 86597dfb2aSAngel Iglesias */ 87597dfb2aSAngel Iglesias #define BMP580_DSP_PRESS_COMP_EN 2 88597dfb2aSAngel Iglesias #define BMP580_DSP_PRESS_TEMP_COMP_EN 3 89597dfb2aSAngel Iglesias #define BMP580_DSP_IIR_FORCED_FLUSH BIT(2) 90597dfb2aSAngel Iglesias #define BMP580_DSP_SHDW_IIR_TEMP_EN BIT(3) 91597dfb2aSAngel Iglesias #define BMP580_DSP_FIFO_IIR_TEMP_EN BIT(4) 92597dfb2aSAngel Iglesias #define BMP580_DSP_SHDW_IIR_PRESS_EN BIT(5) 93597dfb2aSAngel Iglesias #define BMP580_DSP_FIFO_IIR_PRESS_EN BIT(6) 94597dfb2aSAngel Iglesias #define BMP580_DSP_OOR_IIR_PRESS_EN BIT(7) 95597dfb2aSAngel Iglesias 96597dfb2aSAngel Iglesias #define BMP580_DSP_IIR_PRESS_MASK GENMASK(5, 3) 97597dfb2aSAngel Iglesias #define BMP580_DSP_IIR_TEMP_MASK GENMASK(2, 0) 98597dfb2aSAngel Iglesias #define BMP580_FILTER_OFF 0 99597dfb2aSAngel Iglesias #define BMP580_FILTER_1X 1 100597dfb2aSAngel Iglesias #define BMP580_FILTER_3X 2 101597dfb2aSAngel Iglesias #define BMP580_FILTER_7X 3 102597dfb2aSAngel Iglesias #define BMP580_FILTER_15X 4 103597dfb2aSAngel Iglesias #define BMP580_FILTER_31X 5 104597dfb2aSAngel Iglesias #define BMP580_FILTER_63X 6 105597dfb2aSAngel Iglesias #define BMP580_FILTER_127X 7 106597dfb2aSAngel Iglesias 107accb9d05SAngel Iglesias #define BMP580_NVM_ROW_ADDR_MASK GENMASK(5, 0) 108accb9d05SAngel Iglesias #define BMP580_NVM_PROG_EN BIT(6) 109accb9d05SAngel Iglesias 110597dfb2aSAngel Iglesias #define BMP580_TEMP_SKIPPED 0x7f7f7f 111597dfb2aSAngel Iglesias #define BMP580_PRESS_SKIPPED 0x7f7f7f 112597dfb2aSAngel Iglesias 1138d329309SAngel Iglesias /* BMP380 specific registers */ 1148d329309SAngel Iglesias #define BMP380_REG_CMD 0x7E 1158d329309SAngel Iglesias #define BMP380_REG_CONFIG 0x1F 1168d329309SAngel Iglesias #define BMP380_REG_ODR 0x1D 1178d329309SAngel Iglesias #define BMP380_REG_OSR 0x1C 1188d329309SAngel Iglesias #define BMP380_REG_POWER_CONTROL 0x1B 1198d329309SAngel Iglesias #define BMP380_REG_IF_CONFIG 0x1A 1208d329309SAngel Iglesias #define BMP380_REG_INT_CONTROL 0x19 1218d329309SAngel Iglesias #define BMP380_REG_INT_STATUS 0x11 1228d329309SAngel Iglesias #define BMP380_REG_EVENT 0x10 1238d329309SAngel Iglesias #define BMP380_REG_STATUS 0x03 1248d329309SAngel Iglesias #define BMP380_REG_ERROR 0x02 1258d329309SAngel Iglesias #define BMP380_REG_ID 0x00 1268d329309SAngel Iglesias 1278d329309SAngel Iglesias #define BMP380_REG_FIFO_CONFIG_1 0x18 1288d329309SAngel Iglesias #define BMP380_REG_FIFO_CONFIG_2 0x17 1298d329309SAngel Iglesias #define BMP380_REG_FIFO_WATERMARK_MSB 0x16 1308d329309SAngel Iglesias #define BMP380_REG_FIFO_WATERMARK_LSB 0x15 1318d329309SAngel Iglesias #define BMP380_REG_FIFO_DATA 0x14 1328d329309SAngel Iglesias #define BMP380_REG_FIFO_LENGTH_MSB 0x13 1338d329309SAngel Iglesias #define BMP380_REG_FIFO_LENGTH_LSB 0x12 1348d329309SAngel Iglesias 1358d329309SAngel Iglesias #define BMP380_REG_SENSOR_TIME_MSB 0x0E 1368d329309SAngel Iglesias #define BMP380_REG_SENSOR_TIME_LSB 0x0D 1378d329309SAngel Iglesias #define BMP380_REG_SENSOR_TIME_XLSB 0x0C 1388d329309SAngel Iglesias 1398d329309SAngel Iglesias #define BMP380_REG_TEMP_MSB 0x09 1408d329309SAngel Iglesias #define BMP380_REG_TEMP_LSB 0x08 1418d329309SAngel Iglesias #define BMP380_REG_TEMP_XLSB 0x07 1428d329309SAngel Iglesias 1438d329309SAngel Iglesias #define BMP380_REG_PRESS_MSB 0x06 1448d329309SAngel Iglesias #define BMP380_REG_PRESS_LSB 0x05 1458d329309SAngel Iglesias #define BMP380_REG_PRESS_XLSB 0x04 1468d329309SAngel Iglesias 1478d329309SAngel Iglesias #define BMP380_REG_CALIB_TEMP_START 0x31 1488d329309SAngel Iglesias #define BMP380_CALIB_REG_COUNT 21 1498d329309SAngel Iglesias 1508d329309SAngel Iglesias #define BMP380_FILTER_MASK GENMASK(3, 1) 1518d329309SAngel Iglesias #define BMP380_FILTER_OFF 0 1528d329309SAngel Iglesias #define BMP380_FILTER_1X 1 1538d329309SAngel Iglesias #define BMP380_FILTER_3X 2 1548d329309SAngel Iglesias #define BMP380_FILTER_7X 3 1558d329309SAngel Iglesias #define BMP380_FILTER_15X 4 1568d329309SAngel Iglesias #define BMP380_FILTER_31X 5 1578d329309SAngel Iglesias #define BMP380_FILTER_63X 6 1588d329309SAngel Iglesias #define BMP380_FILTER_127X 7 1598d329309SAngel Iglesias 1608d329309SAngel Iglesias #define BMP380_OSRS_TEMP_MASK GENMASK(5, 3) 1618d329309SAngel Iglesias #define BMP380_OSRS_PRESS_MASK GENMASK(2, 0) 1628d329309SAngel Iglesias 1638d329309SAngel Iglesias #define BMP380_ODRS_MASK GENMASK(4, 0) 1648d329309SAngel Iglesias 1658d329309SAngel Iglesias #define BMP380_CTRL_SENSORS_MASK GENMASK(1, 0) 1668d329309SAngel Iglesias #define BMP380_CTRL_SENSORS_PRESS_EN BIT(0) 1678d329309SAngel Iglesias #define BMP380_CTRL_SENSORS_TEMP_EN BIT(1) 1688d329309SAngel Iglesias #define BMP380_MODE_MASK GENMASK(5, 4) 1698d329309SAngel Iglesias #define BMP380_MODE_SLEEP 0 1708d329309SAngel Iglesias #define BMP380_MODE_FORCED 1 1718d329309SAngel Iglesias #define BMP380_MODE_NORMAL 3 1728d329309SAngel Iglesias 1738d329309SAngel Iglesias #define BMP380_MIN_TEMP -4000 1748d329309SAngel Iglesias #define BMP380_MAX_TEMP 8500 1758d329309SAngel Iglesias #define BMP380_MIN_PRES 3000000 1768d329309SAngel Iglesias #define BMP380_MAX_PRES 12500000 1778d329309SAngel Iglesias 1788d329309SAngel Iglesias #define BMP380_CMD_NOOP 0x00 1798d329309SAngel Iglesias #define BMP380_CMD_EXTMODE_EN_MID 0x34 1808d329309SAngel Iglesias #define BMP380_CMD_FIFO_FLUSH 0xB0 1818d329309SAngel Iglesias #define BMP380_CMD_SOFT_RESET 0xB6 1828d329309SAngel Iglesias 1838d329309SAngel Iglesias #define BMP380_STATUS_CMD_RDY_MASK BIT(4) 1848d329309SAngel Iglesias #define BMP380_STATUS_DRDY_PRESS_MASK BIT(5) 1858d329309SAngel Iglesias #define BMP380_STATUS_DRDY_TEMP_MASK BIT(6) 1868d329309SAngel Iglesias 1878d329309SAngel Iglesias #define BMP380_ERR_FATAL_MASK BIT(0) 1888d329309SAngel Iglesias #define BMP380_ERR_CMD_MASK BIT(1) 1898d329309SAngel Iglesias #define BMP380_ERR_CONF_MASK BIT(2) 1908d329309SAngel Iglesias 1918d329309SAngel Iglesias #define BMP380_TEMP_SKIPPED 0x800000 1928d329309SAngel Iglesias #define BMP380_PRESS_SKIPPED 0x800000 1938d329309SAngel Iglesias 19414e8015fSLinus Walleij /* BMP280 specific registers */ 19514e8015fSLinus Walleij #define BMP280_REG_TEMP_XLSB 0xFC 19614e8015fSLinus Walleij #define BMP280_REG_TEMP_LSB 0xFB 19714e8015fSLinus Walleij #define BMP280_REG_TEMP_MSB 0xFA 19814e8015fSLinus Walleij #define BMP280_REG_PRESS_XLSB 0xF9 19914e8015fSLinus Walleij #define BMP280_REG_PRESS_LSB 0xF8 20014e8015fSLinus Walleij #define BMP280_REG_PRESS_MSB 0xF7 20114e8015fSLinus Walleij 202327b5c05SAngel Iglesias /* Helper mask to truncate excess 4 bits on pressure and temp readings */ 203327b5c05SAngel Iglesias #define BMP280_MEAS_TRIM_MASK GENMASK(24, 4) 2042405f8ccSAngel Iglesias 20514e8015fSLinus Walleij #define BMP280_REG_CONFIG 0xF5 20614e8015fSLinus Walleij #define BMP280_REG_CTRL_MEAS 0xF4 20714e8015fSLinus Walleij #define BMP280_REG_STATUS 0xF3 20814e8015fSLinus Walleij 20914e8015fSLinus Walleij #define BMP280_REG_COMP_TEMP_START 0x88 21014e8015fSLinus Walleij #define BMP280_COMP_TEMP_REG_COUNT 6 21114e8015fSLinus Walleij 21214e8015fSLinus Walleij #define BMP280_REG_COMP_PRESS_START 0x8E 21314e8015fSLinus Walleij #define BMP280_COMP_PRESS_REG_COUNT 18 21414e8015fSLinus Walleij 21583cb40beSAngel Iglesias #define BMP280_CONTIGUOUS_CALIB_REGS (BMP280_COMP_TEMP_REG_COUNT + \ 21683cb40beSAngel Iglesias BMP280_COMP_PRESS_REG_COUNT) 21783cb40beSAngel Iglesias 2182405f8ccSAngel Iglesias #define BMP280_FILTER_MASK GENMASK(4, 2) 21914e8015fSLinus Walleij #define BMP280_FILTER_OFF 0 2202405f8ccSAngel Iglesias #define BMP280_FILTER_2X 1 2212405f8ccSAngel Iglesias #define BMP280_FILTER_4X 2 2222405f8ccSAngel Iglesias #define BMP280_FILTER_8X 3 2232405f8ccSAngel Iglesias #define BMP280_FILTER_16X 4 22414e8015fSLinus Walleij 2252405f8ccSAngel Iglesias #define BMP280_OSRS_TEMP_MASK GENMASK(7, 5) 22614e8015fSLinus Walleij #define BMP280_OSRS_TEMP_SKIP 0 2272405f8ccSAngel Iglesias #define BMP280_OSRS_TEMP_1X 1 2282405f8ccSAngel Iglesias #define BMP280_OSRS_TEMP_2X 2 2292405f8ccSAngel Iglesias #define BMP280_OSRS_TEMP_4X 3 2302405f8ccSAngel Iglesias #define BMP280_OSRS_TEMP_8X 4 2312405f8ccSAngel Iglesias #define BMP280_OSRS_TEMP_16X 5 23214e8015fSLinus Walleij 2332405f8ccSAngel Iglesias #define BMP280_OSRS_PRESS_MASK GENMASK(4, 2) 23414e8015fSLinus Walleij #define BMP280_OSRS_PRESS_SKIP 0 2352405f8ccSAngel Iglesias #define BMP280_OSRS_PRESS_1X 1 2362405f8ccSAngel Iglesias #define BMP280_OSRS_PRESS_2X 2 2372405f8ccSAngel Iglesias #define BMP280_OSRS_PRESS_4X 3 2382405f8ccSAngel Iglesias #define BMP280_OSRS_PRESS_8X 4 2392405f8ccSAngel Iglesias #define BMP280_OSRS_PRESS_16X 5 24014e8015fSLinus Walleij 2412405f8ccSAngel Iglesias #define BMP280_MODE_MASK GENMASK(1, 0) 24214e8015fSLinus Walleij #define BMP280_MODE_SLEEP 0 2432405f8ccSAngel Iglesias #define BMP280_MODE_FORCED 1 2442405f8ccSAngel Iglesias #define BMP280_MODE_NORMAL 3 24514e8015fSLinus Walleij 2465da669d9SVasileios Amoiridis /* BME280 specific registers */ 2475da669d9SVasileios Amoiridis #define BME280_REG_HUMIDITY_LSB 0xFE 2485da669d9SVasileios Amoiridis #define BME280_REG_HUMIDITY_MSB 0xFD 2495da669d9SVasileios Amoiridis 2505da669d9SVasileios Amoiridis #define BME280_REG_CTRL_HUMIDITY 0xF2 2515da669d9SVasileios Amoiridis 2525da669d9SVasileios Amoiridis /* Due to non linear mapping, and data sizes we can't do a bulk read */ 2535da669d9SVasileios Amoiridis #define BME280_REG_COMP_H1 0xA1 2545da669d9SVasileios Amoiridis #define BME280_REG_COMP_H2 0xE1 2555da669d9SVasileios Amoiridis #define BME280_REG_COMP_H3 0xE3 2565da669d9SVasileios Amoiridis #define BME280_REG_COMP_H4 0xE4 2575da669d9SVasileios Amoiridis #define BME280_REG_COMP_H5 0xE5 2585da669d9SVasileios Amoiridis #define BME280_REG_COMP_H6 0xE7 2595da669d9SVasileios Amoiridis 2605da669d9SVasileios Amoiridis #define BME280_COMP_H5_MASK GENMASK(15, 4) 2615da669d9SVasileios Amoiridis 2625da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_MASK GENMASK(2, 0) 2635da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_SKIP 0 2645da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_1X 1 2655da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_2X 2 2665da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_4X 3 2675da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_8X 4 2685da669d9SVasileios Amoiridis #define BME280_OSRS_HUMIDITY_16X 5 2695da669d9SVasileios Amoiridis 27014e8015fSLinus Walleij /* BMP180 specific registers */ 27114e8015fSLinus Walleij #define BMP180_REG_OUT_XLSB 0xF8 27214e8015fSLinus Walleij #define BMP180_REG_OUT_LSB 0xF7 27314e8015fSLinus Walleij #define BMP180_REG_OUT_MSB 0xF6 27414e8015fSLinus Walleij 27514e8015fSLinus Walleij #define BMP180_REG_CALIB_START 0xAA 27614e8015fSLinus Walleij #define BMP180_REG_CALIB_COUNT 22 27714e8015fSLinus Walleij 2782405f8ccSAngel Iglesias #define BMP180_MEAS_CTRL_MASK GENMASK(4, 0) 2792405f8ccSAngel Iglesias #define BMP180_MEAS_TEMP 0x0E 2802405f8ccSAngel Iglesias #define BMP180_MEAS_PRESS 0x14 28114e8015fSLinus Walleij #define BMP180_MEAS_SCO BIT(5) 2822405f8ccSAngel Iglesias #define BMP180_OSRS_PRESS_MASK GENMASK(7, 6) 2832405f8ccSAngel Iglesias #define BMP180_MEAS_PRESS_1X 0 2842405f8ccSAngel Iglesias #define BMP180_MEAS_PRESS_2X 1 2852405f8ccSAngel Iglesias #define BMP180_MEAS_PRESS_4X 2 2862405f8ccSAngel Iglesias #define BMP180_MEAS_PRESS_8X 3 28714e8015fSLinus Walleij 28814e8015fSLinus Walleij /* BMP180 and BMP280 common registers */ 28914e8015fSLinus Walleij #define BMP280_REG_CTRL_MEAS 0xF4 29014e8015fSLinus Walleij #define BMP280_REG_RESET 0xE0 29114e8015fSLinus Walleij #define BMP280_REG_ID 0xD0 29214e8015fSLinus Walleij 2938d329309SAngel Iglesias #define BMP380_CHIP_ID 0x50 294597dfb2aSAngel Iglesias #define BMP580_CHIP_ID 0x50 295597dfb2aSAngel Iglesias #define BMP580_CHIP_ID_ALT 0x51 29614e8015fSLinus Walleij #define BMP180_CHIP_ID 0x55 29714e8015fSLinus Walleij #define BMP280_CHIP_ID 0x58 29814e8015fSLinus Walleij #define BME280_CHIP_ID 0x60 29914e8015fSLinus Walleij #define BMP280_SOFT_RESET_VAL 0xB6 30014e8015fSLinus Walleij 301eb92b418SAndreas Klinger /* BMP280 register skipped special values */ 302eb92b418SAndreas Klinger #define BMP280_TEMP_SKIPPED 0x80000 303eb92b418SAndreas Klinger #define BMP280_PRESS_SKIPPED 0x80000 304eb92b418SAndreas Klinger #define BMP280_HUMIDITY_SKIPPED 0x8000 305eb92b418SAndreas Klinger 3060b0b7726SAngel Iglesias /* Core exported structs */ 3070b0b7726SAngel Iglesias 3080b0b7726SAngel Iglesias static const char *const bmp280_supply_names[] = { 3090b0b7726SAngel Iglesias "vddd", "vdda" 3100b0b7726SAngel Iglesias }; 3110b0b7726SAngel Iglesias 3120b0b7726SAngel Iglesias #define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names) 3130b0b7726SAngel Iglesias 3140b0b7726SAngel Iglesias struct bmp180_calib { 3150b0b7726SAngel Iglesias s16 AC1; 3160b0b7726SAngel Iglesias s16 AC2; 3170b0b7726SAngel Iglesias s16 AC3; 3180b0b7726SAngel Iglesias u16 AC4; 3190b0b7726SAngel Iglesias u16 AC5; 3200b0b7726SAngel Iglesias u16 AC6; 3210b0b7726SAngel Iglesias s16 B1; 3220b0b7726SAngel Iglesias s16 B2; 3230b0b7726SAngel Iglesias s16 MB; 3240b0b7726SAngel Iglesias s16 MC; 3250b0b7726SAngel Iglesias s16 MD; 3260b0b7726SAngel Iglesias }; 3270b0b7726SAngel Iglesias 3280b0b7726SAngel Iglesias /* See datasheet Section 4.2.2. */ 3290b0b7726SAngel Iglesias struct bmp280_calib { 3300b0b7726SAngel Iglesias u16 T1; 3310b0b7726SAngel Iglesias s16 T2; 3320b0b7726SAngel Iglesias s16 T3; 3330b0b7726SAngel Iglesias u16 P1; 3340b0b7726SAngel Iglesias s16 P2; 3350b0b7726SAngel Iglesias s16 P3; 3360b0b7726SAngel Iglesias s16 P4; 3370b0b7726SAngel Iglesias s16 P5; 3380b0b7726SAngel Iglesias s16 P6; 3390b0b7726SAngel Iglesias s16 P7; 3400b0b7726SAngel Iglesias s16 P8; 3410b0b7726SAngel Iglesias s16 P9; 3420b0b7726SAngel Iglesias u8 H1; 3430b0b7726SAngel Iglesias s16 H2; 3440b0b7726SAngel Iglesias u8 H3; 3450b0b7726SAngel Iglesias s16 H4; 3460b0b7726SAngel Iglesias s16 H5; 3470b0b7726SAngel Iglesias s8 H6; 3480b0b7726SAngel Iglesias }; 3490b0b7726SAngel Iglesias 3500b0b7726SAngel Iglesias /* See datasheet Section 3.11.1. */ 3510b0b7726SAngel Iglesias struct bmp380_calib { 3520b0b7726SAngel Iglesias u16 T1; 3530b0b7726SAngel Iglesias u16 T2; 3540b0b7726SAngel Iglesias s8 T3; 3550b0b7726SAngel Iglesias s16 P1; 3560b0b7726SAngel Iglesias s16 P2; 3570b0b7726SAngel Iglesias s8 P3; 3580b0b7726SAngel Iglesias s8 P4; 3590b0b7726SAngel Iglesias u16 P5; 3600b0b7726SAngel Iglesias u16 P6; 3610b0b7726SAngel Iglesias s8 P7; 3620b0b7726SAngel Iglesias s8 P8; 3630b0b7726SAngel Iglesias s16 P9; 3640b0b7726SAngel Iglesias s8 P10; 3650b0b7726SAngel Iglesias s8 P11; 3660b0b7726SAngel Iglesias }; 3670b0b7726SAngel Iglesias 3680b0b7726SAngel Iglesias struct bmp280_data { 3690b0b7726SAngel Iglesias struct device *dev; 3700b0b7726SAngel Iglesias struct mutex lock; 3710b0b7726SAngel Iglesias struct regmap *regmap; 3720b0b7726SAngel Iglesias struct completion done; 3730b0b7726SAngel Iglesias bool use_eoc; 3740b0b7726SAngel Iglesias const struct bmp280_chip_info *chip_info; 3750b0b7726SAngel Iglesias union { 3760b0b7726SAngel Iglesias struct bmp180_calib bmp180; 3770b0b7726SAngel Iglesias struct bmp280_calib bmp280; 3780b0b7726SAngel Iglesias struct bmp380_calib bmp380; 3790b0b7726SAngel Iglesias } calib; 3800b0b7726SAngel Iglesias struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES]; 3810b0b7726SAngel Iglesias unsigned int start_up_time; /* in microseconds */ 3820b0b7726SAngel Iglesias 3830b0b7726SAngel Iglesias /* log of base 2 of oversampling rate */ 3840b0b7726SAngel Iglesias u8 oversampling_press; 3850b0b7726SAngel Iglesias u8 oversampling_temp; 3860b0b7726SAngel Iglesias u8 oversampling_humid; 3870b0b7726SAngel Iglesias u8 iir_filter_coeff; 3880b0b7726SAngel Iglesias 3890b0b7726SAngel Iglesias /* 3900b0b7726SAngel Iglesias * BMP380 devices introduce sampling frequency configuration. See 3910b0b7726SAngel Iglesias * datasheet sections 3.3.3. and 4.3.19 for more details. 3920b0b7726SAngel Iglesias * 3930b0b7726SAngel Iglesias * BMx280 devices allowed indirect configuration of sampling frequency 3940b0b7726SAngel Iglesias * changing the t_standby duration between measurements, as detailed on 3950b0b7726SAngel Iglesias * section 3.6.3 of the datasheet. 3960b0b7726SAngel Iglesias */ 3970b0b7726SAngel Iglesias int sampling_freq; 3980b0b7726SAngel Iglesias 3990b0b7726SAngel Iglesias /* 4000b0b7726SAngel Iglesias * Carryover value from temperature conversion, used in pressure 4010b0b7726SAngel Iglesias * calculation. 4020b0b7726SAngel Iglesias */ 4030b0b7726SAngel Iglesias s32 t_fine; 4040b0b7726SAngel Iglesias 4050b0b7726SAngel Iglesias /* 4060b0b7726SAngel Iglesias * DMA (thus cache coherency maintenance) may require the 4070b0b7726SAngel Iglesias * transfer buffers to live in their own cache lines. 4080b0b7726SAngel Iglesias */ 4090b0b7726SAngel Iglesias union { 4100b0b7726SAngel Iglesias /* Sensor data buffer */ 4110b0b7726SAngel Iglesias u8 buf[3]; 4120b0b7726SAngel Iglesias /* Calibration data buffers */ 4130b0b7726SAngel Iglesias __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2]; 4140b0b7726SAngel Iglesias __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2]; 4150b0b7726SAngel Iglesias u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT]; 4163f199b4eSLi peiyu /* Miscellaneous, endianness-aware data buffers */ 4170b0b7726SAngel Iglesias __le16 le16; 4180b0b7726SAngel Iglesias __be16 be16; 4190b0b7726SAngel Iglesias } __aligned(IIO_DMA_MINALIGN); 4200b0b7726SAngel Iglesias }; 4210b0b7726SAngel Iglesias 4220b0b7726SAngel Iglesias struct bmp280_chip_info { 4230b0b7726SAngel Iglesias unsigned int id_reg; 424afe335a6SAngel Iglesias const u8 *chip_id; 425afe335a6SAngel Iglesias int num_chip_id; 4260b0b7726SAngel Iglesias 4270b0b7726SAngel Iglesias const struct regmap_config *regmap_config; 4280b0b7726SAngel Iglesias 4290b0b7726SAngel Iglesias const struct iio_chan_spec *channels; 4300b0b7726SAngel Iglesias int num_channels; 4310b0b7726SAngel Iglesias unsigned int start_up_time; 4320b0b7726SAngel Iglesias 4330b0b7726SAngel Iglesias const int *oversampling_temp_avail; 4340b0b7726SAngel Iglesias int num_oversampling_temp_avail; 4350b0b7726SAngel Iglesias int oversampling_temp_default; 4360b0b7726SAngel Iglesias 4370b0b7726SAngel Iglesias const int *oversampling_press_avail; 4380b0b7726SAngel Iglesias int num_oversampling_press_avail; 4390b0b7726SAngel Iglesias int oversampling_press_default; 4400b0b7726SAngel Iglesias 4410b0b7726SAngel Iglesias const int *oversampling_humid_avail; 4420b0b7726SAngel Iglesias int num_oversampling_humid_avail; 4430b0b7726SAngel Iglesias int oversampling_humid_default; 4440b0b7726SAngel Iglesias 4450b0b7726SAngel Iglesias const int *iir_filter_coeffs_avail; 4460b0b7726SAngel Iglesias int num_iir_filter_coeffs_avail; 4470b0b7726SAngel Iglesias int iir_filter_coeff_default; 4480b0b7726SAngel Iglesias 4490b0b7726SAngel Iglesias const int (*sampling_freq_avail)[2]; 4500b0b7726SAngel Iglesias int num_sampling_freq_avail; 4510b0b7726SAngel Iglesias int sampling_freq_default; 4520b0b7726SAngel Iglesias 4530b0b7726SAngel Iglesias int (*chip_config)(struct bmp280_data *); 454597dfb2aSAngel Iglesias int (*read_temp)(struct bmp280_data *, int *, int *); 4550b0b7726SAngel Iglesias int (*read_press)(struct bmp280_data *, int *, int *); 4560b0b7726SAngel Iglesias int (*read_humid)(struct bmp280_data *, int *, int *); 4570b0b7726SAngel Iglesias int (*read_calib)(struct bmp280_data *); 458c25ea00fSAngel Iglesias int (*preinit)(struct bmp280_data *); 4590b0b7726SAngel Iglesias }; 4600b0b7726SAngel Iglesias 4610b0b7726SAngel Iglesias /* Chip infos for each variant */ 4620b0b7726SAngel Iglesias extern const struct bmp280_chip_info bmp180_chip_info; 4630b0b7726SAngel Iglesias extern const struct bmp280_chip_info bmp280_chip_info; 4640b0b7726SAngel Iglesias extern const struct bmp280_chip_info bme280_chip_info; 4650b0b7726SAngel Iglesias extern const struct bmp280_chip_info bmp380_chip_info; 466597dfb2aSAngel Iglesias extern const struct bmp280_chip_info bmp580_chip_info; 4670b0b7726SAngel Iglesias 46814e8015fSLinus Walleij /* Regmap configurations */ 46914e8015fSLinus Walleij extern const struct regmap_config bmp180_regmap_config; 47014e8015fSLinus Walleij extern const struct regmap_config bmp280_regmap_config; 471*ae6724f9SVasileios Amoiridis extern const struct regmap_config bme280_regmap_config; 4728d329309SAngel Iglesias extern const struct regmap_config bmp380_regmap_config; 473597dfb2aSAngel Iglesias extern const struct regmap_config bmp580_regmap_config; 47414e8015fSLinus Walleij 47514e8015fSLinus Walleij /* Probe called from different transports */ 47614e8015fSLinus Walleij int bmp280_common_probe(struct device *dev, 47714e8015fSLinus Walleij struct regmap *regmap, 4780b0b7726SAngel Iglesias const struct bmp280_chip_info *, 479aae95394SLinus Walleij const char *name, 480aae95394SLinus Walleij int irq); 4813d838118SLinus Walleij 4823d838118SLinus Walleij /* PM ops */ 4833d838118SLinus Walleij extern const struct dev_pm_ops bmp280_dev_pm_ops; 484