1db6ed4d2SAlexandru Ardelean // SPDX-License-Identifier: GPL-2.0+
2db6ed4d2SAlexandru Ardelean /*
3db6ed4d2SAlexandru Ardelean * ADIS16460 IMU driver
4db6ed4d2SAlexandru Ardelean *
5db6ed4d2SAlexandru Ardelean * Copyright 2019 Analog Devices Inc.
6db6ed4d2SAlexandru Ardelean */
7db6ed4d2SAlexandru Ardelean
8db6ed4d2SAlexandru Ardelean #include <linux/module.h>
9db6ed4d2SAlexandru Ardelean #include <linux/spi/spi.h>
10db6ed4d2SAlexandru Ardelean
11db6ed4d2SAlexandru Ardelean #include <linux/iio/iio.h>
12db6ed4d2SAlexandru Ardelean #include <linux/iio/imu/adis.h>
13db6ed4d2SAlexandru Ardelean
14db6ed4d2SAlexandru Ardelean #include <linux/debugfs.h>
15db6ed4d2SAlexandru Ardelean
16db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_FLASH_CNT 0x00
17db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_DIAG_STAT 0x02
18db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_GYRO_LOW 0x04
19db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_GYRO_OUT 0x06
20db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_GYRO_LOW 0x08
21db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_GYRO_OUT 0x0A
22db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_GYRO_LOW 0x0C
23db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_GYRO_OUT 0x0E
24db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_ACCL_LOW 0x10
25db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_ACCL_OUT 0x12
26db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_ACCL_LOW 0x14
27db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_ACCL_OUT 0x16
28db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_ACCL_LOW 0x18
29db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_ACCL_OUT 0x1A
30db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_SMPL_CNTR 0x1C
31db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_TEMP_OUT 0x1E
32db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_DELT_ANG 0x24
33db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_DELT_ANG 0x26
34db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_DELT_ANG 0x28
35db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_DELT_VEL 0x2A
36db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_DELT_VEL 0x2C
37db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_DELT_VEL 0x2E
38db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_MSC_CTRL 0x32
39db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_SYNC_SCAL 0x34
40db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_DEC_RATE 0x36
41db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_FLTR_CTRL 0x38
42db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_GLOB_CMD 0x3E
43db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_GYRO_OFF 0x40
44db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_GYRO_OFF 0x42
45db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_GYRO_OFF 0x44
46db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_X_ACCL_OFF 0x46
47db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Y_ACCL_OFF 0x48
48db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_Z_ACCL_OFF 0x4A
49db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_LOT_ID1 0x52
50db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_LOT_ID2 0x54
51db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_PROD_ID 0x56
52db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_SERIAL_NUM 0x58
53db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_CAL_SGNTR 0x60
54db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_CAL_CRC 0x62
55db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_CODE_SGNTR 0x64
56db6ed4d2SAlexandru Ardelean #define ADIS16460_REG_CODE_CRC 0x66
57db6ed4d2SAlexandru Ardelean
58db6ed4d2SAlexandru Ardelean struct adis16460_chip_info {
59db6ed4d2SAlexandru Ardelean unsigned int num_channels;
60db6ed4d2SAlexandru Ardelean const struct iio_chan_spec *channels;
61db6ed4d2SAlexandru Ardelean unsigned int gyro_max_val;
62db6ed4d2SAlexandru Ardelean unsigned int gyro_max_scale;
63db6ed4d2SAlexandru Ardelean unsigned int accel_max_val;
64db6ed4d2SAlexandru Ardelean unsigned int accel_max_scale;
65db6ed4d2SAlexandru Ardelean };
66db6ed4d2SAlexandru Ardelean
67db6ed4d2SAlexandru Ardelean struct adis16460 {
68db6ed4d2SAlexandru Ardelean const struct adis16460_chip_info *chip_info;
69db6ed4d2SAlexandru Ardelean struct adis adis;
70db6ed4d2SAlexandru Ardelean };
71db6ed4d2SAlexandru Ardelean
72db6ed4d2SAlexandru Ardelean #ifdef CONFIG_DEBUG_FS
73db6ed4d2SAlexandru Ardelean
adis16460_show_serial_number(void * arg,u64 * val)74db6ed4d2SAlexandru Ardelean static int adis16460_show_serial_number(void *arg, u64 *val)
75db6ed4d2SAlexandru Ardelean {
76db6ed4d2SAlexandru Ardelean struct adis16460 *adis16460 = arg;
77db6ed4d2SAlexandru Ardelean u16 serial;
78db6ed4d2SAlexandru Ardelean int ret;
79db6ed4d2SAlexandru Ardelean
80db6ed4d2SAlexandru Ardelean ret = adis_read_reg_16(&adis16460->adis, ADIS16460_REG_SERIAL_NUM,
81db6ed4d2SAlexandru Ardelean &serial);
82c754a454SAlexandru Ardelean if (ret)
83db6ed4d2SAlexandru Ardelean return ret;
84db6ed4d2SAlexandru Ardelean
85db6ed4d2SAlexandru Ardelean *val = serial;
86db6ed4d2SAlexandru Ardelean
87db6ed4d2SAlexandru Ardelean return 0;
88db6ed4d2SAlexandru Ardelean }
892ca73823SRohit Sarkar DEFINE_DEBUGFS_ATTRIBUTE(adis16460_serial_number_fops,
90db6ed4d2SAlexandru Ardelean adis16460_show_serial_number, NULL, "0x%.4llx\n");
91db6ed4d2SAlexandru Ardelean
adis16460_show_product_id(void * arg,u64 * val)92db6ed4d2SAlexandru Ardelean static int adis16460_show_product_id(void *arg, u64 *val)
93db6ed4d2SAlexandru Ardelean {
94db6ed4d2SAlexandru Ardelean struct adis16460 *adis16460 = arg;
95db6ed4d2SAlexandru Ardelean u16 prod_id;
96db6ed4d2SAlexandru Ardelean int ret;
97db6ed4d2SAlexandru Ardelean
98db6ed4d2SAlexandru Ardelean ret = adis_read_reg_16(&adis16460->adis, ADIS16460_REG_PROD_ID,
99db6ed4d2SAlexandru Ardelean &prod_id);
100c754a454SAlexandru Ardelean if (ret)
101db6ed4d2SAlexandru Ardelean return ret;
102db6ed4d2SAlexandru Ardelean
103db6ed4d2SAlexandru Ardelean *val = prod_id;
104db6ed4d2SAlexandru Ardelean
105db6ed4d2SAlexandru Ardelean return 0;
106db6ed4d2SAlexandru Ardelean }
1072ca73823SRohit Sarkar DEFINE_DEBUGFS_ATTRIBUTE(adis16460_product_id_fops,
108db6ed4d2SAlexandru Ardelean adis16460_show_product_id, NULL, "%llu\n");
109db6ed4d2SAlexandru Ardelean
adis16460_show_flash_count(void * arg,u64 * val)110db6ed4d2SAlexandru Ardelean static int adis16460_show_flash_count(void *arg, u64 *val)
111db6ed4d2SAlexandru Ardelean {
112db6ed4d2SAlexandru Ardelean struct adis16460 *adis16460 = arg;
113db6ed4d2SAlexandru Ardelean u32 flash_count;
114db6ed4d2SAlexandru Ardelean int ret;
115db6ed4d2SAlexandru Ardelean
116db6ed4d2SAlexandru Ardelean ret = adis_read_reg_32(&adis16460->adis, ADIS16460_REG_FLASH_CNT,
117db6ed4d2SAlexandru Ardelean &flash_count);
118c754a454SAlexandru Ardelean if (ret)
119db6ed4d2SAlexandru Ardelean return ret;
120db6ed4d2SAlexandru Ardelean
121db6ed4d2SAlexandru Ardelean *val = flash_count;
122db6ed4d2SAlexandru Ardelean
123db6ed4d2SAlexandru Ardelean return 0;
124db6ed4d2SAlexandru Ardelean }
1252ca73823SRohit Sarkar DEFINE_DEBUGFS_ATTRIBUTE(adis16460_flash_count_fops,
126db6ed4d2SAlexandru Ardelean adis16460_show_flash_count, NULL, "%lld\n");
127db6ed4d2SAlexandru Ardelean
adis16460_debugfs_init(struct iio_dev * indio_dev)128db6ed4d2SAlexandru Ardelean static int adis16460_debugfs_init(struct iio_dev *indio_dev)
129db6ed4d2SAlexandru Ardelean {
130db6ed4d2SAlexandru Ardelean struct adis16460 *adis16460 = iio_priv(indio_dev);
131b7190859SAlexandru Ardelean struct dentry *d = iio_get_debugfs_dentry(indio_dev);
132db6ed4d2SAlexandru Ardelean
1332ca73823SRohit Sarkar debugfs_create_file_unsafe("serial_number", 0400,
134b7190859SAlexandru Ardelean d, adis16460, &adis16460_serial_number_fops);
1352ca73823SRohit Sarkar debugfs_create_file_unsafe("product_id", 0400,
136b7190859SAlexandru Ardelean d, adis16460, &adis16460_product_id_fops);
1372ca73823SRohit Sarkar debugfs_create_file_unsafe("flash_count", 0400,
138b7190859SAlexandru Ardelean d, adis16460, &adis16460_flash_count_fops);
139db6ed4d2SAlexandru Ardelean
140db6ed4d2SAlexandru Ardelean return 0;
141db6ed4d2SAlexandru Ardelean }
142db6ed4d2SAlexandru Ardelean
143db6ed4d2SAlexandru Ardelean #else
144db6ed4d2SAlexandru Ardelean
adis16460_debugfs_init(struct iio_dev * indio_dev)145db6ed4d2SAlexandru Ardelean static int adis16460_debugfs_init(struct iio_dev *indio_dev)
146db6ed4d2SAlexandru Ardelean {
147db6ed4d2SAlexandru Ardelean return 0;
148db6ed4d2SAlexandru Ardelean }
149db6ed4d2SAlexandru Ardelean
150db6ed4d2SAlexandru Ardelean #endif
151db6ed4d2SAlexandru Ardelean
adis16460_set_freq(struct iio_dev * indio_dev,int val,int val2)152db6ed4d2SAlexandru Ardelean static int adis16460_set_freq(struct iio_dev *indio_dev, int val, int val2)
153db6ed4d2SAlexandru Ardelean {
154db6ed4d2SAlexandru Ardelean struct adis16460 *st = iio_priv(indio_dev);
15551980842SAlexandru Ardelean int t;
156db6ed4d2SAlexandru Ardelean
157db6ed4d2SAlexandru Ardelean t = val * 1000 + val2 / 1000;
158db6ed4d2SAlexandru Ardelean if (t <= 0)
159db6ed4d2SAlexandru Ardelean return -EINVAL;
160db6ed4d2SAlexandru Ardelean
161db6ed4d2SAlexandru Ardelean t = 2048000 / t;
162db6ed4d2SAlexandru Ardelean if (t > 2048)
163db6ed4d2SAlexandru Ardelean t = 2048;
164db6ed4d2SAlexandru Ardelean
165db6ed4d2SAlexandru Ardelean if (t != 0)
166db6ed4d2SAlexandru Ardelean t--;
167db6ed4d2SAlexandru Ardelean
168db6ed4d2SAlexandru Ardelean return adis_write_reg_16(&st->adis, ADIS16460_REG_DEC_RATE, t);
169db6ed4d2SAlexandru Ardelean }
170db6ed4d2SAlexandru Ardelean
adis16460_get_freq(struct iio_dev * indio_dev,int * val,int * val2)171db6ed4d2SAlexandru Ardelean static int adis16460_get_freq(struct iio_dev *indio_dev, int *val, int *val2)
172db6ed4d2SAlexandru Ardelean {
173db6ed4d2SAlexandru Ardelean struct adis16460 *st = iio_priv(indio_dev);
174db6ed4d2SAlexandru Ardelean uint16_t t;
175db6ed4d2SAlexandru Ardelean int ret;
176db6ed4d2SAlexandru Ardelean unsigned int freq;
177db6ed4d2SAlexandru Ardelean
178db6ed4d2SAlexandru Ardelean ret = adis_read_reg_16(&st->adis, ADIS16460_REG_DEC_RATE, &t);
179c754a454SAlexandru Ardelean if (ret)
180db6ed4d2SAlexandru Ardelean return ret;
181db6ed4d2SAlexandru Ardelean
182db6ed4d2SAlexandru Ardelean freq = 2048000 / (t + 1);
183db6ed4d2SAlexandru Ardelean *val = freq / 1000;
184db6ed4d2SAlexandru Ardelean *val2 = (freq % 1000) * 1000;
185db6ed4d2SAlexandru Ardelean
186db6ed4d2SAlexandru Ardelean return IIO_VAL_INT_PLUS_MICRO;
187db6ed4d2SAlexandru Ardelean }
188db6ed4d2SAlexandru Ardelean
adis16460_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long info)189db6ed4d2SAlexandru Ardelean static int adis16460_read_raw(struct iio_dev *indio_dev,
190db6ed4d2SAlexandru Ardelean const struct iio_chan_spec *chan, int *val, int *val2, long info)
191db6ed4d2SAlexandru Ardelean {
192db6ed4d2SAlexandru Ardelean struct adis16460 *st = iio_priv(indio_dev);
193db6ed4d2SAlexandru Ardelean
194db6ed4d2SAlexandru Ardelean switch (info) {
195db6ed4d2SAlexandru Ardelean case IIO_CHAN_INFO_RAW:
196db6ed4d2SAlexandru Ardelean return adis_single_conversion(indio_dev, chan, 0, val);
197db6ed4d2SAlexandru Ardelean case IIO_CHAN_INFO_SCALE:
198db6ed4d2SAlexandru Ardelean switch (chan->type) {
199db6ed4d2SAlexandru Ardelean case IIO_ANGL_VEL:
200db6ed4d2SAlexandru Ardelean *val = st->chip_info->gyro_max_scale;
201db6ed4d2SAlexandru Ardelean *val2 = st->chip_info->gyro_max_val;
202db6ed4d2SAlexandru Ardelean return IIO_VAL_FRACTIONAL;
203db6ed4d2SAlexandru Ardelean case IIO_ACCEL:
204db6ed4d2SAlexandru Ardelean *val = st->chip_info->accel_max_scale;
205db6ed4d2SAlexandru Ardelean *val2 = st->chip_info->accel_max_val;
206db6ed4d2SAlexandru Ardelean return IIO_VAL_FRACTIONAL;
207db6ed4d2SAlexandru Ardelean case IIO_TEMP:
208db6ed4d2SAlexandru Ardelean *val = 50; /* 50 milli degrees Celsius/LSB */
209db6ed4d2SAlexandru Ardelean return IIO_VAL_INT;
210db6ed4d2SAlexandru Ardelean default:
211db6ed4d2SAlexandru Ardelean return -EINVAL;
212db6ed4d2SAlexandru Ardelean }
213db6ed4d2SAlexandru Ardelean case IIO_CHAN_INFO_OFFSET:
214db6ed4d2SAlexandru Ardelean *val = 500; /* 25 degrees Celsius = 0x0000 */
215db6ed4d2SAlexandru Ardelean return IIO_VAL_INT;
216db6ed4d2SAlexandru Ardelean case IIO_CHAN_INFO_SAMP_FREQ:
217db6ed4d2SAlexandru Ardelean return adis16460_get_freq(indio_dev, val, val2);
218db6ed4d2SAlexandru Ardelean default:
219db6ed4d2SAlexandru Ardelean return -EINVAL;
220db6ed4d2SAlexandru Ardelean }
221db6ed4d2SAlexandru Ardelean }
222db6ed4d2SAlexandru Ardelean
adis16460_write_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int val,int val2,long info)223db6ed4d2SAlexandru Ardelean static int adis16460_write_raw(struct iio_dev *indio_dev,
224db6ed4d2SAlexandru Ardelean const struct iio_chan_spec *chan, int val, int val2, long info)
225db6ed4d2SAlexandru Ardelean {
226db6ed4d2SAlexandru Ardelean switch (info) {
227db6ed4d2SAlexandru Ardelean case IIO_CHAN_INFO_SAMP_FREQ:
228db6ed4d2SAlexandru Ardelean return adis16460_set_freq(indio_dev, val, val2);
229db6ed4d2SAlexandru Ardelean default:
230db6ed4d2SAlexandru Ardelean return -EINVAL;
231db6ed4d2SAlexandru Ardelean }
232db6ed4d2SAlexandru Ardelean }
233db6ed4d2SAlexandru Ardelean
234db6ed4d2SAlexandru Ardelean enum {
235db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_GYRO_X,
236db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_GYRO_Y,
237db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_GYRO_Z,
238db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_ACCEL_X,
239db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_ACCEL_Y,
240db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_ACCEL_Z,
241db6ed4d2SAlexandru Ardelean ADIS16460_SCAN_TEMP,
242db6ed4d2SAlexandru Ardelean };
243db6ed4d2SAlexandru Ardelean
244db6ed4d2SAlexandru Ardelean #define ADIS16460_MOD_CHANNEL(_type, _mod, _address, _si, _bits) \
245db6ed4d2SAlexandru Ardelean { \
246db6ed4d2SAlexandru Ardelean .type = (_type), \
247db6ed4d2SAlexandru Ardelean .modified = 1, \
248db6ed4d2SAlexandru Ardelean .channel2 = (_mod), \
249db6ed4d2SAlexandru Ardelean .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
250db6ed4d2SAlexandru Ardelean .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
251db6ed4d2SAlexandru Ardelean .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
252db6ed4d2SAlexandru Ardelean .address = (_address), \
253db6ed4d2SAlexandru Ardelean .scan_index = (_si), \
254db6ed4d2SAlexandru Ardelean .scan_type = { \
255db6ed4d2SAlexandru Ardelean .sign = 's', \
256db6ed4d2SAlexandru Ardelean .realbits = (_bits), \
257db6ed4d2SAlexandru Ardelean .storagebits = (_bits), \
258db6ed4d2SAlexandru Ardelean .endianness = IIO_BE, \
259db6ed4d2SAlexandru Ardelean }, \
260db6ed4d2SAlexandru Ardelean }
261db6ed4d2SAlexandru Ardelean
262db6ed4d2SAlexandru Ardelean #define ADIS16460_GYRO_CHANNEL(_mod) \
263db6ed4d2SAlexandru Ardelean ADIS16460_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
264db6ed4d2SAlexandru Ardelean ADIS16460_REG_ ## _mod ## _GYRO_LOW, ADIS16460_SCAN_GYRO_ ## _mod, \
265db6ed4d2SAlexandru Ardelean 32)
266db6ed4d2SAlexandru Ardelean
267db6ed4d2SAlexandru Ardelean #define ADIS16460_ACCEL_CHANNEL(_mod) \
268db6ed4d2SAlexandru Ardelean ADIS16460_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \
269db6ed4d2SAlexandru Ardelean ADIS16460_REG_ ## _mod ## _ACCL_LOW, ADIS16460_SCAN_ACCEL_ ## _mod, \
270db6ed4d2SAlexandru Ardelean 32)
271db6ed4d2SAlexandru Ardelean
272db6ed4d2SAlexandru Ardelean #define ADIS16460_TEMP_CHANNEL() { \
273db6ed4d2SAlexandru Ardelean .type = IIO_TEMP, \
274db6ed4d2SAlexandru Ardelean .indexed = 1, \
275db6ed4d2SAlexandru Ardelean .channel = 0, \
276db6ed4d2SAlexandru Ardelean .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
277db6ed4d2SAlexandru Ardelean BIT(IIO_CHAN_INFO_SCALE) | \
278db6ed4d2SAlexandru Ardelean BIT(IIO_CHAN_INFO_OFFSET), \
279db6ed4d2SAlexandru Ardelean .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
280db6ed4d2SAlexandru Ardelean .address = ADIS16460_REG_TEMP_OUT, \
281db6ed4d2SAlexandru Ardelean .scan_index = ADIS16460_SCAN_TEMP, \
282db6ed4d2SAlexandru Ardelean .scan_type = { \
283db6ed4d2SAlexandru Ardelean .sign = 's', \
284db6ed4d2SAlexandru Ardelean .realbits = 16, \
285db6ed4d2SAlexandru Ardelean .storagebits = 16, \
286db6ed4d2SAlexandru Ardelean .endianness = IIO_BE, \
287db6ed4d2SAlexandru Ardelean }, \
288db6ed4d2SAlexandru Ardelean }
289db6ed4d2SAlexandru Ardelean
290db6ed4d2SAlexandru Ardelean static const struct iio_chan_spec adis16460_channels[] = {
291db6ed4d2SAlexandru Ardelean ADIS16460_GYRO_CHANNEL(X),
292db6ed4d2SAlexandru Ardelean ADIS16460_GYRO_CHANNEL(Y),
293db6ed4d2SAlexandru Ardelean ADIS16460_GYRO_CHANNEL(Z),
294db6ed4d2SAlexandru Ardelean ADIS16460_ACCEL_CHANNEL(X),
295db6ed4d2SAlexandru Ardelean ADIS16460_ACCEL_CHANNEL(Y),
296db6ed4d2SAlexandru Ardelean ADIS16460_ACCEL_CHANNEL(Z),
297db6ed4d2SAlexandru Ardelean ADIS16460_TEMP_CHANNEL(),
298db6ed4d2SAlexandru Ardelean IIO_CHAN_SOFT_TIMESTAMP(7)
299db6ed4d2SAlexandru Ardelean };
300db6ed4d2SAlexandru Ardelean
301db6ed4d2SAlexandru Ardelean static const struct adis16460_chip_info adis16460_chip_info = {
302db6ed4d2SAlexandru Ardelean .channels = adis16460_channels,
303db6ed4d2SAlexandru Ardelean .num_channels = ARRAY_SIZE(adis16460_channels),
304db6ed4d2SAlexandru Ardelean /*
305db6ed4d2SAlexandru Ardelean * storing the value in rad/degree and the scale in degree
306db6ed4d2SAlexandru Ardelean * gives us the result in rad and better precession than
307db6ed4d2SAlexandru Ardelean * storing the scale directly in rad.
308db6ed4d2SAlexandru Ardelean */
309db6ed4d2SAlexandru Ardelean .gyro_max_val = IIO_RAD_TO_DEGREE(200 << 16),
310db6ed4d2SAlexandru Ardelean .gyro_max_scale = 1,
311db6ed4d2SAlexandru Ardelean .accel_max_val = IIO_M_S_2_TO_G(20000 << 16),
312db6ed4d2SAlexandru Ardelean .accel_max_scale = 5,
313db6ed4d2SAlexandru Ardelean };
314db6ed4d2SAlexandru Ardelean
315db6ed4d2SAlexandru Ardelean static const struct iio_info adis16460_info = {
316db6ed4d2SAlexandru Ardelean .read_raw = &adis16460_read_raw,
317db6ed4d2SAlexandru Ardelean .write_raw = &adis16460_write_raw,
318db6ed4d2SAlexandru Ardelean .update_scan_mode = adis_update_scan_mode,
319db6ed4d2SAlexandru Ardelean .debugfs_reg_access = adis_debugfs_reg_access,
320db6ed4d2SAlexandru Ardelean };
321db6ed4d2SAlexandru Ardelean
322db6ed4d2SAlexandru Ardelean #define ADIS16460_DIAG_STAT_IN_CLK_OOS 7
323db6ed4d2SAlexandru Ardelean #define ADIS16460_DIAG_STAT_FLASH_MEM 6
324db6ed4d2SAlexandru Ardelean #define ADIS16460_DIAG_STAT_SELF_TEST 5
325db6ed4d2SAlexandru Ardelean #define ADIS16460_DIAG_STAT_OVERRANGE 4
326db6ed4d2SAlexandru Ardelean #define ADIS16460_DIAG_STAT_SPI_COMM 3
327db6ed4d2SAlexandru Ardelean #define ADIS16460_DIAG_STAT_FLASH_UPT 2
328db6ed4d2SAlexandru Ardelean
329db6ed4d2SAlexandru Ardelean static const char * const adis16460_status_error_msgs[] = {
330db6ed4d2SAlexandru Ardelean [ADIS16460_DIAG_STAT_IN_CLK_OOS] = "Input clock out of sync",
331db6ed4d2SAlexandru Ardelean [ADIS16460_DIAG_STAT_FLASH_MEM] = "Flash memory failure",
332db6ed4d2SAlexandru Ardelean [ADIS16460_DIAG_STAT_SELF_TEST] = "Self test diagnostic failure",
333db6ed4d2SAlexandru Ardelean [ADIS16460_DIAG_STAT_OVERRANGE] = "Sensor overrange",
334db6ed4d2SAlexandru Ardelean [ADIS16460_DIAG_STAT_SPI_COMM] = "SPI communication failure",
335db6ed4d2SAlexandru Ardelean [ADIS16460_DIAG_STAT_FLASH_UPT] = "Flash update failure",
336db6ed4d2SAlexandru Ardelean };
337db6ed4d2SAlexandru Ardelean
338380b107bSNuno Sá static const struct adis_timeout adis16460_timeouts = {
339380b107bSNuno Sá .reset_ms = 225,
340380b107bSNuno Sá .sw_reset_ms = 225,
341380b107bSNuno Sá .self_test_ms = 10,
342380b107bSNuno Sá };
343380b107bSNuno Sá
344db6ed4d2SAlexandru Ardelean static const struct adis_data adis16460_data = {
345db6ed4d2SAlexandru Ardelean .diag_stat_reg = ADIS16460_REG_DIAG_STAT,
346db6ed4d2SAlexandru Ardelean .glob_cmd_reg = ADIS16460_REG_GLOB_CMD,
34762504d1bSNuno Sá .prod_id_reg = ADIS16460_REG_PROD_ID,
34862504d1bSNuno Sá .prod_id = 16460,
349fdcf6bbbSNuno Sá .self_test_mask = BIT(2),
350fdcf6bbbSNuno Sá .self_test_reg = ADIS16460_REG_GLOB_CMD,
351db6ed4d2SAlexandru Ardelean .has_paging = false,
352db6ed4d2SAlexandru Ardelean .read_delay = 5,
353db6ed4d2SAlexandru Ardelean .write_delay = 5,
354db6ed4d2SAlexandru Ardelean .cs_change_delay = 16,
355db6ed4d2SAlexandru Ardelean .status_error_msgs = adis16460_status_error_msgs,
356db6ed4d2SAlexandru Ardelean .status_error_mask = BIT(ADIS16460_DIAG_STAT_IN_CLK_OOS) |
357db6ed4d2SAlexandru Ardelean BIT(ADIS16460_DIAG_STAT_FLASH_MEM) |
358db6ed4d2SAlexandru Ardelean BIT(ADIS16460_DIAG_STAT_SELF_TEST) |
359db6ed4d2SAlexandru Ardelean BIT(ADIS16460_DIAG_STAT_OVERRANGE) |
360db6ed4d2SAlexandru Ardelean BIT(ADIS16460_DIAG_STAT_SPI_COMM) |
361db6ed4d2SAlexandru Ardelean BIT(ADIS16460_DIAG_STAT_FLASH_UPT),
36223a3b67cSNuno Sá .unmasked_drdy = true,
363380b107bSNuno Sá .timeouts = &adis16460_timeouts,
364db6ed4d2SAlexandru Ardelean };
365db6ed4d2SAlexandru Ardelean
adis16460_probe(struct spi_device * spi)366db6ed4d2SAlexandru Ardelean static int adis16460_probe(struct spi_device *spi)
367db6ed4d2SAlexandru Ardelean {
368db6ed4d2SAlexandru Ardelean struct iio_dev *indio_dev;
369db6ed4d2SAlexandru Ardelean struct adis16460 *st;
370db6ed4d2SAlexandru Ardelean int ret;
371db6ed4d2SAlexandru Ardelean
372db6ed4d2SAlexandru Ardelean indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
373db6ed4d2SAlexandru Ardelean if (indio_dev == NULL)
374db6ed4d2SAlexandru Ardelean return -ENOMEM;
375db6ed4d2SAlexandru Ardelean
376db6ed4d2SAlexandru Ardelean st = iio_priv(indio_dev);
377db6ed4d2SAlexandru Ardelean
378db6ed4d2SAlexandru Ardelean st->chip_info = &adis16460_chip_info;
379db6ed4d2SAlexandru Ardelean indio_dev->name = spi_get_device_id(spi)->name;
380db6ed4d2SAlexandru Ardelean indio_dev->channels = st->chip_info->channels;
381db6ed4d2SAlexandru Ardelean indio_dev->num_channels = st->chip_info->num_channels;
382db6ed4d2SAlexandru Ardelean indio_dev->info = &adis16460_info;
383db6ed4d2SAlexandru Ardelean indio_dev->modes = INDIO_DIRECT_MODE;
384db6ed4d2SAlexandru Ardelean
385db6ed4d2SAlexandru Ardelean ret = adis_init(&st->adis, indio_dev, spi, &adis16460_data);
386db6ed4d2SAlexandru Ardelean if (ret)
387db6ed4d2SAlexandru Ardelean return ret;
388db6ed4d2SAlexandru Ardelean
389fa623cddSNuno Sá ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
390db6ed4d2SAlexandru Ardelean if (ret)
391db6ed4d2SAlexandru Ardelean return ret;
392db6ed4d2SAlexandru Ardelean
39362504d1bSNuno Sá ret = __adis_initial_startup(&st->adis);
394db6ed4d2SAlexandru Ardelean if (ret)
395fa623cddSNuno Sá return ret;
396db6ed4d2SAlexandru Ardelean
397fa623cddSNuno Sá ret = devm_iio_device_register(&spi->dev, indio_dev);
398db6ed4d2SAlexandru Ardelean if (ret)
399fa623cddSNuno Sá return ret;
400db6ed4d2SAlexandru Ardelean
401db6ed4d2SAlexandru Ardelean adis16460_debugfs_init(indio_dev);
402db6ed4d2SAlexandru Ardelean
403db6ed4d2SAlexandru Ardelean return 0;
404db6ed4d2SAlexandru Ardelean }
405db6ed4d2SAlexandru Ardelean
406db6ed4d2SAlexandru Ardelean static const struct spi_device_id adis16460_ids[] = {
407db6ed4d2SAlexandru Ardelean { "adis16460", 0 },
408db6ed4d2SAlexandru Ardelean {}
409db6ed4d2SAlexandru Ardelean };
410db6ed4d2SAlexandru Ardelean MODULE_DEVICE_TABLE(spi, adis16460_ids);
411db6ed4d2SAlexandru Ardelean
412db6ed4d2SAlexandru Ardelean static const struct of_device_id adis16460_of_match[] = {
413db6ed4d2SAlexandru Ardelean { .compatible = "adi,adis16460" },
414db6ed4d2SAlexandru Ardelean {}
415db6ed4d2SAlexandru Ardelean };
416db6ed4d2SAlexandru Ardelean MODULE_DEVICE_TABLE(of, adis16460_of_match);
417db6ed4d2SAlexandru Ardelean
418db6ed4d2SAlexandru Ardelean static struct spi_driver adis16460_driver = {
419db6ed4d2SAlexandru Ardelean .driver = {
420db6ed4d2SAlexandru Ardelean .name = "adis16460",
421db6ed4d2SAlexandru Ardelean .of_match_table = adis16460_of_match,
422db6ed4d2SAlexandru Ardelean },
423db6ed4d2SAlexandru Ardelean .id_table = adis16460_ids,
424db6ed4d2SAlexandru Ardelean .probe = adis16460_probe,
425db6ed4d2SAlexandru Ardelean };
426db6ed4d2SAlexandru Ardelean module_spi_driver(adis16460_driver);
427db6ed4d2SAlexandru Ardelean
428db6ed4d2SAlexandru Ardelean MODULE_AUTHOR("Dragos Bogdan <dragos.bogdan@analog.com>");
429db6ed4d2SAlexandru Ardelean MODULE_DESCRIPTION("Analog Devices ADIS16460 IMU driver");
430db6ed4d2SAlexandru Ardelean MODULE_LICENSE("GPL");
431*6c9304d6SJonathan Cameron MODULE_IMPORT_NS(IIO_ADISLIB);
432