1b3c590ceSMatt Ranostay /* 2b3c590ceSMatt Ranostay * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor 3b3c590ceSMatt Ranostay * 4b3c590ceSMatt Ranostay * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting> 5b3c590ceSMatt Ranostay * 6b3c590ceSMatt Ranostay * This program is free software; you can redistribute it and/or modify 7b3c590ceSMatt Ranostay * it under the terms of the GNU General Public License as published by 8b3c590ceSMatt Ranostay * the Free Software Foundation; either version 2 of the License, or 9b3c590ceSMatt Ranostay * (at your option) any later version. 10b3c590ceSMatt Ranostay * 11b3c590ceSMatt Ranostay * This program is distributed in the hope that it will be useful, 12b3c590ceSMatt Ranostay * but WITHOUT ANY WARRANTY; without even the implied warranty of 13b3c590ceSMatt Ranostay * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14b3c590ceSMatt Ranostay * GNU General Public License for more details. 15b3c590ceSMatt Ranostay * 16b3c590ceSMatt Ranostay * TODO: proximity power saving feature 17b3c590ceSMatt Ranostay */ 18b3c590ceSMatt Ranostay 19b3c590ceSMatt Ranostay #include <linux/module.h> 20b3c590ceSMatt Ranostay #include <linux/init.h> 21b3c590ceSMatt Ranostay #include <linux/interrupt.h> 22b3c590ceSMatt Ranostay #include <linux/delay.h> 23b3c590ceSMatt Ranostay #include <linux/err.h> 24b3c590ceSMatt Ranostay #include <linux/irq.h> 25b3c590ceSMatt Ranostay #include <linux/i2c.h> 26b3c590ceSMatt Ranostay #include <linux/mutex.h> 27b3c590ceSMatt Ranostay #include <linux/of.h> 28b3c590ceSMatt Ranostay #include <linux/regmap.h> 29b3c590ceSMatt Ranostay #include <linux/iio/iio.h> 30b3c590ceSMatt Ranostay #include <linux/iio/buffer.h> 31b3c590ceSMatt Ranostay #include <linux/iio/kfifo_buf.h> 32b3c590ceSMatt Ranostay 33b3c590ceSMatt Ranostay #define MAX30102_REGMAP_NAME "max30102_regmap" 34b3c590ceSMatt Ranostay #define MAX30102_DRV_NAME "max30102" 35b3c590ceSMatt Ranostay 36b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS 0x00 37b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0) 38b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_PROX_INT BIT(4) 39b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5) 40b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6) 41b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7) 42b3c590ceSMatt Ranostay 43b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE 0x02 44b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4) 45b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5) 46b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6) 47b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7) 48b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_MASK 0xf0 49b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4 50b3c590ceSMatt Ranostay 51b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_WR_PTR 0x04 52b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_OVR_CTR 0x05 53b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_RD_PTR 0x06 54b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_DATA 0x07 55b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_DATA_ENTRY_LEN 6 56b3c590ceSMatt Ranostay 57b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG 0x08 58b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1) 59b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5 60b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0) 61b3c590ceSMatt Ranostay 62b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG 0x09 63b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0) 64b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_MODE_HR_EN BIT(1) 65b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_MODE_MASK 0x03 66b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_PWR BIT(7) 67b3c590ceSMatt Ranostay 68b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG 0x0a 69b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03 70b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03 71b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07 72b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2 73b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0) 74b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5 75b3c590ceSMatt Ranostay 76b3c590ceSMatt Ranostay #define MAX30102_REG_RED_LED_CONFIG 0x0c 77b3c590ceSMatt Ranostay #define MAX30102_REG_IR_LED_CONFIG 0x0d 78b3c590ceSMatt Ranostay 79b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_CONFIG 0x21 80b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0) 81b3c590ceSMatt Ranostay 82b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_INTEGER 0x1f 83b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_FRACTION 0x20 84b3c590ceSMatt Ranostay 85b3c590ceSMatt Ranostay struct max30102_data { 86b3c590ceSMatt Ranostay struct i2c_client *client; 87b3c590ceSMatt Ranostay struct iio_dev *indio_dev; 88b3c590ceSMatt Ranostay struct mutex lock; 89b3c590ceSMatt Ranostay struct regmap *regmap; 90b3c590ceSMatt Ranostay 91b3c590ceSMatt Ranostay u8 buffer[8]; 92b3c590ceSMatt Ranostay __be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */ 93b3c590ceSMatt Ranostay }; 94b3c590ceSMatt Ranostay 95b3c590ceSMatt Ranostay static const struct regmap_config max30102_regmap_config = { 96b3c590ceSMatt Ranostay .name = MAX30102_REGMAP_NAME, 97b3c590ceSMatt Ranostay 98b3c590ceSMatt Ranostay .reg_bits = 8, 99b3c590ceSMatt Ranostay .val_bits = 8, 100b3c590ceSMatt Ranostay }; 101b3c590ceSMatt Ranostay 102b3c590ceSMatt Ranostay static const unsigned long max30102_scan_masks[] = {0x3, 0}; 103b3c590ceSMatt Ranostay 104b3c590ceSMatt Ranostay static const struct iio_chan_spec max30102_channels[] = { 105b3c590ceSMatt Ranostay { 106b3c590ceSMatt Ranostay .type = IIO_INTENSITY, 107b3c590ceSMatt Ranostay .channel2 = IIO_MOD_LIGHT_RED, 108b3c590ceSMatt Ranostay .modified = 1, 109b3c590ceSMatt Ranostay 110b3c590ceSMatt Ranostay .scan_index = 0, 111b3c590ceSMatt Ranostay .scan_type = { 112b3c590ceSMatt Ranostay .sign = 'u', 113b3c590ceSMatt Ranostay .shift = 8, 114b3c590ceSMatt Ranostay .realbits = 18, 115b3c590ceSMatt Ranostay .storagebits = 32, 116b3c590ceSMatt Ranostay .endianness = IIO_BE, 117b3c590ceSMatt Ranostay }, 118b3c590ceSMatt Ranostay }, 119b3c590ceSMatt Ranostay { 120b3c590ceSMatt Ranostay .type = IIO_INTENSITY, 121b3c590ceSMatt Ranostay .channel2 = IIO_MOD_LIGHT_IR, 122b3c590ceSMatt Ranostay .modified = 1, 123b3c590ceSMatt Ranostay 124b3c590ceSMatt Ranostay .scan_index = 1, 125b3c590ceSMatt Ranostay .scan_type = { 126b3c590ceSMatt Ranostay .sign = 'u', 127b3c590ceSMatt Ranostay .shift = 8, 128b3c590ceSMatt Ranostay .realbits = 18, 129b3c590ceSMatt Ranostay .storagebits = 32, 130b3c590ceSMatt Ranostay .endianness = IIO_BE, 131b3c590ceSMatt Ranostay }, 132b3c590ceSMatt Ranostay }, 133b3c590ceSMatt Ranostay { 134b3c590ceSMatt Ranostay .type = IIO_TEMP, 135b3c590ceSMatt Ranostay .info_mask_separate = 136b3c590ceSMatt Ranostay BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 137b3c590ceSMatt Ranostay .scan_index = -1, 138b3c590ceSMatt Ranostay }, 139b3c590ceSMatt Ranostay }; 140b3c590ceSMatt Ranostay 141b3c590ceSMatt Ranostay static int max30102_set_powermode(struct max30102_data *data, bool state) 142b3c590ceSMatt Ranostay { 143b3c590ceSMatt Ranostay return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG, 144b3c590ceSMatt Ranostay MAX30102_REG_MODE_CONFIG_PWR, 145b3c590ceSMatt Ranostay state ? 0 : MAX30102_REG_MODE_CONFIG_PWR); 146b3c590ceSMatt Ranostay } 147b3c590ceSMatt Ranostay 148b3c590ceSMatt Ranostay static int max30102_buffer_postenable(struct iio_dev *indio_dev) 149b3c590ceSMatt Ranostay { 150b3c590ceSMatt Ranostay struct max30102_data *data = iio_priv(indio_dev); 151b3c590ceSMatt Ranostay 152b3c590ceSMatt Ranostay return max30102_set_powermode(data, true); 153b3c590ceSMatt Ranostay } 154b3c590ceSMatt Ranostay 155b3c590ceSMatt Ranostay static int max30102_buffer_predisable(struct iio_dev *indio_dev) 156b3c590ceSMatt Ranostay { 157b3c590ceSMatt Ranostay struct max30102_data *data = iio_priv(indio_dev); 158b3c590ceSMatt Ranostay 159b3c590ceSMatt Ranostay return max30102_set_powermode(data, false); 160b3c590ceSMatt Ranostay } 161b3c590ceSMatt Ranostay 162b3c590ceSMatt Ranostay static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = { 163b3c590ceSMatt Ranostay .postenable = max30102_buffer_postenable, 164b3c590ceSMatt Ranostay .predisable = max30102_buffer_predisable, 165b3c590ceSMatt Ranostay }; 166b3c590ceSMatt Ranostay 167b3c590ceSMatt Ranostay static inline int max30102_fifo_count(struct max30102_data *data) 168b3c590ceSMatt Ranostay { 169b3c590ceSMatt Ranostay unsigned int val; 170b3c590ceSMatt Ranostay int ret; 171b3c590ceSMatt Ranostay 172b3c590ceSMatt Ranostay ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val); 173b3c590ceSMatt Ranostay if (ret) 174b3c590ceSMatt Ranostay return ret; 175b3c590ceSMatt Ranostay 176b3c590ceSMatt Ranostay /* FIFO has one sample slot left */ 177b3c590ceSMatt Ranostay if (val & MAX30102_REG_INT_STATUS_FIFO_RDY) 178b3c590ceSMatt Ranostay return 1; 179b3c590ceSMatt Ranostay 180b3c590ceSMatt Ranostay return 0; 181b3c590ceSMatt Ranostay } 182b3c590ceSMatt Ranostay 183b3c590ceSMatt Ranostay static int max30102_read_measurement(struct max30102_data *data) 184b3c590ceSMatt Ranostay { 185b3c590ceSMatt Ranostay int ret; 186b3c590ceSMatt Ranostay u8 *buffer = (u8 *) &data->buffer; 187b3c590ceSMatt Ranostay 188b3c590ceSMatt Ranostay ret = i2c_smbus_read_i2c_block_data(data->client, 189b3c590ceSMatt Ranostay MAX30102_REG_FIFO_DATA, 190b3c590ceSMatt Ranostay MAX30102_REG_FIFO_DATA_ENTRY_LEN, 191b3c590ceSMatt Ranostay buffer); 192b3c590ceSMatt Ranostay 193b3c590ceSMatt Ranostay memcpy(&data->processed_buffer[0], &buffer[0], 3); 194b3c590ceSMatt Ranostay memcpy(&data->processed_buffer[1], &buffer[3], 3); 195b3c590ceSMatt Ranostay 196b3c590ceSMatt Ranostay return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL; 197b3c590ceSMatt Ranostay } 198b3c590ceSMatt Ranostay 199b3c590ceSMatt Ranostay static irqreturn_t max30102_interrupt_handler(int irq, void *private) 200b3c590ceSMatt Ranostay { 201b3c590ceSMatt Ranostay struct iio_dev *indio_dev = private; 202b3c590ceSMatt Ranostay struct max30102_data *data = iio_priv(indio_dev); 203b3c590ceSMatt Ranostay int ret, cnt = 0; 204b3c590ceSMatt Ranostay 205b3c590ceSMatt Ranostay mutex_lock(&data->lock); 206b3c590ceSMatt Ranostay 207b3c590ceSMatt Ranostay while (cnt || (cnt = max30102_fifo_count(data)) > 0) { 208b3c590ceSMatt Ranostay ret = max30102_read_measurement(data); 209b3c590ceSMatt Ranostay if (ret) 210b3c590ceSMatt Ranostay break; 211b3c590ceSMatt Ranostay 212b3c590ceSMatt Ranostay iio_push_to_buffers(data->indio_dev, data->processed_buffer); 213b3c590ceSMatt Ranostay cnt--; 214b3c590ceSMatt Ranostay } 215b3c590ceSMatt Ranostay 216b3c590ceSMatt Ranostay mutex_unlock(&data->lock); 217b3c590ceSMatt Ranostay 218b3c590ceSMatt Ranostay return IRQ_HANDLED; 219b3c590ceSMatt Ranostay } 220b3c590ceSMatt Ranostay 221b3c590ceSMatt Ranostay static int max30102_get_current_idx(unsigned int val, int *reg) 222b3c590ceSMatt Ranostay { 223b3c590ceSMatt Ranostay /* each step is 0.200 mA */ 224b3c590ceSMatt Ranostay *reg = val / 200; 225b3c590ceSMatt Ranostay 226b3c590ceSMatt Ranostay return *reg > 0xff ? -EINVAL : 0; 227b3c590ceSMatt Ranostay } 228b3c590ceSMatt Ranostay 229b3c590ceSMatt Ranostay static int max30102_led_init(struct max30102_data *data) 230b3c590ceSMatt Ranostay { 231b3c590ceSMatt Ranostay struct device *dev = &data->client->dev; 232b3c590ceSMatt Ranostay struct device_node *np = dev->of_node; 233b3c590ceSMatt Ranostay unsigned int val; 234b3c590ceSMatt Ranostay int reg, ret; 235b3c590ceSMatt Ranostay 236b3c590ceSMatt Ranostay ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val); 237b3c590ceSMatt Ranostay if (ret) { 238b3c590ceSMatt Ranostay dev_info(dev, "no red-led-current-microamp set\n"); 239b3c590ceSMatt Ranostay 240b3c590ceSMatt Ranostay /* Default to 7 mA RED LED */ 241b3c590ceSMatt Ranostay val = 7000; 242b3c590ceSMatt Ranostay } 243b3c590ceSMatt Ranostay 244b3c590ceSMatt Ranostay ret = max30102_get_current_idx(val, ®); 245b3c590ceSMatt Ranostay if (ret) { 246b3c590ceSMatt Ranostay dev_err(dev, "invalid RED LED current setting %d\n", val); 247b3c590ceSMatt Ranostay return ret; 248b3c590ceSMatt Ranostay } 249b3c590ceSMatt Ranostay 250b3c590ceSMatt Ranostay ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg); 251b3c590ceSMatt Ranostay if (ret) 252b3c590ceSMatt Ranostay return ret; 253b3c590ceSMatt Ranostay 254b3c590ceSMatt Ranostay ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val); 255b3c590ceSMatt Ranostay if (ret) { 256b3c590ceSMatt Ranostay dev_info(dev, "no ir-led-current-microamp set\n"); 257b3c590ceSMatt Ranostay 258b3c590ceSMatt Ranostay /* Default to 7 mA IR LED */ 259b3c590ceSMatt Ranostay val = 7000; 260b3c590ceSMatt Ranostay } 261b3c590ceSMatt Ranostay 262b3c590ceSMatt Ranostay ret = max30102_get_current_idx(val, ®); 263b3c590ceSMatt Ranostay if (ret) { 264b3c590ceSMatt Ranostay dev_err(dev, "invalid IR LED current setting %d", val); 265b3c590ceSMatt Ranostay return ret; 266b3c590ceSMatt Ranostay } 267b3c590ceSMatt Ranostay 268b3c590ceSMatt Ranostay return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg); 269b3c590ceSMatt Ranostay } 270b3c590ceSMatt Ranostay 271b3c590ceSMatt Ranostay static int max30102_chip_init(struct max30102_data *data) 272b3c590ceSMatt Ranostay { 273b3c590ceSMatt Ranostay int ret; 274b3c590ceSMatt Ranostay 275b3c590ceSMatt Ranostay /* setup LED current settings */ 276b3c590ceSMatt Ranostay ret = max30102_led_init(data); 277b3c590ceSMatt Ranostay if (ret) 278b3c590ceSMatt Ranostay return ret; 279b3c590ceSMatt Ranostay 280b3c590ceSMatt Ranostay /* enable 18-bit HR + SPO2 readings at 400Hz */ 281b3c590ceSMatt Ranostay ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG, 282b3c590ceSMatt Ranostay (MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS 283b3c590ceSMatt Ranostay << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) | 284b3c590ceSMatt Ranostay (MAX30102_REG_SPO2_CONFIG_SR_400HZ 285b3c590ceSMatt Ranostay << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) | 286b3c590ceSMatt Ranostay MAX30102_REG_SPO2_CONFIG_PULSE_411_US); 287b3c590ceSMatt Ranostay if (ret) 288b3c590ceSMatt Ranostay return ret; 289b3c590ceSMatt Ranostay 290b3c590ceSMatt Ranostay /* enable SPO2 mode */ 291b3c590ceSMatt Ranostay ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG, 292b3c590ceSMatt Ranostay MAX30102_REG_MODE_CONFIG_MODE_MASK, 293b3c590ceSMatt Ranostay MAX30102_REG_MODE_CONFIG_MODE_HR_EN | 294b3c590ceSMatt Ranostay MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN); 295b3c590ceSMatt Ranostay if (ret) 296b3c590ceSMatt Ranostay return ret; 297b3c590ceSMatt Ranostay 298b3c590ceSMatt Ranostay /* average 4 samples + generate FIFO interrupt */ 299b3c590ceSMatt Ranostay ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG, 300b3c590ceSMatt Ranostay (MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES 301b3c590ceSMatt Ranostay << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) | 302b3c590ceSMatt Ranostay MAX30102_REG_FIFO_CONFIG_AFULL); 303b3c590ceSMatt Ranostay if (ret) 304b3c590ceSMatt Ranostay return ret; 305b3c590ceSMatt Ranostay 306b3c590ceSMatt Ranostay /* enable FIFO interrupt */ 307b3c590ceSMatt Ranostay return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE, 308b3c590ceSMatt Ranostay MAX30102_REG_INT_ENABLE_MASK, 309b3c590ceSMatt Ranostay MAX30102_REG_INT_ENABLE_FIFO_EN); 310b3c590ceSMatt Ranostay } 311b3c590ceSMatt Ranostay 312b3c590ceSMatt Ranostay static int max30102_read_temp(struct max30102_data *data, int *val) 313b3c590ceSMatt Ranostay { 314b3c590ceSMatt Ranostay int ret; 315b3c590ceSMatt Ranostay unsigned int reg; 316b3c590ceSMatt Ranostay 317b3c590ceSMatt Ranostay ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, ®); 318b3c590ceSMatt Ranostay if (ret < 0) 319b3c590ceSMatt Ranostay return ret; 320b3c590ceSMatt Ranostay *val = reg << 4; 321b3c590ceSMatt Ranostay 322b3c590ceSMatt Ranostay ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, ®); 323b3c590ceSMatt Ranostay if (ret < 0) 324b3c590ceSMatt Ranostay return ret; 325b3c590ceSMatt Ranostay 326b3c590ceSMatt Ranostay *val |= reg & 0xf; 327b3c590ceSMatt Ranostay *val = sign_extend32(*val, 11); 328b3c590ceSMatt Ranostay 329b3c590ceSMatt Ranostay return 0; 330b3c590ceSMatt Ranostay } 331b3c590ceSMatt Ranostay 332b3c590ceSMatt Ranostay static int max30102_get_temp(struct max30102_data *data, int *val) 333b3c590ceSMatt Ranostay { 334b3c590ceSMatt Ranostay int ret; 335b3c590ceSMatt Ranostay 336b3c590ceSMatt Ranostay /* start acquisition */ 337b3c590ceSMatt Ranostay ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG, 338b3c590ceSMatt Ranostay MAX30102_REG_TEMP_CONFIG_TEMP_EN, 339b3c590ceSMatt Ranostay MAX30102_REG_TEMP_CONFIG_TEMP_EN); 340b3c590ceSMatt Ranostay if (ret) 341b3c590ceSMatt Ranostay return ret; 342b3c590ceSMatt Ranostay 343b3c590ceSMatt Ranostay msleep(35); 344b3c590ceSMatt Ranostay 345b3c590ceSMatt Ranostay return max30102_read_temp(data, val); 346b3c590ceSMatt Ranostay } 347b3c590ceSMatt Ranostay 348b3c590ceSMatt Ranostay static int max30102_read_raw(struct iio_dev *indio_dev, 349b3c590ceSMatt Ranostay struct iio_chan_spec const *chan, 350b3c590ceSMatt Ranostay int *val, int *val2, long mask) 351b3c590ceSMatt Ranostay { 352b3c590ceSMatt Ranostay struct max30102_data *data = iio_priv(indio_dev); 353b3c590ceSMatt Ranostay int ret = -EINVAL; 354b3c590ceSMatt Ranostay 355b3c590ceSMatt Ranostay switch (mask) { 356b3c590ceSMatt Ranostay case IIO_CHAN_INFO_RAW: 357b3c590ceSMatt Ranostay /* 358b3c590ceSMatt Ranostay * Temperature reading can only be acquired while engine 359b3c590ceSMatt Ranostay * is running 360b3c590ceSMatt Ranostay */ 361b3c590ceSMatt Ranostay mutex_lock(&indio_dev->mlock); 362b3c590ceSMatt Ranostay 363b3c590ceSMatt Ranostay if (!iio_buffer_enabled(indio_dev)) 364b3c590ceSMatt Ranostay ret = -EBUSY; 365b3c590ceSMatt Ranostay else { 366b3c590ceSMatt Ranostay ret = max30102_get_temp(data, val); 367b3c590ceSMatt Ranostay if (!ret) 368b3c590ceSMatt Ranostay ret = IIO_VAL_INT; 369b3c590ceSMatt Ranostay } 370b3c590ceSMatt Ranostay 371b3c590ceSMatt Ranostay mutex_unlock(&indio_dev->mlock); 372b3c590ceSMatt Ranostay break; 373b3c590ceSMatt Ranostay case IIO_CHAN_INFO_SCALE: 374b3c590ceSMatt Ranostay *val = 1; /* 0.0625 */ 375b3c590ceSMatt Ranostay *val2 = 16; 376b3c590ceSMatt Ranostay ret = IIO_VAL_FRACTIONAL; 377b3c590ceSMatt Ranostay break; 378b3c590ceSMatt Ranostay } 379b3c590ceSMatt Ranostay 380b3c590ceSMatt Ranostay return ret; 381b3c590ceSMatt Ranostay } 382b3c590ceSMatt Ranostay 383b3c590ceSMatt Ranostay static const struct iio_info max30102_info = { 384b3c590ceSMatt Ranostay .driver_module = THIS_MODULE, 385b3c590ceSMatt Ranostay .read_raw = max30102_read_raw, 386b3c590ceSMatt Ranostay }; 387b3c590ceSMatt Ranostay 388b3c590ceSMatt Ranostay static int max30102_probe(struct i2c_client *client, 389b3c590ceSMatt Ranostay const struct i2c_device_id *id) 390b3c590ceSMatt Ranostay { 391b3c590ceSMatt Ranostay struct max30102_data *data; 392b3c590ceSMatt Ranostay struct iio_buffer *buffer; 393b3c590ceSMatt Ranostay struct iio_dev *indio_dev; 394b3c590ceSMatt Ranostay int ret; 395b3c590ceSMatt Ranostay 396b3c590ceSMatt Ranostay indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 397b3c590ceSMatt Ranostay if (!indio_dev) 398b3c590ceSMatt Ranostay return -ENOMEM; 399b3c590ceSMatt Ranostay 400b3c590ceSMatt Ranostay buffer = devm_iio_kfifo_allocate(&client->dev); 401b3c590ceSMatt Ranostay if (!buffer) 402b3c590ceSMatt Ranostay return -ENOMEM; 403b3c590ceSMatt Ranostay 404b3c590ceSMatt Ranostay iio_device_attach_buffer(indio_dev, buffer); 405b3c590ceSMatt Ranostay 406b3c590ceSMatt Ranostay indio_dev->name = MAX30102_DRV_NAME; 407b3c590ceSMatt Ranostay indio_dev->channels = max30102_channels; 408b3c590ceSMatt Ranostay indio_dev->info = &max30102_info; 409b3c590ceSMatt Ranostay indio_dev->num_channels = ARRAY_SIZE(max30102_channels); 410b3c590ceSMatt Ranostay indio_dev->available_scan_masks = max30102_scan_masks; 411b3c590ceSMatt Ranostay indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE); 412b3c590ceSMatt Ranostay indio_dev->setup_ops = &max30102_buffer_setup_ops; 413*fa722499SLars-Peter Clausen indio_dev->dev.parent = &client->dev; 414b3c590ceSMatt Ranostay 415b3c590ceSMatt Ranostay data = iio_priv(indio_dev); 416b3c590ceSMatt Ranostay data->indio_dev = indio_dev; 417b3c590ceSMatt Ranostay data->client = client; 418b3c590ceSMatt Ranostay 419b3c590ceSMatt Ranostay mutex_init(&data->lock); 420b3c590ceSMatt Ranostay i2c_set_clientdata(client, indio_dev); 421b3c590ceSMatt Ranostay 422b3c590ceSMatt Ranostay data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config); 423b3c590ceSMatt Ranostay if (IS_ERR(data->regmap)) { 424b3c590ceSMatt Ranostay dev_err(&client->dev, "regmap initialization failed.\n"); 425b3c590ceSMatt Ranostay return PTR_ERR(data->regmap); 426b3c590ceSMatt Ranostay } 427b3c590ceSMatt Ranostay max30102_set_powermode(data, false); 428b3c590ceSMatt Ranostay 429b3c590ceSMatt Ranostay ret = max30102_chip_init(data); 430b3c590ceSMatt Ranostay if (ret) 431b3c590ceSMatt Ranostay return ret; 432b3c590ceSMatt Ranostay 433b3c590ceSMatt Ranostay if (client->irq <= 0) { 434b3c590ceSMatt Ranostay dev_err(&client->dev, "no valid irq defined\n"); 435b3c590ceSMatt Ranostay return -EINVAL; 436b3c590ceSMatt Ranostay } 437b3c590ceSMatt Ranostay 438b3c590ceSMatt Ranostay ret = devm_request_threaded_irq(&client->dev, client->irq, 439b3c590ceSMatt Ranostay NULL, max30102_interrupt_handler, 440b3c590ceSMatt Ranostay IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 441b3c590ceSMatt Ranostay "max30102_irq", indio_dev); 442b3c590ceSMatt Ranostay if (ret) { 443b3c590ceSMatt Ranostay dev_err(&client->dev, "request irq (%d) failed\n", client->irq); 444b3c590ceSMatt Ranostay return ret; 445b3c590ceSMatt Ranostay } 446b3c590ceSMatt Ranostay 447b3c590ceSMatt Ranostay return iio_device_register(indio_dev); 448b3c590ceSMatt Ranostay } 449b3c590ceSMatt Ranostay 450b3c590ceSMatt Ranostay static int max30102_remove(struct i2c_client *client) 451b3c590ceSMatt Ranostay { 452b3c590ceSMatt Ranostay struct iio_dev *indio_dev = i2c_get_clientdata(client); 453b3c590ceSMatt Ranostay struct max30102_data *data = iio_priv(indio_dev); 454b3c590ceSMatt Ranostay 455b3c590ceSMatt Ranostay iio_device_unregister(indio_dev); 456b3c590ceSMatt Ranostay max30102_set_powermode(data, false); 457b3c590ceSMatt Ranostay 458b3c590ceSMatt Ranostay return 0; 459b3c590ceSMatt Ranostay } 460b3c590ceSMatt Ranostay 461b3c590ceSMatt Ranostay static const struct i2c_device_id max30102_id[] = { 462b3c590ceSMatt Ranostay { "max30102", 0 }, 463b3c590ceSMatt Ranostay {} 464b3c590ceSMatt Ranostay }; 465b3c590ceSMatt Ranostay MODULE_DEVICE_TABLE(i2c, max30102_id); 466b3c590ceSMatt Ranostay 467b3c590ceSMatt Ranostay static const struct of_device_id max30102_dt_ids[] = { 468b3c590ceSMatt Ranostay { .compatible = "maxim,max30102" }, 469b3c590ceSMatt Ranostay { } 470b3c590ceSMatt Ranostay }; 471b3c590ceSMatt Ranostay MODULE_DEVICE_TABLE(of, max30102_dt_ids); 472b3c590ceSMatt Ranostay 473b3c590ceSMatt Ranostay static struct i2c_driver max30102_driver = { 474b3c590ceSMatt Ranostay .driver = { 475b3c590ceSMatt Ranostay .name = MAX30102_DRV_NAME, 476b3c590ceSMatt Ranostay .of_match_table = of_match_ptr(max30102_dt_ids), 477b3c590ceSMatt Ranostay }, 478b3c590ceSMatt Ranostay .probe = max30102_probe, 479b3c590ceSMatt Ranostay .remove = max30102_remove, 480b3c590ceSMatt Ranostay .id_table = max30102_id, 481b3c590ceSMatt Ranostay }; 482b3c590ceSMatt Ranostay module_i2c_driver(max30102_driver); 483b3c590ceSMatt Ranostay 484b3c590ceSMatt Ranostay MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>"); 485b3c590ceSMatt Ranostay MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor"); 486b3c590ceSMatt Ranostay MODULE_LICENSE("GPL"); 487