xref: /openbmc/linux/drivers/iio/health/max30102.c (revision b3c590ce14b1f30f4535e4f4ab9f3b9a2c968aaf)
1*b3c590ceSMatt Ranostay /*
2*b3c590ceSMatt Ranostay  * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
3*b3c590ceSMatt Ranostay  *
4*b3c590ceSMatt Ranostay  * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
5*b3c590ceSMatt Ranostay  *
6*b3c590ceSMatt Ranostay  * This program is free software; you can redistribute it and/or modify
7*b3c590ceSMatt Ranostay  * it under the terms of the GNU General Public License as published by
8*b3c590ceSMatt Ranostay  * the Free Software Foundation; either version 2 of the License, or
9*b3c590ceSMatt Ranostay  * (at your option) any later version.
10*b3c590ceSMatt Ranostay  *
11*b3c590ceSMatt Ranostay  * This program is distributed in the hope that it will be useful,
12*b3c590ceSMatt Ranostay  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*b3c590ceSMatt Ranostay  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14*b3c590ceSMatt Ranostay  * GNU General Public License for more details.
15*b3c590ceSMatt Ranostay  *
16*b3c590ceSMatt Ranostay  * TODO: proximity power saving feature
17*b3c590ceSMatt Ranostay  */
18*b3c590ceSMatt Ranostay 
19*b3c590ceSMatt Ranostay #include <linux/module.h>
20*b3c590ceSMatt Ranostay #include <linux/init.h>
21*b3c590ceSMatt Ranostay #include <linux/interrupt.h>
22*b3c590ceSMatt Ranostay #include <linux/delay.h>
23*b3c590ceSMatt Ranostay #include <linux/err.h>
24*b3c590ceSMatt Ranostay #include <linux/irq.h>
25*b3c590ceSMatt Ranostay #include <linux/i2c.h>
26*b3c590ceSMatt Ranostay #include <linux/mutex.h>
27*b3c590ceSMatt Ranostay #include <linux/of.h>
28*b3c590ceSMatt Ranostay #include <linux/regmap.h>
29*b3c590ceSMatt Ranostay #include <linux/iio/iio.h>
30*b3c590ceSMatt Ranostay #include <linux/iio/buffer.h>
31*b3c590ceSMatt Ranostay #include <linux/iio/kfifo_buf.h>
32*b3c590ceSMatt Ranostay 
33*b3c590ceSMatt Ranostay #define MAX30102_REGMAP_NAME	"max30102_regmap"
34*b3c590ceSMatt Ranostay #define MAX30102_DRV_NAME	"max30102"
35*b3c590ceSMatt Ranostay 
36*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS			0x00
37*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_PWR_RDY		BIT(0)
38*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_PROX_INT	BIT(4)
39*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_ALC_OVF		BIT(5)
40*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_PPG_RDY		BIT(6)
41*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_STATUS_FIFO_RDY	BIT(7)
42*b3c590ceSMatt Ranostay 
43*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE			0x02
44*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_PROX_INT_EN	BIT(4)
45*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_ALC_OVF_EN	BIT(5)
46*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_PPG_EN		BIT(6)
47*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_FIFO_EN		BIT(7)
48*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_MASK		0xf0
49*b3c590ceSMatt Ranostay #define MAX30102_REG_INT_ENABLE_MASK_SHIFT	4
50*b3c590ceSMatt Ranostay 
51*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_WR_PTR		0x04
52*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_OVR_CTR		0x05
53*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_RD_PTR		0x06
54*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_DATA			0x07
55*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_DATA_ENTRY_LEN	6
56*b3c590ceSMatt Ranostay 
57*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG		0x08
58*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES	BIT(1)
59*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT	5
60*b3c590ceSMatt Ranostay #define MAX30102_REG_FIFO_CONFIG_AFULL		BIT(0)
61*b3c590ceSMatt Ranostay 
62*b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG		0x09
63*b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN	BIT(0)
64*b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_MODE_HR_EN	BIT(1)
65*b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_MODE_MASK	0x03
66*b3c590ceSMatt Ranostay #define MAX30102_REG_MODE_CONFIG_PWR		BIT(7)
67*b3c590ceSMatt Ranostay 
68*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG		0x0a
69*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_PULSE_411_US	0x03
70*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_SR_400HZ	0x03
71*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_SR_MASK	0x07
72*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT	2
73*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS	BIT(0)
74*b3c590ceSMatt Ranostay #define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT	5
75*b3c590ceSMatt Ranostay 
76*b3c590ceSMatt Ranostay #define MAX30102_REG_RED_LED_CONFIG		0x0c
77*b3c590ceSMatt Ranostay #define MAX30102_REG_IR_LED_CONFIG		0x0d
78*b3c590ceSMatt Ranostay 
79*b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_CONFIG		0x21
80*b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_CONFIG_TEMP_EN	BIT(0)
81*b3c590ceSMatt Ranostay 
82*b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_INTEGER		0x1f
83*b3c590ceSMatt Ranostay #define MAX30102_REG_TEMP_FRACTION		0x20
84*b3c590ceSMatt Ranostay 
85*b3c590ceSMatt Ranostay struct max30102_data {
86*b3c590ceSMatt Ranostay 	struct i2c_client *client;
87*b3c590ceSMatt Ranostay 	struct iio_dev *indio_dev;
88*b3c590ceSMatt Ranostay 	struct mutex lock;
89*b3c590ceSMatt Ranostay 	struct regmap *regmap;
90*b3c590ceSMatt Ranostay 
91*b3c590ceSMatt Ranostay 	u8 buffer[8];
92*b3c590ceSMatt Ranostay 	__be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */
93*b3c590ceSMatt Ranostay };
94*b3c590ceSMatt Ranostay 
95*b3c590ceSMatt Ranostay static const struct regmap_config max30102_regmap_config = {
96*b3c590ceSMatt Ranostay 	.name = MAX30102_REGMAP_NAME,
97*b3c590ceSMatt Ranostay 
98*b3c590ceSMatt Ranostay 	.reg_bits = 8,
99*b3c590ceSMatt Ranostay 	.val_bits = 8,
100*b3c590ceSMatt Ranostay };
101*b3c590ceSMatt Ranostay 
102*b3c590ceSMatt Ranostay static const unsigned long max30102_scan_masks[] = {0x3, 0};
103*b3c590ceSMatt Ranostay 
104*b3c590ceSMatt Ranostay static const struct iio_chan_spec max30102_channels[] = {
105*b3c590ceSMatt Ranostay 	{
106*b3c590ceSMatt Ranostay 		.type = IIO_INTENSITY,
107*b3c590ceSMatt Ranostay 		.channel2 = IIO_MOD_LIGHT_RED,
108*b3c590ceSMatt Ranostay 		.modified = 1,
109*b3c590ceSMatt Ranostay 
110*b3c590ceSMatt Ranostay 		.scan_index = 0,
111*b3c590ceSMatt Ranostay 		.scan_type = {
112*b3c590ceSMatt Ranostay 			.sign = 'u',
113*b3c590ceSMatt Ranostay 			.shift = 8,
114*b3c590ceSMatt Ranostay 			.realbits = 18,
115*b3c590ceSMatt Ranostay 			.storagebits = 32,
116*b3c590ceSMatt Ranostay 			.endianness = IIO_BE,
117*b3c590ceSMatt Ranostay 		},
118*b3c590ceSMatt Ranostay 	},
119*b3c590ceSMatt Ranostay 	{
120*b3c590ceSMatt Ranostay 		.type = IIO_INTENSITY,
121*b3c590ceSMatt Ranostay 		.channel2 = IIO_MOD_LIGHT_IR,
122*b3c590ceSMatt Ranostay 		.modified = 1,
123*b3c590ceSMatt Ranostay 
124*b3c590ceSMatt Ranostay 		.scan_index = 1,
125*b3c590ceSMatt Ranostay 		.scan_type = {
126*b3c590ceSMatt Ranostay 			.sign = 'u',
127*b3c590ceSMatt Ranostay 			.shift = 8,
128*b3c590ceSMatt Ranostay 			.realbits = 18,
129*b3c590ceSMatt Ranostay 			.storagebits = 32,
130*b3c590ceSMatt Ranostay 			.endianness = IIO_BE,
131*b3c590ceSMatt Ranostay 		},
132*b3c590ceSMatt Ranostay 	},
133*b3c590ceSMatt Ranostay 	{
134*b3c590ceSMatt Ranostay 		.type = IIO_TEMP,
135*b3c590ceSMatt Ranostay 		.info_mask_separate =
136*b3c590ceSMatt Ranostay 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
137*b3c590ceSMatt Ranostay 		.scan_index = -1,
138*b3c590ceSMatt Ranostay 	},
139*b3c590ceSMatt Ranostay };
140*b3c590ceSMatt Ranostay 
141*b3c590ceSMatt Ranostay static int max30102_set_powermode(struct max30102_data *data, bool state)
142*b3c590ceSMatt Ranostay {
143*b3c590ceSMatt Ranostay 	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
144*b3c590ceSMatt Ranostay 				  MAX30102_REG_MODE_CONFIG_PWR,
145*b3c590ceSMatt Ranostay 				  state ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
146*b3c590ceSMatt Ranostay }
147*b3c590ceSMatt Ranostay 
148*b3c590ceSMatt Ranostay static int max30102_buffer_postenable(struct iio_dev *indio_dev)
149*b3c590ceSMatt Ranostay {
150*b3c590ceSMatt Ranostay 	struct max30102_data *data = iio_priv(indio_dev);
151*b3c590ceSMatt Ranostay 
152*b3c590ceSMatt Ranostay 	return max30102_set_powermode(data, true);
153*b3c590ceSMatt Ranostay }
154*b3c590ceSMatt Ranostay 
155*b3c590ceSMatt Ranostay static int max30102_buffer_predisable(struct iio_dev *indio_dev)
156*b3c590ceSMatt Ranostay {
157*b3c590ceSMatt Ranostay 	struct max30102_data *data = iio_priv(indio_dev);
158*b3c590ceSMatt Ranostay 
159*b3c590ceSMatt Ranostay 	return max30102_set_powermode(data, false);
160*b3c590ceSMatt Ranostay }
161*b3c590ceSMatt Ranostay 
162*b3c590ceSMatt Ranostay static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
163*b3c590ceSMatt Ranostay 	.postenable = max30102_buffer_postenable,
164*b3c590ceSMatt Ranostay 	.predisable = max30102_buffer_predisable,
165*b3c590ceSMatt Ranostay };
166*b3c590ceSMatt Ranostay 
167*b3c590ceSMatt Ranostay static inline int max30102_fifo_count(struct max30102_data *data)
168*b3c590ceSMatt Ranostay {
169*b3c590ceSMatt Ranostay 	unsigned int val;
170*b3c590ceSMatt Ranostay 	int ret;
171*b3c590ceSMatt Ranostay 
172*b3c590ceSMatt Ranostay 	ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
173*b3c590ceSMatt Ranostay 	if (ret)
174*b3c590ceSMatt Ranostay 		return ret;
175*b3c590ceSMatt Ranostay 
176*b3c590ceSMatt Ranostay 	/* FIFO has one sample slot left */
177*b3c590ceSMatt Ranostay 	if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
178*b3c590ceSMatt Ranostay 		return 1;
179*b3c590ceSMatt Ranostay 
180*b3c590ceSMatt Ranostay 	return 0;
181*b3c590ceSMatt Ranostay }
182*b3c590ceSMatt Ranostay 
183*b3c590ceSMatt Ranostay static int max30102_read_measurement(struct max30102_data *data)
184*b3c590ceSMatt Ranostay {
185*b3c590ceSMatt Ranostay 	int ret;
186*b3c590ceSMatt Ranostay 	u8 *buffer = (u8 *) &data->buffer;
187*b3c590ceSMatt Ranostay 
188*b3c590ceSMatt Ranostay 	ret = i2c_smbus_read_i2c_block_data(data->client,
189*b3c590ceSMatt Ranostay 					    MAX30102_REG_FIFO_DATA,
190*b3c590ceSMatt Ranostay 					    MAX30102_REG_FIFO_DATA_ENTRY_LEN,
191*b3c590ceSMatt Ranostay 					    buffer);
192*b3c590ceSMatt Ranostay 
193*b3c590ceSMatt Ranostay 	memcpy(&data->processed_buffer[0], &buffer[0], 3);
194*b3c590ceSMatt Ranostay 	memcpy(&data->processed_buffer[1], &buffer[3], 3);
195*b3c590ceSMatt Ranostay 
196*b3c590ceSMatt Ranostay 	return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL;
197*b3c590ceSMatt Ranostay }
198*b3c590ceSMatt Ranostay 
199*b3c590ceSMatt Ranostay static irqreturn_t max30102_interrupt_handler(int irq, void *private)
200*b3c590ceSMatt Ranostay {
201*b3c590ceSMatt Ranostay 	struct iio_dev *indio_dev = private;
202*b3c590ceSMatt Ranostay 	struct max30102_data *data = iio_priv(indio_dev);
203*b3c590ceSMatt Ranostay 	int ret, cnt = 0;
204*b3c590ceSMatt Ranostay 
205*b3c590ceSMatt Ranostay 	mutex_lock(&data->lock);
206*b3c590ceSMatt Ranostay 
207*b3c590ceSMatt Ranostay 	while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
208*b3c590ceSMatt Ranostay 		ret = max30102_read_measurement(data);
209*b3c590ceSMatt Ranostay 		if (ret)
210*b3c590ceSMatt Ranostay 			break;
211*b3c590ceSMatt Ranostay 
212*b3c590ceSMatt Ranostay 		iio_push_to_buffers(data->indio_dev, data->processed_buffer);
213*b3c590ceSMatt Ranostay 		cnt--;
214*b3c590ceSMatt Ranostay 	}
215*b3c590ceSMatt Ranostay 
216*b3c590ceSMatt Ranostay 	mutex_unlock(&data->lock);
217*b3c590ceSMatt Ranostay 
218*b3c590ceSMatt Ranostay 	return IRQ_HANDLED;
219*b3c590ceSMatt Ranostay }
220*b3c590ceSMatt Ranostay 
221*b3c590ceSMatt Ranostay static int max30102_get_current_idx(unsigned int val, int *reg)
222*b3c590ceSMatt Ranostay {
223*b3c590ceSMatt Ranostay 	/* each step is 0.200 mA */
224*b3c590ceSMatt Ranostay 	*reg = val / 200;
225*b3c590ceSMatt Ranostay 
226*b3c590ceSMatt Ranostay 	return *reg > 0xff ? -EINVAL : 0;
227*b3c590ceSMatt Ranostay }
228*b3c590ceSMatt Ranostay 
229*b3c590ceSMatt Ranostay static int max30102_led_init(struct max30102_data *data)
230*b3c590ceSMatt Ranostay {
231*b3c590ceSMatt Ranostay 	struct device *dev = &data->client->dev;
232*b3c590ceSMatt Ranostay 	struct device_node *np = dev->of_node;
233*b3c590ceSMatt Ranostay 	unsigned int val;
234*b3c590ceSMatt Ranostay 	int reg, ret;
235*b3c590ceSMatt Ranostay 
236*b3c590ceSMatt Ranostay 	ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
237*b3c590ceSMatt Ranostay 	if (ret) {
238*b3c590ceSMatt Ranostay 		dev_info(dev, "no red-led-current-microamp set\n");
239*b3c590ceSMatt Ranostay 
240*b3c590ceSMatt Ranostay 		/* Default to 7 mA RED LED */
241*b3c590ceSMatt Ranostay 		val = 7000;
242*b3c590ceSMatt Ranostay 	}
243*b3c590ceSMatt Ranostay 
244*b3c590ceSMatt Ranostay 	ret = max30102_get_current_idx(val, &reg);
245*b3c590ceSMatt Ranostay 	if (ret) {
246*b3c590ceSMatt Ranostay 		dev_err(dev, "invalid RED LED current setting %d\n", val);
247*b3c590ceSMatt Ranostay 		return ret;
248*b3c590ceSMatt Ranostay 	}
249*b3c590ceSMatt Ranostay 
250*b3c590ceSMatt Ranostay 	ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
251*b3c590ceSMatt Ranostay 	if (ret)
252*b3c590ceSMatt Ranostay 		return ret;
253*b3c590ceSMatt Ranostay 
254*b3c590ceSMatt Ranostay 	ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
255*b3c590ceSMatt Ranostay 	if (ret) {
256*b3c590ceSMatt Ranostay 		dev_info(dev, "no ir-led-current-microamp set\n");
257*b3c590ceSMatt Ranostay 
258*b3c590ceSMatt Ranostay 		/* Default to 7 mA IR LED */
259*b3c590ceSMatt Ranostay 		val = 7000;
260*b3c590ceSMatt Ranostay 	}
261*b3c590ceSMatt Ranostay 
262*b3c590ceSMatt Ranostay 	ret = max30102_get_current_idx(val, &reg);
263*b3c590ceSMatt Ranostay 	if (ret) {
264*b3c590ceSMatt Ranostay 		dev_err(dev, "invalid IR LED current setting %d", val);
265*b3c590ceSMatt Ranostay 		return ret;
266*b3c590ceSMatt Ranostay 	}
267*b3c590ceSMatt Ranostay 
268*b3c590ceSMatt Ranostay 	return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
269*b3c590ceSMatt Ranostay }
270*b3c590ceSMatt Ranostay 
271*b3c590ceSMatt Ranostay static int max30102_chip_init(struct max30102_data *data)
272*b3c590ceSMatt Ranostay {
273*b3c590ceSMatt Ranostay 	int ret;
274*b3c590ceSMatt Ranostay 
275*b3c590ceSMatt Ranostay 	/* setup LED current settings */
276*b3c590ceSMatt Ranostay 	ret = max30102_led_init(data);
277*b3c590ceSMatt Ranostay 	if (ret)
278*b3c590ceSMatt Ranostay 		return ret;
279*b3c590ceSMatt Ranostay 
280*b3c590ceSMatt Ranostay 	/* enable 18-bit HR + SPO2 readings at 400Hz */
281*b3c590ceSMatt Ranostay 	ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
282*b3c590ceSMatt Ranostay 				(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
283*b3c590ceSMatt Ranostay 				 << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
284*b3c590ceSMatt Ranostay 				(MAX30102_REG_SPO2_CONFIG_SR_400HZ
285*b3c590ceSMatt Ranostay 				 << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
286*b3c590ceSMatt Ranostay 				 MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
287*b3c590ceSMatt Ranostay 	if (ret)
288*b3c590ceSMatt Ranostay 		return ret;
289*b3c590ceSMatt Ranostay 
290*b3c590ceSMatt Ranostay 	/* enable SPO2 mode */
291*b3c590ceSMatt Ranostay 	ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
292*b3c590ceSMatt Ranostay 				 MAX30102_REG_MODE_CONFIG_MODE_MASK,
293*b3c590ceSMatt Ranostay 				 MAX30102_REG_MODE_CONFIG_MODE_HR_EN |
294*b3c590ceSMatt Ranostay 				 MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN);
295*b3c590ceSMatt Ranostay 	if (ret)
296*b3c590ceSMatt Ranostay 		return ret;
297*b3c590ceSMatt Ranostay 
298*b3c590ceSMatt Ranostay 	/* average 4 samples + generate FIFO interrupt */
299*b3c590ceSMatt Ranostay 	ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
300*b3c590ceSMatt Ranostay 				(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
301*b3c590ceSMatt Ranostay 				 << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
302*b3c590ceSMatt Ranostay 				 MAX30102_REG_FIFO_CONFIG_AFULL);
303*b3c590ceSMatt Ranostay 	if (ret)
304*b3c590ceSMatt Ranostay 		return ret;
305*b3c590ceSMatt Ranostay 
306*b3c590ceSMatt Ranostay 	/* enable FIFO interrupt */
307*b3c590ceSMatt Ranostay 	return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
308*b3c590ceSMatt Ranostay 				 MAX30102_REG_INT_ENABLE_MASK,
309*b3c590ceSMatt Ranostay 				 MAX30102_REG_INT_ENABLE_FIFO_EN);
310*b3c590ceSMatt Ranostay }
311*b3c590ceSMatt Ranostay 
312*b3c590ceSMatt Ranostay static int max30102_read_temp(struct max30102_data *data, int *val)
313*b3c590ceSMatt Ranostay {
314*b3c590ceSMatt Ranostay 	int ret;
315*b3c590ceSMatt Ranostay 	unsigned int reg;
316*b3c590ceSMatt Ranostay 
317*b3c590ceSMatt Ranostay 	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
318*b3c590ceSMatt Ranostay 	if (ret < 0)
319*b3c590ceSMatt Ranostay 		return ret;
320*b3c590ceSMatt Ranostay 	*val = reg << 4;
321*b3c590ceSMatt Ranostay 
322*b3c590ceSMatt Ranostay 	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
323*b3c590ceSMatt Ranostay 	if (ret < 0)
324*b3c590ceSMatt Ranostay 		return ret;
325*b3c590ceSMatt Ranostay 
326*b3c590ceSMatt Ranostay 	*val |= reg & 0xf;
327*b3c590ceSMatt Ranostay 	*val = sign_extend32(*val, 11);
328*b3c590ceSMatt Ranostay 
329*b3c590ceSMatt Ranostay 	return 0;
330*b3c590ceSMatt Ranostay }
331*b3c590ceSMatt Ranostay 
332*b3c590ceSMatt Ranostay static int max30102_get_temp(struct max30102_data *data, int *val)
333*b3c590ceSMatt Ranostay {
334*b3c590ceSMatt Ranostay 	int ret;
335*b3c590ceSMatt Ranostay 
336*b3c590ceSMatt Ranostay 	/* start acquisition */
337*b3c590ceSMatt Ranostay 	ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
338*b3c590ceSMatt Ranostay 				 MAX30102_REG_TEMP_CONFIG_TEMP_EN,
339*b3c590ceSMatt Ranostay 				 MAX30102_REG_TEMP_CONFIG_TEMP_EN);
340*b3c590ceSMatt Ranostay 	if (ret)
341*b3c590ceSMatt Ranostay 		return ret;
342*b3c590ceSMatt Ranostay 
343*b3c590ceSMatt Ranostay 	msleep(35);
344*b3c590ceSMatt Ranostay 
345*b3c590ceSMatt Ranostay 	return max30102_read_temp(data, val);
346*b3c590ceSMatt Ranostay }
347*b3c590ceSMatt Ranostay 
348*b3c590ceSMatt Ranostay static int max30102_read_raw(struct iio_dev *indio_dev,
349*b3c590ceSMatt Ranostay 			     struct iio_chan_spec const *chan,
350*b3c590ceSMatt Ranostay 			     int *val, int *val2, long mask)
351*b3c590ceSMatt Ranostay {
352*b3c590ceSMatt Ranostay 	struct max30102_data *data = iio_priv(indio_dev);
353*b3c590ceSMatt Ranostay 	int ret = -EINVAL;
354*b3c590ceSMatt Ranostay 
355*b3c590ceSMatt Ranostay 	switch (mask) {
356*b3c590ceSMatt Ranostay 	case IIO_CHAN_INFO_RAW:
357*b3c590ceSMatt Ranostay 		/*
358*b3c590ceSMatt Ranostay 		 * Temperature reading can only be acquired while engine
359*b3c590ceSMatt Ranostay 		 * is running
360*b3c590ceSMatt Ranostay 		 */
361*b3c590ceSMatt Ranostay 		mutex_lock(&indio_dev->mlock);
362*b3c590ceSMatt Ranostay 
363*b3c590ceSMatt Ranostay 		if (!iio_buffer_enabled(indio_dev))
364*b3c590ceSMatt Ranostay 			ret = -EBUSY;
365*b3c590ceSMatt Ranostay 		else {
366*b3c590ceSMatt Ranostay 			ret = max30102_get_temp(data, val);
367*b3c590ceSMatt Ranostay 			if (!ret)
368*b3c590ceSMatt Ranostay 				ret = IIO_VAL_INT;
369*b3c590ceSMatt Ranostay 		}
370*b3c590ceSMatt Ranostay 
371*b3c590ceSMatt Ranostay 		mutex_unlock(&indio_dev->mlock);
372*b3c590ceSMatt Ranostay 		break;
373*b3c590ceSMatt Ranostay 	case IIO_CHAN_INFO_SCALE:
374*b3c590ceSMatt Ranostay 		*val = 1;  /* 0.0625 */
375*b3c590ceSMatt Ranostay 		*val2 = 16;
376*b3c590ceSMatt Ranostay 		ret = IIO_VAL_FRACTIONAL;
377*b3c590ceSMatt Ranostay 		break;
378*b3c590ceSMatt Ranostay 	}
379*b3c590ceSMatt Ranostay 
380*b3c590ceSMatt Ranostay 	return ret;
381*b3c590ceSMatt Ranostay }
382*b3c590ceSMatt Ranostay 
383*b3c590ceSMatt Ranostay static const struct iio_info max30102_info = {
384*b3c590ceSMatt Ranostay 	.driver_module = THIS_MODULE,
385*b3c590ceSMatt Ranostay 	.read_raw = max30102_read_raw,
386*b3c590ceSMatt Ranostay };
387*b3c590ceSMatt Ranostay 
388*b3c590ceSMatt Ranostay static int max30102_probe(struct i2c_client *client,
389*b3c590ceSMatt Ranostay 			  const struct i2c_device_id *id)
390*b3c590ceSMatt Ranostay {
391*b3c590ceSMatt Ranostay 	struct max30102_data *data;
392*b3c590ceSMatt Ranostay 	struct iio_buffer *buffer;
393*b3c590ceSMatt Ranostay 	struct iio_dev *indio_dev;
394*b3c590ceSMatt Ranostay 	int ret;
395*b3c590ceSMatt Ranostay 
396*b3c590ceSMatt Ranostay 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
397*b3c590ceSMatt Ranostay 	if (!indio_dev)
398*b3c590ceSMatt Ranostay 		return -ENOMEM;
399*b3c590ceSMatt Ranostay 
400*b3c590ceSMatt Ranostay 	buffer = devm_iio_kfifo_allocate(&client->dev);
401*b3c590ceSMatt Ranostay 	if (!buffer)
402*b3c590ceSMatt Ranostay 		return -ENOMEM;
403*b3c590ceSMatt Ranostay 
404*b3c590ceSMatt Ranostay 	iio_device_attach_buffer(indio_dev, buffer);
405*b3c590ceSMatt Ranostay 
406*b3c590ceSMatt Ranostay 	indio_dev->name = MAX30102_DRV_NAME;
407*b3c590ceSMatt Ranostay 	indio_dev->channels = max30102_channels;
408*b3c590ceSMatt Ranostay 	indio_dev->info = &max30102_info;
409*b3c590ceSMatt Ranostay 	indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
410*b3c590ceSMatt Ranostay 	indio_dev->available_scan_masks = max30102_scan_masks;
411*b3c590ceSMatt Ranostay 	indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
412*b3c590ceSMatt Ranostay 	indio_dev->setup_ops = &max30102_buffer_setup_ops;
413*b3c590ceSMatt Ranostay 
414*b3c590ceSMatt Ranostay 	data = iio_priv(indio_dev);
415*b3c590ceSMatt Ranostay 	data->indio_dev = indio_dev;
416*b3c590ceSMatt Ranostay 	data->client = client;
417*b3c590ceSMatt Ranostay 
418*b3c590ceSMatt Ranostay 	mutex_init(&data->lock);
419*b3c590ceSMatt Ranostay 	i2c_set_clientdata(client, indio_dev);
420*b3c590ceSMatt Ranostay 
421*b3c590ceSMatt Ranostay 	data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
422*b3c590ceSMatt Ranostay 	if (IS_ERR(data->regmap)) {
423*b3c590ceSMatt Ranostay 		dev_err(&client->dev, "regmap initialization failed.\n");
424*b3c590ceSMatt Ranostay 		return PTR_ERR(data->regmap);
425*b3c590ceSMatt Ranostay 	}
426*b3c590ceSMatt Ranostay 	max30102_set_powermode(data, false);
427*b3c590ceSMatt Ranostay 
428*b3c590ceSMatt Ranostay 	ret = max30102_chip_init(data);
429*b3c590ceSMatt Ranostay 	if (ret)
430*b3c590ceSMatt Ranostay 		return ret;
431*b3c590ceSMatt Ranostay 
432*b3c590ceSMatt Ranostay 	if (client->irq <= 0) {
433*b3c590ceSMatt Ranostay 		dev_err(&client->dev, "no valid irq defined\n");
434*b3c590ceSMatt Ranostay 		return -EINVAL;
435*b3c590ceSMatt Ranostay 	}
436*b3c590ceSMatt Ranostay 
437*b3c590ceSMatt Ranostay 	ret = devm_request_threaded_irq(&client->dev, client->irq,
438*b3c590ceSMatt Ranostay 					NULL, max30102_interrupt_handler,
439*b3c590ceSMatt Ranostay 					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
440*b3c590ceSMatt Ranostay 					"max30102_irq", indio_dev);
441*b3c590ceSMatt Ranostay 	if (ret) {
442*b3c590ceSMatt Ranostay 		dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
443*b3c590ceSMatt Ranostay 		return ret;
444*b3c590ceSMatt Ranostay 	}
445*b3c590ceSMatt Ranostay 
446*b3c590ceSMatt Ranostay 	return iio_device_register(indio_dev);
447*b3c590ceSMatt Ranostay }
448*b3c590ceSMatt Ranostay 
449*b3c590ceSMatt Ranostay static int max30102_remove(struct i2c_client *client)
450*b3c590ceSMatt Ranostay {
451*b3c590ceSMatt Ranostay 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
452*b3c590ceSMatt Ranostay 	struct max30102_data *data = iio_priv(indio_dev);
453*b3c590ceSMatt Ranostay 
454*b3c590ceSMatt Ranostay 	iio_device_unregister(indio_dev);
455*b3c590ceSMatt Ranostay 	max30102_set_powermode(data, false);
456*b3c590ceSMatt Ranostay 
457*b3c590ceSMatt Ranostay 	return 0;
458*b3c590ceSMatt Ranostay }
459*b3c590ceSMatt Ranostay 
460*b3c590ceSMatt Ranostay static const struct i2c_device_id max30102_id[] = {
461*b3c590ceSMatt Ranostay 	{ "max30102", 0 },
462*b3c590ceSMatt Ranostay 	{}
463*b3c590ceSMatt Ranostay };
464*b3c590ceSMatt Ranostay MODULE_DEVICE_TABLE(i2c, max30102_id);
465*b3c590ceSMatt Ranostay 
466*b3c590ceSMatt Ranostay static const struct of_device_id max30102_dt_ids[] = {
467*b3c590ceSMatt Ranostay 	{ .compatible = "maxim,max30102" },
468*b3c590ceSMatt Ranostay 	{ }
469*b3c590ceSMatt Ranostay };
470*b3c590ceSMatt Ranostay MODULE_DEVICE_TABLE(of, max30102_dt_ids);
471*b3c590ceSMatt Ranostay 
472*b3c590ceSMatt Ranostay static struct i2c_driver max30102_driver = {
473*b3c590ceSMatt Ranostay 	.driver = {
474*b3c590ceSMatt Ranostay 		.name	= MAX30102_DRV_NAME,
475*b3c590ceSMatt Ranostay 		.of_match_table	= of_match_ptr(max30102_dt_ids),
476*b3c590ceSMatt Ranostay 	},
477*b3c590ceSMatt Ranostay 	.probe		= max30102_probe,
478*b3c590ceSMatt Ranostay 	.remove		= max30102_remove,
479*b3c590ceSMatt Ranostay 	.id_table	= max30102_id,
480*b3c590ceSMatt Ranostay };
481*b3c590ceSMatt Ranostay module_i2c_driver(max30102_driver);
482*b3c590ceSMatt Ranostay 
483*b3c590ceSMatt Ranostay MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
484*b3c590ceSMatt Ranostay MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor");
485*b3c590ceSMatt Ranostay MODULE_LICENSE("GPL");
486