11802d0beSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 287aec56eSAndrew F. Davis /* 387aec56eSAndrew F. Davis * AFE440X Heart Rate Monitors and Low-Cost Pulse Oximeters 487aec56eSAndrew F. Davis * 5*3593cd53SAlexander A. Klimov * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ 687aec56eSAndrew F. Davis * Andrew F. Davis <afd@ti.com> 787aec56eSAndrew F. Davis */ 887aec56eSAndrew F. Davis 987aec56eSAndrew F. Davis #ifndef _AFE440X_H 1087aec56eSAndrew F. Davis #define _AFE440X_H 1187aec56eSAndrew F. Davis 1287aec56eSAndrew F. Davis /* AFE440X registers */ 1387aec56eSAndrew F. Davis #define AFE440X_CONTROL0 0x00 1487aec56eSAndrew F. Davis #define AFE440X_LED2STC 0x01 1587aec56eSAndrew F. Davis #define AFE440X_LED2ENDC 0x02 1687aec56eSAndrew F. Davis #define AFE440X_LED1LEDSTC 0x03 1787aec56eSAndrew F. Davis #define AFE440X_LED1LEDENDC 0x04 1887aec56eSAndrew F. Davis #define AFE440X_ALED2STC 0x05 1987aec56eSAndrew F. Davis #define AFE440X_ALED2ENDC 0x06 2087aec56eSAndrew F. Davis #define AFE440X_LED1STC 0x07 2187aec56eSAndrew F. Davis #define AFE440X_LED1ENDC 0x08 2287aec56eSAndrew F. Davis #define AFE440X_LED2LEDSTC 0x09 2387aec56eSAndrew F. Davis #define AFE440X_LED2LEDENDC 0x0a 2487aec56eSAndrew F. Davis #define AFE440X_ALED1STC 0x0b 2587aec56eSAndrew F. Davis #define AFE440X_ALED1ENDC 0x0c 2687aec56eSAndrew F. Davis #define AFE440X_LED2CONVST 0x0d 2787aec56eSAndrew F. Davis #define AFE440X_LED2CONVEND 0x0e 2887aec56eSAndrew F. Davis #define AFE440X_ALED2CONVST 0x0f 2987aec56eSAndrew F. Davis #define AFE440X_ALED2CONVEND 0x10 3087aec56eSAndrew F. Davis #define AFE440X_LED1CONVST 0x11 3187aec56eSAndrew F. Davis #define AFE440X_LED1CONVEND 0x12 3287aec56eSAndrew F. Davis #define AFE440X_ALED1CONVST 0x13 3387aec56eSAndrew F. Davis #define AFE440X_ALED1CONVEND 0x14 3487aec56eSAndrew F. Davis #define AFE440X_ADCRSTSTCT0 0x15 3587aec56eSAndrew F. Davis #define AFE440X_ADCRSTENDCT0 0x16 3687aec56eSAndrew F. Davis #define AFE440X_ADCRSTSTCT1 0x17 3787aec56eSAndrew F. Davis #define AFE440X_ADCRSTENDCT1 0x18 3887aec56eSAndrew F. Davis #define AFE440X_ADCRSTSTCT2 0x19 3987aec56eSAndrew F. Davis #define AFE440X_ADCRSTENDCT2 0x1a 4087aec56eSAndrew F. Davis #define AFE440X_ADCRSTSTCT3 0x1b 4187aec56eSAndrew F. Davis #define AFE440X_ADCRSTENDCT3 0x1c 4287aec56eSAndrew F. Davis #define AFE440X_PRPCOUNT 0x1d 4387aec56eSAndrew F. Davis #define AFE440X_CONTROL1 0x1e 4487aec56eSAndrew F. Davis #define AFE440X_LEDCNTRL 0x22 4587aec56eSAndrew F. Davis #define AFE440X_CONTROL2 0x23 4687aec56eSAndrew F. Davis #define AFE440X_ALARM 0x29 4787aec56eSAndrew F. Davis #define AFE440X_LED2VAL 0x2a 4887aec56eSAndrew F. Davis #define AFE440X_ALED2VAL 0x2b 4987aec56eSAndrew F. Davis #define AFE440X_LED1VAL 0x2c 5087aec56eSAndrew F. Davis #define AFE440X_ALED1VAL 0x2d 5187aec56eSAndrew F. Davis #define AFE440X_LED2_ALED2VAL 0x2e 5287aec56eSAndrew F. Davis #define AFE440X_LED1_ALED1VAL 0x2f 5387aec56eSAndrew F. Davis #define AFE440X_CONTROL3 0x31 5487aec56eSAndrew F. Davis #define AFE440X_PDNCYCLESTC 0x32 5587aec56eSAndrew F. Davis #define AFE440X_PDNCYCLEENDC 0x33 5687aec56eSAndrew F. Davis 5787aec56eSAndrew F. Davis /* CONTROL0 register fields */ 5887aec56eSAndrew F. Davis #define AFE440X_CONTROL0_REG_READ BIT(0) 5987aec56eSAndrew F. Davis #define AFE440X_CONTROL0_TM_COUNT_RST BIT(1) 6087aec56eSAndrew F. Davis #define AFE440X_CONTROL0_SW_RESET BIT(3) 6187aec56eSAndrew F. Davis 6287aec56eSAndrew F. Davis /* CONTROL1 register fields */ 6387aec56eSAndrew F. Davis #define AFE440X_CONTROL1_TIMEREN BIT(8) 6487aec56eSAndrew F. Davis 6587aec56eSAndrew F. Davis /* TIAGAIN register fields */ 6681f51727SAndrew F. Davis #define AFE440X_TIAGAIN_ENSEPGAIN BIT(15) 6787aec56eSAndrew F. Davis 6887aec56eSAndrew F. Davis /* CONTROL2 register fields */ 6987aec56eSAndrew F. Davis #define AFE440X_CONTROL2_PDN_AFE BIT(0) 7087aec56eSAndrew F. Davis #define AFE440X_CONTROL2_PDN_RX BIT(1) 7187aec56eSAndrew F. Davis #define AFE440X_CONTROL2_DYNAMIC4 BIT(3) 7287aec56eSAndrew F. Davis #define AFE440X_CONTROL2_DYNAMIC3 BIT(4) 7387aec56eSAndrew F. Davis #define AFE440X_CONTROL2_DYNAMIC2 BIT(14) 7487aec56eSAndrew F. Davis #define AFE440X_CONTROL2_DYNAMIC1 BIT(20) 7587aec56eSAndrew F. Davis 7687aec56eSAndrew F. Davis /* CONTROL3 register fields */ 7787aec56eSAndrew F. Davis #define AFE440X_CONTROL3_CLKDIV GENMASK(2, 0) 7887aec56eSAndrew F. Davis 7987aec56eSAndrew F. Davis /* CONTROL0 values */ 8087aec56eSAndrew F. Davis #define AFE440X_CONTROL0_WRITE 0x0 8187aec56eSAndrew F. Davis #define AFE440X_CONTROL0_READ 0x1 8287aec56eSAndrew F. Davis 8324b9dea7SAndrew F. Davis #define AFE440X_INTENSITY_CHAN(_index, _mask) \ 8487aec56eSAndrew F. Davis { \ 8587aec56eSAndrew F. Davis .type = IIO_INTENSITY, \ 8687aec56eSAndrew F. Davis .channel = _index, \ 8787aec56eSAndrew F. Davis .address = _index, \ 8887aec56eSAndrew F. Davis .scan_index = _index, \ 8987aec56eSAndrew F. Davis .scan_type = { \ 9087aec56eSAndrew F. Davis .sign = 's', \ 9187aec56eSAndrew F. Davis .realbits = 24, \ 9287aec56eSAndrew F. Davis .storagebits = 32, \ 9387aec56eSAndrew F. Davis .endianness = IIO_CPU, \ 9487aec56eSAndrew F. Davis }, \ 9587aec56eSAndrew F. Davis .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 9687aec56eSAndrew F. Davis _mask, \ 9724b9dea7SAndrew F. Davis .indexed = true, \ 9887aec56eSAndrew F. Davis } 9987aec56eSAndrew F. Davis 10024b9dea7SAndrew F. Davis #define AFE440X_CURRENT_CHAN(_index) \ 10187aec56eSAndrew F. Davis { \ 10287aec56eSAndrew F. Davis .type = IIO_CURRENT, \ 10387aec56eSAndrew F. Davis .channel = _index, \ 10487aec56eSAndrew F. Davis .address = _index, \ 1059d3d9a57SAndrew F. Davis .scan_index = -1, \ 10687aec56eSAndrew F. Davis .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 10787aec56eSAndrew F. Davis BIT(IIO_CHAN_INFO_SCALE), \ 10824b9dea7SAndrew F. Davis .indexed = true, \ 10987aec56eSAndrew F. Davis .output = true, \ 11087aec56eSAndrew F. Davis } 11187aec56eSAndrew F. Davis 11287aec56eSAndrew F. Davis struct afe440x_val_table { 11387aec56eSAndrew F. Davis int integer; 11487aec56eSAndrew F. Davis int fract; 11587aec56eSAndrew F. Davis }; 11687aec56eSAndrew F. Davis 11787aec56eSAndrew F. Davis #define AFE440X_TABLE_ATTR(_name, _table) \ 11887aec56eSAndrew F. Davis static ssize_t _name ## _show(struct device *dev, \ 11987aec56eSAndrew F. Davis struct device_attribute *attr, char *buf) \ 12087aec56eSAndrew F. Davis { \ 12187aec56eSAndrew F. Davis ssize_t len = 0; \ 12287aec56eSAndrew F. Davis int i; \ 12387aec56eSAndrew F. Davis \ 12487aec56eSAndrew F. Davis for (i = 0; i < ARRAY_SIZE(_table); i++) \ 12587aec56eSAndrew F. Davis len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06u ", \ 12687aec56eSAndrew F. Davis _table[i].integer, \ 12787aec56eSAndrew F. Davis _table[i].fract); \ 12887aec56eSAndrew F. Davis \ 12987aec56eSAndrew F. Davis buf[len - 1] = '\n'; \ 13087aec56eSAndrew F. Davis \ 13187aec56eSAndrew F. Davis return len; \ 13287aec56eSAndrew F. Davis } \ 13387aec56eSAndrew F. Davis static DEVICE_ATTR_RO(_name) 13487aec56eSAndrew F. Davis 13587aec56eSAndrew F. Davis struct afe440x_attr { 13687aec56eSAndrew F. Davis struct device_attribute dev_attr; 137b36e8257SAndrew F. Davis unsigned int field; 13887aec56eSAndrew F. Davis const struct afe440x_val_table *val_table; 13987aec56eSAndrew F. Davis unsigned int table_size; 14087aec56eSAndrew F. Davis }; 14187aec56eSAndrew F. Davis 14287aec56eSAndrew F. Davis #define to_afe440x_attr(_dev_attr) \ 14387aec56eSAndrew F. Davis container_of(_dev_attr, struct afe440x_attr, dev_attr) 14487aec56eSAndrew F. Davis 145b36e8257SAndrew F. Davis #define AFE440X_ATTR(_name, _field, _table) \ 14687aec56eSAndrew F. Davis struct afe440x_attr afe440x_attr_##_name = { \ 14787aec56eSAndrew F. Davis .dev_attr = __ATTR(_name, (S_IRUGO | S_IWUSR), \ 14887aec56eSAndrew F. Davis afe440x_show_register, \ 14987aec56eSAndrew F. Davis afe440x_store_register), \ 150b36e8257SAndrew F. Davis .field = _field, \ 15187aec56eSAndrew F. Davis .val_table = _table, \ 15281f51727SAndrew F. Davis .table_size = ARRAY_SIZE(_table), \ 15387aec56eSAndrew F. Davis } 15487aec56eSAndrew F. Davis 15587aec56eSAndrew F. Davis #endif /* _AFE440X_H */ 156