1 /* 2 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters 3 * 4 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 5 * Andrew F. Davis <afd@ti.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 */ 16 17 #include <linux/device.h> 18 #include <linux/err.h> 19 #include <linux/interrupt.h> 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/regmap.h> 23 #include <linux/spi/spi.h> 24 #include <linux/sysfs.h> 25 #include <linux/regulator/consumer.h> 26 27 #include <linux/iio/iio.h> 28 #include <linux/iio/sysfs.h> 29 #include <linux/iio/buffer.h> 30 #include <linux/iio/trigger.h> 31 #include <linux/iio/triggered_buffer.h> 32 #include <linux/iio/trigger_consumer.h> 33 34 #include "afe440x.h" 35 36 #define AFE4403_DRIVER_NAME "afe4403" 37 38 /* AFE4403 Registers */ 39 #define AFE4403_TIAGAIN 0x20 40 #define AFE4403_TIA_AMB_GAIN 0x21 41 42 /* AFE4403 LEDCNTRL values */ 43 #define AFE440X_LEDCNTRL_RANGE_TX_HALF 0x1 44 #define AFE440X_LEDCNTRL_RANGE_TX_FULL 0x2 45 #define AFE440X_LEDCNTRL_RANGE_TX_OFF 0x3 46 47 /* AFE4403 CONTROL2 values */ 48 #define AFE440X_CONTROL2_TX_REF_025 0x0 49 #define AFE440X_CONTROL2_TX_REF_050 0x1 50 #define AFE440X_CONTROL2_TX_REF_100 0x2 51 #define AFE440X_CONTROL2_TX_REF_075 0x3 52 53 /* AFE4403 CONTROL3 values */ 54 #define AFE440X_CONTROL3_CLK_DIV_2 0x0 55 #define AFE440X_CONTROL3_CLK_DIV_4 0x2 56 #define AFE440X_CONTROL3_CLK_DIV_6 0x3 57 #define AFE440X_CONTROL3_CLK_DIV_8 0x4 58 #define AFE440X_CONTROL3_CLK_DIV_12 0x5 59 #define AFE440X_CONTROL3_CLK_DIV_1 0x7 60 61 /* AFE4403 TIAGAIN_CAP values */ 62 #define AFE4403_TIAGAIN_CAP_5_P 0x0 63 #define AFE4403_TIAGAIN_CAP_10_P 0x1 64 #define AFE4403_TIAGAIN_CAP_20_P 0x2 65 #define AFE4403_TIAGAIN_CAP_30_P 0x3 66 #define AFE4403_TIAGAIN_CAP_55_P 0x8 67 #define AFE4403_TIAGAIN_CAP_155_P 0x10 68 69 /* AFE4403 TIAGAIN_RES values */ 70 #define AFE4403_TIAGAIN_RES_500_K 0x0 71 #define AFE4403_TIAGAIN_RES_250_K 0x1 72 #define AFE4403_TIAGAIN_RES_100_K 0x2 73 #define AFE4403_TIAGAIN_RES_50_K 0x3 74 #define AFE4403_TIAGAIN_RES_25_K 0x4 75 #define AFE4403_TIAGAIN_RES_10_K 0x5 76 #define AFE4403_TIAGAIN_RES_1_M 0x6 77 #define AFE4403_TIAGAIN_RES_NONE 0x7 78 79 enum afe4403_fields { 80 /* Gains */ 81 F_RF_LED1, F_CF_LED1, 82 F_RF_LED, F_CF_LED, 83 84 /* LED Current */ 85 F_ILED1, F_ILED2, 86 87 /* sentinel */ 88 F_MAX_FIELDS 89 }; 90 91 static const struct reg_field afe4403_reg_fields[] = { 92 /* Gains */ 93 [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2), 94 [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7), 95 [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2), 96 [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7), 97 /* LED Current */ 98 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7), 99 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15), 100 }; 101 102 /** 103 * struct afe4403_data - AFE4403 device instance data 104 * @dev: Device structure 105 * @spi: SPI device handle 106 * @regmap: Register map of the device 107 * @fields: Register fields of the device 108 * @regulator: Pointer to the regulator for the IC 109 * @trig: IIO trigger for this device 110 * @irq: ADC_RDY line interrupt number 111 */ 112 struct afe4403_data { 113 struct device *dev; 114 struct spi_device *spi; 115 struct regmap *regmap; 116 struct regmap_field *fields[F_MAX_FIELDS]; 117 struct regulator *regulator; 118 struct iio_trigger *trig; 119 int irq; 120 }; 121 122 enum afe4403_chan_id { 123 LED2 = 1, 124 ALED2, 125 LED1, 126 ALED1, 127 LED2_ALED2, 128 LED1_ALED1, 129 ILED1, 130 ILED2, 131 }; 132 133 static const unsigned int afe4403_channel_values[] = { 134 [LED2] = AFE440X_LED2VAL, 135 [ALED2] = AFE440X_ALED2VAL, 136 [LED1] = AFE440X_LED1VAL, 137 [ALED1] = AFE440X_ALED1VAL, 138 [LED2_ALED2] = AFE440X_LED2_ALED2VAL, 139 [LED1_ALED1] = AFE440X_LED1_ALED1VAL, 140 }; 141 142 static const unsigned int afe4403_channel_leds[] = { 143 [ILED1] = F_ILED1, 144 [ILED2] = F_ILED2, 145 }; 146 147 static const struct iio_chan_spec afe4403_channels[] = { 148 /* ADC values */ 149 AFE440X_INTENSITY_CHAN(LED2, 0), 150 AFE440X_INTENSITY_CHAN(ALED2, 0), 151 AFE440X_INTENSITY_CHAN(LED1, 0), 152 AFE440X_INTENSITY_CHAN(ALED1, 0), 153 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), 154 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), 155 /* LED current */ 156 AFE440X_CURRENT_CHAN(ILED1), 157 AFE440X_CURRENT_CHAN(ILED2), 158 }; 159 160 static const struct afe440x_val_table afe4403_res_table[] = { 161 { 500000 }, { 250000 }, { 100000 }, { 50000 }, 162 { 25000 }, { 10000 }, { 1000000 }, { 0 }, 163 }; 164 AFE440X_TABLE_ATTR(tia_resistance_available, afe4403_res_table); 165 166 static const struct afe440x_val_table afe4403_cap_table[] = { 167 { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 }, 168 { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 }, 169 { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 }, 170 { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 }, 171 { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 }, 172 { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 }, 173 { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 }, 174 { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 }, 175 }; 176 AFE440X_TABLE_ATTR(tia_capacitance_available, afe4403_cap_table); 177 178 static ssize_t afe440x_show_register(struct device *dev, 179 struct device_attribute *attr, 180 char *buf) 181 { 182 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 183 struct afe4403_data *afe = iio_priv(indio_dev); 184 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 185 unsigned int reg_val; 186 int vals[2]; 187 int ret; 188 189 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); 190 if (ret) 191 return ret; 192 193 if (reg_val >= afe440x_attr->table_size) 194 return -EINVAL; 195 196 vals[0] = afe440x_attr->val_table[reg_val].integer; 197 vals[1] = afe440x_attr->val_table[reg_val].fract; 198 199 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); 200 } 201 202 static ssize_t afe440x_store_register(struct device *dev, 203 struct device_attribute *attr, 204 const char *buf, size_t count) 205 { 206 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 207 struct afe4403_data *afe = iio_priv(indio_dev); 208 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 209 int val, integer, fract, ret; 210 211 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); 212 if (ret) 213 return ret; 214 215 for (val = 0; val < afe440x_attr->table_size; val++) 216 if (afe440x_attr->val_table[val].integer == integer && 217 afe440x_attr->val_table[val].fract == fract) 218 break; 219 if (val == afe440x_attr->table_size) 220 return -EINVAL; 221 222 ret = regmap_field_write(afe->fields[afe440x_attr->field], val); 223 if (ret) 224 return ret; 225 226 return count; 227 } 228 229 static AFE440X_ATTR(tia_resistance1, F_RF_LED1, afe4403_res_table); 230 static AFE440X_ATTR(tia_capacitance1, F_CF_LED1, afe4403_cap_table); 231 232 static AFE440X_ATTR(tia_resistance2, F_RF_LED, afe4403_res_table); 233 static AFE440X_ATTR(tia_capacitance2, F_CF_LED, afe4403_cap_table); 234 235 static struct attribute *afe440x_attributes[] = { 236 &afe440x_attr_tia_resistance1.dev_attr.attr, 237 &afe440x_attr_tia_capacitance1.dev_attr.attr, 238 &afe440x_attr_tia_resistance2.dev_attr.attr, 239 &afe440x_attr_tia_capacitance2.dev_attr.attr, 240 &dev_attr_tia_resistance_available.attr, 241 &dev_attr_tia_capacitance_available.attr, 242 NULL 243 }; 244 245 static const struct attribute_group afe440x_attribute_group = { 246 .attrs = afe440x_attributes 247 }; 248 249 static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val) 250 { 251 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 252 u8 rx[3]; 253 int ret; 254 255 /* Enable reading from the device */ 256 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 257 if (ret) 258 return ret; 259 260 ret = spi_write_then_read(afe->spi, ®, 1, rx, 3); 261 if (ret) 262 return ret; 263 264 *val = (rx[0] << 16) | 265 (rx[1] << 8) | 266 (rx[2]); 267 268 /* Disable reading from the device */ 269 tx[3] = AFE440X_CONTROL0_WRITE; 270 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 271 if (ret) 272 return ret; 273 274 return 0; 275 } 276 277 static int afe4403_read_raw(struct iio_dev *indio_dev, 278 struct iio_chan_spec const *chan, 279 int *val, int *val2, long mask) 280 { 281 struct afe4403_data *afe = iio_priv(indio_dev); 282 unsigned int reg = afe4403_channel_values[chan->address]; 283 unsigned int field = afe4403_channel_leds[chan->address]; 284 int ret; 285 286 switch (chan->type) { 287 case IIO_INTENSITY: 288 switch (mask) { 289 case IIO_CHAN_INFO_RAW: 290 ret = afe4403_read(afe, reg, val); 291 if (ret) 292 return ret; 293 return IIO_VAL_INT; 294 } 295 break; 296 case IIO_CURRENT: 297 switch (mask) { 298 case IIO_CHAN_INFO_RAW: 299 ret = regmap_field_read(afe->fields[field], val); 300 if (ret) 301 return ret; 302 return IIO_VAL_INT; 303 case IIO_CHAN_INFO_SCALE: 304 *val = 0; 305 *val2 = 800000; 306 return IIO_VAL_INT_PLUS_MICRO; 307 } 308 break; 309 default: 310 break; 311 } 312 313 return -EINVAL; 314 } 315 316 static int afe4403_write_raw(struct iio_dev *indio_dev, 317 struct iio_chan_spec const *chan, 318 int val, int val2, long mask) 319 { 320 struct afe4403_data *afe = iio_priv(indio_dev); 321 unsigned int field = afe4403_channel_leds[chan->address]; 322 323 switch (chan->type) { 324 case IIO_CURRENT: 325 switch (mask) { 326 case IIO_CHAN_INFO_RAW: 327 return regmap_field_write(afe->fields[field], val); 328 } 329 break; 330 default: 331 break; 332 } 333 334 return -EINVAL; 335 } 336 337 static const struct iio_info afe4403_iio_info = { 338 .attrs = &afe440x_attribute_group, 339 .read_raw = afe4403_read_raw, 340 .write_raw = afe4403_write_raw, 341 .driver_module = THIS_MODULE, 342 }; 343 344 static irqreturn_t afe4403_trigger_handler(int irq, void *private) 345 { 346 struct iio_poll_func *pf = private; 347 struct iio_dev *indio_dev = pf->indio_dev; 348 struct afe4403_data *afe = iio_priv(indio_dev); 349 int ret, bit, i = 0; 350 s32 buffer[8]; 351 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 352 u8 rx[3]; 353 354 /* Enable reading from the device */ 355 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 356 if (ret) 357 goto err; 358 359 for_each_set_bit(bit, indio_dev->active_scan_mask, 360 indio_dev->masklength) { 361 ret = spi_write_then_read(afe->spi, 362 &afe4403_channel_values[bit], 1, 363 rx, 3); 364 if (ret) 365 goto err; 366 367 buffer[i++] = (rx[0] << 16) | 368 (rx[1] << 8) | 369 (rx[2]); 370 } 371 372 /* Disable reading from the device */ 373 tx[3] = AFE440X_CONTROL0_WRITE; 374 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 375 if (ret) 376 goto err; 377 378 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); 379 err: 380 iio_trigger_notify_done(indio_dev->trig); 381 382 return IRQ_HANDLED; 383 } 384 385 static const struct iio_trigger_ops afe4403_trigger_ops = { 386 .owner = THIS_MODULE, 387 }; 388 389 #define AFE4403_TIMING_PAIRS \ 390 { AFE440X_LED2STC, 0x000050 }, \ 391 { AFE440X_LED2ENDC, 0x0003e7 }, \ 392 { AFE440X_LED1LEDSTC, 0x0007d0 }, \ 393 { AFE440X_LED1LEDENDC, 0x000bb7 }, \ 394 { AFE440X_ALED2STC, 0x000438 }, \ 395 { AFE440X_ALED2ENDC, 0x0007cf }, \ 396 { AFE440X_LED1STC, 0x000820 }, \ 397 { AFE440X_LED1ENDC, 0x000bb7 }, \ 398 { AFE440X_LED2LEDSTC, 0x000000 }, \ 399 { AFE440X_LED2LEDENDC, 0x0003e7 }, \ 400 { AFE440X_ALED1STC, 0x000c08 }, \ 401 { AFE440X_ALED1ENDC, 0x000f9f }, \ 402 { AFE440X_LED2CONVST, 0x0003ef }, \ 403 { AFE440X_LED2CONVEND, 0x0007cf }, \ 404 { AFE440X_ALED2CONVST, 0x0007d7 }, \ 405 { AFE440X_ALED2CONVEND, 0x000bb7 }, \ 406 { AFE440X_LED1CONVST, 0x000bbf }, \ 407 { AFE440X_LED1CONVEND, 0x009c3f }, \ 408 { AFE440X_ALED1CONVST, 0x000fa7 }, \ 409 { AFE440X_ALED1CONVEND, 0x001387 }, \ 410 { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \ 411 { AFE440X_ADCRSTENDCT0, 0x0003eb }, \ 412 { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \ 413 { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \ 414 { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \ 415 { AFE440X_ADCRSTENDCT2, 0x000bbb }, \ 416 { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \ 417 { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \ 418 { AFE440X_PRPCOUNT, 0x009c3f }, \ 419 { AFE440X_PDNCYCLESTC, 0x001518 }, \ 420 { AFE440X_PDNCYCLEENDC, 0x00991f } 421 422 static const struct reg_sequence afe4403_reg_sequences[] = { 423 AFE4403_TIMING_PAIRS, 424 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, 425 { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN }, 426 }; 427 428 static const struct regmap_range afe4403_yes_ranges[] = { 429 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), 430 }; 431 432 static const struct regmap_access_table afe4403_volatile_table = { 433 .yes_ranges = afe4403_yes_ranges, 434 .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges), 435 }; 436 437 static const struct regmap_config afe4403_regmap_config = { 438 .reg_bits = 8, 439 .val_bits = 24, 440 441 .max_register = AFE440X_PDNCYCLEENDC, 442 .cache_type = REGCACHE_RBTREE, 443 .volatile_table = &afe4403_volatile_table, 444 }; 445 446 static const struct of_device_id afe4403_of_match[] = { 447 { .compatible = "ti,afe4403", }, 448 { /* sentinel */ } 449 }; 450 MODULE_DEVICE_TABLE(of, afe4403_of_match); 451 452 static int __maybe_unused afe4403_suspend(struct device *dev) 453 { 454 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 455 struct afe4403_data *afe = iio_priv(indio_dev); 456 int ret; 457 458 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 459 AFE440X_CONTROL2_PDN_AFE, 460 AFE440X_CONTROL2_PDN_AFE); 461 if (ret) 462 return ret; 463 464 ret = regulator_disable(afe->regulator); 465 if (ret) { 466 dev_err(dev, "Unable to disable regulator\n"); 467 return ret; 468 } 469 470 return 0; 471 } 472 473 static int __maybe_unused afe4403_resume(struct device *dev) 474 { 475 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 476 struct afe4403_data *afe = iio_priv(indio_dev); 477 int ret; 478 479 ret = regulator_enable(afe->regulator); 480 if (ret) { 481 dev_err(dev, "Unable to enable regulator\n"); 482 return ret; 483 } 484 485 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 486 AFE440X_CONTROL2_PDN_AFE, 0); 487 if (ret) 488 return ret; 489 490 return 0; 491 } 492 493 static SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend, afe4403_resume); 494 495 static int afe4403_probe(struct spi_device *spi) 496 { 497 struct iio_dev *indio_dev; 498 struct afe4403_data *afe; 499 int i, ret; 500 501 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe)); 502 if (!indio_dev) 503 return -ENOMEM; 504 505 afe = iio_priv(indio_dev); 506 spi_set_drvdata(spi, indio_dev); 507 508 afe->dev = &spi->dev; 509 afe->spi = spi; 510 afe->irq = spi->irq; 511 512 afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config); 513 if (IS_ERR(afe->regmap)) { 514 dev_err(afe->dev, "Unable to allocate register map\n"); 515 return PTR_ERR(afe->regmap); 516 } 517 518 for (i = 0; i < F_MAX_FIELDS; i++) { 519 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, 520 afe4403_reg_fields[i]); 521 if (IS_ERR(afe->fields[i])) { 522 dev_err(afe->dev, "Unable to allocate regmap fields\n"); 523 return PTR_ERR(afe->fields[i]); 524 } 525 } 526 527 afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); 528 if (IS_ERR(afe->regulator)) { 529 dev_err(afe->dev, "Unable to get regulator\n"); 530 return PTR_ERR(afe->regulator); 531 } 532 ret = regulator_enable(afe->regulator); 533 if (ret) { 534 dev_err(afe->dev, "Unable to enable regulator\n"); 535 return ret; 536 } 537 538 ret = regmap_write(afe->regmap, AFE440X_CONTROL0, 539 AFE440X_CONTROL0_SW_RESET); 540 if (ret) { 541 dev_err(afe->dev, "Unable to reset device\n"); 542 goto err_disable_reg; 543 } 544 545 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences, 546 ARRAY_SIZE(afe4403_reg_sequences)); 547 if (ret) { 548 dev_err(afe->dev, "Unable to set register defaults\n"); 549 goto err_disable_reg; 550 } 551 552 indio_dev->modes = INDIO_DIRECT_MODE; 553 indio_dev->dev.parent = afe->dev; 554 indio_dev->channels = afe4403_channels; 555 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels); 556 indio_dev->name = AFE4403_DRIVER_NAME; 557 indio_dev->info = &afe4403_iio_info; 558 559 if (afe->irq > 0) { 560 afe->trig = devm_iio_trigger_alloc(afe->dev, 561 "%s-dev%d", 562 indio_dev->name, 563 indio_dev->id); 564 if (!afe->trig) { 565 dev_err(afe->dev, "Unable to allocate IIO trigger\n"); 566 ret = -ENOMEM; 567 goto err_disable_reg; 568 } 569 570 iio_trigger_set_drvdata(afe->trig, indio_dev); 571 572 afe->trig->ops = &afe4403_trigger_ops; 573 afe->trig->dev.parent = afe->dev; 574 575 ret = iio_trigger_register(afe->trig); 576 if (ret) { 577 dev_err(afe->dev, "Unable to register IIO trigger\n"); 578 goto err_disable_reg; 579 } 580 581 ret = devm_request_threaded_irq(afe->dev, afe->irq, 582 iio_trigger_generic_data_rdy_poll, 583 NULL, IRQF_ONESHOT, 584 AFE4403_DRIVER_NAME, 585 afe->trig); 586 if (ret) { 587 dev_err(afe->dev, "Unable to request IRQ\n"); 588 goto err_trig; 589 } 590 } 591 592 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 593 afe4403_trigger_handler, NULL); 594 if (ret) { 595 dev_err(afe->dev, "Unable to setup buffer\n"); 596 goto err_trig; 597 } 598 599 ret = iio_device_register(indio_dev); 600 if (ret) { 601 dev_err(afe->dev, "Unable to register IIO device\n"); 602 goto err_buff; 603 } 604 605 return 0; 606 607 err_buff: 608 iio_triggered_buffer_cleanup(indio_dev); 609 err_trig: 610 if (afe->irq > 0) 611 iio_trigger_unregister(afe->trig); 612 err_disable_reg: 613 regulator_disable(afe->regulator); 614 615 return ret; 616 } 617 618 static int afe4403_remove(struct spi_device *spi) 619 { 620 struct iio_dev *indio_dev = spi_get_drvdata(spi); 621 struct afe4403_data *afe = iio_priv(indio_dev); 622 int ret; 623 624 iio_device_unregister(indio_dev); 625 626 iio_triggered_buffer_cleanup(indio_dev); 627 628 if (afe->irq > 0) 629 iio_trigger_unregister(afe->trig); 630 631 ret = regulator_disable(afe->regulator); 632 if (ret) { 633 dev_err(afe->dev, "Unable to disable regulator\n"); 634 return ret; 635 } 636 637 return 0; 638 } 639 640 static const struct spi_device_id afe4403_ids[] = { 641 { "afe4403", 0 }, 642 { /* sentinel */ } 643 }; 644 MODULE_DEVICE_TABLE(spi, afe4403_ids); 645 646 static struct spi_driver afe4403_spi_driver = { 647 .driver = { 648 .name = AFE4403_DRIVER_NAME, 649 .of_match_table = afe4403_of_match, 650 .pm = &afe4403_pm_ops, 651 }, 652 .probe = afe4403_probe, 653 .remove = afe4403_remove, 654 .id_table = afe4403_ids, 655 }; 656 module_spi_driver(afe4403_spi_driver); 657 658 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 659 MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE"); 660 MODULE_LICENSE("GPL v2"); 661