1 /* 2 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters 3 * 4 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 5 * Andrew F. Davis <afd@ti.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 */ 16 17 #include <linux/device.h> 18 #include <linux/err.h> 19 #include <linux/interrupt.h> 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/regmap.h> 23 #include <linux/spi/spi.h> 24 #include <linux/sysfs.h> 25 #include <linux/regulator/consumer.h> 26 27 #include <linux/iio/iio.h> 28 #include <linux/iio/sysfs.h> 29 #include <linux/iio/buffer.h> 30 #include <linux/iio/trigger.h> 31 #include <linux/iio/triggered_buffer.h> 32 #include <linux/iio/trigger_consumer.h> 33 34 #include "afe440x.h" 35 36 #define AFE4403_DRIVER_NAME "afe4403" 37 38 /* AFE4403 Registers */ 39 #define AFE4403_TIAGAIN 0x20 40 #define AFE4403_TIA_AMB_GAIN 0x21 41 42 /* AFE4403 LEDCNTRL values */ 43 #define AFE440X_LEDCNTRL_RANGE_TX_HALF 0x1 44 #define AFE440X_LEDCNTRL_RANGE_TX_FULL 0x2 45 #define AFE440X_LEDCNTRL_RANGE_TX_OFF 0x3 46 47 /* AFE4403 CONTROL2 values */ 48 #define AFE440X_CONTROL2_TX_REF_025 0x0 49 #define AFE440X_CONTROL2_TX_REF_050 0x1 50 #define AFE440X_CONTROL2_TX_REF_100 0x2 51 #define AFE440X_CONTROL2_TX_REF_075 0x3 52 53 /* AFE4403 CONTROL3 values */ 54 #define AFE440X_CONTROL3_CLK_DIV_2 0x0 55 #define AFE440X_CONTROL3_CLK_DIV_4 0x2 56 #define AFE440X_CONTROL3_CLK_DIV_6 0x3 57 #define AFE440X_CONTROL3_CLK_DIV_8 0x4 58 #define AFE440X_CONTROL3_CLK_DIV_12 0x5 59 #define AFE440X_CONTROL3_CLK_DIV_1 0x7 60 61 /* AFE4403 TIAGAIN_CAP values */ 62 #define AFE4403_TIAGAIN_CAP_5_P 0x0 63 #define AFE4403_TIAGAIN_CAP_10_P 0x1 64 #define AFE4403_TIAGAIN_CAP_20_P 0x2 65 #define AFE4403_TIAGAIN_CAP_30_P 0x3 66 #define AFE4403_TIAGAIN_CAP_55_P 0x8 67 #define AFE4403_TIAGAIN_CAP_155_P 0x10 68 69 /* AFE4403 TIAGAIN_RES values */ 70 #define AFE4403_TIAGAIN_RES_500_K 0x0 71 #define AFE4403_TIAGAIN_RES_250_K 0x1 72 #define AFE4403_TIAGAIN_RES_100_K 0x2 73 #define AFE4403_TIAGAIN_RES_50_K 0x3 74 #define AFE4403_TIAGAIN_RES_25_K 0x4 75 #define AFE4403_TIAGAIN_RES_10_K 0x5 76 #define AFE4403_TIAGAIN_RES_1_M 0x6 77 #define AFE4403_TIAGAIN_RES_NONE 0x7 78 79 enum afe4403_fields { 80 /* Gains */ 81 F_RF_LED1, F_CF_LED1, 82 F_RF_LED, F_CF_LED, 83 84 /* LED Current */ 85 F_ILED1, F_ILED2, 86 87 /* sentinel */ 88 F_MAX_FIELDS 89 }; 90 91 static const struct reg_field afe4403_reg_fields[] = { 92 /* Gains */ 93 [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2), 94 [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7), 95 [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2), 96 [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7), 97 /* LED Current */ 98 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7), 99 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15), 100 }; 101 102 /** 103 * struct afe4403_data - AFE4403 device instance data 104 * @dev: Device structure 105 * @spi: SPI device handle 106 * @regmap: Register map of the device 107 * @fields: Register fields of the device 108 * @regulator: Pointer to the regulator for the IC 109 * @trig: IIO trigger for this device 110 * @irq: ADC_RDY line interrupt number 111 */ 112 struct afe4403_data { 113 struct device *dev; 114 struct spi_device *spi; 115 struct regmap *regmap; 116 struct regmap_field *fields[F_MAX_FIELDS]; 117 struct regulator *regulator; 118 struct iio_trigger *trig; 119 int irq; 120 }; 121 122 enum afe4403_chan_id { 123 LED2 = 1, 124 ALED2, 125 LED1, 126 ALED1, 127 LED2_ALED2, 128 LED1_ALED1, 129 }; 130 131 static const unsigned int afe4403_channel_values[] = { 132 [LED2] = AFE440X_LED2VAL, 133 [ALED2] = AFE440X_ALED2VAL, 134 [LED1] = AFE440X_LED1VAL, 135 [ALED1] = AFE440X_ALED1VAL, 136 [LED2_ALED2] = AFE440X_LED2_ALED2VAL, 137 [LED1_ALED1] = AFE440X_LED1_ALED1VAL, 138 }; 139 140 static const unsigned int afe4403_channel_leds[] = { 141 [LED2] = F_ILED2, 142 [LED1] = F_ILED1, 143 }; 144 145 static const struct iio_chan_spec afe4403_channels[] = { 146 /* ADC values */ 147 AFE440X_INTENSITY_CHAN(LED2, 0), 148 AFE440X_INTENSITY_CHAN(ALED2, 0), 149 AFE440X_INTENSITY_CHAN(LED1, 0), 150 AFE440X_INTENSITY_CHAN(ALED1, 0), 151 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), 152 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), 153 /* LED current */ 154 AFE440X_CURRENT_CHAN(LED2), 155 AFE440X_CURRENT_CHAN(LED1), 156 }; 157 158 static const struct afe440x_val_table afe4403_res_table[] = { 159 { 500000 }, { 250000 }, { 100000 }, { 50000 }, 160 { 25000 }, { 10000 }, { 1000000 }, { 0 }, 161 }; 162 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table); 163 164 static const struct afe440x_val_table afe4403_cap_table[] = { 165 { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 }, 166 { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 }, 167 { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 }, 168 { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 }, 169 { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 }, 170 { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 }, 171 { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 }, 172 { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 }, 173 }; 174 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table); 175 176 static ssize_t afe440x_show_register(struct device *dev, 177 struct device_attribute *attr, 178 char *buf) 179 { 180 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 181 struct afe4403_data *afe = iio_priv(indio_dev); 182 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 183 unsigned int reg_val; 184 int vals[2]; 185 int ret; 186 187 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); 188 if (ret) 189 return ret; 190 191 if (reg_val >= afe440x_attr->table_size) 192 return -EINVAL; 193 194 vals[0] = afe440x_attr->val_table[reg_val].integer; 195 vals[1] = afe440x_attr->val_table[reg_val].fract; 196 197 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); 198 } 199 200 static ssize_t afe440x_store_register(struct device *dev, 201 struct device_attribute *attr, 202 const char *buf, size_t count) 203 { 204 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 205 struct afe4403_data *afe = iio_priv(indio_dev); 206 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 207 int val, integer, fract, ret; 208 209 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); 210 if (ret) 211 return ret; 212 213 for (val = 0; val < afe440x_attr->table_size; val++) 214 if (afe440x_attr->val_table[val].integer == integer && 215 afe440x_attr->val_table[val].fract == fract) 216 break; 217 if (val == afe440x_attr->table_size) 218 return -EINVAL; 219 220 ret = regmap_field_write(afe->fields[afe440x_attr->field], val); 221 if (ret) 222 return ret; 223 224 return count; 225 } 226 227 static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table); 228 static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table); 229 230 static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table); 231 static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table); 232 233 static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table); 234 static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table); 235 236 static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table); 237 static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table); 238 239 static struct attribute *afe440x_attributes[] = { 240 &dev_attr_in_intensity_resistance_available.attr, 241 &dev_attr_in_intensity_capacitance_available.attr, 242 &afe440x_attr_in_intensity1_resistance.dev_attr.attr, 243 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, 244 &afe440x_attr_in_intensity2_resistance.dev_attr.attr, 245 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, 246 &afe440x_attr_in_intensity3_resistance.dev_attr.attr, 247 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, 248 &afe440x_attr_in_intensity4_resistance.dev_attr.attr, 249 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, 250 NULL 251 }; 252 253 static const struct attribute_group afe440x_attribute_group = { 254 .attrs = afe440x_attributes 255 }; 256 257 static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val) 258 { 259 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 260 u8 rx[3]; 261 int ret; 262 263 /* Enable reading from the device */ 264 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 265 if (ret) 266 return ret; 267 268 ret = spi_write_then_read(afe->spi, ®, 1, rx, 3); 269 if (ret) 270 return ret; 271 272 *val = (rx[0] << 16) | 273 (rx[1] << 8) | 274 (rx[2]); 275 276 /* Disable reading from the device */ 277 tx[3] = AFE440X_CONTROL0_WRITE; 278 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 279 if (ret) 280 return ret; 281 282 return 0; 283 } 284 285 static int afe4403_read_raw(struct iio_dev *indio_dev, 286 struct iio_chan_spec const *chan, 287 int *val, int *val2, long mask) 288 { 289 struct afe4403_data *afe = iio_priv(indio_dev); 290 unsigned int reg = afe4403_channel_values[chan->address]; 291 unsigned int field = afe4403_channel_leds[chan->address]; 292 int ret; 293 294 switch (chan->type) { 295 case IIO_INTENSITY: 296 switch (mask) { 297 case IIO_CHAN_INFO_RAW: 298 ret = afe4403_read(afe, reg, val); 299 if (ret) 300 return ret; 301 return IIO_VAL_INT; 302 } 303 break; 304 case IIO_CURRENT: 305 switch (mask) { 306 case IIO_CHAN_INFO_RAW: 307 ret = regmap_field_read(afe->fields[field], val); 308 if (ret) 309 return ret; 310 return IIO_VAL_INT; 311 case IIO_CHAN_INFO_SCALE: 312 *val = 0; 313 *val2 = 800000; 314 return IIO_VAL_INT_PLUS_MICRO; 315 } 316 break; 317 default: 318 break; 319 } 320 321 return -EINVAL; 322 } 323 324 static int afe4403_write_raw(struct iio_dev *indio_dev, 325 struct iio_chan_spec const *chan, 326 int val, int val2, long mask) 327 { 328 struct afe4403_data *afe = iio_priv(indio_dev); 329 unsigned int field = afe4403_channel_leds[chan->address]; 330 331 switch (chan->type) { 332 case IIO_CURRENT: 333 switch (mask) { 334 case IIO_CHAN_INFO_RAW: 335 return regmap_field_write(afe->fields[field], val); 336 } 337 break; 338 default: 339 break; 340 } 341 342 return -EINVAL; 343 } 344 345 static const struct iio_info afe4403_iio_info = { 346 .attrs = &afe440x_attribute_group, 347 .read_raw = afe4403_read_raw, 348 .write_raw = afe4403_write_raw, 349 .driver_module = THIS_MODULE, 350 }; 351 352 static irqreturn_t afe4403_trigger_handler(int irq, void *private) 353 { 354 struct iio_poll_func *pf = private; 355 struct iio_dev *indio_dev = pf->indio_dev; 356 struct afe4403_data *afe = iio_priv(indio_dev); 357 int ret, bit, i = 0; 358 s32 buffer[8]; 359 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 360 u8 rx[3]; 361 362 /* Enable reading from the device */ 363 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 364 if (ret) 365 goto err; 366 367 for_each_set_bit(bit, indio_dev->active_scan_mask, 368 indio_dev->masklength) { 369 ret = spi_write_then_read(afe->spi, 370 &afe4403_channel_values[bit], 1, 371 rx, 3); 372 if (ret) 373 goto err; 374 375 buffer[i++] = (rx[0] << 16) | 376 (rx[1] << 8) | 377 (rx[2]); 378 } 379 380 /* Disable reading from the device */ 381 tx[3] = AFE440X_CONTROL0_WRITE; 382 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 383 if (ret) 384 goto err; 385 386 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); 387 err: 388 iio_trigger_notify_done(indio_dev->trig); 389 390 return IRQ_HANDLED; 391 } 392 393 static const struct iio_trigger_ops afe4403_trigger_ops = { 394 .owner = THIS_MODULE, 395 }; 396 397 #define AFE4403_TIMING_PAIRS \ 398 { AFE440X_LED2STC, 0x000050 }, \ 399 { AFE440X_LED2ENDC, 0x0003e7 }, \ 400 { AFE440X_LED1LEDSTC, 0x0007d0 }, \ 401 { AFE440X_LED1LEDENDC, 0x000bb7 }, \ 402 { AFE440X_ALED2STC, 0x000438 }, \ 403 { AFE440X_ALED2ENDC, 0x0007cf }, \ 404 { AFE440X_LED1STC, 0x000820 }, \ 405 { AFE440X_LED1ENDC, 0x000bb7 }, \ 406 { AFE440X_LED2LEDSTC, 0x000000 }, \ 407 { AFE440X_LED2LEDENDC, 0x0003e7 }, \ 408 { AFE440X_ALED1STC, 0x000c08 }, \ 409 { AFE440X_ALED1ENDC, 0x000f9f }, \ 410 { AFE440X_LED2CONVST, 0x0003ef }, \ 411 { AFE440X_LED2CONVEND, 0x0007cf }, \ 412 { AFE440X_ALED2CONVST, 0x0007d7 }, \ 413 { AFE440X_ALED2CONVEND, 0x000bb7 }, \ 414 { AFE440X_LED1CONVST, 0x000bbf }, \ 415 { AFE440X_LED1CONVEND, 0x009c3f }, \ 416 { AFE440X_ALED1CONVST, 0x000fa7 }, \ 417 { AFE440X_ALED1CONVEND, 0x001387 }, \ 418 { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \ 419 { AFE440X_ADCRSTENDCT0, 0x0003eb }, \ 420 { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \ 421 { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \ 422 { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \ 423 { AFE440X_ADCRSTENDCT2, 0x000bbb }, \ 424 { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \ 425 { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \ 426 { AFE440X_PRPCOUNT, 0x009c3f }, \ 427 { AFE440X_PDNCYCLESTC, 0x001518 }, \ 428 { AFE440X_PDNCYCLEENDC, 0x00991f } 429 430 static const struct reg_sequence afe4403_reg_sequences[] = { 431 AFE4403_TIMING_PAIRS, 432 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, 433 { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN }, 434 }; 435 436 static const struct regmap_range afe4403_yes_ranges[] = { 437 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), 438 }; 439 440 static const struct regmap_access_table afe4403_volatile_table = { 441 .yes_ranges = afe4403_yes_ranges, 442 .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges), 443 }; 444 445 static const struct regmap_config afe4403_regmap_config = { 446 .reg_bits = 8, 447 .val_bits = 24, 448 449 .max_register = AFE440X_PDNCYCLEENDC, 450 .cache_type = REGCACHE_RBTREE, 451 .volatile_table = &afe4403_volatile_table, 452 }; 453 454 static const struct of_device_id afe4403_of_match[] = { 455 { .compatible = "ti,afe4403", }, 456 { /* sentinel */ } 457 }; 458 MODULE_DEVICE_TABLE(of, afe4403_of_match); 459 460 static int __maybe_unused afe4403_suspend(struct device *dev) 461 { 462 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 463 struct afe4403_data *afe = iio_priv(indio_dev); 464 int ret; 465 466 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 467 AFE440X_CONTROL2_PDN_AFE, 468 AFE440X_CONTROL2_PDN_AFE); 469 if (ret) 470 return ret; 471 472 ret = regulator_disable(afe->regulator); 473 if (ret) { 474 dev_err(dev, "Unable to disable regulator\n"); 475 return ret; 476 } 477 478 return 0; 479 } 480 481 static int __maybe_unused afe4403_resume(struct device *dev) 482 { 483 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 484 struct afe4403_data *afe = iio_priv(indio_dev); 485 int ret; 486 487 ret = regulator_enable(afe->regulator); 488 if (ret) { 489 dev_err(dev, "Unable to enable regulator\n"); 490 return ret; 491 } 492 493 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 494 AFE440X_CONTROL2_PDN_AFE, 0); 495 if (ret) 496 return ret; 497 498 return 0; 499 } 500 501 static SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend, afe4403_resume); 502 503 static int afe4403_probe(struct spi_device *spi) 504 { 505 struct iio_dev *indio_dev; 506 struct afe4403_data *afe; 507 int i, ret; 508 509 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe)); 510 if (!indio_dev) 511 return -ENOMEM; 512 513 afe = iio_priv(indio_dev); 514 spi_set_drvdata(spi, indio_dev); 515 516 afe->dev = &spi->dev; 517 afe->spi = spi; 518 afe->irq = spi->irq; 519 520 afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config); 521 if (IS_ERR(afe->regmap)) { 522 dev_err(afe->dev, "Unable to allocate register map\n"); 523 return PTR_ERR(afe->regmap); 524 } 525 526 for (i = 0; i < F_MAX_FIELDS; i++) { 527 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, 528 afe4403_reg_fields[i]); 529 if (IS_ERR(afe->fields[i])) { 530 dev_err(afe->dev, "Unable to allocate regmap fields\n"); 531 return PTR_ERR(afe->fields[i]); 532 } 533 } 534 535 afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); 536 if (IS_ERR(afe->regulator)) { 537 dev_err(afe->dev, "Unable to get regulator\n"); 538 return PTR_ERR(afe->regulator); 539 } 540 ret = regulator_enable(afe->regulator); 541 if (ret) { 542 dev_err(afe->dev, "Unable to enable regulator\n"); 543 return ret; 544 } 545 546 ret = regmap_write(afe->regmap, AFE440X_CONTROL0, 547 AFE440X_CONTROL0_SW_RESET); 548 if (ret) { 549 dev_err(afe->dev, "Unable to reset device\n"); 550 goto err_disable_reg; 551 } 552 553 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences, 554 ARRAY_SIZE(afe4403_reg_sequences)); 555 if (ret) { 556 dev_err(afe->dev, "Unable to set register defaults\n"); 557 goto err_disable_reg; 558 } 559 560 indio_dev->modes = INDIO_DIRECT_MODE; 561 indio_dev->dev.parent = afe->dev; 562 indio_dev->channels = afe4403_channels; 563 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels); 564 indio_dev->name = AFE4403_DRIVER_NAME; 565 indio_dev->info = &afe4403_iio_info; 566 567 if (afe->irq > 0) { 568 afe->trig = devm_iio_trigger_alloc(afe->dev, 569 "%s-dev%d", 570 indio_dev->name, 571 indio_dev->id); 572 if (!afe->trig) { 573 dev_err(afe->dev, "Unable to allocate IIO trigger\n"); 574 ret = -ENOMEM; 575 goto err_disable_reg; 576 } 577 578 iio_trigger_set_drvdata(afe->trig, indio_dev); 579 580 afe->trig->ops = &afe4403_trigger_ops; 581 afe->trig->dev.parent = afe->dev; 582 583 ret = iio_trigger_register(afe->trig); 584 if (ret) { 585 dev_err(afe->dev, "Unable to register IIO trigger\n"); 586 goto err_disable_reg; 587 } 588 589 ret = devm_request_threaded_irq(afe->dev, afe->irq, 590 iio_trigger_generic_data_rdy_poll, 591 NULL, IRQF_ONESHOT, 592 AFE4403_DRIVER_NAME, 593 afe->trig); 594 if (ret) { 595 dev_err(afe->dev, "Unable to request IRQ\n"); 596 goto err_trig; 597 } 598 } 599 600 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 601 afe4403_trigger_handler, NULL); 602 if (ret) { 603 dev_err(afe->dev, "Unable to setup buffer\n"); 604 goto err_trig; 605 } 606 607 ret = iio_device_register(indio_dev); 608 if (ret) { 609 dev_err(afe->dev, "Unable to register IIO device\n"); 610 goto err_buff; 611 } 612 613 return 0; 614 615 err_buff: 616 iio_triggered_buffer_cleanup(indio_dev); 617 err_trig: 618 if (afe->irq > 0) 619 iio_trigger_unregister(afe->trig); 620 err_disable_reg: 621 regulator_disable(afe->regulator); 622 623 return ret; 624 } 625 626 static int afe4403_remove(struct spi_device *spi) 627 { 628 struct iio_dev *indio_dev = spi_get_drvdata(spi); 629 struct afe4403_data *afe = iio_priv(indio_dev); 630 int ret; 631 632 iio_device_unregister(indio_dev); 633 634 iio_triggered_buffer_cleanup(indio_dev); 635 636 if (afe->irq > 0) 637 iio_trigger_unregister(afe->trig); 638 639 ret = regulator_disable(afe->regulator); 640 if (ret) { 641 dev_err(afe->dev, "Unable to disable regulator\n"); 642 return ret; 643 } 644 645 return 0; 646 } 647 648 static const struct spi_device_id afe4403_ids[] = { 649 { "afe4403", 0 }, 650 { /* sentinel */ } 651 }; 652 MODULE_DEVICE_TABLE(spi, afe4403_ids); 653 654 static struct spi_driver afe4403_spi_driver = { 655 .driver = { 656 .name = AFE4403_DRIVER_NAME, 657 .of_match_table = afe4403_of_match, 658 .pm = &afe4403_pm_ops, 659 }, 660 .probe = afe4403_probe, 661 .remove = afe4403_remove, 662 .id_table = afe4403_ids, 663 }; 664 module_spi_driver(afe4403_spi_driver); 665 666 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 667 MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE"); 668 MODULE_LICENSE("GPL v2"); 669