1*a0701b62SRui Miguel Silva /* SPDX-License-Identifier: GPL-2.0 */ 2*a0701b62SRui Miguel Silva /* 3*a0701b62SRui Miguel Silva * Driver for NXP FXAS21002C Gyroscope - Header 4*a0701b62SRui Miguel Silva * 5*a0701b62SRui Miguel Silva * Copyright (C) 2019 Linaro Ltd. 6*a0701b62SRui Miguel Silva */ 7*a0701b62SRui Miguel Silva 8*a0701b62SRui Miguel Silva #ifndef FXAS21002C_H_ 9*a0701b62SRui Miguel Silva #define FXAS21002C_H_ 10*a0701b62SRui Miguel Silva 11*a0701b62SRui Miguel Silva #include <linux/regmap.h> 12*a0701b62SRui Miguel Silva 13*a0701b62SRui Miguel Silva #define FXAS21002C_REG_STATUS 0x00 14*a0701b62SRui Miguel Silva #define FXAS21002C_REG_OUT_X_MSB 0x01 15*a0701b62SRui Miguel Silva #define FXAS21002C_REG_OUT_X_LSB 0x02 16*a0701b62SRui Miguel Silva #define FXAS21002C_REG_OUT_Y_MSB 0x03 17*a0701b62SRui Miguel Silva #define FXAS21002C_REG_OUT_Y_LSB 0x04 18*a0701b62SRui Miguel Silva #define FXAS21002C_REG_OUT_Z_MSB 0x05 19*a0701b62SRui Miguel Silva #define FXAS21002C_REG_OUT_Z_LSB 0x06 20*a0701b62SRui Miguel Silva #define FXAS21002C_REG_DR_STATUS 0x07 21*a0701b62SRui Miguel Silva #define FXAS21002C_REG_F_STATUS 0x08 22*a0701b62SRui Miguel Silva #define FXAS21002C_REG_F_SETUP 0x09 23*a0701b62SRui Miguel Silva #define FXAS21002C_REG_F_EVENT 0x0A 24*a0701b62SRui Miguel Silva #define FXAS21002C_REG_INT_SRC_FLAG 0x0B 25*a0701b62SRui Miguel Silva #define FXAS21002C_REG_WHO_AM_I 0x0C 26*a0701b62SRui Miguel Silva #define FXAS21002C_REG_CTRL0 0x0D 27*a0701b62SRui Miguel Silva #define FXAS21002C_REG_RT_CFG 0x0E 28*a0701b62SRui Miguel Silva #define FXAS21002C_REG_RT_SRC 0x0F 29*a0701b62SRui Miguel Silva #define FXAS21002C_REG_RT_THS 0x10 30*a0701b62SRui Miguel Silva #define FXAS21002C_REG_RT_COUNT 0x11 31*a0701b62SRui Miguel Silva #define FXAS21002C_REG_TEMP 0x12 32*a0701b62SRui Miguel Silva #define FXAS21002C_REG_CTRL1 0x13 33*a0701b62SRui Miguel Silva #define FXAS21002C_REG_CTRL2 0x14 34*a0701b62SRui Miguel Silva #define FXAS21002C_REG_CTRL3 0x15 35*a0701b62SRui Miguel Silva 36*a0701b62SRui Miguel Silva enum fxas21002c_fields { 37*a0701b62SRui Miguel Silva F_DR_STATUS, 38*a0701b62SRui Miguel Silva F_OUT_X_MSB, 39*a0701b62SRui Miguel Silva F_OUT_X_LSB, 40*a0701b62SRui Miguel Silva F_OUT_Y_MSB, 41*a0701b62SRui Miguel Silva F_OUT_Y_LSB, 42*a0701b62SRui Miguel Silva F_OUT_Z_MSB, 43*a0701b62SRui Miguel Silva F_OUT_Z_LSB, 44*a0701b62SRui Miguel Silva /* DR_STATUS */ 45*a0701b62SRui Miguel Silva F_ZYX_OW, F_Z_OW, F_Y_OW, F_X_OW, F_ZYX_DR, F_Z_DR, F_Y_DR, F_X_DR, 46*a0701b62SRui Miguel Silva /* F_STATUS */ 47*a0701b62SRui Miguel Silva F_OVF, F_WMKF, F_CNT, 48*a0701b62SRui Miguel Silva /* F_SETUP */ 49*a0701b62SRui Miguel Silva F_MODE, F_WMRK, 50*a0701b62SRui Miguel Silva /* F_EVENT */ 51*a0701b62SRui Miguel Silva F_EVENT, FE_TIME, 52*a0701b62SRui Miguel Silva /* INT_SOURCE_FLAG */ 53*a0701b62SRui Miguel Silva F_BOOTEND, F_SRC_FIFO, F_SRC_RT, F_SRC_DRDY, 54*a0701b62SRui Miguel Silva /* WHO_AM_I */ 55*a0701b62SRui Miguel Silva F_WHO_AM_I, 56*a0701b62SRui Miguel Silva /* CTRL_REG0 */ 57*a0701b62SRui Miguel Silva F_BW, F_SPIW, F_SEL, F_HPF_EN, F_FS, 58*a0701b62SRui Miguel Silva /* RT_CFG */ 59*a0701b62SRui Miguel Silva F_ELE, F_ZTEFE, F_YTEFE, F_XTEFE, 60*a0701b62SRui Miguel Silva /* RT_SRC */ 61*a0701b62SRui Miguel Silva F_EA, F_ZRT, F_ZRT_POL, F_YRT, F_YRT_POL, F_XRT, F_XRT_POL, 62*a0701b62SRui Miguel Silva /* RT_THS */ 63*a0701b62SRui Miguel Silva F_DBCNTM, F_THS, 64*a0701b62SRui Miguel Silva /* RT_COUNT */ 65*a0701b62SRui Miguel Silva F_RT_COUNT, 66*a0701b62SRui Miguel Silva /* TEMP */ 67*a0701b62SRui Miguel Silva F_TEMP, 68*a0701b62SRui Miguel Silva /* CTRL_REG1 */ 69*a0701b62SRui Miguel Silva F_RST, F_ST, F_DR, F_ACTIVE, F_READY, 70*a0701b62SRui Miguel Silva /* CTRL_REG2 */ 71*a0701b62SRui Miguel Silva F_INT_CFG_FIFO, F_INT_EN_FIFO, F_INT_CFG_RT, F_INT_EN_RT, 72*a0701b62SRui Miguel Silva F_INT_CFG_DRDY, F_INT_EN_DRDY, F_IPOL, F_PP_OD, 73*a0701b62SRui Miguel Silva /* CTRL_REG3 */ 74*a0701b62SRui Miguel Silva F_WRAPTOONE, F_EXTCTRLEN, F_FS_DOUBLE, 75*a0701b62SRui Miguel Silva /* MAX FIELDS */ 76*a0701b62SRui Miguel Silva F_MAX_FIELDS, 77*a0701b62SRui Miguel Silva }; 78*a0701b62SRui Miguel Silva 79*a0701b62SRui Miguel Silva extern const struct dev_pm_ops fxas21002c_pm_ops; 80*a0701b62SRui Miguel Silva 81*a0701b62SRui Miguel Silva int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq, 82*a0701b62SRui Miguel Silva const char *name); 83*a0701b62SRui Miguel Silva void fxas21002c_core_remove(struct device *dev); 84*a0701b62SRui Miguel Silva #endif 85