1*fda8d26eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2dbdc025bSLars-Peter Clausen /* 3dbdc025bSLars-Peter Clausen * AD5624R SPI DAC driver 4dbdc025bSLars-Peter Clausen * 5dbdc025bSLars-Peter Clausen * Copyright 2010-2011 Analog Devices Inc. 6dbdc025bSLars-Peter Clausen */ 7dbdc025bSLars-Peter Clausen #ifndef SPI_AD5624R_H_ 8dbdc025bSLars-Peter Clausen #define SPI_AD5624R_H_ 9dbdc025bSLars-Peter Clausen 10dbdc025bSLars-Peter Clausen #define AD5624R_DAC_CHANNELS 4 11dbdc025bSLars-Peter Clausen 12dbdc025bSLars-Peter Clausen #define AD5624R_ADDR_DAC0 0x0 13dbdc025bSLars-Peter Clausen #define AD5624R_ADDR_DAC1 0x1 14dbdc025bSLars-Peter Clausen #define AD5624R_ADDR_DAC2 0x2 15dbdc025bSLars-Peter Clausen #define AD5624R_ADDR_DAC3 0x3 16dbdc025bSLars-Peter Clausen #define AD5624R_ADDR_ALL_DAC 0x7 17dbdc025bSLars-Peter Clausen 18dbdc025bSLars-Peter Clausen #define AD5624R_CMD_WRITE_INPUT_N 0x0 19dbdc025bSLars-Peter Clausen #define AD5624R_CMD_UPDATE_DAC_N 0x1 20dbdc025bSLars-Peter Clausen #define AD5624R_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2 21dbdc025bSLars-Peter Clausen #define AD5624R_CMD_WRITE_INPUT_N_UPDATE_N 0x3 22dbdc025bSLars-Peter Clausen #define AD5624R_CMD_POWERDOWN_DAC 0x4 23dbdc025bSLars-Peter Clausen #define AD5624R_CMD_RESET 0x5 24dbdc025bSLars-Peter Clausen #define AD5624R_CMD_LDAC_SETUP 0x6 25dbdc025bSLars-Peter Clausen #define AD5624R_CMD_INTERNAL_REFER_SETUP 0x7 26dbdc025bSLars-Peter Clausen 27dbdc025bSLars-Peter Clausen #define AD5624R_LDAC_PWRDN_NONE 0x0 28dbdc025bSLars-Peter Clausen #define AD5624R_LDAC_PWRDN_1K 0x1 29dbdc025bSLars-Peter Clausen #define AD5624R_LDAC_PWRDN_100K 0x2 30dbdc025bSLars-Peter Clausen #define AD5624R_LDAC_PWRDN_3STATE 0x3 31dbdc025bSLars-Peter Clausen 32dbdc025bSLars-Peter Clausen /** 33dbdc025bSLars-Peter Clausen * struct ad5624r_chip_info - chip specific information 34dbdc025bSLars-Peter Clausen * @channels: channel spec for the DAC 35dbdc025bSLars-Peter Clausen * @int_vref_mv: AD5620/40/60: the internal reference voltage 36dbdc025bSLars-Peter Clausen */ 37dbdc025bSLars-Peter Clausen 38dbdc025bSLars-Peter Clausen struct ad5624r_chip_info { 39dbdc025bSLars-Peter Clausen const struct iio_chan_spec *channels; 40dbdc025bSLars-Peter Clausen u16 int_vref_mv; 41dbdc025bSLars-Peter Clausen }; 42dbdc025bSLars-Peter Clausen 43dbdc025bSLars-Peter Clausen /** 44dbdc025bSLars-Peter Clausen * struct ad5446_state - driver instance specific data 45dbdc025bSLars-Peter Clausen * @indio_dev: the industrial I/O device 46dbdc025bSLars-Peter Clausen * @us: spi_device 47dbdc025bSLars-Peter Clausen * @chip_info: chip model specific constants, available modes etc 48dbdc025bSLars-Peter Clausen * @reg: supply regulator 49dbdc025bSLars-Peter Clausen * @vref_mv: actual reference voltage used 50dbdc025bSLars-Peter Clausen * @pwr_down_mask power down mask 51dbdc025bSLars-Peter Clausen * @pwr_down_mode current power down mode 52dbdc025bSLars-Peter Clausen */ 53dbdc025bSLars-Peter Clausen 54dbdc025bSLars-Peter Clausen struct ad5624r_state { 55dbdc025bSLars-Peter Clausen struct spi_device *us; 56dbdc025bSLars-Peter Clausen const struct ad5624r_chip_info *chip_info; 57dbdc025bSLars-Peter Clausen struct regulator *reg; 58dbdc025bSLars-Peter Clausen unsigned short vref_mv; 59dbdc025bSLars-Peter Clausen unsigned pwr_down_mask; 60dbdc025bSLars-Peter Clausen unsigned pwr_down_mode; 61dbdc025bSLars-Peter Clausen }; 62dbdc025bSLars-Peter Clausen 63dbdc025bSLars-Peter Clausen /** 64dbdc025bSLars-Peter Clausen * ad5624r_supported_device_ids: 65dbdc025bSLars-Peter Clausen * The AD5624/44/64 parts are available in different 66dbdc025bSLars-Peter Clausen * fixed internal reference voltage options. 67dbdc025bSLars-Peter Clausen */ 68dbdc025bSLars-Peter Clausen 69dbdc025bSLars-Peter Clausen enum ad5624r_supported_device_ids { 70dbdc025bSLars-Peter Clausen ID_AD5624R3, 71dbdc025bSLars-Peter Clausen ID_AD5644R3, 72dbdc025bSLars-Peter Clausen ID_AD5664R3, 73dbdc025bSLars-Peter Clausen ID_AD5624R5, 74dbdc025bSLars-Peter Clausen ID_AD5644R5, 75dbdc025bSLars-Peter Clausen ID_AD5664R5, 76dbdc025bSLars-Peter Clausen }; 77dbdc025bSLars-Peter Clausen 78dbdc025bSLars-Peter Clausen #endif /* SPI_AD5624R_H_ */ 79