1*4396f45dSChiYuan Huang // SPDX-License-Identifier: GPL-2.0 2*4396f45dSChiYuan Huang /* 3*4396f45dSChiYuan Huang * Copyright (c) 2022 Richtek Technology Corp. 4*4396f45dSChiYuan Huang * 5*4396f45dSChiYuan Huang * ChiYuan Huang <cy_huang@richtek.com> 6*4396f45dSChiYuan Huang */ 7*4396f45dSChiYuan Huang 8*4396f45dSChiYuan Huang #include <linux/bitops.h> 9*4396f45dSChiYuan Huang #include <linux/delay.h> 10*4396f45dSChiYuan Huang #include <linux/i2c.h> 11*4396f45dSChiYuan Huang #include <linux/kernel.h> 12*4396f45dSChiYuan Huang #include <linux/mod_devicetable.h> 13*4396f45dSChiYuan Huang #include <linux/module.h> 14*4396f45dSChiYuan Huang #include <linux/pm_runtime.h> 15*4396f45dSChiYuan Huang #include <linux/property.h> 16*4396f45dSChiYuan Huang #include <linux/regmap.h> 17*4396f45dSChiYuan Huang #include <linux/sysfs.h> 18*4396f45dSChiYuan Huang #include <linux/types.h> 19*4396f45dSChiYuan Huang #include <linux/util_macros.h> 20*4396f45dSChiYuan Huang 21*4396f45dSChiYuan Huang #include <linux/iio/buffer.h> 22*4396f45dSChiYuan Huang #include <linux/iio/iio.h> 23*4396f45dSChiYuan Huang #include <linux/iio/sysfs.h> 24*4396f45dSChiYuan Huang #include <linux/iio/trigger_consumer.h> 25*4396f45dSChiYuan Huang #include <linux/iio/triggered_buffer.h> 26*4396f45dSChiYuan Huang 27*4396f45dSChiYuan Huang #define RTQ6056_REG_CONFIG 0x00 28*4396f45dSChiYuan Huang #define RTQ6056_REG_SHUNTVOLT 0x01 29*4396f45dSChiYuan Huang #define RTQ6056_REG_BUSVOLT 0x02 30*4396f45dSChiYuan Huang #define RTQ6056_REG_POWER 0x03 31*4396f45dSChiYuan Huang #define RTQ6056_REG_CURRENT 0x04 32*4396f45dSChiYuan Huang #define RTQ6056_REG_CALIBRATION 0x05 33*4396f45dSChiYuan Huang #define RTQ6056_REG_MASKENABLE 0x06 34*4396f45dSChiYuan Huang #define RTQ6056_REG_ALERTLIMIT 0x07 35*4396f45dSChiYuan Huang #define RTQ6056_REG_MANUFACTID 0xFE 36*4396f45dSChiYuan Huang #define RTQ6056_REG_DIEID 0xFF 37*4396f45dSChiYuan Huang 38*4396f45dSChiYuan Huang #define RTQ6056_VENDOR_ID 0x1214 39*4396f45dSChiYuan Huang #define RTQ6056_DEFAULT_CONFIG 0x4127 40*4396f45dSChiYuan Huang #define RTQ6056_CONT_ALLON 7 41*4396f45dSChiYuan Huang 42*4396f45dSChiYuan Huang enum { 43*4396f45dSChiYuan Huang RTQ6056_CH_VSHUNT = 0, 44*4396f45dSChiYuan Huang RTQ6056_CH_VBUS, 45*4396f45dSChiYuan Huang RTQ6056_CH_POWER, 46*4396f45dSChiYuan Huang RTQ6056_CH_CURRENT, 47*4396f45dSChiYuan Huang RTQ6056_MAX_CHANNEL 48*4396f45dSChiYuan Huang }; 49*4396f45dSChiYuan Huang 50*4396f45dSChiYuan Huang enum { 51*4396f45dSChiYuan Huang F_OPMODE = 0, 52*4396f45dSChiYuan Huang F_VSHUNTCT, 53*4396f45dSChiYuan Huang F_VBUSCT, 54*4396f45dSChiYuan Huang F_AVG, 55*4396f45dSChiYuan Huang F_RESET, 56*4396f45dSChiYuan Huang F_MAX_FIELDS 57*4396f45dSChiYuan Huang }; 58*4396f45dSChiYuan Huang 59*4396f45dSChiYuan Huang struct rtq6056_priv { 60*4396f45dSChiYuan Huang struct device *dev; 61*4396f45dSChiYuan Huang struct regmap *regmap; 62*4396f45dSChiYuan Huang struct regmap_field *rm_fields[F_MAX_FIELDS]; 63*4396f45dSChiYuan Huang u32 shunt_resistor_uohm; 64*4396f45dSChiYuan Huang int vshuntct_us; 65*4396f45dSChiYuan Huang int vbusct_us; 66*4396f45dSChiYuan Huang int avg_sample; 67*4396f45dSChiYuan Huang }; 68*4396f45dSChiYuan Huang 69*4396f45dSChiYuan Huang static const struct reg_field rtq6056_reg_fields[F_MAX_FIELDS] = { 70*4396f45dSChiYuan Huang [F_OPMODE] = REG_FIELD(RTQ6056_REG_CONFIG, 0, 2), 71*4396f45dSChiYuan Huang [F_VSHUNTCT] = REG_FIELD(RTQ6056_REG_CONFIG, 3, 5), 72*4396f45dSChiYuan Huang [F_VBUSCT] = REG_FIELD(RTQ6056_REG_CONFIG, 6, 8), 73*4396f45dSChiYuan Huang [F_AVG] = REG_FIELD(RTQ6056_REG_CONFIG, 9, 11), 74*4396f45dSChiYuan Huang [F_RESET] = REG_FIELD(RTQ6056_REG_CONFIG, 15, 15), 75*4396f45dSChiYuan Huang }; 76*4396f45dSChiYuan Huang 77*4396f45dSChiYuan Huang static const struct iio_chan_spec rtq6056_channels[RTQ6056_MAX_CHANNEL + 1] = { 78*4396f45dSChiYuan Huang { 79*4396f45dSChiYuan Huang .type = IIO_VOLTAGE, 80*4396f45dSChiYuan Huang .indexed = 1, 81*4396f45dSChiYuan Huang .channel = 0, 82*4396f45dSChiYuan Huang .address = RTQ6056_REG_SHUNTVOLT, 83*4396f45dSChiYuan Huang .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 84*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SCALE) | 85*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SAMP_FREQ), 86*4396f45dSChiYuan Huang .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), 87*4396f45dSChiYuan Huang .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 88*4396f45dSChiYuan Huang .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 89*4396f45dSChiYuan Huang .scan_index = 0, 90*4396f45dSChiYuan Huang .scan_type = { 91*4396f45dSChiYuan Huang .sign = 's', 92*4396f45dSChiYuan Huang .realbits = 16, 93*4396f45dSChiYuan Huang .storagebits = 16, 94*4396f45dSChiYuan Huang .endianness = IIO_CPU, 95*4396f45dSChiYuan Huang }, 96*4396f45dSChiYuan Huang }, 97*4396f45dSChiYuan Huang { 98*4396f45dSChiYuan Huang .type = IIO_VOLTAGE, 99*4396f45dSChiYuan Huang .indexed = 1, 100*4396f45dSChiYuan Huang .channel = 1, 101*4396f45dSChiYuan Huang .address = RTQ6056_REG_BUSVOLT, 102*4396f45dSChiYuan Huang .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 103*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SCALE) | 104*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SAMP_FREQ), 105*4396f45dSChiYuan Huang .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), 106*4396f45dSChiYuan Huang .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 107*4396f45dSChiYuan Huang .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 108*4396f45dSChiYuan Huang .scan_index = 1, 109*4396f45dSChiYuan Huang .scan_type = { 110*4396f45dSChiYuan Huang .sign = 'u', 111*4396f45dSChiYuan Huang .realbits = 16, 112*4396f45dSChiYuan Huang .storagebits = 16, 113*4396f45dSChiYuan Huang .endianness = IIO_CPU, 114*4396f45dSChiYuan Huang }, 115*4396f45dSChiYuan Huang }, 116*4396f45dSChiYuan Huang { 117*4396f45dSChiYuan Huang .type = IIO_POWER, 118*4396f45dSChiYuan Huang .indexed = 1, 119*4396f45dSChiYuan Huang .channel = 2, 120*4396f45dSChiYuan Huang .address = RTQ6056_REG_POWER, 121*4396f45dSChiYuan Huang .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 122*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SCALE) | 123*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SAMP_FREQ), 124*4396f45dSChiYuan Huang .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 125*4396f45dSChiYuan Huang .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 126*4396f45dSChiYuan Huang .scan_index = 2, 127*4396f45dSChiYuan Huang .scan_type = { 128*4396f45dSChiYuan Huang .sign = 'u', 129*4396f45dSChiYuan Huang .realbits = 16, 130*4396f45dSChiYuan Huang .storagebits = 16, 131*4396f45dSChiYuan Huang .endianness = IIO_CPU, 132*4396f45dSChiYuan Huang }, 133*4396f45dSChiYuan Huang }, 134*4396f45dSChiYuan Huang { 135*4396f45dSChiYuan Huang .type = IIO_CURRENT, 136*4396f45dSChiYuan Huang .indexed = 1, 137*4396f45dSChiYuan Huang .channel = 3, 138*4396f45dSChiYuan Huang .address = RTQ6056_REG_CURRENT, 139*4396f45dSChiYuan Huang .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 140*4396f45dSChiYuan Huang BIT(IIO_CHAN_INFO_SAMP_FREQ), 141*4396f45dSChiYuan Huang .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 142*4396f45dSChiYuan Huang .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 143*4396f45dSChiYuan Huang .scan_index = 3, 144*4396f45dSChiYuan Huang .scan_type = { 145*4396f45dSChiYuan Huang .sign = 's', 146*4396f45dSChiYuan Huang .realbits = 16, 147*4396f45dSChiYuan Huang .storagebits = 16, 148*4396f45dSChiYuan Huang .endianness = IIO_CPU, 149*4396f45dSChiYuan Huang }, 150*4396f45dSChiYuan Huang }, 151*4396f45dSChiYuan Huang IIO_CHAN_SOFT_TIMESTAMP(RTQ6056_MAX_CHANNEL), 152*4396f45dSChiYuan Huang }; 153*4396f45dSChiYuan Huang 154*4396f45dSChiYuan Huang static int rtq6056_adc_read_channel(struct rtq6056_priv *priv, 155*4396f45dSChiYuan Huang struct iio_chan_spec const *ch, 156*4396f45dSChiYuan Huang int *val) 157*4396f45dSChiYuan Huang { 158*4396f45dSChiYuan Huang struct device *dev = priv->dev; 159*4396f45dSChiYuan Huang unsigned int addr = ch->address; 160*4396f45dSChiYuan Huang unsigned int regval; 161*4396f45dSChiYuan Huang int ret; 162*4396f45dSChiYuan Huang 163*4396f45dSChiYuan Huang pm_runtime_get_sync(dev); 164*4396f45dSChiYuan Huang ret = regmap_read(priv->regmap, addr, ®val); 165*4396f45dSChiYuan Huang pm_runtime_mark_last_busy(dev); 166*4396f45dSChiYuan Huang pm_runtime_put(dev); 167*4396f45dSChiYuan Huang if (ret) 168*4396f45dSChiYuan Huang return ret; 169*4396f45dSChiYuan Huang 170*4396f45dSChiYuan Huang /* Power and VBUS is unsigned 16-bit, others are signed 16-bit */ 171*4396f45dSChiYuan Huang if (addr == RTQ6056_REG_BUSVOLT || addr == RTQ6056_REG_POWER) 172*4396f45dSChiYuan Huang *val = regval; 173*4396f45dSChiYuan Huang else 174*4396f45dSChiYuan Huang *val = sign_extend32(regval, 16); 175*4396f45dSChiYuan Huang 176*4396f45dSChiYuan Huang return IIO_VAL_INT; 177*4396f45dSChiYuan Huang } 178*4396f45dSChiYuan Huang 179*4396f45dSChiYuan Huang static int rtq6056_adc_read_scale(struct iio_chan_spec const *ch, int *val, 180*4396f45dSChiYuan Huang int *val2) 181*4396f45dSChiYuan Huang { 182*4396f45dSChiYuan Huang switch (ch->address) { 183*4396f45dSChiYuan Huang case RTQ6056_REG_SHUNTVOLT: 184*4396f45dSChiYuan Huang /* VSHUNT lsb 2.5uV */ 185*4396f45dSChiYuan Huang *val = 2500; 186*4396f45dSChiYuan Huang *val2 = 1000000; 187*4396f45dSChiYuan Huang return IIO_VAL_FRACTIONAL; 188*4396f45dSChiYuan Huang case RTQ6056_REG_BUSVOLT: 189*4396f45dSChiYuan Huang /* VBUS lsb 1.25mV */ 190*4396f45dSChiYuan Huang *val = 1250; 191*4396f45dSChiYuan Huang *val2 = 1000; 192*4396f45dSChiYuan Huang return IIO_VAL_FRACTIONAL; 193*4396f45dSChiYuan Huang case RTQ6056_REG_POWER: 194*4396f45dSChiYuan Huang /* Power lsb 25mW */ 195*4396f45dSChiYuan Huang *val = 25; 196*4396f45dSChiYuan Huang return IIO_VAL_INT; 197*4396f45dSChiYuan Huang default: 198*4396f45dSChiYuan Huang return -EINVAL; 199*4396f45dSChiYuan Huang } 200*4396f45dSChiYuan Huang } 201*4396f45dSChiYuan Huang 202*4396f45dSChiYuan Huang /* 203*4396f45dSChiYuan Huang * Sample frequency for channel VSHUNT and VBUS. The indices correspond 204*4396f45dSChiYuan Huang * with the bit value expected by the chip. And it can be found at 205*4396f45dSChiYuan Huang * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf 206*4396f45dSChiYuan Huang */ 207*4396f45dSChiYuan Huang static const int rtq6056_samp_freq_list[] = { 208*4396f45dSChiYuan Huang 7194, 4926, 3717, 1904, 964, 485, 243, 122, 209*4396f45dSChiYuan Huang }; 210*4396f45dSChiYuan Huang 211*4396f45dSChiYuan Huang static int rtq6056_adc_set_samp_freq(struct rtq6056_priv *priv, 212*4396f45dSChiYuan Huang struct iio_chan_spec const *ch, int val) 213*4396f45dSChiYuan Huang { 214*4396f45dSChiYuan Huang struct regmap_field *rm_field; 215*4396f45dSChiYuan Huang unsigned int selector; 216*4396f45dSChiYuan Huang int *ct, ret; 217*4396f45dSChiYuan Huang 218*4396f45dSChiYuan Huang if (val > 7194 || val < 122) 219*4396f45dSChiYuan Huang return -EINVAL; 220*4396f45dSChiYuan Huang 221*4396f45dSChiYuan Huang if (ch->address == RTQ6056_REG_SHUNTVOLT) { 222*4396f45dSChiYuan Huang rm_field = priv->rm_fields[F_VSHUNTCT]; 223*4396f45dSChiYuan Huang ct = &priv->vshuntct_us; 224*4396f45dSChiYuan Huang } else if (ch->address == RTQ6056_REG_BUSVOLT) { 225*4396f45dSChiYuan Huang rm_field = priv->rm_fields[F_VBUSCT]; 226*4396f45dSChiYuan Huang ct = &priv->vbusct_us; 227*4396f45dSChiYuan Huang } else 228*4396f45dSChiYuan Huang return -EINVAL; 229*4396f45dSChiYuan Huang 230*4396f45dSChiYuan Huang selector = find_closest_descending(val, rtq6056_samp_freq_list, 231*4396f45dSChiYuan Huang ARRAY_SIZE(rtq6056_samp_freq_list)); 232*4396f45dSChiYuan Huang 233*4396f45dSChiYuan Huang ret = regmap_field_write(rm_field, selector); 234*4396f45dSChiYuan Huang if (ret) 235*4396f45dSChiYuan Huang return ret; 236*4396f45dSChiYuan Huang 237*4396f45dSChiYuan Huang *ct = 1000000 / rtq6056_samp_freq_list[selector]; 238*4396f45dSChiYuan Huang 239*4396f45dSChiYuan Huang return 0; 240*4396f45dSChiYuan Huang } 241*4396f45dSChiYuan Huang 242*4396f45dSChiYuan Huang /* 243*4396f45dSChiYuan Huang * Available averaging rate for rtq6056. The indices correspond with the bit 244*4396f45dSChiYuan Huang * value expected by the chip. And it can be found at 245*4396f45dSChiYuan Huang * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf 246*4396f45dSChiYuan Huang */ 247*4396f45dSChiYuan Huang static const int rtq6056_avg_sample_list[] = { 248*4396f45dSChiYuan Huang 1, 4, 16, 64, 128, 256, 512, 1024, 249*4396f45dSChiYuan Huang }; 250*4396f45dSChiYuan Huang 251*4396f45dSChiYuan Huang static int rtq6056_adc_set_average(struct rtq6056_priv *priv, int val) 252*4396f45dSChiYuan Huang { 253*4396f45dSChiYuan Huang unsigned int selector; 254*4396f45dSChiYuan Huang int ret; 255*4396f45dSChiYuan Huang 256*4396f45dSChiYuan Huang if (val > 1024 || val < 1) 257*4396f45dSChiYuan Huang return -EINVAL; 258*4396f45dSChiYuan Huang 259*4396f45dSChiYuan Huang selector = find_closest(val, rtq6056_avg_sample_list, 260*4396f45dSChiYuan Huang ARRAY_SIZE(rtq6056_avg_sample_list)); 261*4396f45dSChiYuan Huang 262*4396f45dSChiYuan Huang ret = regmap_field_write(priv->rm_fields[F_AVG], selector); 263*4396f45dSChiYuan Huang if (ret) 264*4396f45dSChiYuan Huang return ret; 265*4396f45dSChiYuan Huang 266*4396f45dSChiYuan Huang priv->avg_sample = rtq6056_avg_sample_list[selector]; 267*4396f45dSChiYuan Huang 268*4396f45dSChiYuan Huang return 0; 269*4396f45dSChiYuan Huang } 270*4396f45dSChiYuan Huang 271*4396f45dSChiYuan Huang static int rtq6056_adc_get_sample_freq(struct rtq6056_priv *priv, 272*4396f45dSChiYuan Huang struct iio_chan_spec const *ch, int *val) 273*4396f45dSChiYuan Huang { 274*4396f45dSChiYuan Huang int sample_time; 275*4396f45dSChiYuan Huang 276*4396f45dSChiYuan Huang if (ch->address == RTQ6056_REG_SHUNTVOLT) 277*4396f45dSChiYuan Huang sample_time = priv->vshuntct_us; 278*4396f45dSChiYuan Huang else if (ch->address == RTQ6056_REG_BUSVOLT) 279*4396f45dSChiYuan Huang sample_time = priv->vbusct_us; 280*4396f45dSChiYuan Huang else { 281*4396f45dSChiYuan Huang sample_time = priv->vshuntct_us + priv->vbusct_us; 282*4396f45dSChiYuan Huang sample_time *= priv->avg_sample; 283*4396f45dSChiYuan Huang } 284*4396f45dSChiYuan Huang 285*4396f45dSChiYuan Huang *val = 1000000 / sample_time; 286*4396f45dSChiYuan Huang 287*4396f45dSChiYuan Huang return IIO_VAL_INT; 288*4396f45dSChiYuan Huang } 289*4396f45dSChiYuan Huang 290*4396f45dSChiYuan Huang static int rtq6056_adc_read_raw(struct iio_dev *indio_dev, 291*4396f45dSChiYuan Huang struct iio_chan_spec const *chan, int *val, 292*4396f45dSChiYuan Huang int *val2, long mask) 293*4396f45dSChiYuan Huang { 294*4396f45dSChiYuan Huang struct rtq6056_priv *priv = iio_priv(indio_dev); 295*4396f45dSChiYuan Huang 296*4396f45dSChiYuan Huang switch (mask) { 297*4396f45dSChiYuan Huang case IIO_CHAN_INFO_RAW: 298*4396f45dSChiYuan Huang return rtq6056_adc_read_channel(priv, chan, val); 299*4396f45dSChiYuan Huang case IIO_CHAN_INFO_SCALE: 300*4396f45dSChiYuan Huang return rtq6056_adc_read_scale(chan, val, val2); 301*4396f45dSChiYuan Huang case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 302*4396f45dSChiYuan Huang *val = priv->avg_sample; 303*4396f45dSChiYuan Huang return IIO_VAL_INT; 304*4396f45dSChiYuan Huang case IIO_CHAN_INFO_SAMP_FREQ: 305*4396f45dSChiYuan Huang return rtq6056_adc_get_sample_freq(priv, chan, val); 306*4396f45dSChiYuan Huang default: 307*4396f45dSChiYuan Huang return -EINVAL; 308*4396f45dSChiYuan Huang } 309*4396f45dSChiYuan Huang } 310*4396f45dSChiYuan Huang 311*4396f45dSChiYuan Huang static int rtq6056_adc_read_avail(struct iio_dev *indio_dev, 312*4396f45dSChiYuan Huang struct iio_chan_spec const *chan, 313*4396f45dSChiYuan Huang const int **vals, int *type, int *length, 314*4396f45dSChiYuan Huang long mask) 315*4396f45dSChiYuan Huang { 316*4396f45dSChiYuan Huang switch (mask) { 317*4396f45dSChiYuan Huang case IIO_CHAN_INFO_SAMP_FREQ: 318*4396f45dSChiYuan Huang *vals = rtq6056_samp_freq_list; 319*4396f45dSChiYuan Huang *type = IIO_VAL_INT; 320*4396f45dSChiYuan Huang *length = ARRAY_SIZE(rtq6056_samp_freq_list); 321*4396f45dSChiYuan Huang return IIO_AVAIL_LIST; 322*4396f45dSChiYuan Huang case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 323*4396f45dSChiYuan Huang *vals = rtq6056_avg_sample_list; 324*4396f45dSChiYuan Huang *type = IIO_VAL_INT; 325*4396f45dSChiYuan Huang *length = ARRAY_SIZE(rtq6056_avg_sample_list); 326*4396f45dSChiYuan Huang return IIO_AVAIL_LIST; 327*4396f45dSChiYuan Huang default: 328*4396f45dSChiYuan Huang return -EINVAL; 329*4396f45dSChiYuan Huang } 330*4396f45dSChiYuan Huang } 331*4396f45dSChiYuan Huang 332*4396f45dSChiYuan Huang static int rtq6056_adc_write_raw(struct iio_dev *indio_dev, 333*4396f45dSChiYuan Huang struct iio_chan_spec const *chan, int val, 334*4396f45dSChiYuan Huang int val2, long mask) 335*4396f45dSChiYuan Huang { 336*4396f45dSChiYuan Huang struct rtq6056_priv *priv = iio_priv(indio_dev); 337*4396f45dSChiYuan Huang int ret; 338*4396f45dSChiYuan Huang 339*4396f45dSChiYuan Huang ret = iio_device_claim_direct_mode(indio_dev); 340*4396f45dSChiYuan Huang if (ret) 341*4396f45dSChiYuan Huang return ret; 342*4396f45dSChiYuan Huang 343*4396f45dSChiYuan Huang switch (mask) { 344*4396f45dSChiYuan Huang case IIO_CHAN_INFO_SAMP_FREQ: 345*4396f45dSChiYuan Huang ret = rtq6056_adc_set_samp_freq(priv, chan, val); 346*4396f45dSChiYuan Huang break; 347*4396f45dSChiYuan Huang case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 348*4396f45dSChiYuan Huang ret = rtq6056_adc_set_average(priv, val); 349*4396f45dSChiYuan Huang break; 350*4396f45dSChiYuan Huang default: 351*4396f45dSChiYuan Huang ret = -EINVAL; 352*4396f45dSChiYuan Huang break; 353*4396f45dSChiYuan Huang } 354*4396f45dSChiYuan Huang 355*4396f45dSChiYuan Huang iio_device_release_direct_mode(indio_dev); 356*4396f45dSChiYuan Huang 357*4396f45dSChiYuan Huang return ret; 358*4396f45dSChiYuan Huang } 359*4396f45dSChiYuan Huang 360*4396f45dSChiYuan Huang static const char *rtq6056_channel_labels[RTQ6056_MAX_CHANNEL] = { 361*4396f45dSChiYuan Huang [RTQ6056_CH_VSHUNT] = "Vshunt", 362*4396f45dSChiYuan Huang [RTQ6056_CH_VBUS] = "Vbus", 363*4396f45dSChiYuan Huang [RTQ6056_CH_POWER] = "Power", 364*4396f45dSChiYuan Huang [RTQ6056_CH_CURRENT] = "Current", 365*4396f45dSChiYuan Huang }; 366*4396f45dSChiYuan Huang 367*4396f45dSChiYuan Huang static int rtq6056_adc_read_label(struct iio_dev *indio_dev, 368*4396f45dSChiYuan Huang struct iio_chan_spec const *chan, 369*4396f45dSChiYuan Huang char *label) 370*4396f45dSChiYuan Huang { 371*4396f45dSChiYuan Huang return sysfs_emit(label, "%s\n", rtq6056_channel_labels[chan->channel]); 372*4396f45dSChiYuan Huang } 373*4396f45dSChiYuan Huang 374*4396f45dSChiYuan Huang static int rtq6056_set_shunt_resistor(struct rtq6056_priv *priv, 375*4396f45dSChiYuan Huang int resistor_uohm) 376*4396f45dSChiYuan Huang { 377*4396f45dSChiYuan Huang unsigned int calib_val; 378*4396f45dSChiYuan Huang int ret; 379*4396f45dSChiYuan Huang 380*4396f45dSChiYuan Huang if (resistor_uohm <= 0) { 381*4396f45dSChiYuan Huang dev_err(priv->dev, "Invalid resistor [%d]\n", resistor_uohm); 382*4396f45dSChiYuan Huang return -EINVAL; 383*4396f45dSChiYuan Huang } 384*4396f45dSChiYuan Huang 385*4396f45dSChiYuan Huang /* calibration = 5120000 / (Rshunt (uOhm) * current lsb (1mA)) */ 386*4396f45dSChiYuan Huang calib_val = 5120000 / resistor_uohm; 387*4396f45dSChiYuan Huang ret = regmap_write(priv->regmap, RTQ6056_REG_CALIBRATION, calib_val); 388*4396f45dSChiYuan Huang if (ret) 389*4396f45dSChiYuan Huang return ret; 390*4396f45dSChiYuan Huang 391*4396f45dSChiYuan Huang priv->shunt_resistor_uohm = resistor_uohm; 392*4396f45dSChiYuan Huang 393*4396f45dSChiYuan Huang return 0; 394*4396f45dSChiYuan Huang } 395*4396f45dSChiYuan Huang 396*4396f45dSChiYuan Huang static ssize_t shunt_resistor_show(struct device *dev, 397*4396f45dSChiYuan Huang struct device_attribute *attr, char *buf) 398*4396f45dSChiYuan Huang { 399*4396f45dSChiYuan Huang struct rtq6056_priv *priv = iio_priv(dev_to_iio_dev(dev)); 400*4396f45dSChiYuan Huang int vals[2] = { priv->shunt_resistor_uohm, 1000000 }; 401*4396f45dSChiYuan Huang 402*4396f45dSChiYuan Huang return iio_format_value(buf, IIO_VAL_FRACTIONAL, 1, vals); 403*4396f45dSChiYuan Huang } 404*4396f45dSChiYuan Huang 405*4396f45dSChiYuan Huang static ssize_t shunt_resistor_store(struct device *dev, 406*4396f45dSChiYuan Huang struct device_attribute *attr, 407*4396f45dSChiYuan Huang const char *buf, size_t len) 408*4396f45dSChiYuan Huang { 409*4396f45dSChiYuan Huang struct iio_dev *indio_dev = dev_to_iio_dev(dev); 410*4396f45dSChiYuan Huang struct rtq6056_priv *priv = iio_priv(indio_dev); 411*4396f45dSChiYuan Huang int val, val_fract, ret; 412*4396f45dSChiYuan Huang 413*4396f45dSChiYuan Huang ret = iio_device_claim_direct_mode(indio_dev); 414*4396f45dSChiYuan Huang if (ret) 415*4396f45dSChiYuan Huang return ret; 416*4396f45dSChiYuan Huang 417*4396f45dSChiYuan Huang ret = iio_str_to_fixpoint(buf, 100000, &val, &val_fract); 418*4396f45dSChiYuan Huang if (ret) 419*4396f45dSChiYuan Huang goto out_store; 420*4396f45dSChiYuan Huang 421*4396f45dSChiYuan Huang ret = rtq6056_set_shunt_resistor(priv, val * 1000000 + val_fract); 422*4396f45dSChiYuan Huang 423*4396f45dSChiYuan Huang out_store: 424*4396f45dSChiYuan Huang iio_device_release_direct_mode(indio_dev); 425*4396f45dSChiYuan Huang 426*4396f45dSChiYuan Huang return ret ?: len; 427*4396f45dSChiYuan Huang } 428*4396f45dSChiYuan Huang 429*4396f45dSChiYuan Huang static IIO_DEVICE_ATTR_RW(shunt_resistor, 0); 430*4396f45dSChiYuan Huang 431*4396f45dSChiYuan Huang static struct attribute *rtq6056_attributes[] = { 432*4396f45dSChiYuan Huang &iio_dev_attr_shunt_resistor.dev_attr.attr, 433*4396f45dSChiYuan Huang NULL 434*4396f45dSChiYuan Huang }; 435*4396f45dSChiYuan Huang 436*4396f45dSChiYuan Huang static const struct attribute_group rtq6056_attribute_group = { 437*4396f45dSChiYuan Huang .attrs = rtq6056_attributes, 438*4396f45dSChiYuan Huang }; 439*4396f45dSChiYuan Huang 440*4396f45dSChiYuan Huang static const struct iio_info rtq6056_info = { 441*4396f45dSChiYuan Huang .attrs = &rtq6056_attribute_group, 442*4396f45dSChiYuan Huang .read_raw = rtq6056_adc_read_raw, 443*4396f45dSChiYuan Huang .read_avail = rtq6056_adc_read_avail, 444*4396f45dSChiYuan Huang .write_raw = rtq6056_adc_write_raw, 445*4396f45dSChiYuan Huang .read_label = rtq6056_adc_read_label, 446*4396f45dSChiYuan Huang }; 447*4396f45dSChiYuan Huang 448*4396f45dSChiYuan Huang static irqreturn_t rtq6056_buffer_trigger_handler(int irq, void *p) 449*4396f45dSChiYuan Huang { 450*4396f45dSChiYuan Huang struct iio_poll_func *pf = p; 451*4396f45dSChiYuan Huang struct iio_dev *indio_dev = pf->indio_dev; 452*4396f45dSChiYuan Huang struct rtq6056_priv *priv = iio_priv(indio_dev); 453*4396f45dSChiYuan Huang struct device *dev = priv->dev; 454*4396f45dSChiYuan Huang struct { 455*4396f45dSChiYuan Huang u16 vals[RTQ6056_MAX_CHANNEL]; 456*4396f45dSChiYuan Huang s64 timestamp __aligned(8); 457*4396f45dSChiYuan Huang } data; 458*4396f45dSChiYuan Huang unsigned int raw; 459*4396f45dSChiYuan Huang int i = 0, bit, ret; 460*4396f45dSChiYuan Huang 461*4396f45dSChiYuan Huang memset(&data, 0, sizeof(data)); 462*4396f45dSChiYuan Huang 463*4396f45dSChiYuan Huang pm_runtime_get_sync(dev); 464*4396f45dSChiYuan Huang 465*4396f45dSChiYuan Huang for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->masklength) { 466*4396f45dSChiYuan Huang unsigned int addr = rtq6056_channels[bit].address; 467*4396f45dSChiYuan Huang 468*4396f45dSChiYuan Huang ret = regmap_read(priv->regmap, addr, &raw); 469*4396f45dSChiYuan Huang if (ret) 470*4396f45dSChiYuan Huang goto out; 471*4396f45dSChiYuan Huang 472*4396f45dSChiYuan Huang data.vals[i++] = raw; 473*4396f45dSChiYuan Huang } 474*4396f45dSChiYuan Huang 475*4396f45dSChiYuan Huang iio_push_to_buffers_with_timestamp(indio_dev, &data, iio_get_time_ns(indio_dev)); 476*4396f45dSChiYuan Huang 477*4396f45dSChiYuan Huang out: 478*4396f45dSChiYuan Huang pm_runtime_mark_last_busy(dev); 479*4396f45dSChiYuan Huang pm_runtime_put(dev); 480*4396f45dSChiYuan Huang 481*4396f45dSChiYuan Huang iio_trigger_notify_done(indio_dev->trig); 482*4396f45dSChiYuan Huang 483*4396f45dSChiYuan Huang return IRQ_HANDLED; 484*4396f45dSChiYuan Huang } 485*4396f45dSChiYuan Huang 486*4396f45dSChiYuan Huang static void rtq6056_enter_shutdown_state(void *dev) 487*4396f45dSChiYuan Huang { 488*4396f45dSChiYuan Huang struct rtq6056_priv *priv = dev_get_drvdata(dev); 489*4396f45dSChiYuan Huang 490*4396f45dSChiYuan Huang /* Enter shutdown state */ 491*4396f45dSChiYuan Huang regmap_field_write(priv->rm_fields[F_OPMODE], 0); 492*4396f45dSChiYuan Huang } 493*4396f45dSChiYuan Huang 494*4396f45dSChiYuan Huang static bool rtq6056_is_readable_reg(struct device *dev, unsigned int reg) 495*4396f45dSChiYuan Huang { 496*4396f45dSChiYuan Huang switch (reg) { 497*4396f45dSChiYuan Huang case RTQ6056_REG_CONFIG ... RTQ6056_REG_ALERTLIMIT: 498*4396f45dSChiYuan Huang case RTQ6056_REG_MANUFACTID ... RTQ6056_REG_DIEID: 499*4396f45dSChiYuan Huang return true; 500*4396f45dSChiYuan Huang default: 501*4396f45dSChiYuan Huang return false; 502*4396f45dSChiYuan Huang } 503*4396f45dSChiYuan Huang } 504*4396f45dSChiYuan Huang 505*4396f45dSChiYuan Huang static bool rtq6056_is_writeable_reg(struct device *dev, unsigned int reg) 506*4396f45dSChiYuan Huang { 507*4396f45dSChiYuan Huang switch (reg) { 508*4396f45dSChiYuan Huang case RTQ6056_REG_CONFIG: 509*4396f45dSChiYuan Huang case RTQ6056_REG_CALIBRATION ... RTQ6056_REG_ALERTLIMIT: 510*4396f45dSChiYuan Huang return true; 511*4396f45dSChiYuan Huang default: 512*4396f45dSChiYuan Huang return false; 513*4396f45dSChiYuan Huang } 514*4396f45dSChiYuan Huang } 515*4396f45dSChiYuan Huang 516*4396f45dSChiYuan Huang static const struct regmap_config rtq6056_regmap_config = { 517*4396f45dSChiYuan Huang .reg_bits = 8, 518*4396f45dSChiYuan Huang .val_bits = 16, 519*4396f45dSChiYuan Huang .val_format_endian = REGMAP_ENDIAN_BIG, 520*4396f45dSChiYuan Huang .max_register = RTQ6056_REG_DIEID, 521*4396f45dSChiYuan Huang .readable_reg = rtq6056_is_readable_reg, 522*4396f45dSChiYuan Huang .writeable_reg = rtq6056_is_writeable_reg, 523*4396f45dSChiYuan Huang }; 524*4396f45dSChiYuan Huang 525*4396f45dSChiYuan Huang static int rtq6056_probe(struct i2c_client *i2c) 526*4396f45dSChiYuan Huang { 527*4396f45dSChiYuan Huang struct iio_dev *indio_dev; 528*4396f45dSChiYuan Huang struct rtq6056_priv *priv; 529*4396f45dSChiYuan Huang struct device *dev = &i2c->dev; 530*4396f45dSChiYuan Huang struct regmap *regmap; 531*4396f45dSChiYuan Huang unsigned int vendor_id, shunt_resistor_uohm; 532*4396f45dSChiYuan Huang int ret; 533*4396f45dSChiYuan Huang 534*4396f45dSChiYuan Huang if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_WORD_DATA)) 535*4396f45dSChiYuan Huang return -EOPNOTSUPP; 536*4396f45dSChiYuan Huang 537*4396f45dSChiYuan Huang indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); 538*4396f45dSChiYuan Huang if (!indio_dev) 539*4396f45dSChiYuan Huang return -ENOMEM; 540*4396f45dSChiYuan Huang 541*4396f45dSChiYuan Huang priv = iio_priv(indio_dev); 542*4396f45dSChiYuan Huang priv->dev = dev; 543*4396f45dSChiYuan Huang priv->vshuntct_us = priv->vbusct_us = 1037; 544*4396f45dSChiYuan Huang priv->avg_sample = 1; 545*4396f45dSChiYuan Huang i2c_set_clientdata(i2c, priv); 546*4396f45dSChiYuan Huang 547*4396f45dSChiYuan Huang regmap = devm_regmap_init_i2c(i2c, &rtq6056_regmap_config); 548*4396f45dSChiYuan Huang if (IS_ERR(regmap)) 549*4396f45dSChiYuan Huang return dev_err_probe(dev, PTR_ERR(regmap), 550*4396f45dSChiYuan Huang "Failed to init regmap\n"); 551*4396f45dSChiYuan Huang 552*4396f45dSChiYuan Huang priv->regmap = regmap; 553*4396f45dSChiYuan Huang 554*4396f45dSChiYuan Huang ret = regmap_read(regmap, RTQ6056_REG_MANUFACTID, &vendor_id); 555*4396f45dSChiYuan Huang if (ret) 556*4396f45dSChiYuan Huang return dev_err_probe(dev, ret, 557*4396f45dSChiYuan Huang "Failed to get manufacturer info\n"); 558*4396f45dSChiYuan Huang 559*4396f45dSChiYuan Huang if (vendor_id != RTQ6056_VENDOR_ID) 560*4396f45dSChiYuan Huang return dev_err_probe(dev, -ENODEV, 561*4396f45dSChiYuan Huang "Invalid vendor id 0x%04x\n", vendor_id); 562*4396f45dSChiYuan Huang 563*4396f45dSChiYuan Huang ret = devm_regmap_field_bulk_alloc(dev, regmap, priv->rm_fields, 564*4396f45dSChiYuan Huang rtq6056_reg_fields, F_MAX_FIELDS); 565*4396f45dSChiYuan Huang if (ret) 566*4396f45dSChiYuan Huang return dev_err_probe(dev, ret, "Failed to init regmap field\n"); 567*4396f45dSChiYuan Huang 568*4396f45dSChiYuan Huang /* 569*4396f45dSChiYuan Huang * By default, configure average sample as 1, bus and shunt conversion 570*4396f45dSChiYuan Huang * time as 1037 microsecond, and operating mode to all on. 571*4396f45dSChiYuan Huang */ 572*4396f45dSChiYuan Huang ret = regmap_write(regmap, RTQ6056_REG_CONFIG, RTQ6056_DEFAULT_CONFIG); 573*4396f45dSChiYuan Huang if (ret) 574*4396f45dSChiYuan Huang return dev_err_probe(dev, ret, 575*4396f45dSChiYuan Huang "Failed to enable continuous sensing\n"); 576*4396f45dSChiYuan Huang 577*4396f45dSChiYuan Huang ret = devm_add_action_or_reset(dev, rtq6056_enter_shutdown_state, dev); 578*4396f45dSChiYuan Huang if (ret) 579*4396f45dSChiYuan Huang return ret; 580*4396f45dSChiYuan Huang 581*4396f45dSChiYuan Huang pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC); 582*4396f45dSChiYuan Huang pm_runtime_use_autosuspend(dev); 583*4396f45dSChiYuan Huang pm_runtime_set_active(dev); 584*4396f45dSChiYuan Huang pm_runtime_mark_last_busy(dev); 585*4396f45dSChiYuan Huang ret = devm_pm_runtime_enable(dev); 586*4396f45dSChiYuan Huang if (ret) 587*4396f45dSChiYuan Huang return dev_err_probe(dev, ret, "Failed to enable pm_runtime\n"); 588*4396f45dSChiYuan Huang 589*4396f45dSChiYuan Huang /* By default, use 2000 micro-Ohm resistor */ 590*4396f45dSChiYuan Huang shunt_resistor_uohm = 2000; 591*4396f45dSChiYuan Huang device_property_read_u32(dev, "shunt-resistor-micro-ohms", 592*4396f45dSChiYuan Huang &shunt_resistor_uohm); 593*4396f45dSChiYuan Huang 594*4396f45dSChiYuan Huang ret = rtq6056_set_shunt_resistor(priv, shunt_resistor_uohm); 595*4396f45dSChiYuan Huang if (ret) 596*4396f45dSChiYuan Huang return dev_err_probe(dev, ret, 597*4396f45dSChiYuan Huang "Failed to init shunt resistor\n"); 598*4396f45dSChiYuan Huang 599*4396f45dSChiYuan Huang indio_dev->name = "rtq6056"; 600*4396f45dSChiYuan Huang indio_dev->modes = INDIO_DIRECT_MODE; 601*4396f45dSChiYuan Huang indio_dev->channels = rtq6056_channels; 602*4396f45dSChiYuan Huang indio_dev->num_channels = ARRAY_SIZE(rtq6056_channels); 603*4396f45dSChiYuan Huang indio_dev->info = &rtq6056_info; 604*4396f45dSChiYuan Huang 605*4396f45dSChiYuan Huang ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, 606*4396f45dSChiYuan Huang rtq6056_buffer_trigger_handler, 607*4396f45dSChiYuan Huang NULL); 608*4396f45dSChiYuan Huang if (ret) 609*4396f45dSChiYuan Huang return dev_err_probe(dev, ret, 610*4396f45dSChiYuan Huang "Failed to allocate iio trigger buffer\n"); 611*4396f45dSChiYuan Huang 612*4396f45dSChiYuan Huang return devm_iio_device_register(dev, indio_dev); 613*4396f45dSChiYuan Huang } 614*4396f45dSChiYuan Huang 615*4396f45dSChiYuan Huang static int rtq6056_runtime_suspend(struct device *dev) 616*4396f45dSChiYuan Huang { 617*4396f45dSChiYuan Huang struct rtq6056_priv *priv = dev_get_drvdata(dev); 618*4396f45dSChiYuan Huang 619*4396f45dSChiYuan Huang /* Configure to shutdown mode */ 620*4396f45dSChiYuan Huang return regmap_field_write(priv->rm_fields[F_OPMODE], 0); 621*4396f45dSChiYuan Huang } 622*4396f45dSChiYuan Huang 623*4396f45dSChiYuan Huang static int rtq6056_runtime_resume(struct device *dev) 624*4396f45dSChiYuan Huang { 625*4396f45dSChiYuan Huang struct rtq6056_priv *priv = dev_get_drvdata(dev); 626*4396f45dSChiYuan Huang int sample_rdy_time_us, ret; 627*4396f45dSChiYuan Huang 628*4396f45dSChiYuan Huang ret = regmap_field_write(priv->rm_fields[F_OPMODE], RTQ6056_CONT_ALLON); 629*4396f45dSChiYuan Huang if (ret) 630*4396f45dSChiYuan Huang return ret; 631*4396f45dSChiYuan Huang 632*4396f45dSChiYuan Huang sample_rdy_time_us = priv->vbusct_us + priv->vshuntct_us; 633*4396f45dSChiYuan Huang sample_rdy_time_us *= priv->avg_sample; 634*4396f45dSChiYuan Huang 635*4396f45dSChiYuan Huang usleep_range(sample_rdy_time_us, sample_rdy_time_us + 100); 636*4396f45dSChiYuan Huang 637*4396f45dSChiYuan Huang return 0; 638*4396f45dSChiYuan Huang } 639*4396f45dSChiYuan Huang 640*4396f45dSChiYuan Huang static DEFINE_RUNTIME_DEV_PM_OPS(rtq6056_pm_ops, rtq6056_runtime_suspend, 641*4396f45dSChiYuan Huang rtq6056_runtime_resume, NULL); 642*4396f45dSChiYuan Huang 643*4396f45dSChiYuan Huang static const struct of_device_id rtq6056_device_match[] = { 644*4396f45dSChiYuan Huang { .compatible = "richtek,rtq6056" }, 645*4396f45dSChiYuan Huang {} 646*4396f45dSChiYuan Huang }; 647*4396f45dSChiYuan Huang MODULE_DEVICE_TABLE(of, rtq6056_device_match); 648*4396f45dSChiYuan Huang 649*4396f45dSChiYuan Huang static struct i2c_driver rtq6056_driver = { 650*4396f45dSChiYuan Huang .driver = { 651*4396f45dSChiYuan Huang .name = "rtq6056", 652*4396f45dSChiYuan Huang .of_match_table = rtq6056_device_match, 653*4396f45dSChiYuan Huang .pm = pm_ptr(&rtq6056_pm_ops), 654*4396f45dSChiYuan Huang }, 655*4396f45dSChiYuan Huang .probe_new = rtq6056_probe, 656*4396f45dSChiYuan Huang }; 657*4396f45dSChiYuan Huang module_i2c_driver(rtq6056_driver); 658*4396f45dSChiYuan Huang 659*4396f45dSChiYuan Huang MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 660*4396f45dSChiYuan Huang MODULE_DESCRIPTION("Richtek RTQ6056 Driver"); 661*4396f45dSChiYuan Huang MODULE_LICENSE("GPL v2"); 662