180503b23SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2591298e5SHimanshu Jha /*
3591298e5SHimanshu Jha * ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer
4591298e5SHimanshu Jha *
5591298e5SHimanshu Jha * Copyright 2010 Analog Devices Inc.
6591298e5SHimanshu Jha */
7591298e5SHimanshu Jha
8591298e5SHimanshu Jha #include <linux/device.h>
9591298e5SHimanshu Jha #include <linux/kernel.h>
10591298e5SHimanshu Jha #include <linux/module.h>
11591298e5SHimanshu Jha #include <linux/spi/spi.h>
12591298e5SHimanshu Jha
13591298e5SHimanshu Jha #include <linux/iio/iio.h>
14591298e5SHimanshu Jha #include <linux/iio/imu/adis.h>
15591298e5SHimanshu Jha
16591298e5SHimanshu Jha #define ADIS16201_STARTUP_DELAY_MS 220
17591298e5SHimanshu Jha #define ADIS16201_FLASH_CNT 0x00
18591298e5SHimanshu Jha
19591298e5SHimanshu Jha /* Data Output Register Information */
20591298e5SHimanshu Jha #define ADIS16201_SUPPLY_OUT_REG 0x02
21591298e5SHimanshu Jha #define ADIS16201_XACCL_OUT_REG 0x04
22591298e5SHimanshu Jha #define ADIS16201_YACCL_OUT_REG 0x06
23591298e5SHimanshu Jha #define ADIS16201_AUX_ADC_REG 0x08
24591298e5SHimanshu Jha #define ADIS16201_TEMP_OUT_REG 0x0A
25591298e5SHimanshu Jha #define ADIS16201_XINCL_OUT_REG 0x0C
26591298e5SHimanshu Jha #define ADIS16201_YINCL_OUT_REG 0x0E
27591298e5SHimanshu Jha
28591298e5SHimanshu Jha /* Calibration Register Definition */
29591298e5SHimanshu Jha #define ADIS16201_XACCL_OFFS_REG 0x10
30591298e5SHimanshu Jha #define ADIS16201_YACCL_OFFS_REG 0x12
31591298e5SHimanshu Jha #define ADIS16201_XACCL_SCALE_REG 0x14
32591298e5SHimanshu Jha #define ADIS16201_YACCL_SCALE_REG 0x16
33591298e5SHimanshu Jha #define ADIS16201_XINCL_OFFS_REG 0x18
34591298e5SHimanshu Jha #define ADIS16201_YINCL_OFFS_REG 0x1A
35591298e5SHimanshu Jha #define ADIS16201_XINCL_SCALE_REG 0x1C
36591298e5SHimanshu Jha #define ADIS16201_YINCL_SCALE_REG 0x1E
37591298e5SHimanshu Jha
38591298e5SHimanshu Jha /* Alarm Register Definition */
39591298e5SHimanshu Jha #define ADIS16201_ALM_MAG1_REG 0x20
40591298e5SHimanshu Jha #define ADIS16201_ALM_MAG2_REG 0x22
41591298e5SHimanshu Jha #define ADIS16201_ALM_SMPL1_REG 0x24
42591298e5SHimanshu Jha #define ADIS16201_ALM_SMPL2_REG 0x26
43591298e5SHimanshu Jha #define ADIS16201_ALM_CTRL_REG 0x28
44591298e5SHimanshu Jha
45591298e5SHimanshu Jha #define ADIS16201_AUX_DAC_REG 0x30
46591298e5SHimanshu Jha #define ADIS16201_GPIO_CTRL_REG 0x32
47591298e5SHimanshu Jha #define ADIS16201_SMPL_PRD_REG 0x36
48591298e5SHimanshu Jha /* Operation, filter configuration */
49591298e5SHimanshu Jha #define ADIS16201_AVG_CNT_REG 0x38
50591298e5SHimanshu Jha #define ADIS16201_SLP_CNT_REG 0x3A
51591298e5SHimanshu Jha
52591298e5SHimanshu Jha /* Miscellaneous Control Register Definition */
53591298e5SHimanshu Jha #define ADIS16201_MSC_CTRL_REG 0x34
54591298e5SHimanshu Jha #define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8)
55591298e5SHimanshu Jha /* Data-ready enable: 1 = enabled, 0 = disabled */
56591298e5SHimanshu Jha #define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2)
57591298e5SHimanshu Jha /* Data-ready polarity: 1 = active high, 0 = active low */
58591298e5SHimanshu Jha #define ADIS16201_MSC_CTRL_ACTIVE_DATA_RDY_HIGH BIT(1)
59591298e5SHimanshu Jha /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
60591298e5SHimanshu Jha #define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
61591298e5SHimanshu Jha
62591298e5SHimanshu Jha /* Diagnostics System Status Register Definition */
63591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_REG 0x3C
64591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_ALARM2 BIT(9)
65591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_ALARM1 BIT(8)
66591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3
67591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT 2
68591298e5SHimanshu Jha /* Power supply above 3.625 V */
69591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1
7010dd571cSAlexandru Ardelean /* Power supply below 2.975 V */
71591298e5SHimanshu Jha #define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0
72591298e5SHimanshu Jha
73591298e5SHimanshu Jha /* System Command Register Definition */
74591298e5SHimanshu Jha #define ADIS16201_GLOB_CMD_REG 0x3E
75591298e5SHimanshu Jha #define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
76591298e5SHimanshu Jha #define ADIS16201_GLOB_CMD_FACTORY_RESET BIT(1)
77591298e5SHimanshu Jha
78591298e5SHimanshu Jha #define ADIS16201_ERROR_ACTIVE BIT(14)
79591298e5SHimanshu Jha
80591298e5SHimanshu Jha enum adis16201_scan {
81591298e5SHimanshu Jha ADIS16201_SCAN_ACC_X,
82591298e5SHimanshu Jha ADIS16201_SCAN_ACC_Y,
83591298e5SHimanshu Jha ADIS16201_SCAN_INCLI_X,
84591298e5SHimanshu Jha ADIS16201_SCAN_INCLI_Y,
85591298e5SHimanshu Jha ADIS16201_SCAN_SUPPLY,
86591298e5SHimanshu Jha ADIS16201_SCAN_AUX_ADC,
87591298e5SHimanshu Jha ADIS16201_SCAN_TEMP,
88591298e5SHimanshu Jha };
89591298e5SHimanshu Jha
90591298e5SHimanshu Jha static const u8 adis16201_addresses[] = {
91591298e5SHimanshu Jha [ADIS16201_SCAN_ACC_X] = ADIS16201_XACCL_OFFS_REG,
92591298e5SHimanshu Jha [ADIS16201_SCAN_ACC_Y] = ADIS16201_YACCL_OFFS_REG,
93591298e5SHimanshu Jha [ADIS16201_SCAN_INCLI_X] = ADIS16201_XINCL_OFFS_REG,
94591298e5SHimanshu Jha [ADIS16201_SCAN_INCLI_Y] = ADIS16201_YINCL_OFFS_REG,
95591298e5SHimanshu Jha };
96591298e5SHimanshu Jha
adis16201_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)97591298e5SHimanshu Jha static int adis16201_read_raw(struct iio_dev *indio_dev,
98591298e5SHimanshu Jha struct iio_chan_spec const *chan,
99591298e5SHimanshu Jha int *val, int *val2,
100591298e5SHimanshu Jha long mask)
101591298e5SHimanshu Jha {
102591298e5SHimanshu Jha struct adis *st = iio_priv(indio_dev);
103591298e5SHimanshu Jha int ret;
104591298e5SHimanshu Jha int bits;
105591298e5SHimanshu Jha u8 addr;
106591298e5SHimanshu Jha s16 val16;
107591298e5SHimanshu Jha
108591298e5SHimanshu Jha switch (mask) {
109591298e5SHimanshu Jha case IIO_CHAN_INFO_RAW:
110591298e5SHimanshu Jha return adis_single_conversion(indio_dev, chan,
111591298e5SHimanshu Jha ADIS16201_ERROR_ACTIVE, val);
112591298e5SHimanshu Jha case IIO_CHAN_INFO_SCALE:
113591298e5SHimanshu Jha switch (chan->type) {
114591298e5SHimanshu Jha case IIO_VOLTAGE:
115591298e5SHimanshu Jha if (chan->channel == 0) {
116591298e5SHimanshu Jha /* Voltage base units are mV hence 1.22 mV */
117591298e5SHimanshu Jha *val = 1;
118591298e5SHimanshu Jha *val2 = 220000;
119591298e5SHimanshu Jha } else {
120591298e5SHimanshu Jha /* Voltage base units are mV hence 0.61 mV */
121591298e5SHimanshu Jha *val = 0;
122591298e5SHimanshu Jha *val2 = 610000;
123591298e5SHimanshu Jha }
124591298e5SHimanshu Jha return IIO_VAL_INT_PLUS_MICRO;
125591298e5SHimanshu Jha case IIO_TEMP:
126591298e5SHimanshu Jha *val = -470;
127591298e5SHimanshu Jha *val2 = 0;
128591298e5SHimanshu Jha return IIO_VAL_INT_PLUS_MICRO;
129591298e5SHimanshu Jha case IIO_ACCEL:
130591298e5SHimanshu Jha /*
131591298e5SHimanshu Jha * IIO base unit for sensitivity of accelerometer
132591298e5SHimanshu Jha * is milli g.
133591298e5SHimanshu Jha * 1 LSB represents 0.244 mg.
134591298e5SHimanshu Jha */
135591298e5SHimanshu Jha *val = 0;
136591298e5SHimanshu Jha *val2 = IIO_G_TO_M_S_2(462400);
137591298e5SHimanshu Jha return IIO_VAL_INT_PLUS_NANO;
138591298e5SHimanshu Jha case IIO_INCLI:
139591298e5SHimanshu Jha *val = 0;
140591298e5SHimanshu Jha *val2 = 100000;
141591298e5SHimanshu Jha return IIO_VAL_INT_PLUS_MICRO;
142591298e5SHimanshu Jha default:
143591298e5SHimanshu Jha return -EINVAL;
144591298e5SHimanshu Jha }
145591298e5SHimanshu Jha break;
146591298e5SHimanshu Jha case IIO_CHAN_INFO_OFFSET:
147591298e5SHimanshu Jha /*
148591298e5SHimanshu Jha * The raw ADC value is 1278 when the temperature
149591298e5SHimanshu Jha * is 25 degrees and the scale factor per milli
150591298e5SHimanshu Jha * degree celcius is -470.
151591298e5SHimanshu Jha */
152591298e5SHimanshu Jha *val = 25000 / -470 - 1278;
153591298e5SHimanshu Jha return IIO_VAL_INT;
154591298e5SHimanshu Jha case IIO_CHAN_INFO_CALIBBIAS:
155591298e5SHimanshu Jha switch (chan->type) {
156591298e5SHimanshu Jha case IIO_ACCEL:
157591298e5SHimanshu Jha bits = 12;
158591298e5SHimanshu Jha break;
159591298e5SHimanshu Jha case IIO_INCLI:
160591298e5SHimanshu Jha bits = 9;
161591298e5SHimanshu Jha break;
162591298e5SHimanshu Jha default:
163591298e5SHimanshu Jha return -EINVAL;
164591298e5SHimanshu Jha }
165591298e5SHimanshu Jha addr = adis16201_addresses[chan->scan_index];
166591298e5SHimanshu Jha ret = adis_read_reg_16(st, addr, &val16);
167591298e5SHimanshu Jha if (ret)
168591298e5SHimanshu Jha return ret;
169591298e5SHimanshu Jha
170591298e5SHimanshu Jha *val = sign_extend32(val16, bits - 1);
171591298e5SHimanshu Jha return IIO_VAL_INT;
172591298e5SHimanshu Jha }
173591298e5SHimanshu Jha
174591298e5SHimanshu Jha return -EINVAL;
175591298e5SHimanshu Jha }
176591298e5SHimanshu Jha
adis16201_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)177591298e5SHimanshu Jha static int adis16201_write_raw(struct iio_dev *indio_dev,
178591298e5SHimanshu Jha struct iio_chan_spec const *chan,
179591298e5SHimanshu Jha int val,
180591298e5SHimanshu Jha int val2,
181591298e5SHimanshu Jha long mask)
182591298e5SHimanshu Jha {
183591298e5SHimanshu Jha struct adis *st = iio_priv(indio_dev);
184591298e5SHimanshu Jha int m;
185591298e5SHimanshu Jha
186591298e5SHimanshu Jha if (mask != IIO_CHAN_INFO_CALIBBIAS)
187591298e5SHimanshu Jha return -EINVAL;
188591298e5SHimanshu Jha
189591298e5SHimanshu Jha switch (chan->type) {
190591298e5SHimanshu Jha case IIO_ACCEL:
191591298e5SHimanshu Jha m = GENMASK(11, 0);
192591298e5SHimanshu Jha break;
193591298e5SHimanshu Jha case IIO_INCLI:
194591298e5SHimanshu Jha m = GENMASK(8, 0);
195591298e5SHimanshu Jha break;
196591298e5SHimanshu Jha default:
197591298e5SHimanshu Jha return -EINVAL;
198591298e5SHimanshu Jha }
199591298e5SHimanshu Jha
200591298e5SHimanshu Jha return adis_write_reg_16(st, adis16201_addresses[chan->scan_index],
201591298e5SHimanshu Jha val & m);
202591298e5SHimanshu Jha }
203591298e5SHimanshu Jha
204591298e5SHimanshu Jha static const struct iio_chan_spec adis16201_channels[] = {
205591298e5SHimanshu Jha ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT_REG, ADIS16201_SCAN_SUPPLY, 0,
206591298e5SHimanshu Jha 12),
207591298e5SHimanshu Jha ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT_REG, ADIS16201_SCAN_TEMP, 0, 12),
208591298e5SHimanshu Jha ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT_REG, ADIS16201_SCAN_ACC_X,
209591298e5SHimanshu Jha BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
210591298e5SHimanshu Jha ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT_REG, ADIS16201_SCAN_ACC_Y,
211591298e5SHimanshu Jha BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
212591298e5SHimanshu Jha ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC_REG, ADIS16201_SCAN_AUX_ADC, 0, 12),
213591298e5SHimanshu Jha ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT_REG, ADIS16201_SCAN_INCLI_X,
214591298e5SHimanshu Jha BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
2154e102429SJonathan Cameron ADIS_INCLI_CHAN(Y, ADIS16201_YINCL_OUT_REG, ADIS16201_SCAN_INCLI_Y,
216591298e5SHimanshu Jha BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
217591298e5SHimanshu Jha IIO_CHAN_SOFT_TIMESTAMP(7)
218591298e5SHimanshu Jha };
219591298e5SHimanshu Jha
220591298e5SHimanshu Jha static const struct iio_info adis16201_info = {
221591298e5SHimanshu Jha .read_raw = adis16201_read_raw,
222591298e5SHimanshu Jha .write_raw = adis16201_write_raw,
223591298e5SHimanshu Jha .update_scan_mode = adis_update_scan_mode,
224591298e5SHimanshu Jha };
225591298e5SHimanshu Jha
226591298e5SHimanshu Jha static const char * const adis16201_status_error_msgs[] = {
227591298e5SHimanshu Jha [ADIS16201_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
228591298e5SHimanshu Jha [ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
229591298e5SHimanshu Jha [ADIS16201_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
23010dd571cSAlexandru Ardelean [ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
231591298e5SHimanshu Jha };
232591298e5SHimanshu Jha
233380b107bSNuno Sá static const struct adis_timeout adis16201_timeouts = {
234380b107bSNuno Sá .reset_ms = ADIS16201_STARTUP_DELAY_MS,
235380b107bSNuno Sá .sw_reset_ms = ADIS16201_STARTUP_DELAY_MS,
236380b107bSNuno Sá .self_test_ms = ADIS16201_STARTUP_DELAY_MS,
237380b107bSNuno Sá };
238380b107bSNuno Sá
239591298e5SHimanshu Jha static const struct adis_data adis16201_data = {
240591298e5SHimanshu Jha .read_delay = 20,
241591298e5SHimanshu Jha .msc_ctrl_reg = ADIS16201_MSC_CTRL_REG,
242591298e5SHimanshu Jha .glob_cmd_reg = ADIS16201_GLOB_CMD_REG,
243591298e5SHimanshu Jha .diag_stat_reg = ADIS16201_DIAG_STAT_REG,
244591298e5SHimanshu Jha
245591298e5SHimanshu Jha .self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN,
246fdcf6bbbSNuno Sá .self_test_reg = ADIS16201_MSC_CTRL_REG,
247591298e5SHimanshu Jha .self_test_no_autoclear = true,
248380b107bSNuno Sá .timeouts = &adis16201_timeouts,
249591298e5SHimanshu Jha
250591298e5SHimanshu Jha .status_error_msgs = adis16201_status_error_msgs,
251591298e5SHimanshu Jha .status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
252591298e5SHimanshu Jha BIT(ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT) |
253591298e5SHimanshu Jha BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
254591298e5SHimanshu Jha BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
255591298e5SHimanshu Jha };
256591298e5SHimanshu Jha
adis16201_probe(struct spi_device * spi)257591298e5SHimanshu Jha static int adis16201_probe(struct spi_device *spi)
258591298e5SHimanshu Jha {
259591298e5SHimanshu Jha struct iio_dev *indio_dev;
260591298e5SHimanshu Jha struct adis *st;
261591298e5SHimanshu Jha int ret;
262591298e5SHimanshu Jha
263591298e5SHimanshu Jha indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
264591298e5SHimanshu Jha if (!indio_dev)
265591298e5SHimanshu Jha return -ENOMEM;
266591298e5SHimanshu Jha
267591298e5SHimanshu Jha st = iio_priv(indio_dev);
268591298e5SHimanshu Jha
269591298e5SHimanshu Jha indio_dev->name = spi->dev.driver->name;
270591298e5SHimanshu Jha indio_dev->info = &adis16201_info;
271591298e5SHimanshu Jha
272591298e5SHimanshu Jha indio_dev->channels = adis16201_channels;
273591298e5SHimanshu Jha indio_dev->num_channels = ARRAY_SIZE(adis16201_channels);
274591298e5SHimanshu Jha indio_dev->modes = INDIO_DIRECT_MODE;
275591298e5SHimanshu Jha
276591298e5SHimanshu Jha ret = adis_init(st, indio_dev, spi, &adis16201_data);
277591298e5SHimanshu Jha if (ret)
278591298e5SHimanshu Jha return ret;
279591298e5SHimanshu Jha
280b79a22eeSNuno Sá ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
281591298e5SHimanshu Jha if (ret)
282591298e5SHimanshu Jha return ret;
283591298e5SHimanshu Jha
284*594ff4c4SRamona Bolboaca ret = __adis_initial_startup(st);
285591298e5SHimanshu Jha if (ret)
286591298e5SHimanshu Jha return ret;
287591298e5SHimanshu Jha
288b79a22eeSNuno Sá return devm_iio_device_register(&spi->dev, indio_dev);
289591298e5SHimanshu Jha }
290591298e5SHimanshu Jha
291591298e5SHimanshu Jha static struct spi_driver adis16201_driver = {
292591298e5SHimanshu Jha .driver = {
293591298e5SHimanshu Jha .name = "adis16201",
294591298e5SHimanshu Jha },
295591298e5SHimanshu Jha .probe = adis16201_probe,
296591298e5SHimanshu Jha };
297591298e5SHimanshu Jha module_spi_driver(adis16201_driver);
298591298e5SHimanshu Jha
299591298e5SHimanshu Jha MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
300591298e5SHimanshu Jha MODULE_DESCRIPTION("Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer");
301591298e5SHimanshu Jha MODULE_LICENSE("GPL v2");
302591298e5SHimanshu Jha MODULE_ALIAS("spi:adis16201");
3036c9304d6SJonathan Cameron MODULE_IMPORT_NS(IIO_ADISLIB);
304