1 /* 2 * drivers/i2c/i2c-ibm_iic.h 3 * 4 * Support for the IIC peripheral on IBM PPC 4xx 5 * 6 * Copyright (c) 2003 Zultys Technologies. 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 8 * 9 * Based on original work by 10 * Ian DaSilva <idasilva@mvista.com> 11 * Armin Kuster <akuster@mvista.com> 12 * Matt Porter <mporter@mvista.com> 13 * 14 * Copyright 2000-2003 MontaVista Software Inc. 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the 18 * Free Software Foundation; either version 2 of the License, or (at your 19 * option) any later version. 20 * 21 */ 22 #ifndef __I2C_IBM_IIC_H_ 23 #define __I2C_IBM_IIC_H_ 24 25 #include <linux/config.h> 26 #include <linux/i2c.h> 27 28 struct iic_regs { 29 u16 mdbuf; 30 u16 sbbuf; 31 u8 lmadr; 32 u8 hmadr; 33 u8 cntl; 34 u8 mdcntl; 35 u8 sts; 36 u8 extsts; 37 u8 lsadr; 38 u8 hsadr; 39 u8 clkdiv; 40 u8 intmsk; 41 u8 xfrcnt; 42 u8 xtcntlss; 43 u8 directcntl; 44 }; 45 46 struct ibm_iic_private { 47 struct i2c_adapter adap; 48 volatile struct iic_regs __iomem *vaddr; 49 wait_queue_head_t wq; 50 int idx; 51 int irq; 52 int fast_mode; 53 u8 clckdiv; 54 }; 55 56 /* IICx_CNTL register */ 57 #define CNTL_HMT 0x80 58 #define CNTL_AMD 0x40 59 #define CNTL_TCT_MASK 0x30 60 #define CNTL_TCT_SHIFT 4 61 #define CNTL_RPST 0x08 62 #define CNTL_CHT 0x04 63 #define CNTL_RW 0x02 64 #define CNTL_PT 0x01 65 66 /* IICx_MDCNTL register */ 67 #define MDCNTL_FSDB 0x80 68 #define MDCNTL_FMDB 0x40 69 #define MDCNTL_EGC 0x20 70 #define MDCNTL_FSM 0x10 71 #define MDCNTL_ESM 0x08 72 #define MDCNTL_EINT 0x04 73 #define MDCNTL_EUBS 0x02 74 #define MDCNTL_HSCL 0x01 75 76 /* IICx_STS register */ 77 #define STS_SSS 0x80 78 #define STS_SLPR 0x40 79 #define STS_MDBS 0x20 80 #define STS_MDBF 0x10 81 #define STS_SCMP 0x08 82 #define STS_ERR 0x04 83 #define STS_IRQA 0x02 84 #define STS_PT 0x01 85 86 /* IICx_EXTSTS register */ 87 #define EXTSTS_IRQP 0x80 88 #define EXTSTS_BCS_MASK 0x70 89 #define EXTSTS_BCS_FREE 0x40 90 #define EXTSTS_IRQD 0x08 91 #define EXTSTS_LA 0x04 92 #define EXTSTS_ICT 0x02 93 #define EXTSTS_XFRA 0x01 94 95 /* IICx_INTRMSK register */ 96 #define INTRMSK_EIRC 0x80 97 #define INTRMSK_EIRS 0x40 98 #define INTRMSK_EIWC 0x20 99 #define INTRMSK_EIWS 0x10 100 #define INTRMSK_EIHE 0x08 101 #define INTRMSK_EIIC 0x04 102 #define INTRMSK_EITA 0x02 103 #define INTRMSK_EIMTC 0x01 104 105 /* IICx_XFRCNT register */ 106 #define XFRCNT_MTC_MASK 0x07 107 108 /* IICx_XTCNTLSS register */ 109 #define XTCNTLSS_SRC 0x80 110 #define XTCNTLSS_SRS 0x40 111 #define XTCNTLSS_SWC 0x20 112 #define XTCNTLSS_SWS 0x10 113 #define XTCNTLSS_SRST 0x01 114 115 /* IICx_DIRECTCNTL register */ 116 #define DIRCNTL_SDAC 0x08 117 #define DIRCNTL_SCC 0x04 118 #define DIRCNTL_MSDA 0x02 119 #define DIRCNTL_MSC 0x01 120 121 /* Check if we really control the I2C bus and bus is free */ 122 #define DIRCTNL_FREE(v) (((v) & 0x0f) == 0x0f) 123 124 #endif /* __I2C_IBM_IIC_H_ */ 125