1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 21da177e4SLinus Torvalds /* 3f30c2269SUwe Zeisberger * drivers/i2c/busses/i2c-ibm_iic.h 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Support for the IIC peripheral on IBM PPC 4xx 61da177e4SLinus Torvalds * 71da177e4SLinus Torvalds * Copyright (c) 2003 Zultys Technologies. 81da177e4SLinus Torvalds * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * Based on original work by 111da177e4SLinus Torvalds * Ian DaSilva <idasilva@mvista.com> 121da177e4SLinus Torvalds * Armin Kuster <akuster@mvista.com> 131da177e4SLinus Torvalds * Matt Porter <mporter@mvista.com> 141da177e4SLinus Torvalds * 151da177e4SLinus Torvalds * Copyright 2000-2003 MontaVista Software Inc. 161da177e4SLinus Torvalds */ 171da177e4SLinus Torvalds #ifndef __I2C_IBM_IIC_H_ 181da177e4SLinus Torvalds #define __I2C_IBM_IIC_H_ 191da177e4SLinus Torvalds 201da177e4SLinus Torvalds #include <linux/i2c.h> 211da177e4SLinus Torvalds 221da177e4SLinus Torvalds struct iic_regs { 231da177e4SLinus Torvalds u16 mdbuf; 241da177e4SLinus Torvalds u16 sbbuf; 251da177e4SLinus Torvalds u8 lmadr; 261da177e4SLinus Torvalds u8 hmadr; 271da177e4SLinus Torvalds u8 cntl; 281da177e4SLinus Torvalds u8 mdcntl; 291da177e4SLinus Torvalds u8 sts; 301da177e4SLinus Torvalds u8 extsts; 311da177e4SLinus Torvalds u8 lsadr; 321da177e4SLinus Torvalds u8 hsadr; 331da177e4SLinus Torvalds u8 clkdiv; 341da177e4SLinus Torvalds u8 intmsk; 351da177e4SLinus Torvalds u8 xfrcnt; 361da177e4SLinus Torvalds u8 xtcntlss; 371da177e4SLinus Torvalds u8 directcntl; 381da177e4SLinus Torvalds }; 391da177e4SLinus Torvalds 401da177e4SLinus Torvalds struct ibm_iic_private { 411da177e4SLinus Torvalds struct i2c_adapter adap; 421da177e4SLinus Torvalds volatile struct iic_regs __iomem *vaddr; 431da177e4SLinus Torvalds wait_queue_head_t wq; 441da177e4SLinus Torvalds int idx; 451da177e4SLinus Torvalds int irq; 461da177e4SLinus Torvalds int fast_mode; 471da177e4SLinus Torvalds u8 clckdiv; 481da177e4SLinus Torvalds }; 491da177e4SLinus Torvalds 501da177e4SLinus Torvalds /* IICx_CNTL register */ 511da177e4SLinus Torvalds #define CNTL_HMT 0x80 521da177e4SLinus Torvalds #define CNTL_AMD 0x40 531da177e4SLinus Torvalds #define CNTL_TCT_MASK 0x30 541da177e4SLinus Torvalds #define CNTL_TCT_SHIFT 4 551da177e4SLinus Torvalds #define CNTL_RPST 0x08 561da177e4SLinus Torvalds #define CNTL_CHT 0x04 571da177e4SLinus Torvalds #define CNTL_RW 0x02 581da177e4SLinus Torvalds #define CNTL_PT 0x01 591da177e4SLinus Torvalds 601da177e4SLinus Torvalds /* IICx_MDCNTL register */ 611da177e4SLinus Torvalds #define MDCNTL_FSDB 0x80 621da177e4SLinus Torvalds #define MDCNTL_FMDB 0x40 631da177e4SLinus Torvalds #define MDCNTL_EGC 0x20 641da177e4SLinus Torvalds #define MDCNTL_FSM 0x10 651da177e4SLinus Torvalds #define MDCNTL_ESM 0x08 661da177e4SLinus Torvalds #define MDCNTL_EINT 0x04 671da177e4SLinus Torvalds #define MDCNTL_EUBS 0x02 681da177e4SLinus Torvalds #define MDCNTL_HSCL 0x01 691da177e4SLinus Torvalds 701da177e4SLinus Torvalds /* IICx_STS register */ 711da177e4SLinus Torvalds #define STS_SSS 0x80 721da177e4SLinus Torvalds #define STS_SLPR 0x40 731da177e4SLinus Torvalds #define STS_MDBS 0x20 741da177e4SLinus Torvalds #define STS_MDBF 0x10 751da177e4SLinus Torvalds #define STS_SCMP 0x08 761da177e4SLinus Torvalds #define STS_ERR 0x04 771da177e4SLinus Torvalds #define STS_IRQA 0x02 781da177e4SLinus Torvalds #define STS_PT 0x01 791da177e4SLinus Torvalds 801da177e4SLinus Torvalds /* IICx_EXTSTS register */ 811da177e4SLinus Torvalds #define EXTSTS_IRQP 0x80 821da177e4SLinus Torvalds #define EXTSTS_BCS_MASK 0x70 831da177e4SLinus Torvalds #define EXTSTS_BCS_FREE 0x40 841da177e4SLinus Torvalds #define EXTSTS_IRQD 0x08 851da177e4SLinus Torvalds #define EXTSTS_LA 0x04 861da177e4SLinus Torvalds #define EXTSTS_ICT 0x02 871da177e4SLinus Torvalds #define EXTSTS_XFRA 0x01 881da177e4SLinus Torvalds 891da177e4SLinus Torvalds /* IICx_INTRMSK register */ 901da177e4SLinus Torvalds #define INTRMSK_EIRC 0x80 911da177e4SLinus Torvalds #define INTRMSK_EIRS 0x40 921da177e4SLinus Torvalds #define INTRMSK_EIWC 0x20 931da177e4SLinus Torvalds #define INTRMSK_EIWS 0x10 941da177e4SLinus Torvalds #define INTRMSK_EIHE 0x08 951da177e4SLinus Torvalds #define INTRMSK_EIIC 0x04 961da177e4SLinus Torvalds #define INTRMSK_EITA 0x02 971da177e4SLinus Torvalds #define INTRMSK_EIMTC 0x01 981da177e4SLinus Torvalds 991da177e4SLinus Torvalds /* IICx_XFRCNT register */ 1001da177e4SLinus Torvalds #define XFRCNT_MTC_MASK 0x07 1011da177e4SLinus Torvalds 1021da177e4SLinus Torvalds /* IICx_XTCNTLSS register */ 1031da177e4SLinus Torvalds #define XTCNTLSS_SRC 0x80 1041da177e4SLinus Torvalds #define XTCNTLSS_SRS 0x40 1051da177e4SLinus Torvalds #define XTCNTLSS_SWC 0x20 1061da177e4SLinus Torvalds #define XTCNTLSS_SWS 0x10 1071da177e4SLinus Torvalds #define XTCNTLSS_SRST 0x01 1081da177e4SLinus Torvalds 1091da177e4SLinus Torvalds /* IICx_DIRECTCNTL register */ 1101da177e4SLinus Torvalds #define DIRCNTL_SDAC 0x08 1111da177e4SLinus Torvalds #define DIRCNTL_SCC 0x04 1121da177e4SLinus Torvalds #define DIRCNTL_MSDA 0x02 1131da177e4SLinus Torvalds #define DIRCNTL_MSC 0x01 1141da177e4SLinus Torvalds 1151da177e4SLinus Torvalds /* Check if we really control the I2C bus and bus is free */ 1161da177e4SLinus Torvalds #define DIRCTNL_FREE(v) (((v) & 0x0f) == 0x0f) 1171da177e4SLinus Torvalds 1181da177e4SLinus Torvalds #endif /* __I2C_IBM_IIC_H_ */ 119