1 /* 2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 /* 24 Supports following chips: 25 26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 27 as99127f 7 3 0 3 0x31 0x12c3 yes no 28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no 29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes 30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC) 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes 32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no 33 34 */ 35 36 #include <linux/module.h> 37 #include <linux/init.h> 38 #include <linux/slab.h> 39 #include <linux/jiffies.h> 40 #include <linux/i2c.h> 41 #include <linux/i2c-isa.h> 42 #include <linux/i2c-sensor.h> 43 #include <linux/i2c-vid.h> 44 #include <linux/hwmon.h> 45 #include <linux/err.h> 46 #include <asm/io.h> 47 #include "lm75.h" 48 49 /* Addresses to scan */ 50 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 51 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 52 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; 53 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END }; 54 55 /* Insmod parameters */ 56 SENSORS_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f); 57 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " 58 "{bus, clientaddr, subclientaddr1, subclientaddr2}"); 59 60 static int init = 1; 61 module_param(init, bool, 0); 62 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 63 64 /* Constants specified below */ 65 66 /* Length of ISA address segment */ 67 #define W83781D_EXTENT 8 68 69 /* Where are the ISA address/data registers relative to the base address */ 70 #define W83781D_ADDR_REG_OFFSET 5 71 #define W83781D_DATA_REG_OFFSET 6 72 73 /* The W83781D registers */ 74 /* The W83782D registers for nr=7,8 are in bank 5 */ 75 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 76 (0x554 + (((nr) - 7) * 2))) 77 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 78 (0x555 + (((nr) - 7) * 2))) 79 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 80 (0x550 + (nr) - 7)) 81 82 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) 83 #define W83781D_REG_FAN(nr) (0x27 + (nr)) 84 85 #define W83781D_REG_BANK 0x4E 86 #define W83781D_REG_TEMP2_CONFIG 0x152 87 #define W83781D_REG_TEMP3_CONFIG 0x252 88 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 89 ((nr == 2) ? (0x0150) : \ 90 (0x27))) 91 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 92 ((nr == 2) ? (0x153) : \ 93 (0x3A))) 94 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 95 ((nr == 2) ? (0x155) : \ 96 (0x39))) 97 98 #define W83781D_REG_CONFIG 0x40 99 #define W83781D_REG_ALARM1 0x41 100 #define W83781D_REG_ALARM2 0x42 101 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */ 102 103 #define W83781D_REG_IRQ 0x4C 104 #define W83781D_REG_BEEP_CONFIG 0x4D 105 #define W83781D_REG_BEEP_INTS1 0x56 106 #define W83781D_REG_BEEP_INTS2 0x57 107 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ 108 109 #define W83781D_REG_VID_FANDIV 0x47 110 111 #define W83781D_REG_CHIPID 0x49 112 #define W83781D_REG_WCHIPID 0x58 113 #define W83781D_REG_CHIPMAN 0x4F 114 #define W83781D_REG_PIN 0x4B 115 116 /* 782D/783S only */ 117 #define W83781D_REG_VBAT 0x5D 118 119 /* PWM 782D (1-4) and 783S (1-2) only */ 120 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */ 121 /* on which is which; */ 122 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */ 123 /* However 782d is probably wrong. */ 124 #define W83781D_REG_PWM3 0x5E 125 #define W83781D_REG_PWM4 0x5F 126 #define W83781D_REG_PWMCLK12 0x5C 127 #define W83781D_REG_PWMCLK34 0x45C 128 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2, 129 W83781D_REG_PWM3, W83781D_REG_PWM4 130 }; 131 132 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1]) 133 134 #define W83781D_REG_I2C_ADDR 0x48 135 #define W83781D_REG_I2C_SUBADDR 0x4A 136 137 /* The following are undocumented in the data sheets however we 138 received the information in an email from Winbond tech support */ 139 /* Sensor selection - not on 781d */ 140 #define W83781D_REG_SCFG1 0x5D 141 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 142 143 #define W83781D_REG_SCFG2 0x59 144 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 145 146 #define W83781D_DEFAULT_BETA 3435 147 148 /* RT Table registers */ 149 #define W83781D_REG_RT_IDX 0x50 150 #define W83781D_REG_RT_VAL 0x51 151 152 /* Conversions. Rounding and limit checking is only done on the TO_REG 153 variants. Note that you should be a bit careful with which arguments 154 these macros are called: arguments may be evaluated more than once. 155 Fixing this is just not worth it. */ 156 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255)) 157 #define IN_FROM_REG(val) (((val) * 16) / 10) 158 159 static inline u8 160 FAN_TO_REG(long rpm, int div) 161 { 162 if (rpm == 0) 163 return 255; 164 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 165 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 166 } 167 168 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ 169 ((val) == 255 ? 0 : \ 170 1350000 / ((val) * (div)))) 171 172 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \ 173 : (val)) / 1000, 0, 0xff)) 174 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) 175 176 #define PWM_FROM_REG(val) (val) 177 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) 178 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ 179 (val) ^ 0x7fff : (val)) 180 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ 181 (~(val)) & 0x7fff : (val) & 0xffffff) 182 183 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0) 184 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0) 185 186 #define DIV_FROM_REG(val) (1 << (val)) 187 188 static inline u8 189 DIV_TO_REG(long val, enum chips type) 190 { 191 int i; 192 val = SENSORS_LIMIT(val, 1, 193 ((type == w83781d 194 || type == as99127f) ? 8 : 128)) >> 1; 195 for (i = 0; i < 7; i++) { 196 if (val == 0) 197 break; 198 val >>= 1; 199 } 200 return ((u8) i); 201 } 202 203 /* There are some complications in a module like this. First off, W83781D chips 204 may be both present on the SMBus and the ISA bus, and we have to handle 205 those cases separately at some places. Second, there might be several 206 W83781D chips available (well, actually, that is probably never done; but 207 it is a clean illustration of how to handle a case like that). Finally, 208 a specific chip may be attached to *both* ISA and SMBus, and we would 209 not like to detect it double. Fortunately, in the case of the W83781D at 210 least, a register tells us what SMBus address we are on, so that helps 211 a bit - except if there could be more than one SMBus. Groan. No solution 212 for this yet. */ 213 214 /* This module may seem overly long and complicated. In fact, it is not so 215 bad. Quite a lot of bookkeeping is done. A real driver can often cut 216 some corners. */ 217 218 /* For each registered W83781D, we need to keep some data in memory. That 219 data is pointed to by w83781d_list[NR]->data. The structure itself is 220 dynamically allocated, at the same time when a new w83781d client is 221 allocated. */ 222 struct w83781d_data { 223 struct i2c_client client; 224 struct class_device *class_dev; 225 struct semaphore lock; 226 enum chips type; 227 228 struct semaphore update_lock; 229 char valid; /* !=0 if following fields are valid */ 230 unsigned long last_updated; /* In jiffies */ 231 232 struct i2c_client *lm75[2]; /* for secondary I2C addresses */ 233 /* array of 2 pointers to subclients */ 234 235 u8 in[9]; /* Register value - 8 & 9 for 782D only */ 236 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ 237 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ 238 u8 fan[3]; /* Register value */ 239 u8 fan_min[3]; /* Register value */ 240 u8 temp; 241 u8 temp_max; /* Register value */ 242 u8 temp_max_hyst; /* Register value */ 243 u16 temp_add[2]; /* Register value */ 244 u16 temp_max_add[2]; /* Register value */ 245 u16 temp_max_hyst_add[2]; /* Register value */ 246 u8 fan_div[3]; /* Register encoding, shifted right */ 247 u8 vid; /* Register encoding, combined */ 248 u32 alarms; /* Register encoding, combined */ 249 u32 beep_mask; /* Register encoding, combined */ 250 u8 beep_enable; /* Boolean */ 251 u8 pwm[4]; /* Register value */ 252 u8 pwmenable[4]; /* Boolean */ 253 u16 sens[3]; /* 782D/783S only. 254 1 = pentium diode; 2 = 3904 diode; 255 3000-5000 = thermistor beta. 256 Default = 3435. 257 Other Betas unimplemented */ 258 u8 vrm; 259 }; 260 261 static int w83781d_attach_adapter(struct i2c_adapter *adapter); 262 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); 263 static int w83781d_detach_client(struct i2c_client *client); 264 265 static int w83781d_read_value(struct i2c_client *client, u16 register); 266 static int w83781d_write_value(struct i2c_client *client, u16 register, 267 u16 value); 268 static struct w83781d_data *w83781d_update_device(struct device *dev); 269 static void w83781d_init_client(struct i2c_client *client); 270 271 static struct i2c_driver w83781d_driver = { 272 .owner = THIS_MODULE, 273 .name = "w83781d", 274 .id = I2C_DRIVERID_W83781D, 275 .flags = I2C_DF_NOTIFY, 276 .attach_adapter = w83781d_attach_adapter, 277 .detach_client = w83781d_detach_client, 278 }; 279 280 static struct i2c_driver w83781d_isa_driver = { 281 .owner = THIS_MODULE, 282 .name = "w83781d-isa", 283 .attach_adapter = w83781d_attach_adapter, 284 .detach_client = w83781d_detach_client, 285 }; 286 287 288 /* following are the sysfs callback functions */ 289 #define show_in_reg(reg) \ 290 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 291 { \ 292 struct w83781d_data *data = w83781d_update_device(dev); \ 293 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \ 294 } 295 show_in_reg(in); 296 show_in_reg(in_min); 297 show_in_reg(in_max); 298 299 #define store_in_reg(REG, reg) \ 300 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 301 { \ 302 struct i2c_client *client = to_i2c_client(dev); \ 303 struct w83781d_data *data = i2c_get_clientdata(client); \ 304 u32 val; \ 305 \ 306 val = simple_strtoul(buf, NULL, 10) / 10; \ 307 \ 308 down(&data->update_lock); \ 309 data->in_##reg[nr] = IN_TO_REG(val); \ 310 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ 311 \ 312 up(&data->update_lock); \ 313 return count; \ 314 } 315 store_in_reg(MIN, min); 316 store_in_reg(MAX, max); 317 318 #define sysfs_in_offset(offset) \ 319 static ssize_t \ 320 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 321 { \ 322 return show_in(dev, buf, offset); \ 323 } \ 324 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); 325 326 #define sysfs_in_reg_offset(reg, offset) \ 327 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 328 { \ 329 return show_in_##reg (dev, buf, offset); \ 330 } \ 331 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 332 { \ 333 return store_in_##reg (dev, buf, count, offset); \ 334 } \ 335 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset); 336 337 #define sysfs_in_offsets(offset) \ 338 sysfs_in_offset(offset); \ 339 sysfs_in_reg_offset(min, offset); \ 340 sysfs_in_reg_offset(max, offset); 341 342 sysfs_in_offsets(0); 343 sysfs_in_offsets(1); 344 sysfs_in_offsets(2); 345 sysfs_in_offsets(3); 346 sysfs_in_offsets(4); 347 sysfs_in_offsets(5); 348 sysfs_in_offsets(6); 349 sysfs_in_offsets(7); 350 sysfs_in_offsets(8); 351 352 #define device_create_file_in(client, offset) \ 353 do { \ 354 device_create_file(&client->dev, &dev_attr_in##offset##_input); \ 355 device_create_file(&client->dev, &dev_attr_in##offset##_min); \ 356 device_create_file(&client->dev, &dev_attr_in##offset##_max); \ 357 } while (0) 358 359 #define show_fan_reg(reg) \ 360 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 361 { \ 362 struct w83781d_data *data = w83781d_update_device(dev); \ 363 return sprintf(buf,"%ld\n", \ 364 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ 365 } 366 show_fan_reg(fan); 367 show_fan_reg(fan_min); 368 369 static ssize_t 370 store_fan_min(struct device *dev, const char *buf, size_t count, int nr) 371 { 372 struct i2c_client *client = to_i2c_client(dev); 373 struct w83781d_data *data = i2c_get_clientdata(client); 374 u32 val; 375 376 val = simple_strtoul(buf, NULL, 10); 377 378 down(&data->update_lock); 379 data->fan_min[nr - 1] = 380 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); 381 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), 382 data->fan_min[nr - 1]); 383 384 up(&data->update_lock); 385 return count; 386 } 387 388 #define sysfs_fan_offset(offset) \ 389 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 390 { \ 391 return show_fan(dev, buf, offset); \ 392 } \ 393 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); 394 395 #define sysfs_fan_min_offset(offset) \ 396 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 397 { \ 398 return show_fan_min(dev, buf, offset); \ 399 } \ 400 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 401 { \ 402 return store_fan_min(dev, buf, count, offset); \ 403 } \ 404 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset); 405 406 sysfs_fan_offset(1); 407 sysfs_fan_min_offset(1); 408 sysfs_fan_offset(2); 409 sysfs_fan_min_offset(2); 410 sysfs_fan_offset(3); 411 sysfs_fan_min_offset(3); 412 413 #define device_create_file_fan(client, offset) \ 414 do { \ 415 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ 416 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ 417 } while (0) 418 419 #define show_temp_reg(reg) \ 420 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 421 { \ 422 struct w83781d_data *data = w83781d_update_device(dev); \ 423 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 424 return sprintf(buf,"%d\n", \ 425 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 426 } else { /* TEMP1 */ \ 427 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 428 } \ 429 } 430 show_temp_reg(temp); 431 show_temp_reg(temp_max); 432 show_temp_reg(temp_max_hyst); 433 434 #define store_temp_reg(REG, reg) \ 435 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 436 { \ 437 struct i2c_client *client = to_i2c_client(dev); \ 438 struct w83781d_data *data = i2c_get_clientdata(client); \ 439 s32 val; \ 440 \ 441 val = simple_strtol(buf, NULL, 10); \ 442 \ 443 down(&data->update_lock); \ 444 \ 445 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 446 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 447 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 448 data->temp_##reg##_add[nr-2]); \ 449 } else { /* TEMP1 */ \ 450 data->temp_##reg = TEMP_TO_REG(val); \ 451 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 452 data->temp_##reg); \ 453 } \ 454 \ 455 up(&data->update_lock); \ 456 return count; \ 457 } 458 store_temp_reg(OVER, max); 459 store_temp_reg(HYST, max_hyst); 460 461 #define sysfs_temp_offset(offset) \ 462 static ssize_t \ 463 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 464 { \ 465 return show_temp(dev, buf, offset); \ 466 } \ 467 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); 468 469 #define sysfs_temp_reg_offset(reg, offset) \ 470 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 471 { \ 472 return show_temp_##reg (dev, buf, offset); \ 473 } \ 474 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 475 { \ 476 return store_temp_##reg (dev, buf, count, offset); \ 477 } \ 478 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); 479 480 #define sysfs_temp_offsets(offset) \ 481 sysfs_temp_offset(offset); \ 482 sysfs_temp_reg_offset(max, offset); \ 483 sysfs_temp_reg_offset(max_hyst, offset); 484 485 sysfs_temp_offsets(1); 486 sysfs_temp_offsets(2); 487 sysfs_temp_offsets(3); 488 489 #define device_create_file_temp(client, offset) \ 490 do { \ 491 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ 492 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ 493 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ 494 } while (0) 495 496 static ssize_t 497 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 498 { 499 struct w83781d_data *data = w83781d_update_device(dev); 500 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 501 } 502 503 static 504 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 505 #define device_create_file_vid(client) \ 506 device_create_file(&client->dev, &dev_attr_cpu0_vid); 507 static ssize_t 508 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 509 { 510 struct w83781d_data *data = w83781d_update_device(dev); 511 return sprintf(buf, "%ld\n", (long) data->vrm); 512 } 513 514 static ssize_t 515 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 516 { 517 struct i2c_client *client = to_i2c_client(dev); 518 struct w83781d_data *data = i2c_get_clientdata(client); 519 u32 val; 520 521 val = simple_strtoul(buf, NULL, 10); 522 data->vrm = val; 523 524 return count; 525 } 526 527 static 528 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 529 #define device_create_file_vrm(client) \ 530 device_create_file(&client->dev, &dev_attr_vrm); 531 static ssize_t 532 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 533 { 534 struct w83781d_data *data = w83781d_update_device(dev); 535 return sprintf(buf, "%u\n", data->alarms); 536 } 537 538 static 539 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 540 #define device_create_file_alarms(client) \ 541 device_create_file(&client->dev, &dev_attr_alarms); 542 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) 543 { 544 struct w83781d_data *data = w83781d_update_device(dev); 545 return sprintf(buf, "%ld\n", 546 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); 547 } 548 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf) 549 { 550 struct w83781d_data *data = w83781d_update_device(dev); 551 return sprintf(buf, "%ld\n", 552 (long)BEEP_ENABLE_FROM_REG(data->beep_enable)); 553 } 554 555 #define BEEP_ENABLE 0 /* Store beep_enable */ 556 #define BEEP_MASK 1 /* Store beep_mask */ 557 558 static ssize_t 559 store_beep_reg(struct device *dev, const char *buf, size_t count, 560 int update_mask) 561 { 562 struct i2c_client *client = to_i2c_client(dev); 563 struct w83781d_data *data = i2c_get_clientdata(client); 564 u32 val, val2; 565 566 val = simple_strtoul(buf, NULL, 10); 567 568 down(&data->update_lock); 569 570 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ 571 data->beep_mask = BEEP_MASK_TO_REG(val, data->type); 572 w83781d_write_value(client, W83781D_REG_BEEP_INTS1, 573 data->beep_mask & 0xff); 574 575 if ((data->type != w83781d) && (data->type != as99127f)) { 576 w83781d_write_value(client, W83781D_REG_BEEP_INTS3, 577 ((data->beep_mask) >> 16) & 0xff); 578 } 579 580 val2 = (data->beep_mask >> 8) & 0x7f; 581 } else { /* We are storing beep_enable */ 582 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; 583 data->beep_enable = BEEP_ENABLE_TO_REG(val); 584 } 585 586 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 587 val2 | data->beep_enable << 7); 588 589 up(&data->update_lock); 590 return count; 591 } 592 593 #define sysfs_beep(REG, reg) \ 594 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 595 { \ 596 return show_beep_##reg(dev, attr, buf); \ 597 } \ 598 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 599 { \ 600 return store_beep_reg(dev, buf, count, BEEP_##REG); \ 601 } \ 602 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg); 603 604 sysfs_beep(ENABLE, enable); 605 sysfs_beep(MASK, mask); 606 607 #define device_create_file_beep(client) \ 608 do { \ 609 device_create_file(&client->dev, &dev_attr_beep_enable); \ 610 device_create_file(&client->dev, &dev_attr_beep_mask); \ 611 } while (0) 612 613 static ssize_t 614 show_fan_div_reg(struct device *dev, char *buf, int nr) 615 { 616 struct w83781d_data *data = w83781d_update_device(dev); 617 return sprintf(buf, "%ld\n", 618 (long) DIV_FROM_REG(data->fan_div[nr - 1])); 619 } 620 621 /* Note: we save and restore the fan minimum here, because its value is 622 determined in part by the fan divisor. This follows the principle of 623 least suprise; the user doesn't expect the fan minimum to change just 624 because the divisor changed. */ 625 static ssize_t 626 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) 627 { 628 struct i2c_client *client = to_i2c_client(dev); 629 struct w83781d_data *data = i2c_get_clientdata(client); 630 unsigned long min; 631 u8 reg; 632 unsigned long val = simple_strtoul(buf, NULL, 10); 633 634 down(&data->update_lock); 635 636 /* Save fan_min */ 637 min = FAN_FROM_REG(data->fan_min[nr], 638 DIV_FROM_REG(data->fan_div[nr])); 639 640 data->fan_div[nr] = DIV_TO_REG(val, data->type); 641 642 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 643 & (nr==0 ? 0xcf : 0x3f)) 644 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 645 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 646 647 /* w83781d and as99127f don't have extended divisor bits */ 648 if (data->type != w83781d && data->type != as99127f) { 649 reg = (w83781d_read_value(client, W83781D_REG_VBAT) 650 & ~(1 << (5 + nr))) 651 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 652 w83781d_write_value(client, W83781D_REG_VBAT, reg); 653 } 654 655 /* Restore fan_min */ 656 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 657 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); 658 659 up(&data->update_lock); 660 return count; 661 } 662 663 #define sysfs_fan_div(offset) \ 664 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 665 { \ 666 return show_fan_div_reg(dev, buf, offset); \ 667 } \ 668 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 669 { \ 670 return store_fan_div_reg(dev, buf, count, offset - 1); \ 671 } \ 672 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset); 673 674 sysfs_fan_div(1); 675 sysfs_fan_div(2); 676 sysfs_fan_div(3); 677 678 #define device_create_file_fan_div(client, offset) \ 679 do { \ 680 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ 681 } while (0) 682 683 static ssize_t 684 show_pwm_reg(struct device *dev, char *buf, int nr) 685 { 686 struct w83781d_data *data = w83781d_update_device(dev); 687 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1])); 688 } 689 690 static ssize_t 691 show_pwmenable_reg(struct device *dev, char *buf, int nr) 692 { 693 struct w83781d_data *data = w83781d_update_device(dev); 694 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]); 695 } 696 697 static ssize_t 698 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) 699 { 700 struct i2c_client *client = to_i2c_client(dev); 701 struct w83781d_data *data = i2c_get_clientdata(client); 702 u32 val; 703 704 val = simple_strtoul(buf, NULL, 10); 705 706 down(&data->update_lock); 707 data->pwm[nr - 1] = PWM_TO_REG(val); 708 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); 709 up(&data->update_lock); 710 return count; 711 } 712 713 static ssize_t 714 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) 715 { 716 struct i2c_client *client = to_i2c_client(dev); 717 struct w83781d_data *data = i2c_get_clientdata(client); 718 u32 val, reg; 719 720 val = simple_strtoul(buf, NULL, 10); 721 722 down(&data->update_lock); 723 724 switch (val) { 725 case 0: 726 case 1: 727 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); 728 w83781d_write_value(client, W83781D_REG_PWMCLK12, 729 (reg & 0xf7) | (val << 3)); 730 731 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); 732 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, 733 (reg & 0xef) | (!val << 4)); 734 735 data->pwmenable[nr - 1] = val; 736 break; 737 738 default: 739 up(&data->update_lock); 740 return -EINVAL; 741 } 742 743 up(&data->update_lock); 744 return count; 745 } 746 747 #define sysfs_pwm(offset) \ 748 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 749 { \ 750 return show_pwm_reg(dev, buf, offset); \ 751 } \ 752 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \ 753 const char *buf, size_t count) \ 754 { \ 755 return store_pwm_reg(dev, buf, count, offset); \ 756 } \ 757 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ 758 show_regs_pwm_##offset, store_regs_pwm_##offset); 759 760 #define sysfs_pwmenable(offset) \ 761 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 762 { \ 763 return show_pwmenable_reg(dev, buf, offset); \ 764 } \ 765 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \ 766 const char *buf, size_t count) \ 767 { \ 768 return store_pwmenable_reg(dev, buf, count, offset); \ 769 } \ 770 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \ 771 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset); 772 773 sysfs_pwm(1); 774 sysfs_pwm(2); 775 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */ 776 sysfs_pwm(3); 777 sysfs_pwm(4); 778 779 #define device_create_file_pwm(client, offset) \ 780 do { \ 781 device_create_file(&client->dev, &dev_attr_pwm##offset); \ 782 } while (0) 783 784 #define device_create_file_pwmenable(client, offset) \ 785 do { \ 786 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \ 787 } while (0) 788 789 static ssize_t 790 show_sensor_reg(struct device *dev, char *buf, int nr) 791 { 792 struct w83781d_data *data = w83781d_update_device(dev); 793 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); 794 } 795 796 static ssize_t 797 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) 798 { 799 struct i2c_client *client = to_i2c_client(dev); 800 struct w83781d_data *data = i2c_get_clientdata(client); 801 u32 val, tmp; 802 803 val = simple_strtoul(buf, NULL, 10); 804 805 down(&data->update_lock); 806 807 switch (val) { 808 case 1: /* PII/Celeron diode */ 809 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 810 w83781d_write_value(client, W83781D_REG_SCFG1, 811 tmp | BIT_SCFG1[nr - 1]); 812 tmp = w83781d_read_value(client, W83781D_REG_SCFG2); 813 w83781d_write_value(client, W83781D_REG_SCFG2, 814 tmp | BIT_SCFG2[nr - 1]); 815 data->sens[nr - 1] = val; 816 break; 817 case 2: /* 3904 */ 818 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 819 w83781d_write_value(client, W83781D_REG_SCFG1, 820 tmp | BIT_SCFG1[nr - 1]); 821 tmp = w83781d_read_value(client, W83781D_REG_SCFG2); 822 w83781d_write_value(client, W83781D_REG_SCFG2, 823 tmp & ~BIT_SCFG2[nr - 1]); 824 data->sens[nr - 1] = val; 825 break; 826 case W83781D_DEFAULT_BETA: /* thermistor */ 827 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 828 w83781d_write_value(client, W83781D_REG_SCFG1, 829 tmp & ~BIT_SCFG1[nr - 1]); 830 data->sens[nr - 1] = val; 831 break; 832 default: 833 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n", 834 (long) val, W83781D_DEFAULT_BETA); 835 break; 836 } 837 838 up(&data->update_lock); 839 return count; 840 } 841 842 #define sysfs_sensor(offset) \ 843 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 844 { \ 845 return show_sensor_reg(dev, buf, offset); \ 846 } \ 847 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 848 { \ 849 return store_sensor_reg(dev, buf, count, offset); \ 850 } \ 851 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset); 852 853 sysfs_sensor(1); 854 sysfs_sensor(2); 855 sysfs_sensor(3); 856 857 #define device_create_file_sensor(client, offset) \ 858 do { \ 859 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ 860 } while (0) 861 862 /* This function is called when: 863 * w83781d_driver is inserted (when this module is loaded), for each 864 available adapter 865 * when a new adapter is inserted (and w83781d_driver is still present) */ 866 static int 867 w83781d_attach_adapter(struct i2c_adapter *adapter) 868 { 869 if (!(adapter->class & I2C_CLASS_HWMON)) 870 return 0; 871 return i2c_detect(adapter, &addr_data, w83781d_detect); 872 } 873 874 /* Assumes that adapter is of I2C, not ISA variety. 875 * OTHERWISE DON'T CALL THIS 876 */ 877 static int 878 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, 879 struct i2c_client *new_client) 880 { 881 int i, val1 = 0, id; 882 int err; 883 const char *client_name = ""; 884 struct w83781d_data *data = i2c_get_clientdata(new_client); 885 886 data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); 887 if (!(data->lm75[0])) { 888 err = -ENOMEM; 889 goto ERROR_SC_0; 890 } 891 memset(data->lm75[0], 0x00, sizeof (struct i2c_client)); 892 893 id = i2c_adapter_id(adapter); 894 895 if (force_subclients[0] == id && force_subclients[1] == address) { 896 for (i = 2; i <= 3; i++) { 897 if (force_subclients[i] < 0x48 || 898 force_subclients[i] > 0x4f) { 899 dev_err(&new_client->dev, "Invalid subclient " 900 "address %d; must be 0x48-0x4f\n", 901 force_subclients[i]); 902 err = -EINVAL; 903 goto ERROR_SC_1; 904 } 905 } 906 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, 907 (force_subclients[2] & 0x07) | 908 ((force_subclients[3] & 0x07) << 4)); 909 data->lm75[0]->addr = force_subclients[2]; 910 } else { 911 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); 912 data->lm75[0]->addr = 0x48 + (val1 & 0x07); 913 } 914 915 if (kind != w83783s) { 916 917 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); 918 if (!(data->lm75[1])) { 919 err = -ENOMEM; 920 goto ERROR_SC_1; 921 } 922 memset(data->lm75[1], 0x0, sizeof(struct i2c_client)); 923 924 if (force_subclients[0] == id && 925 force_subclients[1] == address) { 926 data->lm75[1]->addr = force_subclients[3]; 927 } else { 928 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); 929 } 930 if (data->lm75[0]->addr == data->lm75[1]->addr) { 931 dev_err(&new_client->dev, 932 "Duplicate addresses 0x%x for subclients.\n", 933 data->lm75[0]->addr); 934 err = -EBUSY; 935 goto ERROR_SC_2; 936 } 937 } 938 939 if (kind == w83781d) 940 client_name = "w83781d subclient"; 941 else if (kind == w83782d) 942 client_name = "w83782d subclient"; 943 else if (kind == w83783s) 944 client_name = "w83783s subclient"; 945 else if (kind == w83627hf) 946 client_name = "w83627hf subclient"; 947 else if (kind == as99127f) 948 client_name = "as99127f subclient"; 949 950 for (i = 0; i <= 1; i++) { 951 /* store all data in w83781d */ 952 i2c_set_clientdata(data->lm75[i], NULL); 953 data->lm75[i]->adapter = adapter; 954 data->lm75[i]->driver = &w83781d_driver; 955 data->lm75[i]->flags = 0; 956 strlcpy(data->lm75[i]->name, client_name, 957 I2C_NAME_SIZE); 958 if ((err = i2c_attach_client(data->lm75[i]))) { 959 dev_err(&new_client->dev, "Subclient %d " 960 "registration at address 0x%x " 961 "failed.\n", i, data->lm75[i]->addr); 962 if (i == 1) 963 goto ERROR_SC_3; 964 goto ERROR_SC_2; 965 } 966 if (kind == w83783s) 967 break; 968 } 969 970 return 0; 971 972 /* Undo inits in case of errors */ 973 ERROR_SC_3: 974 i2c_detach_client(data->lm75[0]); 975 ERROR_SC_2: 976 if (data->lm75[1]) 977 kfree(data->lm75[1]); 978 ERROR_SC_1: 979 if (data->lm75[0]) 980 kfree(data->lm75[0]); 981 ERROR_SC_0: 982 return err; 983 } 984 985 static int 986 w83781d_detect(struct i2c_adapter *adapter, int address, int kind) 987 { 988 int i = 0, val1 = 0, val2; 989 struct i2c_client *new_client; 990 struct w83781d_data *data; 991 int err; 992 const char *client_name = ""; 993 int is_isa = i2c_is_isa_adapter(adapter); 994 enum vendor { winbond, asus } vendid; 995 996 if (!is_isa 997 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 998 err = -EINVAL; 999 goto ERROR0; 1000 } 1001 1002 /* Prevent users from forcing a kind for a bus it isn't supposed 1003 to possibly be on */ 1004 if (is_isa && (kind == as99127f || kind == w83783s)) { 1005 dev_err(&adapter->dev, 1006 "Cannot force I2C-only chip for ISA address 0x%02x.\n", 1007 address); 1008 err = -EINVAL; 1009 goto ERROR0; 1010 } 1011 1012 if (is_isa) 1013 if (!request_region(address, W83781D_EXTENT, 1014 w83781d_isa_driver.name)) { 1015 dev_dbg(&adapter->dev, "Request of region " 1016 "0x%x-0x%x for w83781d failed\n", address, 1017 address + W83781D_EXTENT - 1); 1018 err = -EBUSY; 1019 goto ERROR0; 1020 } 1021 1022 /* Probe whether there is anything available on this address. Already 1023 done for SMBus clients */ 1024 if (kind < 0) { 1025 if (is_isa) { 1026 1027 #define REALLY_SLOW_IO 1028 /* We need the timeouts for at least some LM78-like 1029 chips. But only if we read 'undefined' registers. */ 1030 i = inb_p(address + 1); 1031 if (inb_p(address + 2) != i 1032 || inb_p(address + 3) != i 1033 || inb_p(address + 7) != i) { 1034 dev_dbg(&adapter->dev, "Detection of w83781d " 1035 "chip failed at step 1\n"); 1036 err = -ENODEV; 1037 goto ERROR1; 1038 } 1039 #undef REALLY_SLOW_IO 1040 1041 /* Let's just hope nothing breaks here */ 1042 i = inb_p(address + 5) & 0x7f; 1043 outb_p(~i & 0x7f, address + 5); 1044 val2 = inb_p(address + 5) & 0x7f; 1045 if (val2 != (~i & 0x7f)) { 1046 outb_p(i, address + 5); 1047 dev_dbg(&adapter->dev, "Detection of w83781d " 1048 "chip failed at step 2 (0x%x != " 1049 "0x%x at 0x%x)\n", val2, ~i & 0x7f, 1050 address + 5); 1051 err = -ENODEV; 1052 goto ERROR1; 1053 } 1054 } 1055 } 1056 1057 /* OK. For now, we presume we have a valid client. We now create the 1058 client structure, even though we cannot fill it completely yet. 1059 But it allows us to access w83781d_{read,write}_value. */ 1060 1061 if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { 1062 err = -ENOMEM; 1063 goto ERROR1; 1064 } 1065 memset(data, 0, sizeof(struct w83781d_data)); 1066 1067 new_client = &data->client; 1068 i2c_set_clientdata(new_client, data); 1069 new_client->addr = address; 1070 init_MUTEX(&data->lock); 1071 new_client->adapter = adapter; 1072 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver; 1073 new_client->flags = 0; 1074 1075 /* Now, we do the remaining detection. */ 1076 1077 /* The w8378?d may be stuck in some other bank than bank 0. This may 1078 make reading other information impossible. Specify a force=... or 1079 force_*=... parameter, and the Winbond will be reset to the right 1080 bank. */ 1081 if (kind < 0) { 1082 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) { 1083 dev_dbg(&new_client->dev, "Detection failed at step " 1084 "3\n"); 1085 err = -ENODEV; 1086 goto ERROR2; 1087 } 1088 val1 = w83781d_read_value(new_client, W83781D_REG_BANK); 1089 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); 1090 /* Check for Winbond or Asus ID if in bank 0 */ 1091 if ((!(val1 & 0x07)) && 1092 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) 1093 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { 1094 dev_dbg(&new_client->dev, "Detection failed at step " 1095 "4\n"); 1096 err = -ENODEV; 1097 goto ERROR2; 1098 } 1099 /* If Winbond SMBus, check address at 0x48. 1100 Asus doesn't support, except for as99127f rev.2 */ 1101 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) || 1102 ((val1 & 0x80) && (val2 == 0x5c)))) { 1103 if (w83781d_read_value 1104 (new_client, W83781D_REG_I2C_ADDR) != address) { 1105 dev_dbg(&new_client->dev, "Detection failed " 1106 "at step 5\n"); 1107 err = -ENODEV; 1108 goto ERROR2; 1109 } 1110 } 1111 } 1112 1113 /* We have either had a force parameter, or we have already detected the 1114 Winbond. Put it now into bank 0 and Vendor ID High Byte */ 1115 w83781d_write_value(new_client, W83781D_REG_BANK, 1116 (w83781d_read_value(new_client, 1117 W83781D_REG_BANK) & 0x78) | 1118 0x80); 1119 1120 /* Determine the chip type. */ 1121 if (kind <= 0) { 1122 /* get vendor ID */ 1123 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); 1124 if (val2 == 0x5c) 1125 vendid = winbond; 1126 else if (val2 == 0x12) 1127 vendid = asus; 1128 else { 1129 dev_dbg(&new_client->dev, "Chip was made by neither " 1130 "Winbond nor Asus?\n"); 1131 err = -ENODEV; 1132 goto ERROR2; 1133 } 1134 1135 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID); 1136 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) 1137 kind = w83781d; 1138 else if (val1 == 0x30 && vendid == winbond) 1139 kind = w83782d; 1140 else if (val1 == 0x40 && vendid == winbond && !is_isa 1141 && address == 0x2d) 1142 kind = w83783s; 1143 else if (val1 == 0x21 && vendid == winbond) 1144 kind = w83627hf; 1145 else if (val1 == 0x31 && !is_isa && address >= 0x28) 1146 kind = as99127f; 1147 else { 1148 if (kind == 0) 1149 dev_warn(&new_client->dev, "Ignoring 'force' " 1150 "parameter for unknown chip at " 1151 "adapter %d, address 0x%02x\n", 1152 i2c_adapter_id(adapter), address); 1153 err = -EINVAL; 1154 goto ERROR2; 1155 } 1156 } 1157 1158 if (kind == w83781d) { 1159 client_name = "w83781d"; 1160 } else if (kind == w83782d) { 1161 client_name = "w83782d"; 1162 } else if (kind == w83783s) { 1163 client_name = "w83783s"; 1164 } else if (kind == w83627hf) { 1165 client_name = "w83627hf"; 1166 } else if (kind == as99127f) { 1167 client_name = "as99127f"; 1168 } 1169 1170 /* Fill in the remaining client fields and put into the global list */ 1171 strlcpy(new_client->name, client_name, I2C_NAME_SIZE); 1172 data->type = kind; 1173 1174 data->valid = 0; 1175 init_MUTEX(&data->update_lock); 1176 1177 /* Tell the I2C layer a new client has arrived */ 1178 if ((err = i2c_attach_client(new_client))) 1179 goto ERROR2; 1180 1181 /* attach secondary i2c lm75-like clients */ 1182 if (!is_isa) { 1183 if ((err = w83781d_detect_subclients(adapter, address, 1184 kind, new_client))) 1185 goto ERROR3; 1186 } else { 1187 data->lm75[0] = NULL; 1188 data->lm75[1] = NULL; 1189 } 1190 1191 /* Initialize the chip */ 1192 w83781d_init_client(new_client); 1193 1194 /* A few vars need to be filled upon startup */ 1195 for (i = 1; i <= 3; i++) { 1196 data->fan_min[i - 1] = w83781d_read_value(new_client, 1197 W83781D_REG_FAN_MIN(i)); 1198 } 1199 if (kind != w83781d && kind != as99127f) 1200 for (i = 0; i < 4; i++) 1201 data->pwmenable[i] = 1; 1202 1203 /* Register sysfs hooks */ 1204 data->class_dev = hwmon_device_register(&new_client->dev); 1205 if (IS_ERR(data->class_dev)) { 1206 err = PTR_ERR(data->class_dev); 1207 goto ERROR4; 1208 } 1209 1210 device_create_file_in(new_client, 0); 1211 if (kind != w83783s) 1212 device_create_file_in(new_client, 1); 1213 device_create_file_in(new_client, 2); 1214 device_create_file_in(new_client, 3); 1215 device_create_file_in(new_client, 4); 1216 device_create_file_in(new_client, 5); 1217 device_create_file_in(new_client, 6); 1218 if (kind != as99127f && kind != w83781d && kind != w83783s) { 1219 device_create_file_in(new_client, 7); 1220 device_create_file_in(new_client, 8); 1221 } 1222 1223 device_create_file_fan(new_client, 1); 1224 device_create_file_fan(new_client, 2); 1225 device_create_file_fan(new_client, 3); 1226 1227 device_create_file_temp(new_client, 1); 1228 device_create_file_temp(new_client, 2); 1229 if (kind != w83783s) 1230 device_create_file_temp(new_client, 3); 1231 1232 device_create_file_vid(new_client); 1233 device_create_file_vrm(new_client); 1234 1235 device_create_file_fan_div(new_client, 1); 1236 device_create_file_fan_div(new_client, 2); 1237 device_create_file_fan_div(new_client, 3); 1238 1239 device_create_file_alarms(new_client); 1240 1241 device_create_file_beep(new_client); 1242 1243 if (kind != w83781d && kind != as99127f) { 1244 device_create_file_pwm(new_client, 1); 1245 device_create_file_pwm(new_client, 2); 1246 device_create_file_pwmenable(new_client, 2); 1247 } 1248 if (kind == w83782d && !is_isa) { 1249 device_create_file_pwm(new_client, 3); 1250 device_create_file_pwm(new_client, 4); 1251 } 1252 1253 if (kind != as99127f && kind != w83781d) { 1254 device_create_file_sensor(new_client, 1); 1255 device_create_file_sensor(new_client, 2); 1256 if (kind != w83783s) 1257 device_create_file_sensor(new_client, 3); 1258 } 1259 1260 return 0; 1261 1262 ERROR4: 1263 if (data->lm75[1]) { 1264 i2c_detach_client(data->lm75[1]); 1265 kfree(data->lm75[1]); 1266 } 1267 if (data->lm75[0]) { 1268 i2c_detach_client(data->lm75[0]); 1269 kfree(data->lm75[0]); 1270 } 1271 ERROR3: 1272 i2c_detach_client(new_client); 1273 ERROR2: 1274 kfree(data); 1275 ERROR1: 1276 if (is_isa) 1277 release_region(address, W83781D_EXTENT); 1278 ERROR0: 1279 return err; 1280 } 1281 1282 static int 1283 w83781d_detach_client(struct i2c_client *client) 1284 { 1285 struct w83781d_data *data = i2c_get_clientdata(client); 1286 int err; 1287 1288 /* main client */ 1289 if (data) 1290 hwmon_device_unregister(data->class_dev); 1291 1292 if (i2c_is_isa_client(client)) 1293 release_region(client->addr, W83781D_EXTENT); 1294 1295 if ((err = i2c_detach_client(client))) { 1296 dev_err(&client->dev, 1297 "Client deregistration failed, client not detached.\n"); 1298 return err; 1299 } 1300 1301 /* main client */ 1302 if (data) 1303 kfree(data); 1304 1305 /* subclient */ 1306 else 1307 kfree(client); 1308 1309 return 0; 1310 } 1311 1312 /* The SMBus locks itself, usually, but nothing may access the Winbond between 1313 bank switches. ISA access must always be locked explicitly! 1314 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1315 would slow down the W83781D access and should not be necessary. 1316 There are some ugly typecasts here, but the good news is - they should 1317 nowhere else be necessary! */ 1318 static int 1319 w83781d_read_value(struct i2c_client *client, u16 reg) 1320 { 1321 struct w83781d_data *data = i2c_get_clientdata(client); 1322 int res, word_sized, bank; 1323 struct i2c_client *cl; 1324 1325 down(&data->lock); 1326 if (i2c_is_isa_client(client)) { 1327 word_sized = (((reg & 0xff00) == 0x100) 1328 || ((reg & 0xff00) == 0x200)) 1329 && (((reg & 0x00ff) == 0x50) 1330 || ((reg & 0x00ff) == 0x53) 1331 || ((reg & 0x00ff) == 0x55)); 1332 if (reg & 0xff00) { 1333 outb_p(W83781D_REG_BANK, 1334 client->addr + W83781D_ADDR_REG_OFFSET); 1335 outb_p(reg >> 8, 1336 client->addr + W83781D_DATA_REG_OFFSET); 1337 } 1338 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1339 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); 1340 if (word_sized) { 1341 outb_p((reg & 0xff) + 1, 1342 client->addr + W83781D_ADDR_REG_OFFSET); 1343 res = 1344 (res << 8) + inb_p(client->addr + 1345 W83781D_DATA_REG_OFFSET); 1346 } 1347 if (reg & 0xff00) { 1348 outb_p(W83781D_REG_BANK, 1349 client->addr + W83781D_ADDR_REG_OFFSET); 1350 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1351 } 1352 } else { 1353 bank = (reg >> 8) & 0x0f; 1354 if (bank > 2) 1355 /* switch banks */ 1356 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1357 bank); 1358 if (bank == 0 || bank > 2) { 1359 res = i2c_smbus_read_byte_data(client, reg & 0xff); 1360 } else { 1361 /* switch to subclient */ 1362 cl = data->lm75[bank - 1]; 1363 /* convert from ISA to LM75 I2C addresses */ 1364 switch (reg & 0xff) { 1365 case 0x50: /* TEMP */ 1366 res = swab16(i2c_smbus_read_word_data(cl, 0)); 1367 break; 1368 case 0x52: /* CONFIG */ 1369 res = i2c_smbus_read_byte_data(cl, 1); 1370 break; 1371 case 0x53: /* HYST */ 1372 res = swab16(i2c_smbus_read_word_data(cl, 2)); 1373 break; 1374 case 0x55: /* OVER */ 1375 default: 1376 res = swab16(i2c_smbus_read_word_data(cl, 3)); 1377 break; 1378 } 1379 } 1380 if (bank > 2) 1381 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1382 } 1383 up(&data->lock); 1384 return res; 1385 } 1386 1387 static int 1388 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) 1389 { 1390 struct w83781d_data *data = i2c_get_clientdata(client); 1391 int word_sized, bank; 1392 struct i2c_client *cl; 1393 1394 down(&data->lock); 1395 if (i2c_is_isa_client(client)) { 1396 word_sized = (((reg & 0xff00) == 0x100) 1397 || ((reg & 0xff00) == 0x200)) 1398 && (((reg & 0x00ff) == 0x53) 1399 || ((reg & 0x00ff) == 0x55)); 1400 if (reg & 0xff00) { 1401 outb_p(W83781D_REG_BANK, 1402 client->addr + W83781D_ADDR_REG_OFFSET); 1403 outb_p(reg >> 8, 1404 client->addr + W83781D_DATA_REG_OFFSET); 1405 } 1406 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1407 if (word_sized) { 1408 outb_p(value >> 8, 1409 client->addr + W83781D_DATA_REG_OFFSET); 1410 outb_p((reg & 0xff) + 1, 1411 client->addr + W83781D_ADDR_REG_OFFSET); 1412 } 1413 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET); 1414 if (reg & 0xff00) { 1415 outb_p(W83781D_REG_BANK, 1416 client->addr + W83781D_ADDR_REG_OFFSET); 1417 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1418 } 1419 } else { 1420 bank = (reg >> 8) & 0x0f; 1421 if (bank > 2) 1422 /* switch banks */ 1423 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1424 bank); 1425 if (bank == 0 || bank > 2) { 1426 i2c_smbus_write_byte_data(client, reg & 0xff, 1427 value & 0xff); 1428 } else { 1429 /* switch to subclient */ 1430 cl = data->lm75[bank - 1]; 1431 /* convert from ISA to LM75 I2C addresses */ 1432 switch (reg & 0xff) { 1433 case 0x52: /* CONFIG */ 1434 i2c_smbus_write_byte_data(cl, 1, value & 0xff); 1435 break; 1436 case 0x53: /* HYST */ 1437 i2c_smbus_write_word_data(cl, 2, swab16(value)); 1438 break; 1439 case 0x55: /* OVER */ 1440 i2c_smbus_write_word_data(cl, 3, swab16(value)); 1441 break; 1442 } 1443 } 1444 if (bank > 2) 1445 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1446 } 1447 up(&data->lock); 1448 return 0; 1449 } 1450 1451 /* Called when we have found a new W83781D. It should set limits, etc. */ 1452 static void 1453 w83781d_init_client(struct i2c_client *client) 1454 { 1455 struct w83781d_data *data = i2c_get_clientdata(client); 1456 int i, p; 1457 int type = data->type; 1458 u8 tmp; 1459 1460 if (init && type != as99127f) { /* this resets registers we don't have 1461 documentation for on the as99127f */ 1462 /* save these registers */ 1463 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); 1464 p = w83781d_read_value(client, W83781D_REG_PWMCLK12); 1465 /* Reset all except Watchdog values and last conversion values 1466 This sets fan-divs to 2, among others */ 1467 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); 1468 /* Restore the registers and disable power-on abnormal beep. 1469 This saves FAN 1/2/3 input/output values set by BIOS. */ 1470 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); 1471 w83781d_write_value(client, W83781D_REG_PWMCLK12, p); 1472 /* Disable master beep-enable (reset turns it on). 1473 Individual beep_mask should be reset to off but for some reason 1474 disabling this bit helps some people not get beeped */ 1475 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); 1476 } 1477 1478 data->vrm = i2c_which_vrm(); 1479 1480 if ((type != w83781d) && (type != as99127f)) { 1481 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 1482 for (i = 1; i <= 3; i++) { 1483 if (!(tmp & BIT_SCFG1[i - 1])) { 1484 data->sens[i - 1] = W83781D_DEFAULT_BETA; 1485 } else { 1486 if (w83781d_read_value 1487 (client, 1488 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1489 data->sens[i - 1] = 1; 1490 else 1491 data->sens[i - 1] = 2; 1492 } 1493 if (type == w83783s && i == 2) 1494 break; 1495 } 1496 } 1497 1498 if (init && type != as99127f) { 1499 /* Enable temp2 */ 1500 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); 1501 if (tmp & 0x01) { 1502 dev_warn(&client->dev, "Enabling temp2, readings " 1503 "might not make sense\n"); 1504 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 1505 tmp & 0xfe); 1506 } 1507 1508 /* Enable temp3 */ 1509 if (type != w83783s) { 1510 tmp = w83781d_read_value(client, 1511 W83781D_REG_TEMP3_CONFIG); 1512 if (tmp & 0x01) { 1513 dev_warn(&client->dev, "Enabling temp3, " 1514 "readings might not make sense\n"); 1515 w83781d_write_value(client, 1516 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1517 } 1518 } 1519 1520 if (type != w83781d) { 1521 /* enable comparator mode for temp2 and temp3 so 1522 alarm indication will work correctly */ 1523 i = w83781d_read_value(client, W83781D_REG_IRQ); 1524 if (!(i & 0x40)) 1525 w83781d_write_value(client, W83781D_REG_IRQ, 1526 i | 0x40); 1527 } 1528 } 1529 1530 /* Start monitoring */ 1531 w83781d_write_value(client, W83781D_REG_CONFIG, 1532 (w83781d_read_value(client, 1533 W83781D_REG_CONFIG) & 0xf7) 1534 | 0x01); 1535 } 1536 1537 static struct w83781d_data *w83781d_update_device(struct device *dev) 1538 { 1539 struct i2c_client *client = to_i2c_client(dev); 1540 struct w83781d_data *data = i2c_get_clientdata(client); 1541 int i; 1542 1543 down(&data->update_lock); 1544 1545 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1546 || !data->valid) { 1547 dev_dbg(dev, "Starting device update\n"); 1548 1549 for (i = 0; i <= 8; i++) { 1550 if (data->type == w83783s && i == 1) 1551 continue; /* 783S has no in1 */ 1552 data->in[i] = 1553 w83781d_read_value(client, W83781D_REG_IN(i)); 1554 data->in_min[i] = 1555 w83781d_read_value(client, W83781D_REG_IN_MIN(i)); 1556 data->in_max[i] = 1557 w83781d_read_value(client, W83781D_REG_IN_MAX(i)); 1558 if ((data->type != w83782d) 1559 && (data->type != w83627hf) && (i == 6)) 1560 break; 1561 } 1562 for (i = 1; i <= 3; i++) { 1563 data->fan[i - 1] = 1564 w83781d_read_value(client, W83781D_REG_FAN(i)); 1565 data->fan_min[i - 1] = 1566 w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); 1567 } 1568 if (data->type != w83781d && data->type != as99127f) { 1569 for (i = 1; i <= 4; i++) { 1570 data->pwm[i - 1] = 1571 w83781d_read_value(client, 1572 W83781D_REG_PWM(i)); 1573 if ((data->type != w83782d 1574 || i2c_is_isa_client(client)) 1575 && i == 2) 1576 break; 1577 } 1578 /* Only PWM2 can be disabled */ 1579 data->pwmenable[1] = (w83781d_read_value(client, 1580 W83781D_REG_PWMCLK12) & 0x08) >> 3; 1581 } 1582 1583 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); 1584 data->temp_max = 1585 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); 1586 data->temp_max_hyst = 1587 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); 1588 data->temp_add[0] = 1589 w83781d_read_value(client, W83781D_REG_TEMP(2)); 1590 data->temp_max_add[0] = 1591 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); 1592 data->temp_max_hyst_add[0] = 1593 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); 1594 if (data->type != w83783s) { 1595 data->temp_add[1] = 1596 w83781d_read_value(client, W83781D_REG_TEMP(3)); 1597 data->temp_max_add[1] = 1598 w83781d_read_value(client, 1599 W83781D_REG_TEMP_OVER(3)); 1600 data->temp_max_hyst_add[1] = 1601 w83781d_read_value(client, 1602 W83781D_REG_TEMP_HYST(3)); 1603 } 1604 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); 1605 data->vid = i & 0x0f; 1606 data->vid |= (w83781d_read_value(client, 1607 W83781D_REG_CHIPID) & 0x01) << 4; 1608 data->fan_div[0] = (i >> 4) & 0x03; 1609 data->fan_div[1] = (i >> 6) & 0x03; 1610 data->fan_div[2] = (w83781d_read_value(client, 1611 W83781D_REG_PIN) >> 6) & 0x03; 1612 if ((data->type != w83781d) && (data->type != as99127f)) { 1613 i = w83781d_read_value(client, W83781D_REG_VBAT); 1614 data->fan_div[0] |= (i >> 3) & 0x04; 1615 data->fan_div[1] |= (i >> 4) & 0x04; 1616 data->fan_div[2] |= (i >> 5) & 0x04; 1617 } 1618 data->alarms = 1619 w83781d_read_value(client, 1620 W83781D_REG_ALARM1) + 1621 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8); 1622 if ((data->type == w83782d) || (data->type == w83627hf)) { 1623 data->alarms |= 1624 w83781d_read_value(client, 1625 W83781D_REG_ALARM3) << 16; 1626 } 1627 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); 1628 data->beep_enable = i >> 7; 1629 data->beep_mask = ((i & 0x7f) << 8) + 1630 w83781d_read_value(client, W83781D_REG_BEEP_INTS1); 1631 if ((data->type != w83781d) && (data->type != as99127f)) { 1632 data->beep_mask |= 1633 w83781d_read_value(client, 1634 W83781D_REG_BEEP_INTS3) << 16; 1635 } 1636 data->last_updated = jiffies; 1637 data->valid = 1; 1638 } 1639 1640 up(&data->update_lock); 1641 1642 return data; 1643 } 1644 1645 static int __init 1646 sensors_w83781d_init(void) 1647 { 1648 int res; 1649 1650 res = i2c_add_driver(&w83781d_driver); 1651 if (res) 1652 return res; 1653 1654 res = i2c_isa_add_driver(&w83781d_isa_driver); 1655 if (res) { 1656 i2c_del_driver(&w83781d_driver); 1657 return res; 1658 } 1659 1660 return 0; 1661 } 1662 1663 static void __exit 1664 sensors_w83781d_exit(void) 1665 { 1666 i2c_isa_del_driver(&w83781d_isa_driver); 1667 i2c_del_driver(&w83781d_driver); 1668 } 1669 1670 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 1671 "Philip Edelbrock <phil@netroedge.com>, " 1672 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 1673 MODULE_DESCRIPTION("W83781D driver"); 1674 MODULE_LICENSE("GPL"); 1675 1676 module_init(sensors_w83781d_init); 1677 module_exit(sensors_w83781d_exit); 1678