xref: /openbmc/linux/drivers/hwmon/sparx5-temp.c (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1e4922176SLars Povlsen // SPDX-License-Identifier: GPL-2.0-or-later
2e4922176SLars Povlsen /* Sparx5 SoC temperature sensor driver
3e4922176SLars Povlsen  *
4e4922176SLars Povlsen  * Copyright (C) 2020 Lars Povlsen <lars.povlsen@microchip.com>
5e4922176SLars Povlsen  */
6e4922176SLars Povlsen 
7e4922176SLars Povlsen #include <linux/bitfield.h>
8e4922176SLars Povlsen #include <linux/clk.h>
9e4922176SLars Povlsen #include <linux/hwmon.h>
10e4922176SLars Povlsen #include <linux/init.h>
11e4922176SLars Povlsen #include <linux/io.h>
12e4922176SLars Povlsen #include <linux/mod_devicetable.h>
13e4922176SLars Povlsen #include <linux/module.h>
14e4922176SLars Povlsen #include <linux/platform_device.h>
15e4922176SLars Povlsen 
16e4922176SLars Povlsen #define TEMP_CTRL		0
17e4922176SLars Povlsen #define TEMP_CFG		4
18e4922176SLars Povlsen #define  TEMP_CFG_CYCLES	GENMASK(24, 15)
19e4922176SLars Povlsen #define  TEMP_CFG_ENA		BIT(0)
20e4922176SLars Povlsen #define TEMP_STAT		8
21e4922176SLars Povlsen #define  TEMP_STAT_VALID	BIT(12)
22e4922176SLars Povlsen #define  TEMP_STAT_TEMP		GENMASK(11, 0)
23e4922176SLars Povlsen 
24e4922176SLars Povlsen struct s5_hwmon {
25e4922176SLars Povlsen 	void __iomem *base;
26e4922176SLars Povlsen 	struct clk *clk;
27e4922176SLars Povlsen };
28e4922176SLars Povlsen 
s5_temp_enable(struct s5_hwmon * hwmon)29e4922176SLars Povlsen static void s5_temp_enable(struct s5_hwmon *hwmon)
30e4922176SLars Povlsen {
31e4922176SLars Povlsen 	u32 val = readl(hwmon->base + TEMP_CFG);
32e4922176SLars Povlsen 	u32 clk = clk_get_rate(hwmon->clk) / USEC_PER_SEC;
33e4922176SLars Povlsen 
34e4922176SLars Povlsen 	val &= ~TEMP_CFG_CYCLES;
35e4922176SLars Povlsen 	val |= FIELD_PREP(TEMP_CFG_CYCLES, clk);
36e4922176SLars Povlsen 	val |= TEMP_CFG_ENA;
37e4922176SLars Povlsen 
38e4922176SLars Povlsen 	writel(val, hwmon->base + TEMP_CFG);
39e4922176SLars Povlsen }
40e4922176SLars Povlsen 
s5_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)41e4922176SLars Povlsen static int s5_read(struct device *dev, enum hwmon_sensor_types type,
42e4922176SLars Povlsen 		   u32 attr, int channel, long *temp)
43e4922176SLars Povlsen {
44e4922176SLars Povlsen 	struct s5_hwmon *hwmon = dev_get_drvdata(dev);
45e4922176SLars Povlsen 	int rc = 0, value;
46e4922176SLars Povlsen 	u32 stat;
47e4922176SLars Povlsen 
48e4922176SLars Povlsen 	switch (attr) {
49e4922176SLars Povlsen 	case hwmon_temp_input:
50e4922176SLars Povlsen 		stat = readl_relaxed(hwmon->base + TEMP_STAT);
51e4922176SLars Povlsen 		if (!(stat & TEMP_STAT_VALID))
52fcb575bfSLars Povlsen 			return -EAGAIN;
53e4922176SLars Povlsen 		value = stat & TEMP_STAT_TEMP;
54e4922176SLars Povlsen 		/*
55e4922176SLars Povlsen 		 * From register documentation:
56e4922176SLars Povlsen 		 * Temp(C) = TEMP_SENSOR_STAT.TEMP / 4096 * 352.2 - 109.4
57e4922176SLars Povlsen 		 */
58e4922176SLars Povlsen 		value = DIV_ROUND_CLOSEST(value * 3522, 4096) - 1094;
59e4922176SLars Povlsen 		/*
60e4922176SLars Povlsen 		 * Scale down by 10 from above and multiply by 1000 to
61e4922176SLars Povlsen 		 * have millidegrees as specified by the hwmon sysfs
62e4922176SLars Povlsen 		 * interface.
63e4922176SLars Povlsen 		 */
64e4922176SLars Povlsen 		value *= 100;
65e4922176SLars Povlsen 		*temp = value;
66e4922176SLars Povlsen 		break;
67e4922176SLars Povlsen 	default:
68e4922176SLars Povlsen 		rc = -EOPNOTSUPP;
69e4922176SLars Povlsen 		break;
70e4922176SLars Povlsen 	}
71e4922176SLars Povlsen 
72e4922176SLars Povlsen 	return rc;
73e4922176SLars Povlsen }
74e4922176SLars Povlsen 
s5_is_visible(const void * _data,enum hwmon_sensor_types type,u32 attr,int channel)75e4922176SLars Povlsen static umode_t s5_is_visible(const void *_data, enum hwmon_sensor_types type,
76e4922176SLars Povlsen 			     u32 attr, int channel)
77e4922176SLars Povlsen {
78e4922176SLars Povlsen 	if (type != hwmon_temp)
79e4922176SLars Povlsen 		return 0;
80e4922176SLars Povlsen 
81e4922176SLars Povlsen 	switch (attr) {
82e4922176SLars Povlsen 	case hwmon_temp_input:
83e4922176SLars Povlsen 		return 0444;
84e4922176SLars Povlsen 	default:
85e4922176SLars Povlsen 		return 0;
86e4922176SLars Povlsen 	}
87e4922176SLars Povlsen }
88e4922176SLars Povlsen 
89*dc881144SKrzysztof Kozlowski static const struct hwmon_channel_info * const s5_info[] = {
90e4922176SLars Povlsen 	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
91e4922176SLars Povlsen 	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
92e4922176SLars Povlsen 	NULL
93e4922176SLars Povlsen };
94e4922176SLars Povlsen 
95e4922176SLars Povlsen static const struct hwmon_ops s5_hwmon_ops = {
96e4922176SLars Povlsen 	.is_visible = s5_is_visible,
97e4922176SLars Povlsen 	.read = s5_read,
98e4922176SLars Povlsen };
99e4922176SLars Povlsen 
100e4922176SLars Povlsen static const struct hwmon_chip_info s5_chip_info = {
101e4922176SLars Povlsen 	.ops = &s5_hwmon_ops,
102e4922176SLars Povlsen 	.info = s5_info,
103e4922176SLars Povlsen };
104e4922176SLars Povlsen 
s5_temp_probe(struct platform_device * pdev)105e4922176SLars Povlsen static int s5_temp_probe(struct platform_device *pdev)
106e4922176SLars Povlsen {
107e4922176SLars Povlsen 	struct device *hwmon_dev;
108e4922176SLars Povlsen 	struct s5_hwmon *hwmon;
109e4922176SLars Povlsen 
110e4922176SLars Povlsen 	hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL);
111e4922176SLars Povlsen 	if (!hwmon)
112e4922176SLars Povlsen 		return -ENOMEM;
113e4922176SLars Povlsen 
114e4922176SLars Povlsen 	hwmon->base = devm_platform_ioremap_resource(pdev, 0);
115e4922176SLars Povlsen 	if (IS_ERR(hwmon->base))
116e4922176SLars Povlsen 		return PTR_ERR(hwmon->base);
117e4922176SLars Povlsen 
118907f2e4fSChristophe JAILLET 	hwmon->clk = devm_clk_get_enabled(&pdev->dev, NULL);
119e4922176SLars Povlsen 	if (IS_ERR(hwmon->clk))
120e4922176SLars Povlsen 		return PTR_ERR(hwmon->clk);
121e4922176SLars Povlsen 
122e4922176SLars Povlsen 	s5_temp_enable(hwmon);
123e4922176SLars Povlsen 
124e4922176SLars Povlsen 	hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
125e4922176SLars Povlsen 							 "s5_temp",
126e4922176SLars Povlsen 							 hwmon,
127e4922176SLars Povlsen 							 &s5_chip_info,
128e4922176SLars Povlsen 							 NULL);
129e4922176SLars Povlsen 
130e4922176SLars Povlsen 	return PTR_ERR_OR_ZERO(hwmon_dev);
131e4922176SLars Povlsen }
132e4922176SLars Povlsen 
1332fdf8f7fSWei Yongjun static const struct of_device_id s5_temp_match[] = {
134e4922176SLars Povlsen 	{ .compatible = "microchip,sparx5-temp" },
135e4922176SLars Povlsen 	{},
136e4922176SLars Povlsen };
137e4922176SLars Povlsen MODULE_DEVICE_TABLE(of, s5_temp_match);
138e4922176SLars Povlsen 
139e4922176SLars Povlsen static struct platform_driver s5_temp_driver = {
140e4922176SLars Povlsen 	.probe = s5_temp_probe,
141e4922176SLars Povlsen 	.driver = {
142e4922176SLars Povlsen 		.name = "sparx5-temp",
143e4922176SLars Povlsen 		.of_match_table = s5_temp_match,
144e4922176SLars Povlsen 	},
145e4922176SLars Povlsen };
146e4922176SLars Povlsen 
147e4922176SLars Povlsen module_platform_driver(s5_temp_driver);
148e4922176SLars Povlsen 
149e4922176SLars Povlsen MODULE_AUTHOR("Lars Povlsen <lars.povlsen@microchip.com>");
150e4922176SLars Povlsen MODULE_DESCRIPTION("Sparx5 SoC temperature sensor driver");
151e4922176SLars Povlsen MODULE_LICENSE("GPL");
152