1c3963bc0SZev Weiss // SPDX-License-Identifier: GPL-2.0-or-later 2c3963bc0SZev Weiss /* 3c3963bc0SZev Weiss * nct6775 - Driver for the hardware monitoring functionality of 4c3963bc0SZev Weiss * Nuvoton NCT677x Super-I/O chips 5c3963bc0SZev Weiss * 6c3963bc0SZev Weiss * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> 7c3963bc0SZev Weiss * 8c3963bc0SZev Weiss * Derived from w83627ehf driver 9c3963bc0SZev Weiss * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de> 10c3963bc0SZev Weiss * Copyright (C) 2006 Yuan Mu (Winbond), 11c3963bc0SZev Weiss * Rudolf Marek <r.marek@assembler.cz> 12c3963bc0SZev Weiss * David Hubbard <david.c.hubbard@gmail.com> 13c3963bc0SZev Weiss * Daniel J Blueman <daniel.blueman@gmail.com> 14c3963bc0SZev Weiss * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00) 15c3963bc0SZev Weiss * 16c3963bc0SZev Weiss * Shamelessly ripped from the w83627hf driver 17c3963bc0SZev Weiss * Copyright (C) 2003 Mark Studebaker 18c3963bc0SZev Weiss * 19c3963bc0SZev Weiss * Supports the following chips: 20c3963bc0SZev Weiss * 21c3963bc0SZev Weiss * Chip #vin #fan #pwm #temp chip IDs man ID 22c3963bc0SZev Weiss * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3 23c3963bc0SZev Weiss * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3 24c3963bc0SZev Weiss * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3 25c3963bc0SZev Weiss * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3 26c3963bc0SZev Weiss * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 27c3963bc0SZev Weiss * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 28c3963bc0SZev Weiss * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 29c3963bc0SZev Weiss * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3 30c3963bc0SZev Weiss * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3 31c3963bc0SZev Weiss * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3 32c3963bc0SZev Weiss * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3 33c3963bc0SZev Weiss * (0xd451) 34c3963bc0SZev Weiss * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 35c3963bc0SZev Weiss * (0xd429) 36*aee395bbSGuenter Roeck * nct6799d 14 7 7 2+6 0xd802 0xc1 0x5ca3 37c3963bc0SZev Weiss * 38c3963bc0SZev Weiss * #temp lists the number of monitored temperature sources (first value) plus 39c3963bc0SZev Weiss * the number of directly connectable temperature sensors (second value). 40c3963bc0SZev Weiss */ 41c3963bc0SZev Weiss 42c3963bc0SZev Weiss #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 43c3963bc0SZev Weiss 44c3963bc0SZev Weiss #include <linux/module.h> 45c3963bc0SZev Weiss #include <linux/init.h> 46c3963bc0SZev Weiss #include <linux/slab.h> 47c3963bc0SZev Weiss #include <linux/jiffies.h> 48c3963bc0SZev Weiss #include <linux/hwmon.h> 49c3963bc0SZev Weiss #include <linux/hwmon-sysfs.h> 50c3963bc0SZev Weiss #include <linux/err.h> 51c3963bc0SZev Weiss #include <linux/mutex.h> 52c3963bc0SZev Weiss #include <linux/bitops.h> 53c3963bc0SZev Weiss #include <linux/nospec.h> 54c3963bc0SZev Weiss #include <linux/regmap.h> 55c3963bc0SZev Weiss #include "lm75.h" 56c3963bc0SZev Weiss #include "nct6775.h" 57c3963bc0SZev Weiss 58c3963bc0SZev Weiss #undef DEFAULT_SYMBOL_NAMESPACE 59c3963bc0SZev Weiss #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775 60c3963bc0SZev Weiss 61c3963bc0SZev Weiss #define USE_ALTERNATE 62c3963bc0SZev Weiss 63c3963bc0SZev Weiss /* used to set data->name = nct6775_device_names[data->sio_kind] */ 64c3963bc0SZev Weiss static const char * const nct6775_device_names[] = { 65c3963bc0SZev Weiss "nct6106", 66c3963bc0SZev Weiss "nct6116", 67c3963bc0SZev Weiss "nct6775", 68c3963bc0SZev Weiss "nct6776", 69c3963bc0SZev Weiss "nct6779", 70c3963bc0SZev Weiss "nct6791", 71c3963bc0SZev Weiss "nct6792", 72c3963bc0SZev Weiss "nct6793", 73c3963bc0SZev Weiss "nct6795", 74c3963bc0SZev Weiss "nct6796", 75c3963bc0SZev Weiss "nct6797", 76c3963bc0SZev Weiss "nct6798", 77*aee395bbSGuenter Roeck "nct6799", 78c3963bc0SZev Weiss }; 79c3963bc0SZev Weiss 80c3963bc0SZev Weiss /* Common and NCT6775 specific data */ 81c3963bc0SZev Weiss 82c3963bc0SZev Weiss /* Voltage min/max registers for nr=7..14 are in bank 5 */ 83c3963bc0SZev Weiss 84c3963bc0SZev Weiss static const u16 NCT6775_REG_IN_MAX[] = { 85c3963bc0SZev Weiss 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, 86c3963bc0SZev Weiss 0x55c, 0x55e, 0x560, 0x562 }; 87c3963bc0SZev Weiss static const u16 NCT6775_REG_IN_MIN[] = { 88c3963bc0SZev Weiss 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, 89c3963bc0SZev Weiss 0x55d, 0x55f, 0x561, 0x563 }; 90c3963bc0SZev Weiss static const u16 NCT6775_REG_IN[] = { 91c3963bc0SZev Weiss 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 92c3963bc0SZev Weiss }; 93c3963bc0SZev Weiss 94c3963bc0SZev Weiss #define NCT6775_REG_VBAT 0x5D 95c3963bc0SZev Weiss #define NCT6775_REG_DIODE 0x5E 96c3963bc0SZev Weiss #define NCT6775_DIODE_MASK 0x02 97c3963bc0SZev Weiss 98c3963bc0SZev Weiss static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; 99c3963bc0SZev Weiss 100c3963bc0SZev Weiss /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */ 101c3963bc0SZev Weiss 102c3963bc0SZev Weiss static const s8 NCT6775_ALARM_BITS[] = { 103c3963bc0SZev Weiss 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 104c3963bc0SZev Weiss 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 105c3963bc0SZev Weiss -1, /* unused */ 106c3963bc0SZev Weiss 6, 7, 11, -1, -1, /* fan1..fan5 */ 107c3963bc0SZev Weiss -1, -1, -1, /* unused */ 108c3963bc0SZev Weiss 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 109c3963bc0SZev Weiss 12, -1 }; /* intrusion0, intrusion1 */ 110c3963bc0SZev Weiss 111c3963bc0SZev Weiss static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; 112c3963bc0SZev Weiss 113c3963bc0SZev Weiss /* 114c3963bc0SZev Weiss * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures, 115c3963bc0SZev Weiss * 30..31 intrusion 116c3963bc0SZev Weiss */ 117c3963bc0SZev Weiss static const s8 NCT6775_BEEP_BITS[] = { 118c3963bc0SZev Weiss 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */ 119c3963bc0SZev Weiss 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 120c3963bc0SZev Weiss 21, /* global beep enable */ 121c3963bc0SZev Weiss 6, 7, 11, 28, -1, /* fan1..fan5 */ 122c3963bc0SZev Weiss -1, -1, -1, /* unused */ 123c3963bc0SZev Weiss 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 124c3963bc0SZev Weiss 12, -1 }; /* intrusion0, intrusion1 */ 125c3963bc0SZev Weiss 126c3963bc0SZev Weiss /* DC or PWM output fan configuration */ 127c3963bc0SZev Weiss static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; 128c3963bc0SZev Weiss static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 }; 129c3963bc0SZev Weiss 130c3963bc0SZev Weiss /* Advanced Fan control, some values are common for all fans */ 131c3963bc0SZev Weiss 132c3963bc0SZev Weiss static const u16 NCT6775_REG_TARGET[] = { 133c3963bc0SZev Weiss 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 }; 134c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_MODE[] = { 135c3963bc0SZev Weiss 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 }; 136c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = { 137c3963bc0SZev Weiss 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 }; 138c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = { 139c3963bc0SZev Weiss 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 }; 140c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 141c3963bc0SZev Weiss 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 }; 142c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 143c3963bc0SZev Weiss 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 }; 144c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 145c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 146c3963bc0SZev Weiss 147c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 148c3963bc0SZev Weiss 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 }; 149c3963bc0SZev Weiss static const u16 NCT6775_REG_PWM[] = { 150c3963bc0SZev Weiss 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 }; 151c3963bc0SZev Weiss static const u16 NCT6775_REG_PWM_READ[] = { 152c3963bc0SZev Weiss 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 }; 153c3963bc0SZev Weiss 154c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 155c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d }; 156c3963bc0SZev Weiss static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = { 157c3963bc0SZev Weiss 0x641, 0x642, 0x643, 0x644 }; 158c3963bc0SZev Weiss static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { }; 159c3963bc0SZev Weiss 160c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP[] = { 161c3963bc0SZev Weiss 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 162c3963bc0SZev Weiss 163c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 164c3963bc0SZev Weiss 165c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 166c3963bc0SZev Weiss 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 167c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 168c3963bc0SZev Weiss 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D }; 169c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 170c3963bc0SZev Weiss 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C }; 171c3963bc0SZev Weiss 172c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 173c3963bc0SZev Weiss 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 }; 174c3963bc0SZev Weiss 175c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_SEL[] = { 176c3963bc0SZev Weiss 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 }; 177c3963bc0SZev Weiss 178c3963bc0SZev Weiss static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = { 179c3963bc0SZev Weiss 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 }; 180c3963bc0SZev Weiss static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = { 181c3963bc0SZev Weiss 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a }; 182c3963bc0SZev Weiss static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = { 183c3963bc0SZev Weiss 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b }; 184c3963bc0SZev Weiss static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = { 185c3963bc0SZev Weiss 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c }; 186c3963bc0SZev Weiss static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = { 187c3963bc0SZev Weiss 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d }; 188c3963bc0SZev Weiss 189c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 190c3963bc0SZev Weiss 191c3963bc0SZev Weiss static const u16 NCT6775_REG_AUTO_TEMP[] = { 192c3963bc0SZev Weiss 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 }; 193c3963bc0SZev Weiss static const u16 NCT6775_REG_AUTO_PWM[] = { 194c3963bc0SZev Weiss 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 }; 195c3963bc0SZev Weiss 196c3963bc0SZev Weiss #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p)) 197c3963bc0SZev Weiss #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p)) 198c3963bc0SZev Weiss 199c3963bc0SZev Weiss static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 }; 200c3963bc0SZev Weiss 201c3963bc0SZev Weiss static const u16 NCT6775_REG_CRITICAL_TEMP[] = { 202c3963bc0SZev Weiss 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 }; 203c3963bc0SZev Weiss static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = { 204c3963bc0SZev Weiss 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 }; 205c3963bc0SZev Weiss 206c3963bc0SZev Weiss static const char *const nct6775_temp_label[] = { 207c3963bc0SZev Weiss "", 208c3963bc0SZev Weiss "SYSTIN", 209c3963bc0SZev Weiss "CPUTIN", 210c3963bc0SZev Weiss "AUXTIN", 211c3963bc0SZev Weiss "AMD SB-TSI", 212c3963bc0SZev Weiss "PECI Agent 0", 213c3963bc0SZev Weiss "PECI Agent 1", 214c3963bc0SZev Weiss "PECI Agent 2", 215c3963bc0SZev Weiss "PECI Agent 3", 216c3963bc0SZev Weiss "PECI Agent 4", 217c3963bc0SZev Weiss "PECI Agent 5", 218c3963bc0SZev Weiss "PECI Agent 6", 219c3963bc0SZev Weiss "PECI Agent 7", 220c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 221c3963bc0SZev Weiss "PCH_CHIP_TEMP", 222c3963bc0SZev Weiss "PCH_CPU_TEMP", 223c3963bc0SZev Weiss "PCH_MCH_TEMP", 224c3963bc0SZev Weiss "PCH_DIM0_TEMP", 225c3963bc0SZev Weiss "PCH_DIM1_TEMP", 226c3963bc0SZev Weiss "PCH_DIM2_TEMP", 227c3963bc0SZev Weiss "PCH_DIM3_TEMP" 228c3963bc0SZev Weiss }; 229c3963bc0SZev Weiss 230c3963bc0SZev Weiss #define NCT6775_TEMP_MASK 0x001ffffe 231c3963bc0SZev Weiss #define NCT6775_VIRT_TEMP_MASK 0x00000000 232c3963bc0SZev Weiss 233c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = { 234c3963bc0SZev Weiss [13] = 0x661, 235c3963bc0SZev Weiss [14] = 0x662, 236c3963bc0SZev Weiss [15] = 0x664, 237c3963bc0SZev Weiss }; 238c3963bc0SZev Weiss 239c3963bc0SZev Weiss static const u16 NCT6775_REG_TEMP_CRIT[32] = { 240c3963bc0SZev Weiss [4] = 0xa00, 241c3963bc0SZev Weiss [5] = 0xa01, 242c3963bc0SZev Weiss [6] = 0xa02, 243c3963bc0SZev Weiss [7] = 0xa03, 244c3963bc0SZev Weiss [8] = 0xa04, 245c3963bc0SZev Weiss [9] = 0xa05, 246c3963bc0SZev Weiss [10] = 0xa06, 247c3963bc0SZev Weiss [11] = 0xa07 248c3963bc0SZev Weiss }; 249c3963bc0SZev Weiss 250c3963bc0SZev Weiss static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; 251c3963bc0SZev Weiss 252c3963bc0SZev Weiss /* NCT6776 specific data */ 253c3963bc0SZev Weiss 254c3963bc0SZev Weiss /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ 255c3963bc0SZev Weiss #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME 256c3963bc0SZev Weiss #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME 257c3963bc0SZev Weiss 258c3963bc0SZev Weiss static const s8 NCT6776_ALARM_BITS[] = { 259c3963bc0SZev Weiss 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 260c3963bc0SZev Weiss 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 261c3963bc0SZev Weiss -1, /* unused */ 262c3963bc0SZev Weiss 6, 7, 11, 10, 23, /* fan1..fan5 */ 263c3963bc0SZev Weiss -1, -1, -1, /* unused */ 264c3963bc0SZev Weiss 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 265c3963bc0SZev Weiss 12, 9 }; /* intrusion0, intrusion1 */ 266c3963bc0SZev Weiss 267c3963bc0SZev Weiss static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 }; 268c3963bc0SZev Weiss 269c3963bc0SZev Weiss static const s8 NCT6776_BEEP_BITS[] = { 270c3963bc0SZev Weiss 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ 271c3963bc0SZev Weiss 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 272c3963bc0SZev Weiss 24, /* global beep enable */ 273c3963bc0SZev Weiss 25, 26, 27, 28, 29, /* fan1..fan5 */ 274c3963bc0SZev Weiss -1, -1, -1, /* unused */ 275c3963bc0SZev Weiss 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 276c3963bc0SZev Weiss 30, 31 }; /* intrusion0, intrusion1 */ 277c3963bc0SZev Weiss 278c3963bc0SZev Weiss static const u16 NCT6776_REG_TOLERANCE_H[] = { 279c3963bc0SZev Weiss 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; 280c3963bc0SZev Weiss 281c3963bc0SZev Weiss static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 }; 282c3963bc0SZev Weiss static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 }; 283c3963bc0SZev Weiss 284c3963bc0SZev Weiss static const u16 NCT6776_REG_FAN_MIN[] = { 285c3963bc0SZev Weiss 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c }; 286c3963bc0SZev Weiss static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = { 287c3963bc0SZev Weiss 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 }; 288c3963bc0SZev Weiss 289c3963bc0SZev Weiss static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = { 290c3963bc0SZev Weiss 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e }; 291c3963bc0SZev Weiss 292c3963bc0SZev Weiss static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 293c3963bc0SZev Weiss 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A }; 294c3963bc0SZev Weiss 295c3963bc0SZev Weiss static const char *const nct6776_temp_label[] = { 296c3963bc0SZev Weiss "", 297c3963bc0SZev Weiss "SYSTIN", 298c3963bc0SZev Weiss "CPUTIN", 299c3963bc0SZev Weiss "AUXTIN", 300c3963bc0SZev Weiss "SMBUSMASTER 0", 301c3963bc0SZev Weiss "SMBUSMASTER 1", 302c3963bc0SZev Weiss "SMBUSMASTER 2", 303c3963bc0SZev Weiss "SMBUSMASTER 3", 304c3963bc0SZev Weiss "SMBUSMASTER 4", 305c3963bc0SZev Weiss "SMBUSMASTER 5", 306c3963bc0SZev Weiss "SMBUSMASTER 6", 307c3963bc0SZev Weiss "SMBUSMASTER 7", 308c3963bc0SZev Weiss "PECI Agent 0", 309c3963bc0SZev Weiss "PECI Agent 1", 310c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 311c3963bc0SZev Weiss "PCH_CHIP_TEMP", 312c3963bc0SZev Weiss "PCH_CPU_TEMP", 313c3963bc0SZev Weiss "PCH_MCH_TEMP", 314c3963bc0SZev Weiss "PCH_DIM0_TEMP", 315c3963bc0SZev Weiss "PCH_DIM1_TEMP", 316c3963bc0SZev Weiss "PCH_DIM2_TEMP", 317c3963bc0SZev Weiss "PCH_DIM3_TEMP", 318c3963bc0SZev Weiss "BYTE_TEMP" 319c3963bc0SZev Weiss }; 320c3963bc0SZev Weiss 321c3963bc0SZev Weiss #define NCT6776_TEMP_MASK 0x007ffffe 322c3963bc0SZev Weiss #define NCT6776_VIRT_TEMP_MASK 0x00000000 323c3963bc0SZev Weiss 324c3963bc0SZev Weiss static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = { 325c3963bc0SZev Weiss [14] = 0x401, 326c3963bc0SZev Weiss [15] = 0x402, 327c3963bc0SZev Weiss [16] = 0x404, 328c3963bc0SZev Weiss }; 329c3963bc0SZev Weiss 330c3963bc0SZev Weiss static const u16 NCT6776_REG_TEMP_CRIT[32] = { 331c3963bc0SZev Weiss [11] = 0x709, 332c3963bc0SZev Weiss [12] = 0x70a, 333c3963bc0SZev Weiss }; 334c3963bc0SZev Weiss 335c3963bc0SZev Weiss static const u16 NCT6776_REG_TSI_TEMP[] = { 336c3963bc0SZev Weiss 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 }; 337c3963bc0SZev Weiss 338c3963bc0SZev Weiss /* NCT6779 specific data */ 339c3963bc0SZev Weiss 340c3963bc0SZev Weiss static const u16 NCT6779_REG_IN[] = { 341c3963bc0SZev Weiss 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, 342c3963bc0SZev Weiss 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e }; 343c3963bc0SZev Weiss 344c3963bc0SZev Weiss static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 345c3963bc0SZev Weiss 0x459, 0x45A, 0x45B, 0x568 }; 346c3963bc0SZev Weiss 347c3963bc0SZev Weiss static const s8 NCT6779_ALARM_BITS[] = { 348c3963bc0SZev Weiss 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 349c3963bc0SZev Weiss 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ 350c3963bc0SZev Weiss -1, /* unused */ 351c3963bc0SZev Weiss 6, 7, 11, 10, 23, /* fan1..fan5 */ 352c3963bc0SZev Weiss -1, -1, -1, /* unused */ 353c3963bc0SZev Weiss 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 354c3963bc0SZev Weiss 12, 9 }; /* intrusion0, intrusion1 */ 355c3963bc0SZev Weiss 356c3963bc0SZev Weiss static const s8 NCT6779_BEEP_BITS[] = { 357c3963bc0SZev Weiss 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ 358c3963bc0SZev Weiss 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */ 359c3963bc0SZev Weiss 24, /* global beep enable */ 360c3963bc0SZev Weiss 25, 26, 27, 28, 29, /* fan1..fan5 */ 361c3963bc0SZev Weiss -1, -1, -1, /* unused */ 362c3963bc0SZev Weiss 16, 17, -1, -1, -1, -1, /* temp1..temp6 */ 363c3963bc0SZev Weiss 30, 31 }; /* intrusion0, intrusion1 */ 364c3963bc0SZev Weiss 365c3963bc0SZev Weiss static const u16 NCT6779_REG_FAN[] = { 366c3963bc0SZev Weiss 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; 367c3963bc0SZev Weiss static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = { 368c3963bc0SZev Weiss 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f }; 369c3963bc0SZev Weiss 370c3963bc0SZev Weiss static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = { 371c3963bc0SZev Weiss 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 }; 372c3963bc0SZev Weiss #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01 373c3963bc0SZev Weiss static const u16 NCT6779_REG_CRITICAL_PWM[] = { 374c3963bc0SZev Weiss 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 }; 375c3963bc0SZev Weiss 376c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 377c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 378c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 379c3963bc0SZev Weiss 0x18, 0x152 }; 380c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 381c3963bc0SZev Weiss 0x3a, 0x153 }; 382c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 383c3963bc0SZev Weiss 0x39, 0x155 }; 384c3963bc0SZev Weiss 385c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_OFFSET[] = { 386*aee395bbSGuenter Roeck 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 }; 387c3963bc0SZev Weiss 388c3963bc0SZev Weiss static const char *const nct6779_temp_label[] = { 389c3963bc0SZev Weiss "", 390c3963bc0SZev Weiss "SYSTIN", 391c3963bc0SZev Weiss "CPUTIN", 392c3963bc0SZev Weiss "AUXTIN0", 393c3963bc0SZev Weiss "AUXTIN1", 394c3963bc0SZev Weiss "AUXTIN2", 395c3963bc0SZev Weiss "AUXTIN3", 396c3963bc0SZev Weiss "", 397c3963bc0SZev Weiss "SMBUSMASTER 0", 398c3963bc0SZev Weiss "SMBUSMASTER 1", 399c3963bc0SZev Weiss "SMBUSMASTER 2", 400c3963bc0SZev Weiss "SMBUSMASTER 3", 401c3963bc0SZev Weiss "SMBUSMASTER 4", 402c3963bc0SZev Weiss "SMBUSMASTER 5", 403c3963bc0SZev Weiss "SMBUSMASTER 6", 404c3963bc0SZev Weiss "SMBUSMASTER 7", 405c3963bc0SZev Weiss "PECI Agent 0", 406c3963bc0SZev Weiss "PECI Agent 1", 407c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 408c3963bc0SZev Weiss "PCH_CHIP_TEMP", 409c3963bc0SZev Weiss "PCH_CPU_TEMP", 410c3963bc0SZev Weiss "PCH_MCH_TEMP", 411c3963bc0SZev Weiss "PCH_DIM0_TEMP", 412c3963bc0SZev Weiss "PCH_DIM1_TEMP", 413c3963bc0SZev Weiss "PCH_DIM2_TEMP", 414c3963bc0SZev Weiss "PCH_DIM3_TEMP", 415c3963bc0SZev Weiss "BYTE_TEMP", 416c3963bc0SZev Weiss "", 417c3963bc0SZev Weiss "", 418c3963bc0SZev Weiss "", 419c3963bc0SZev Weiss "", 420c3963bc0SZev Weiss "Virtual_TEMP" 421c3963bc0SZev Weiss }; 422c3963bc0SZev Weiss 423c3963bc0SZev Weiss #define NCT6779_TEMP_MASK 0x07ffff7e 424c3963bc0SZev Weiss #define NCT6779_VIRT_TEMP_MASK 0x00000000 425c3963bc0SZev Weiss #define NCT6791_TEMP_MASK 0x87ffff7e 426c3963bc0SZev Weiss #define NCT6791_VIRT_TEMP_MASK 0x80000000 427c3963bc0SZev Weiss 428c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_ALTERNATE[32] 429c3963bc0SZev Weiss = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0, 430c3963bc0SZev Weiss 0, 0, 0, 0, 0, 0, 0, 0, 431c3963bc0SZev Weiss 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 432c3963bc0SZev Weiss 0x408, 0 }; 433c3963bc0SZev Weiss 434c3963bc0SZev Weiss static const u16 NCT6779_REG_TEMP_CRIT[32] = { 435c3963bc0SZev Weiss [15] = 0x709, 436c3963bc0SZev Weiss [16] = 0x70a, 437c3963bc0SZev Weiss }; 438c3963bc0SZev Weiss 439c3963bc0SZev Weiss /* NCT6791 specific data */ 440c3963bc0SZev Weiss 441c3963bc0SZev Weiss static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 }; 442c3963bc0SZev Weiss static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a }; 443c3963bc0SZev Weiss static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b }; 444c3963bc0SZev Weiss static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c }; 445c3963bc0SZev Weiss static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d }; 446c3963bc0SZev Weiss static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; 447c3963bc0SZev Weiss 448c3963bc0SZev Weiss static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 449c3963bc0SZev Weiss 0x459, 0x45A, 0x45B, 0x568, 0x45D }; 450c3963bc0SZev Weiss 451c3963bc0SZev Weiss static const s8 NCT6791_ALARM_BITS[] = { 452c3963bc0SZev Weiss 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 453c3963bc0SZev Weiss 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ 454c3963bc0SZev Weiss -1, /* unused */ 455c3963bc0SZev Weiss 6, 7, 11, 10, 23, 33, /* fan1..fan6 */ 456c3963bc0SZev Weiss -1, -1, /* unused */ 457c3963bc0SZev Weiss 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 458c3963bc0SZev Weiss 12, 9 }; /* intrusion0, intrusion1 */ 459c3963bc0SZev Weiss 460c3963bc0SZev Weiss /* NCT6792/NCT6793 specific data */ 461c3963bc0SZev Weiss 462c3963bc0SZev Weiss static const u16 NCT6792_REG_TEMP_MON[] = { 463c3963bc0SZev Weiss 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 464c3963bc0SZev Weiss static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 465c3963bc0SZev Weiss 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 466c3963bc0SZev Weiss 467c3963bc0SZev Weiss static const char *const nct6792_temp_label[] = { 468c3963bc0SZev Weiss "", 469c3963bc0SZev Weiss "SYSTIN", 470c3963bc0SZev Weiss "CPUTIN", 471c3963bc0SZev Weiss "AUXTIN0", 472c3963bc0SZev Weiss "AUXTIN1", 473c3963bc0SZev Weiss "AUXTIN2", 474c3963bc0SZev Weiss "AUXTIN3", 475c3963bc0SZev Weiss "", 476c3963bc0SZev Weiss "SMBUSMASTER 0", 477c3963bc0SZev Weiss "SMBUSMASTER 1", 478c3963bc0SZev Weiss "SMBUSMASTER 2", 479c3963bc0SZev Weiss "SMBUSMASTER 3", 480c3963bc0SZev Weiss "SMBUSMASTER 4", 481c3963bc0SZev Weiss "SMBUSMASTER 5", 482c3963bc0SZev Weiss "SMBUSMASTER 6", 483c3963bc0SZev Weiss "SMBUSMASTER 7", 484c3963bc0SZev Weiss "PECI Agent 0", 485c3963bc0SZev Weiss "PECI Agent 1", 486c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 487c3963bc0SZev Weiss "PCH_CHIP_TEMP", 488c3963bc0SZev Weiss "PCH_CPU_TEMP", 489c3963bc0SZev Weiss "PCH_MCH_TEMP", 490c3963bc0SZev Weiss "PCH_DIM0_TEMP", 491c3963bc0SZev Weiss "PCH_DIM1_TEMP", 492c3963bc0SZev Weiss "PCH_DIM2_TEMP", 493c3963bc0SZev Weiss "PCH_DIM3_TEMP", 494c3963bc0SZev Weiss "BYTE_TEMP", 495c3963bc0SZev Weiss "PECI Agent 0 Calibration", 496c3963bc0SZev Weiss "PECI Agent 1 Calibration", 497c3963bc0SZev Weiss "", 498c3963bc0SZev Weiss "", 499c3963bc0SZev Weiss "Virtual_TEMP" 500c3963bc0SZev Weiss }; 501c3963bc0SZev Weiss 502c3963bc0SZev Weiss #define NCT6792_TEMP_MASK 0x9fffff7e 503c3963bc0SZev Weiss #define NCT6792_VIRT_TEMP_MASK 0x80000000 504c3963bc0SZev Weiss 505c3963bc0SZev Weiss static const char *const nct6793_temp_label[] = { 506c3963bc0SZev Weiss "", 507c3963bc0SZev Weiss "SYSTIN", 508c3963bc0SZev Weiss "CPUTIN", 509c3963bc0SZev Weiss "AUXTIN0", 510c3963bc0SZev Weiss "AUXTIN1", 511c3963bc0SZev Weiss "AUXTIN2", 512c3963bc0SZev Weiss "AUXTIN3", 513c3963bc0SZev Weiss "", 514c3963bc0SZev Weiss "SMBUSMASTER 0", 515c3963bc0SZev Weiss "SMBUSMASTER 1", 516c3963bc0SZev Weiss "", 517c3963bc0SZev Weiss "", 518c3963bc0SZev Weiss "", 519c3963bc0SZev Weiss "", 520c3963bc0SZev Weiss "", 521c3963bc0SZev Weiss "", 522c3963bc0SZev Weiss "PECI Agent 0", 523c3963bc0SZev Weiss "PECI Agent 1", 524c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 525c3963bc0SZev Weiss "PCH_CHIP_TEMP", 526c3963bc0SZev Weiss "PCH_CPU_TEMP", 527c3963bc0SZev Weiss "PCH_MCH_TEMP", 528c3963bc0SZev Weiss "Agent0 Dimm0 ", 529c3963bc0SZev Weiss "Agent0 Dimm1", 530c3963bc0SZev Weiss "Agent1 Dimm0", 531c3963bc0SZev Weiss "Agent1 Dimm1", 532c3963bc0SZev Weiss "BYTE_TEMP0", 533c3963bc0SZev Weiss "BYTE_TEMP1", 534c3963bc0SZev Weiss "PECI Agent 0 Calibration", 535c3963bc0SZev Weiss "PECI Agent 1 Calibration", 536c3963bc0SZev Weiss "", 537c3963bc0SZev Weiss "Virtual_TEMP" 538c3963bc0SZev Weiss }; 539c3963bc0SZev Weiss 540c3963bc0SZev Weiss #define NCT6793_TEMP_MASK 0xbfff037e 541c3963bc0SZev Weiss #define NCT6793_VIRT_TEMP_MASK 0x80000000 542c3963bc0SZev Weiss 543c3963bc0SZev Weiss static const char *const nct6795_temp_label[] = { 544c3963bc0SZev Weiss "", 545c3963bc0SZev Weiss "SYSTIN", 546c3963bc0SZev Weiss "CPUTIN", 547c3963bc0SZev Weiss "AUXTIN0", 548c3963bc0SZev Weiss "AUXTIN1", 549c3963bc0SZev Weiss "AUXTIN2", 550c3963bc0SZev Weiss "AUXTIN3", 551c3963bc0SZev Weiss "", 552c3963bc0SZev Weiss "SMBUSMASTER 0", 553c3963bc0SZev Weiss "SMBUSMASTER 1", 554c3963bc0SZev Weiss "SMBUSMASTER 2", 555c3963bc0SZev Weiss "SMBUSMASTER 3", 556c3963bc0SZev Weiss "SMBUSMASTER 4", 557c3963bc0SZev Weiss "SMBUSMASTER 5", 558c3963bc0SZev Weiss "SMBUSMASTER 6", 559c3963bc0SZev Weiss "SMBUSMASTER 7", 560c3963bc0SZev Weiss "PECI Agent 0", 561c3963bc0SZev Weiss "PECI Agent 1", 562c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 563c3963bc0SZev Weiss "PCH_CHIP_TEMP", 564c3963bc0SZev Weiss "PCH_CPU_TEMP", 565c3963bc0SZev Weiss "PCH_MCH_TEMP", 566c3963bc0SZev Weiss "Agent0 Dimm0", 567c3963bc0SZev Weiss "Agent0 Dimm1", 568c3963bc0SZev Weiss "Agent1 Dimm0", 569c3963bc0SZev Weiss "Agent1 Dimm1", 570c3963bc0SZev Weiss "BYTE_TEMP0", 571c3963bc0SZev Weiss "BYTE_TEMP1", 572c3963bc0SZev Weiss "PECI Agent 0 Calibration", 573c3963bc0SZev Weiss "PECI Agent 1 Calibration", 574c3963bc0SZev Weiss "", 575c3963bc0SZev Weiss "Virtual_TEMP" 576c3963bc0SZev Weiss }; 577c3963bc0SZev Weiss 578c3963bc0SZev Weiss #define NCT6795_TEMP_MASK 0xbfffff7e 579c3963bc0SZev Weiss #define NCT6795_VIRT_TEMP_MASK 0x80000000 580c3963bc0SZev Weiss 581c3963bc0SZev Weiss static const char *const nct6796_temp_label[] = { 582c3963bc0SZev Weiss "", 583c3963bc0SZev Weiss "SYSTIN", 584c3963bc0SZev Weiss "CPUTIN", 585c3963bc0SZev Weiss "AUXTIN0", 586c3963bc0SZev Weiss "AUXTIN1", 587c3963bc0SZev Weiss "AUXTIN2", 588c3963bc0SZev Weiss "AUXTIN3", 589c3963bc0SZev Weiss "AUXTIN4", 590c3963bc0SZev Weiss "SMBUSMASTER 0", 591c3963bc0SZev Weiss "SMBUSMASTER 1", 592c3963bc0SZev Weiss "Virtual_TEMP", 593c3963bc0SZev Weiss "Virtual_TEMP", 594c3963bc0SZev Weiss "", 595c3963bc0SZev Weiss "", 596c3963bc0SZev Weiss "", 597c3963bc0SZev Weiss "", 598c3963bc0SZev Weiss "PECI Agent 0", 599c3963bc0SZev Weiss "PECI Agent 1", 600c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 601c3963bc0SZev Weiss "PCH_CHIP_TEMP", 602c3963bc0SZev Weiss "PCH_CPU_TEMP", 603c3963bc0SZev Weiss "PCH_MCH_TEMP", 604c3963bc0SZev Weiss "Agent0 Dimm0", 605c3963bc0SZev Weiss "Agent0 Dimm1", 606c3963bc0SZev Weiss "Agent1 Dimm0", 607c3963bc0SZev Weiss "Agent1 Dimm1", 608c3963bc0SZev Weiss "BYTE_TEMP0", 609c3963bc0SZev Weiss "BYTE_TEMP1", 610c3963bc0SZev Weiss "PECI Agent 0 Calibration", 611c3963bc0SZev Weiss "PECI Agent 1 Calibration", 612c3963bc0SZev Weiss "", 613c3963bc0SZev Weiss "Virtual_TEMP" 614c3963bc0SZev Weiss }; 615c3963bc0SZev Weiss 616c3963bc0SZev Weiss #define NCT6796_TEMP_MASK 0xbfff0ffe 617c3963bc0SZev Weiss #define NCT6796_VIRT_TEMP_MASK 0x80000c00 618c3963bc0SZev Weiss 619c3963bc0SZev Weiss static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; 620c3963bc0SZev Weiss 621c3963bc0SZev Weiss static const char *const nct6798_temp_label[] = { 622c3963bc0SZev Weiss "", 623c3963bc0SZev Weiss "SYSTIN", 624c3963bc0SZev Weiss "CPUTIN", 625c3963bc0SZev Weiss "AUXTIN0", 626c3963bc0SZev Weiss "AUXTIN1", 627c3963bc0SZev Weiss "AUXTIN2", 628c3963bc0SZev Weiss "AUXTIN3", 629c3963bc0SZev Weiss "AUXTIN4", 630c3963bc0SZev Weiss "SMBUSMASTER 0", 631c3963bc0SZev Weiss "SMBUSMASTER 1", 632c3963bc0SZev Weiss "Virtual_TEMP", 633c3963bc0SZev Weiss "Virtual_TEMP", 634c3963bc0SZev Weiss "", 635c3963bc0SZev Weiss "", 636c3963bc0SZev Weiss "", 637c3963bc0SZev Weiss "", 638c3963bc0SZev Weiss "PECI Agent 0", 639c3963bc0SZev Weiss "PECI Agent 1", 640c3963bc0SZev Weiss "PCH_CHIP_CPU_MAX_TEMP", 641c3963bc0SZev Weiss "PCH_CHIP_TEMP", 642c3963bc0SZev Weiss "PCH_CPU_TEMP", 643c3963bc0SZev Weiss "PCH_MCH_TEMP", 644c3963bc0SZev Weiss "Agent0 Dimm0", 645c3963bc0SZev Weiss "Agent0 Dimm1", 646c3963bc0SZev Weiss "Agent1 Dimm0", 647c3963bc0SZev Weiss "Agent1 Dimm1", 648c3963bc0SZev Weiss "BYTE_TEMP0", 649c3963bc0SZev Weiss "BYTE_TEMP1", 650c3963bc0SZev Weiss "PECI Agent 0 Calibration", /* undocumented */ 651c3963bc0SZev Weiss "PECI Agent 1 Calibration", /* undocumented */ 652c3963bc0SZev Weiss "", 653c3963bc0SZev Weiss "Virtual_TEMP" 654c3963bc0SZev Weiss }; 655c3963bc0SZev Weiss 656c3963bc0SZev Weiss #define NCT6798_TEMP_MASK 0xbfff0ffe 657c3963bc0SZev Weiss #define NCT6798_VIRT_TEMP_MASK 0x80000c00 658c3963bc0SZev Weiss 659*aee395bbSGuenter Roeck static const char *const nct6799_temp_label[] = { 660*aee395bbSGuenter Roeck "", 661*aee395bbSGuenter Roeck "SYSTIN", 662*aee395bbSGuenter Roeck "CPUTIN", 663*aee395bbSGuenter Roeck "AUXTIN0", 664*aee395bbSGuenter Roeck "AUXTIN1", 665*aee395bbSGuenter Roeck "AUXTIN2", 666*aee395bbSGuenter Roeck "AUXTIN3", 667*aee395bbSGuenter Roeck "AUXTIN4", 668*aee395bbSGuenter Roeck "SMBUSMASTER 0", 669*aee395bbSGuenter Roeck "SMBUSMASTER 1", 670*aee395bbSGuenter Roeck "Virtual_TEMP", 671*aee395bbSGuenter Roeck "Virtual_TEMP", 672*aee395bbSGuenter Roeck "", 673*aee395bbSGuenter Roeck "AUXTIN5", 674*aee395bbSGuenter Roeck "", 675*aee395bbSGuenter Roeck "", 676*aee395bbSGuenter Roeck "PECI Agent 0", 677*aee395bbSGuenter Roeck "PECI Agent 1", 678*aee395bbSGuenter Roeck "PCH_CHIP_CPU_MAX_TEMP", 679*aee395bbSGuenter Roeck "PCH_CHIP_TEMP", 680*aee395bbSGuenter Roeck "PCH_CPU_TEMP", 681*aee395bbSGuenter Roeck "PCH_MCH_TEMP", 682*aee395bbSGuenter Roeck "Agent0 Dimm0", 683*aee395bbSGuenter Roeck "Agent0 Dimm1", 684*aee395bbSGuenter Roeck "Agent1 Dimm0", 685*aee395bbSGuenter Roeck "Agent1 Dimm1", 686*aee395bbSGuenter Roeck "BYTE_TEMP0", 687*aee395bbSGuenter Roeck "BYTE_TEMP1", 688*aee395bbSGuenter Roeck "PECI Agent 0 Calibration", /* undocumented */ 689*aee395bbSGuenter Roeck "PECI Agent 1 Calibration", /* undocumented */ 690*aee395bbSGuenter Roeck "", 691*aee395bbSGuenter Roeck "Virtual_TEMP" 692*aee395bbSGuenter Roeck }; 693*aee395bbSGuenter Roeck 694*aee395bbSGuenter Roeck #define NCT6799_TEMP_MASK 0xbfff2ffe 695*aee395bbSGuenter Roeck #define NCT6799_VIRT_TEMP_MASK 0x80000c00 696*aee395bbSGuenter Roeck 697c3963bc0SZev Weiss /* NCT6102D/NCT6106D specific data */ 698c3963bc0SZev Weiss 699c3963bc0SZev Weiss #define NCT6106_REG_VBAT 0x318 700c3963bc0SZev Weiss #define NCT6106_REG_DIODE 0x319 701c3963bc0SZev Weiss #define NCT6106_DIODE_MASK 0x01 702c3963bc0SZev Weiss 703c3963bc0SZev Weiss static const u16 NCT6106_REG_IN_MAX[] = { 704c3963bc0SZev Weiss 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 }; 705c3963bc0SZev Weiss static const u16 NCT6106_REG_IN_MIN[] = { 706c3963bc0SZev Weiss 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 }; 707c3963bc0SZev Weiss static const u16 NCT6106_REG_IN[] = { 708c3963bc0SZev Weiss 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 709c3963bc0SZev Weiss 710c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 711c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 712c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_HYST[] = { 713c3963bc0SZev Weiss 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 714c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_OVER[] = { 715c3963bc0SZev Weiss 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 }; 716c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_CRIT_L[] = { 717c3963bc0SZev Weiss 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 }; 718c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_CRIT_H[] = { 719c3963bc0SZev Weiss 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 }; 720c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 }; 721c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_CONFIG[] = { 722c3963bc0SZev Weiss 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc }; 723c3963bc0SZev Weiss 724c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 }; 725c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 }; 726c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 }; 727c3963bc0SZev Weiss static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 }; 728c3963bc0SZev Weiss 729c3963bc0SZev Weiss static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 }; 730c3963bc0SZev Weiss static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 }; 731c3963bc0SZev Weiss static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c }; 732c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 }; 733c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_SOURCE[] = { 734c3963bc0SZev Weiss 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 }; 735c3963bc0SZev Weiss 736c3963bc0SZev Weiss static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a }; 737c3963bc0SZev Weiss static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 738c3963bc0SZev Weiss 0x11b, 0x12b, 0x13b }; 739c3963bc0SZev Weiss 740c3963bc0SZev Weiss static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c }; 741c3963bc0SZev Weiss #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10 742c3963bc0SZev Weiss static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d }; 743c3963bc0SZev Weiss 744c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 }; 745c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 }; 746c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 }; 747c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 }; 748c3963bc0SZev Weiss static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 }; 749c3963bc0SZev Weiss static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 }; 750c3963bc0SZev Weiss 751c3963bc0SZev Weiss static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 }; 752c3963bc0SZev Weiss 753c3963bc0SZev Weiss static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 }; 754c3963bc0SZev Weiss static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 }; 755c3963bc0SZev Weiss static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a }; 756c3963bc0SZev Weiss static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b }; 757c3963bc0SZev Weiss static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c }; 758c3963bc0SZev Weiss static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d }; 759c3963bc0SZev Weiss 760c3963bc0SZev Weiss static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 }; 761c3963bc0SZev Weiss static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; 762c3963bc0SZev Weiss 763c3963bc0SZev Weiss static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 764c3963bc0SZev Weiss 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; 765c3963bc0SZev Weiss 766c3963bc0SZev Weiss static const s8 NCT6106_ALARM_BITS[] = { 767c3963bc0SZev Weiss 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 768c3963bc0SZev Weiss 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 769c3963bc0SZev Weiss -1, /* unused */ 770c3963bc0SZev Weiss 32, 33, 34, -1, -1, /* fan1..fan5 */ 771c3963bc0SZev Weiss -1, -1, -1, /* unused */ 772c3963bc0SZev Weiss 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 773c3963bc0SZev Weiss 48, -1 /* intrusion0, intrusion1 */ 774c3963bc0SZev Weiss }; 775c3963bc0SZev Weiss 776c3963bc0SZev Weiss static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 777c3963bc0SZev Weiss 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; 778c3963bc0SZev Weiss 779c3963bc0SZev Weiss static const s8 NCT6106_BEEP_BITS[] = { 780c3963bc0SZev Weiss 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 781c3963bc0SZev Weiss 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ 782c3963bc0SZev Weiss 32, /* global beep enable */ 783c3963bc0SZev Weiss 24, 25, 26, 27, 28, /* fan1..fan5 */ 784c3963bc0SZev Weiss -1, -1, -1, /* unused */ 785c3963bc0SZev Weiss 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 786c3963bc0SZev Weiss 34, -1 /* intrusion0, intrusion1 */ 787c3963bc0SZev Weiss }; 788c3963bc0SZev Weiss 789c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { 790c3963bc0SZev Weiss [14] = 0x51, 791c3963bc0SZev Weiss [15] = 0x52, 792c3963bc0SZev Weiss [16] = 0x54, 793c3963bc0SZev Weiss }; 794c3963bc0SZev Weiss 795c3963bc0SZev Weiss static const u16 NCT6106_REG_TEMP_CRIT[32] = { 796c3963bc0SZev Weiss [11] = 0x204, 797c3963bc0SZev Weiss [12] = 0x205, 798c3963bc0SZev Weiss }; 799c3963bc0SZev Weiss 800c3963bc0SZev Weiss static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 }; 801c3963bc0SZev Weiss 802c3963bc0SZev Weiss /* NCT6112D/NCT6114D/NCT6116D specific data */ 803c3963bc0SZev Weiss 804c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 }; 805c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 }; 806c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; 807c3963bc0SZev Weiss static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; 808c3963bc0SZev Weiss 809c3963bc0SZev Weiss static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; 810c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 }; 811c3963bc0SZev Weiss static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 }; 812c3963bc0SZev Weiss static const u16 NCT6116_REG_TEMP_SOURCE[] = { 813c3963bc0SZev Weiss 0xb0, 0xb1, 0xb2 }; 814c3963bc0SZev Weiss 815c3963bc0SZev Weiss static const u16 NCT6116_REG_CRITICAL_TEMP[] = { 816c3963bc0SZev Weiss 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa }; 817c3963bc0SZev Weiss static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = { 818c3963bc0SZev Weiss 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab }; 819c3963bc0SZev Weiss 820c3963bc0SZev Weiss static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = { 821c3963bc0SZev Weiss 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac }; 822c3963bc0SZev Weiss static const u16 NCT6116_REG_CRITICAL_PWM[] = { 823c3963bc0SZev Weiss 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad }; 824c3963bc0SZev Weiss 825c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = { 826c3963bc0SZev Weiss 0x114, 0x124, 0x134, 0x194, 0x1a4 }; 827c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = { 828c3963bc0SZev Weiss 0x115, 0x125, 0x135, 0x195, 0x1a5 }; 829c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = { 830c3963bc0SZev Weiss 0x116, 0x126, 0x136, 0x196, 0x1a6 }; 831c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_START_OUTPUT[] = { 832c3963bc0SZev Weiss 0x117, 0x127, 0x137, 0x197, 0x1a7 }; 833c3963bc0SZev Weiss static const u16 NCT6116_REG_FAN_STOP_TIME[] = { 834c3963bc0SZev Weiss 0x118, 0x128, 0x138, 0x198, 0x1a8 }; 835c3963bc0SZev Weiss static const u16 NCT6116_REG_TOLERANCE_H[] = { 836c3963bc0SZev Weiss 0x112, 0x122, 0x132, 0x192, 0x1a2 }; 837c3963bc0SZev Weiss 838c3963bc0SZev Weiss static const u16 NCT6116_REG_TARGET[] = { 839c3963bc0SZev Weiss 0x111, 0x121, 0x131, 0x191, 0x1a1 }; 840c3963bc0SZev Weiss 841c3963bc0SZev Weiss static const u16 NCT6116_REG_AUTO_TEMP[] = { 842c3963bc0SZev Weiss 0x160, 0x170, 0x180, 0x1d0, 0x1e0 }; 843c3963bc0SZev Weiss static const u16 NCT6116_REG_AUTO_PWM[] = { 844c3963bc0SZev Weiss 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; 845c3963bc0SZev Weiss 846c3963bc0SZev Weiss static const s8 NCT6116_ALARM_BITS[] = { 847c3963bc0SZev Weiss 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 848c3963bc0SZev Weiss 9, -1, -1, -1, -1, -1, -1, /* in8..in9 */ 849c3963bc0SZev Weiss -1, /* unused */ 850c3963bc0SZev Weiss 32, 33, 34, 35, 36, /* fan1..fan5 */ 851c3963bc0SZev Weiss -1, -1, -1, /* unused */ 852c3963bc0SZev Weiss 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ 853c3963bc0SZev Weiss 48, -1 /* intrusion0, intrusion1 */ 854c3963bc0SZev Weiss }; 855c3963bc0SZev Weiss 856c3963bc0SZev Weiss static const s8 NCT6116_BEEP_BITS[] = { 857c3963bc0SZev Weiss 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 858c3963bc0SZev Weiss 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ 859c3963bc0SZev Weiss 32, /* global beep enable */ 860c3963bc0SZev Weiss 24, 25, 26, 27, 28, /* fan1..fan5 */ 861c3963bc0SZev Weiss -1, -1, -1, /* unused */ 862c3963bc0SZev Weiss 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ 863c3963bc0SZev Weiss 34, -1 /* intrusion0, intrusion1 */ 864c3963bc0SZev Weiss }; 865c3963bc0SZev Weiss 866c3963bc0SZev Weiss static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; 867c3963bc0SZev Weiss 868c3963bc0SZev Weiss static enum pwm_enable reg_to_pwm_enable(int pwm, int mode) 869c3963bc0SZev Weiss { 870c3963bc0SZev Weiss if (mode == 0 && pwm == 255) 871c3963bc0SZev Weiss return off; 872c3963bc0SZev Weiss return mode + 1; 873c3963bc0SZev Weiss } 874c3963bc0SZev Weiss 875c3963bc0SZev Weiss static int pwm_enable_to_reg(enum pwm_enable mode) 876c3963bc0SZev Weiss { 877c3963bc0SZev Weiss if (mode == off) 878c3963bc0SZev Weiss return 0; 879c3963bc0SZev Weiss return mode - 1; 880c3963bc0SZev Weiss } 881c3963bc0SZev Weiss 882c3963bc0SZev Weiss /* 883c3963bc0SZev Weiss * Conversions 884c3963bc0SZev Weiss */ 885c3963bc0SZev Weiss 886c3963bc0SZev Weiss /* 1 is DC mode, output in ms */ 887c3963bc0SZev Weiss static unsigned int step_time_from_reg(u8 reg, u8 mode) 888c3963bc0SZev Weiss { 889c3963bc0SZev Weiss return mode ? 400 * reg : 100 * reg; 890c3963bc0SZev Weiss } 891c3963bc0SZev Weiss 892c3963bc0SZev Weiss static u8 step_time_to_reg(unsigned int msec, u8 mode) 893c3963bc0SZev Weiss { 894c3963bc0SZev Weiss return clamp_val((mode ? (msec + 200) / 400 : 895c3963bc0SZev Weiss (msec + 50) / 100), 1, 255); 896c3963bc0SZev Weiss } 897c3963bc0SZev Weiss 898c3963bc0SZev Weiss static unsigned int fan_from_reg8(u16 reg, unsigned int divreg) 899c3963bc0SZev Weiss { 900c3963bc0SZev Weiss if (reg == 0 || reg == 255) 901c3963bc0SZev Weiss return 0; 902c3963bc0SZev Weiss return 1350000U / (reg << divreg); 903c3963bc0SZev Weiss } 904c3963bc0SZev Weiss 905c3963bc0SZev Weiss static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 906c3963bc0SZev Weiss { 907c3963bc0SZev Weiss if ((reg & 0xff1f) == 0xff1f) 908c3963bc0SZev Weiss return 0; 909c3963bc0SZev Weiss 910c3963bc0SZev Weiss reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 911c3963bc0SZev Weiss 912c3963bc0SZev Weiss if (reg == 0) 913c3963bc0SZev Weiss return 0; 914c3963bc0SZev Weiss 915c3963bc0SZev Weiss return 1350000U / reg; 916c3963bc0SZev Weiss } 917c3963bc0SZev Weiss 918c3963bc0SZev Weiss static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 919c3963bc0SZev Weiss { 920c3963bc0SZev Weiss if (reg == 0 || reg == 0xffff) 921c3963bc0SZev Weiss return 0; 922c3963bc0SZev Weiss 923c3963bc0SZev Weiss /* 924c3963bc0SZev Weiss * Even though the registers are 16 bit wide, the fan divisor 925c3963bc0SZev Weiss * still applies. 926c3963bc0SZev Weiss */ 927c3963bc0SZev Weiss return 1350000U / (reg << divreg); 928c3963bc0SZev Weiss } 929c3963bc0SZev Weiss 930c3963bc0SZev Weiss static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg) 931c3963bc0SZev Weiss { 932c3963bc0SZev Weiss return reg; 933c3963bc0SZev Weiss } 934c3963bc0SZev Weiss 935c3963bc0SZev Weiss static u16 fan_to_reg(u32 fan, unsigned int divreg) 936c3963bc0SZev Weiss { 937c3963bc0SZev Weiss if (!fan) 938c3963bc0SZev Weiss return 0; 939c3963bc0SZev Weiss 940c3963bc0SZev Weiss return (1350000U / fan) >> divreg; 941c3963bc0SZev Weiss } 942c3963bc0SZev Weiss 943c3963bc0SZev Weiss static inline unsigned int 944c3963bc0SZev Weiss div_from_reg(u8 reg) 945c3963bc0SZev Weiss { 946c3963bc0SZev Weiss return BIT(reg); 947c3963bc0SZev Weiss } 948c3963bc0SZev Weiss 949c3963bc0SZev Weiss /* 950c3963bc0SZev Weiss * Some of the voltage inputs have internal scaling, the tables below 951c3963bc0SZev Weiss * contain 8 (the ADC LSB in mV) * scaling factor * 100 952c3963bc0SZev Weiss */ 953c3963bc0SZev Weiss static const u16 scale_in[15] = { 954c3963bc0SZev Weiss 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800, 955c3963bc0SZev Weiss 800, 800 956c3963bc0SZev Weiss }; 957c3963bc0SZev Weiss 958c3963bc0SZev Weiss static inline long in_from_reg(u8 reg, u8 nr) 959c3963bc0SZev Weiss { 960c3963bc0SZev Weiss return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100); 961c3963bc0SZev Weiss } 962c3963bc0SZev Weiss 963c3963bc0SZev Weiss static inline u8 in_to_reg(u32 val, u8 nr) 964c3963bc0SZev Weiss { 965c3963bc0SZev Weiss return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255); 966c3963bc0SZev Weiss } 967c3963bc0SZev Weiss 968c3963bc0SZev Weiss /* TSI temperatures are in 8.3 format */ 969c3963bc0SZev Weiss static inline unsigned int tsi_temp_from_reg(unsigned int reg) 970c3963bc0SZev Weiss { 971c3963bc0SZev Weiss return (reg >> 5) * 125; 972c3963bc0SZev Weiss } 973c3963bc0SZev Weiss 974c3963bc0SZev Weiss /* 975c3963bc0SZev Weiss * Data structures and manipulation thereof 976c3963bc0SZev Weiss */ 977c3963bc0SZev Weiss 978c3963bc0SZev Weiss struct sensor_device_template { 979c3963bc0SZev Weiss struct device_attribute dev_attr; 980c3963bc0SZev Weiss union { 981c3963bc0SZev Weiss struct { 982c3963bc0SZev Weiss u8 nr; 983c3963bc0SZev Weiss u8 index; 984c3963bc0SZev Weiss } s; 985c3963bc0SZev Weiss int index; 986c3963bc0SZev Weiss } u; 987c3963bc0SZev Weiss bool s2; /* true if both index and nr are used */ 988c3963bc0SZev Weiss }; 989c3963bc0SZev Weiss 990c3963bc0SZev Weiss struct sensor_device_attr_u { 991c3963bc0SZev Weiss union { 992c3963bc0SZev Weiss struct sensor_device_attribute a1; 993c3963bc0SZev Weiss struct sensor_device_attribute_2 a2; 994c3963bc0SZev Weiss } u; 995c3963bc0SZev Weiss char name[32]; 996c3963bc0SZev Weiss }; 997c3963bc0SZev Weiss 998c3963bc0SZev Weiss #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \ 999c3963bc0SZev Weiss .attr = {.name = _template, .mode = _mode }, \ 1000c3963bc0SZev Weiss .show = _show, \ 1001c3963bc0SZev Weiss .store = _store, \ 1002c3963bc0SZev Weiss } 1003c3963bc0SZev Weiss 1004c3963bc0SZev Weiss #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \ 1005c3963bc0SZev Weiss { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1006c3963bc0SZev Weiss .u.index = _index, \ 1007c3963bc0SZev Weiss .s2 = false } 1008c3963bc0SZev Weiss 1009c3963bc0SZev Weiss #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1010c3963bc0SZev Weiss _nr, _index) \ 1011c3963bc0SZev Weiss { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1012c3963bc0SZev Weiss .u.s.index = _index, \ 1013c3963bc0SZev Weiss .u.s.nr = _nr, \ 1014c3963bc0SZev Weiss .s2 = true } 1015c3963bc0SZev Weiss 1016c3963bc0SZev Weiss #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \ 1017c3963bc0SZev Weiss static struct sensor_device_template sensor_dev_template_##_name \ 1018c3963bc0SZev Weiss = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \ 1019c3963bc0SZev Weiss _index) 1020c3963bc0SZev Weiss 1021c3963bc0SZev Weiss #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \ 1022c3963bc0SZev Weiss _nr, _index) \ 1023c3963bc0SZev Weiss static struct sensor_device_template sensor_dev_template_##_name \ 1024c3963bc0SZev Weiss = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1025c3963bc0SZev Weiss _nr, _index) 1026c3963bc0SZev Weiss 1027c3963bc0SZev Weiss struct sensor_template_group { 1028c3963bc0SZev Weiss struct sensor_device_template **templates; 1029c3963bc0SZev Weiss umode_t (*is_visible)(struct kobject *, struct attribute *, int); 1030c3963bc0SZev Weiss int base; 1031c3963bc0SZev Weiss }; 1032c3963bc0SZev Weiss 1033c3963bc0SZev Weiss static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data, 1034c3963bc0SZev Weiss const struct sensor_template_group *tg, int repeat) 1035c3963bc0SZev Weiss { 1036c3963bc0SZev Weiss struct attribute_group *group; 1037c3963bc0SZev Weiss struct sensor_device_attr_u *su; 1038c3963bc0SZev Weiss struct sensor_device_attribute *a; 1039c3963bc0SZev Weiss struct sensor_device_attribute_2 *a2; 1040c3963bc0SZev Weiss struct attribute **attrs; 1041c3963bc0SZev Weiss struct sensor_device_template **t; 1042c3963bc0SZev Weiss int i, count; 1043c3963bc0SZev Weiss 1044c3963bc0SZev Weiss if (repeat <= 0) 1045c3963bc0SZev Weiss return -EINVAL; 1046c3963bc0SZev Weiss 1047c3963bc0SZev Weiss t = tg->templates; 1048c3963bc0SZev Weiss for (count = 0; *t; t++, count++) 1049c3963bc0SZev Weiss ; 1050c3963bc0SZev Weiss 1051c3963bc0SZev Weiss if (count == 0) 1052c3963bc0SZev Weiss return -EINVAL; 1053c3963bc0SZev Weiss 1054c3963bc0SZev Weiss group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL); 1055c3963bc0SZev Weiss if (group == NULL) 1056c3963bc0SZev Weiss return -ENOMEM; 1057c3963bc0SZev Weiss 1058c3963bc0SZev Weiss attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs), 1059c3963bc0SZev Weiss GFP_KERNEL); 1060c3963bc0SZev Weiss if (attrs == NULL) 1061c3963bc0SZev Weiss return -ENOMEM; 1062c3963bc0SZev Weiss 1063c3963bc0SZev Weiss su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)), 1064c3963bc0SZev Weiss GFP_KERNEL); 1065c3963bc0SZev Weiss if (su == NULL) 1066c3963bc0SZev Weiss return -ENOMEM; 1067c3963bc0SZev Weiss 1068c3963bc0SZev Weiss group->attrs = attrs; 1069c3963bc0SZev Weiss group->is_visible = tg->is_visible; 1070c3963bc0SZev Weiss 1071c3963bc0SZev Weiss for (i = 0; i < repeat; i++) { 1072c3963bc0SZev Weiss t = tg->templates; 1073c3963bc0SZev Weiss while (*t != NULL) { 1074c3963bc0SZev Weiss snprintf(su->name, sizeof(su->name), 1075c3963bc0SZev Weiss (*t)->dev_attr.attr.name, tg->base + i); 1076c3963bc0SZev Weiss if ((*t)->s2) { 1077c3963bc0SZev Weiss a2 = &su->u.a2; 1078c3963bc0SZev Weiss sysfs_attr_init(&a2->dev_attr.attr); 1079c3963bc0SZev Weiss a2->dev_attr.attr.name = su->name; 1080c3963bc0SZev Weiss a2->nr = (*t)->u.s.nr + i; 1081c3963bc0SZev Weiss a2->index = (*t)->u.s.index; 1082c3963bc0SZev Weiss a2->dev_attr.attr.mode = 1083c3963bc0SZev Weiss (*t)->dev_attr.attr.mode; 1084c3963bc0SZev Weiss a2->dev_attr.show = (*t)->dev_attr.show; 1085c3963bc0SZev Weiss a2->dev_attr.store = (*t)->dev_attr.store; 1086c3963bc0SZev Weiss *attrs = &a2->dev_attr.attr; 1087c3963bc0SZev Weiss } else { 1088c3963bc0SZev Weiss a = &su->u.a1; 1089c3963bc0SZev Weiss sysfs_attr_init(&a->dev_attr.attr); 1090c3963bc0SZev Weiss a->dev_attr.attr.name = su->name; 1091c3963bc0SZev Weiss a->index = (*t)->u.index + i; 1092c3963bc0SZev Weiss a->dev_attr.attr.mode = 1093c3963bc0SZev Weiss (*t)->dev_attr.attr.mode; 1094c3963bc0SZev Weiss a->dev_attr.show = (*t)->dev_attr.show; 1095c3963bc0SZev Weiss a->dev_attr.store = (*t)->dev_attr.store; 1096c3963bc0SZev Weiss *attrs = &a->dev_attr.attr; 1097c3963bc0SZev Weiss } 1098c3963bc0SZev Weiss attrs++; 1099c3963bc0SZev Weiss su++; 1100c3963bc0SZev Weiss t++; 1101c3963bc0SZev Weiss } 1102c3963bc0SZev Weiss } 1103c3963bc0SZev Weiss 1104c3963bc0SZev Weiss return nct6775_add_attr_group(data, group); 1105c3963bc0SZev Weiss } 1106c3963bc0SZev Weiss 1107c3963bc0SZev Weiss bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg) 1108c3963bc0SZev Weiss { 1109c3963bc0SZev Weiss switch (data->kind) { 1110c3963bc0SZev Weiss case nct6106: 1111c3963bc0SZev Weiss return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1112c3963bc0SZev Weiss (reg >= 0x59 && reg < 0x69 && (reg & 1)) || 1113c3963bc0SZev Weiss reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || 1114c3963bc0SZev Weiss reg == 0x111 || reg == 0x121 || reg == 0x131; 1115c3963bc0SZev Weiss case nct6116: 1116c3963bc0SZev Weiss return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1117c3963bc0SZev Weiss reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || 1118c3963bc0SZev Weiss reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || 1119c3963bc0SZev Weiss reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || 1120c3963bc0SZev Weiss reg == 0x191 || reg == 0x1a1; 1121c3963bc0SZev Weiss case nct6775: 1122c3963bc0SZev Weiss return (((reg & 0xff00) == 0x100 || 1123c3963bc0SZev Weiss (reg & 0xff00) == 0x200) && 1124c3963bc0SZev Weiss ((reg & 0x00ff) == 0x50 || 1125c3963bc0SZev Weiss (reg & 0x00ff) == 0x53 || 1126c3963bc0SZev Weiss (reg & 0x00ff) == 0x55)) || 1127c3963bc0SZev Weiss (reg & 0xfff0) == 0x630 || 1128c3963bc0SZev Weiss reg == 0x640 || reg == 0x642 || 1129c3963bc0SZev Weiss reg == 0x662 || reg == 0x669 || 1130c3963bc0SZev Weiss ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1131c3963bc0SZev Weiss reg == 0x73 || reg == 0x75 || reg == 0x77; 1132c3963bc0SZev Weiss case nct6776: 1133c3963bc0SZev Weiss return (((reg & 0xff00) == 0x100 || 1134c3963bc0SZev Weiss (reg & 0xff00) == 0x200) && 1135c3963bc0SZev Weiss ((reg & 0x00ff) == 0x50 || 1136c3963bc0SZev Weiss (reg & 0x00ff) == 0x53 || 1137c3963bc0SZev Weiss (reg & 0x00ff) == 0x55)) || 1138c3963bc0SZev Weiss (reg & 0xfff0) == 0x630 || 1139c3963bc0SZev Weiss reg == 0x402 || 1140c3963bc0SZev Weiss (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1141c3963bc0SZev Weiss reg == 0x640 || reg == 0x642 || 1142c3963bc0SZev Weiss ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1143c3963bc0SZev Weiss reg == 0x73 || reg == 0x75 || reg == 0x77; 1144c3963bc0SZev Weiss case nct6779: 1145c3963bc0SZev Weiss case nct6791: 1146c3963bc0SZev Weiss case nct6792: 1147c3963bc0SZev Weiss case nct6793: 1148c3963bc0SZev Weiss case nct6795: 1149c3963bc0SZev Weiss case nct6796: 1150c3963bc0SZev Weiss case nct6797: 1151c3963bc0SZev Weiss case nct6798: 1152*aee395bbSGuenter Roeck case nct6799: 1153c3963bc0SZev Weiss return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1154c3963bc0SZev Weiss (reg & 0xfff0) == 0x4c0 || 1155c3963bc0SZev Weiss reg == 0x402 || 1156c3963bc0SZev Weiss (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1157c3963bc0SZev Weiss reg == 0x63a || reg == 0x63c || reg == 0x63e || 1158c3963bc0SZev Weiss reg == 0x640 || reg == 0x642 || reg == 0x64a || 1159c3963bc0SZev Weiss reg == 0x64c || 1160c3963bc0SZev Weiss reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || 1161c3963bc0SZev Weiss reg == 0x7b || reg == 0x7d; 1162c3963bc0SZev Weiss } 1163c3963bc0SZev Weiss return false; 1164c3963bc0SZev Weiss } 1165c3963bc0SZev Weiss EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized); 1166c3963bc0SZev Weiss 1167c3963bc0SZev Weiss /* We left-align 8-bit temperature values to make the code simpler */ 1168c3963bc0SZev Weiss static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val) 1169c3963bc0SZev Weiss { 1170c3963bc0SZev Weiss int err; 1171c3963bc0SZev Weiss 1172c3963bc0SZev Weiss err = nct6775_read_value(data, reg, val); 1173c3963bc0SZev Weiss if (err) 1174c3963bc0SZev Weiss return err; 1175c3963bc0SZev Weiss 1176c3963bc0SZev Weiss if (!nct6775_reg_is_word_sized(data, reg)) 1177c3963bc0SZev Weiss *val <<= 8; 1178c3963bc0SZev Weiss 1179c3963bc0SZev Weiss return 0; 1180c3963bc0SZev Weiss } 1181c3963bc0SZev Weiss 1182c3963bc0SZev Weiss /* This function assumes that the caller holds data->update_lock */ 1183c3963bc0SZev Weiss static int nct6775_write_fan_div(struct nct6775_data *data, int nr) 1184c3963bc0SZev Weiss { 1185c3963bc0SZev Weiss u16 reg; 1186c3963bc0SZev Weiss int err; 1187c3963bc0SZev Weiss u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2; 1188c3963bc0SZev Weiss unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */ 1189c3963bc0SZev Weiss 1190c3963bc0SZev Weiss err = nct6775_read_value(data, fandiv_reg, ®); 1191c3963bc0SZev Weiss if (err) 1192c3963bc0SZev Weiss return err; 1193c3963bc0SZev Weiss reg &= 0x70 >> oddshift; 11942fbb848bSZev Weiss reg |= (data->fan_div[nr] & 0x7) << oddshift; 1195c3963bc0SZev Weiss return nct6775_write_value(data, fandiv_reg, reg); 1196c3963bc0SZev Weiss } 1197c3963bc0SZev Weiss 1198c3963bc0SZev Weiss static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr) 1199c3963bc0SZev Weiss { 1200c3963bc0SZev Weiss if (data->kind == nct6775) 1201c3963bc0SZev Weiss return nct6775_write_fan_div(data, nr); 1202c3963bc0SZev Weiss return 0; 1203c3963bc0SZev Weiss } 1204c3963bc0SZev Weiss 1205c3963bc0SZev Weiss static int nct6775_update_fan_div(struct nct6775_data *data) 1206c3963bc0SZev Weiss { 1207c3963bc0SZev Weiss int err; 1208c3963bc0SZev Weiss u16 i; 1209c3963bc0SZev Weiss 1210c3963bc0SZev Weiss err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i); 1211c3963bc0SZev Weiss if (err) 1212c3963bc0SZev Weiss return err; 1213c3963bc0SZev Weiss data->fan_div[0] = i & 0x7; 1214c3963bc0SZev Weiss data->fan_div[1] = (i & 0x70) >> 4; 1215c3963bc0SZev Weiss err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i); 1216c3963bc0SZev Weiss if (err) 1217c3963bc0SZev Weiss return err; 1218c3963bc0SZev Weiss data->fan_div[2] = i & 0x7; 1219c3963bc0SZev Weiss if (data->has_fan & BIT(3)) 1220c3963bc0SZev Weiss data->fan_div[3] = (i & 0x70) >> 4; 1221c3963bc0SZev Weiss 1222c3963bc0SZev Weiss return 0; 1223c3963bc0SZev Weiss } 1224c3963bc0SZev Weiss 1225c3963bc0SZev Weiss static int nct6775_update_fan_div_common(struct nct6775_data *data) 1226c3963bc0SZev Weiss { 1227c3963bc0SZev Weiss if (data->kind == nct6775) 1228c3963bc0SZev Weiss return nct6775_update_fan_div(data); 1229c3963bc0SZev Weiss return 0; 1230c3963bc0SZev Weiss } 1231c3963bc0SZev Weiss 1232c3963bc0SZev Weiss static int nct6775_init_fan_div(struct nct6775_data *data) 1233c3963bc0SZev Weiss { 1234c3963bc0SZev Weiss int i, err; 1235c3963bc0SZev Weiss 1236c3963bc0SZev Weiss err = nct6775_update_fan_div_common(data); 1237c3963bc0SZev Weiss if (err) 1238c3963bc0SZev Weiss return err; 1239c3963bc0SZev Weiss 1240c3963bc0SZev Weiss /* 1241c3963bc0SZev Weiss * For all fans, start with highest divider value if the divider 1242c3963bc0SZev Weiss * register is not initialized. This ensures that we get a 1243c3963bc0SZev Weiss * reading from the fan count register, even if it is not optimal. 1244c3963bc0SZev Weiss * We'll compute a better divider later on. 1245c3963bc0SZev Weiss */ 1246c3963bc0SZev Weiss for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { 1247c3963bc0SZev Weiss if (!(data->has_fan & BIT(i))) 1248c3963bc0SZev Weiss continue; 1249c3963bc0SZev Weiss if (data->fan_div[i] == 0) { 1250c3963bc0SZev Weiss data->fan_div[i] = 7; 1251c3963bc0SZev Weiss err = nct6775_write_fan_div_common(data, i); 1252c3963bc0SZev Weiss if (err) 1253c3963bc0SZev Weiss return err; 1254c3963bc0SZev Weiss } 1255c3963bc0SZev Weiss } 1256c3963bc0SZev Weiss 1257c3963bc0SZev Weiss return 0; 1258c3963bc0SZev Weiss } 1259c3963bc0SZev Weiss 1260c3963bc0SZev Weiss static int nct6775_init_fan_common(struct device *dev, 1261c3963bc0SZev Weiss struct nct6775_data *data) 1262c3963bc0SZev Weiss { 1263c3963bc0SZev Weiss int i, err; 1264c3963bc0SZev Weiss u16 reg; 1265c3963bc0SZev Weiss 1266c3963bc0SZev Weiss if (data->has_fan_div) { 1267c3963bc0SZev Weiss err = nct6775_init_fan_div(data); 1268c3963bc0SZev Weiss if (err) 1269c3963bc0SZev Weiss return err; 1270c3963bc0SZev Weiss } 1271c3963bc0SZev Weiss 1272c3963bc0SZev Weiss /* 1273c3963bc0SZev Weiss * If fan_min is not set (0), set it to 0xff to disable it. This 1274c3963bc0SZev Weiss * prevents the unnecessary warning when fanX_min is reported as 0. 1275c3963bc0SZev Weiss */ 1276c3963bc0SZev Weiss for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { 1277c3963bc0SZev Weiss if (data->has_fan_min & BIT(i)) { 1278c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1279c3963bc0SZev Weiss if (err) 1280c3963bc0SZev Weiss return err; 1281c3963bc0SZev Weiss if (!reg) { 1282c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_MIN[i], 1283c3963bc0SZev Weiss data->has_fan_div ? 0xff : 0xff1f); 1284c3963bc0SZev Weiss if (err) 1285c3963bc0SZev Weiss return err; 1286c3963bc0SZev Weiss } 1287c3963bc0SZev Weiss } 1288c3963bc0SZev Weiss } 1289c3963bc0SZev Weiss 1290c3963bc0SZev Weiss return 0; 1291c3963bc0SZev Weiss } 1292c3963bc0SZev Weiss 1293c3963bc0SZev Weiss static int nct6775_select_fan_div(struct device *dev, 1294c3963bc0SZev Weiss struct nct6775_data *data, int nr, u16 reg) 1295c3963bc0SZev Weiss { 1296c3963bc0SZev Weiss int err; 1297c3963bc0SZev Weiss u8 fan_div = data->fan_div[nr]; 1298c3963bc0SZev Weiss u16 fan_min; 1299c3963bc0SZev Weiss 1300c3963bc0SZev Weiss if (!data->has_fan_div) 1301c3963bc0SZev Weiss return 0; 1302c3963bc0SZev Weiss 1303c3963bc0SZev Weiss /* 1304c3963bc0SZev Weiss * If we failed to measure the fan speed, or the reported value is not 1305c3963bc0SZev Weiss * in the optimal range, and the clock divider can be modified, 1306c3963bc0SZev Weiss * let's try that for next time. 1307c3963bc0SZev Weiss */ 1308c3963bc0SZev Weiss if (reg == 0x00 && fan_div < 0x07) 1309c3963bc0SZev Weiss fan_div++; 1310c3963bc0SZev Weiss else if (reg != 0x00 && reg < 0x30 && fan_div > 0) 1311c3963bc0SZev Weiss fan_div--; 1312c3963bc0SZev Weiss 1313c3963bc0SZev Weiss if (fan_div != data->fan_div[nr]) { 1314c3963bc0SZev Weiss dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n", 1315c3963bc0SZev Weiss nr + 1, div_from_reg(data->fan_div[nr]), 1316c3963bc0SZev Weiss div_from_reg(fan_div)); 1317c3963bc0SZev Weiss 1318c3963bc0SZev Weiss /* Preserve min limit if possible */ 1319c3963bc0SZev Weiss if (data->has_fan_min & BIT(nr)) { 1320c3963bc0SZev Weiss fan_min = data->fan_min[nr]; 1321c3963bc0SZev Weiss if (fan_div > data->fan_div[nr]) { 1322c3963bc0SZev Weiss if (fan_min != 255 && fan_min > 1) 1323c3963bc0SZev Weiss fan_min >>= 1; 1324c3963bc0SZev Weiss } else { 1325c3963bc0SZev Weiss if (fan_min != 255) { 1326c3963bc0SZev Weiss fan_min <<= 1; 1327c3963bc0SZev Weiss if (fan_min > 254) 1328c3963bc0SZev Weiss fan_min = 254; 1329c3963bc0SZev Weiss } 1330c3963bc0SZev Weiss } 1331c3963bc0SZev Weiss if (fan_min != data->fan_min[nr]) { 1332c3963bc0SZev Weiss data->fan_min[nr] = fan_min; 1333c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min); 1334c3963bc0SZev Weiss if (err) 1335c3963bc0SZev Weiss return err; 1336c3963bc0SZev Weiss } 1337c3963bc0SZev Weiss } 1338c3963bc0SZev Weiss data->fan_div[nr] = fan_div; 1339c3963bc0SZev Weiss err = nct6775_write_fan_div_common(data, nr); 1340c3963bc0SZev Weiss if (err) 1341c3963bc0SZev Weiss return err; 1342c3963bc0SZev Weiss } 1343c3963bc0SZev Weiss 1344c3963bc0SZev Weiss return 0; 1345c3963bc0SZev Weiss } 1346c3963bc0SZev Weiss 1347c3963bc0SZev Weiss static int nct6775_update_pwm(struct device *dev) 1348c3963bc0SZev Weiss { 1349c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1350c3963bc0SZev Weiss int i, j, err; 1351c3963bc0SZev Weiss u16 fanmodecfg, reg; 1352c3963bc0SZev Weiss bool duty_is_dc; 1353c3963bc0SZev Weiss 1354c3963bc0SZev Weiss for (i = 0; i < data->pwm_num; i++) { 1355c3963bc0SZev Weiss if (!(data->has_pwm & BIT(i))) 1356c3963bc0SZev Weiss continue; 1357c3963bc0SZev Weiss 1358c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®); 1359c3963bc0SZev Weiss if (err) 1360c3963bc0SZev Weiss return err; 1361c3963bc0SZev Weiss duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]); 1362c3963bc0SZev Weiss data->pwm_mode[i] = !duty_is_dc; 1363c3963bc0SZev Weiss 1364c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg); 1365c3963bc0SZev Weiss if (err) 1366c3963bc0SZev Weiss return err; 1367c3963bc0SZev Weiss for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { 1368c3963bc0SZev Weiss if (data->REG_PWM[j] && data->REG_PWM[j][i]) { 1369c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_PWM[j][i], ®); 1370c3963bc0SZev Weiss if (err) 1371c3963bc0SZev Weiss return err; 1372c3963bc0SZev Weiss data->pwm[j][i] = reg; 1373c3963bc0SZev Weiss } 1374c3963bc0SZev Weiss } 1375c3963bc0SZev Weiss 1376c3963bc0SZev Weiss data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], 1377c3963bc0SZev Weiss (fanmodecfg >> 4) & 7); 1378c3963bc0SZev Weiss 1379c3963bc0SZev Weiss if (!data->temp_tolerance[0][i] || 1380c3963bc0SZev Weiss data->pwm_enable[i] != speed_cruise) 1381c3963bc0SZev Weiss data->temp_tolerance[0][i] = fanmodecfg & 0x0f; 1382c3963bc0SZev Weiss if (!data->target_speed_tolerance[i] || 1383c3963bc0SZev Weiss data->pwm_enable[i] == speed_cruise) { 1384c3963bc0SZev Weiss u8 t = fanmodecfg & 0x0f; 1385c3963bc0SZev Weiss 1386c3963bc0SZev Weiss if (data->REG_TOLERANCE_H) { 1387c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1388c3963bc0SZev Weiss if (err) 1389c3963bc0SZev Weiss return err; 1390c3963bc0SZev Weiss t |= (reg & 0x70) >> 1; 1391c3963bc0SZev Weiss } 1392c3963bc0SZev Weiss data->target_speed_tolerance[i] = t; 1393c3963bc0SZev Weiss } 1394c3963bc0SZev Weiss 1395c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®); 1396c3963bc0SZev Weiss if (err) 1397c3963bc0SZev Weiss return err; 1398c3963bc0SZev Weiss data->temp_tolerance[1][i] = reg; 1399c3963bc0SZev Weiss 1400c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®); 1401c3963bc0SZev Weiss if (err) 1402c3963bc0SZev Weiss return err; 1403c3963bc0SZev Weiss data->pwm_temp_sel[i] = reg & 0x1f; 1404c3963bc0SZev Weiss /* If fan can stop, report floor as 0 */ 1405c3963bc0SZev Weiss if (reg & 0x80) 1406c3963bc0SZev Weiss data->pwm[2][i] = 0; 1407c3963bc0SZev Weiss 1408c3963bc0SZev Weiss if (!data->REG_WEIGHT_TEMP_SEL[i]) 1409c3963bc0SZev Weiss continue; 1410c3963bc0SZev Weiss 1411c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®); 1412c3963bc0SZev Weiss if (err) 1413c3963bc0SZev Weiss return err; 1414c3963bc0SZev Weiss data->pwm_weight_temp_sel[i] = reg & 0x1f; 1415c3963bc0SZev Weiss /* If weight is disabled, report weight source as 0 */ 1416c3963bc0SZev Weiss if (!(reg & 0x80)) 1417c3963bc0SZev Weiss data->pwm_weight_temp_sel[i] = 0; 1418c3963bc0SZev Weiss 1419c3963bc0SZev Weiss /* Weight temp data */ 1420c3963bc0SZev Weiss for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { 1421c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®); 1422c3963bc0SZev Weiss if (err) 1423c3963bc0SZev Weiss return err; 1424c3963bc0SZev Weiss data->weight_temp[j][i] = reg; 1425c3963bc0SZev Weiss } 1426c3963bc0SZev Weiss } 1427c3963bc0SZev Weiss 1428c3963bc0SZev Weiss return 0; 1429c3963bc0SZev Weiss } 1430c3963bc0SZev Weiss 1431c3963bc0SZev Weiss static int nct6775_update_pwm_limits(struct device *dev) 1432c3963bc0SZev Weiss { 1433c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1434c3963bc0SZev Weiss int i, j, err; 1435c3963bc0SZev Weiss u16 reg, reg_t; 1436c3963bc0SZev Weiss 1437c3963bc0SZev Weiss for (i = 0; i < data->pwm_num; i++) { 1438c3963bc0SZev Weiss if (!(data->has_pwm & BIT(i))) 1439c3963bc0SZev Weiss continue; 1440c3963bc0SZev Weiss 1441c3963bc0SZev Weiss for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { 1442c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®); 1443c3963bc0SZev Weiss if (err) 1444c3963bc0SZev Weiss return err; 1445c3963bc0SZev Weiss data->fan_time[j][i] = reg; 1446c3963bc0SZev Weiss } 1447c3963bc0SZev Weiss 1448c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TARGET[i], ®_t); 1449c3963bc0SZev Weiss if (err) 1450c3963bc0SZev Weiss return err; 1451c3963bc0SZev Weiss 1452c3963bc0SZev Weiss /* Update only in matching mode or if never updated */ 1453c3963bc0SZev Weiss if (!data->target_temp[i] || 1454c3963bc0SZev Weiss data->pwm_enable[i] == thermal_cruise) 1455c3963bc0SZev Weiss data->target_temp[i] = reg_t & data->target_temp_mask; 1456c3963bc0SZev Weiss if (!data->target_speed[i] || 1457c3963bc0SZev Weiss data->pwm_enable[i] == speed_cruise) { 1458c3963bc0SZev Weiss if (data->REG_TOLERANCE_H) { 1459c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1460c3963bc0SZev Weiss if (err) 1461c3963bc0SZev Weiss return err; 1462c3963bc0SZev Weiss reg_t |= (reg & 0x0f) << 8; 1463c3963bc0SZev Weiss } 1464c3963bc0SZev Weiss data->target_speed[i] = reg_t; 1465c3963bc0SZev Weiss } 1466c3963bc0SZev Weiss 1467c3963bc0SZev Weiss for (j = 0; j < data->auto_pwm_num; j++) { 1468c3963bc0SZev Weiss err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®); 1469c3963bc0SZev Weiss if (err) 1470c3963bc0SZev Weiss return err; 1471c3963bc0SZev Weiss data->auto_pwm[i][j] = reg; 1472c3963bc0SZev Weiss 1473c3963bc0SZev Weiss err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®); 1474c3963bc0SZev Weiss if (err) 1475c3963bc0SZev Weiss return err; 1476c3963bc0SZev Weiss data->auto_temp[i][j] = reg; 1477c3963bc0SZev Weiss } 1478c3963bc0SZev Weiss 1479c3963bc0SZev Weiss /* critical auto_pwm temperature data */ 1480c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®); 1481c3963bc0SZev Weiss if (err) 1482c3963bc0SZev Weiss return err; 1483c3963bc0SZev Weiss data->auto_temp[i][data->auto_pwm_num] = reg; 1484c3963bc0SZev Weiss 1485c3963bc0SZev Weiss switch (data->kind) { 1486c3963bc0SZev Weiss case nct6775: 1487c3963bc0SZev Weiss err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®); 1488c3963bc0SZev Weiss if (err) 1489c3963bc0SZev Weiss return err; 1490c3963bc0SZev Weiss data->auto_pwm[i][data->auto_pwm_num] = 1491c3963bc0SZev Weiss (reg & 0x02) ? 0xff : 0x00; 1492c3963bc0SZev Weiss break; 1493c3963bc0SZev Weiss case nct6776: 1494c3963bc0SZev Weiss data->auto_pwm[i][data->auto_pwm_num] = 0xff; 1495c3963bc0SZev Weiss break; 1496c3963bc0SZev Weiss case nct6106: 1497c3963bc0SZev Weiss case nct6116: 1498c3963bc0SZev Weiss case nct6779: 1499c3963bc0SZev Weiss case nct6791: 1500c3963bc0SZev Weiss case nct6792: 1501c3963bc0SZev Weiss case nct6793: 1502c3963bc0SZev Weiss case nct6795: 1503c3963bc0SZev Weiss case nct6796: 1504c3963bc0SZev Weiss case nct6797: 1505c3963bc0SZev Weiss case nct6798: 1506*aee395bbSGuenter Roeck case nct6799: 1507c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®); 1508c3963bc0SZev Weiss if (err) 1509c3963bc0SZev Weiss return err; 1510c3963bc0SZev Weiss if (reg & data->CRITICAL_PWM_ENABLE_MASK) { 1511c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®); 1512c3963bc0SZev Weiss if (err) 1513c3963bc0SZev Weiss return err; 1514c3963bc0SZev Weiss } else { 1515c3963bc0SZev Weiss reg = 0xff; 1516c3963bc0SZev Weiss } 1517c3963bc0SZev Weiss data->auto_pwm[i][data->auto_pwm_num] = reg; 1518c3963bc0SZev Weiss break; 1519c3963bc0SZev Weiss } 1520c3963bc0SZev Weiss } 1521c3963bc0SZev Weiss 1522c3963bc0SZev Weiss return 0; 1523c3963bc0SZev Weiss } 1524c3963bc0SZev Weiss 1525f4e6960fSZev Weiss struct nct6775_data *nct6775_update_device(struct device *dev) 1526c3963bc0SZev Weiss { 1527c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1528c3963bc0SZev Weiss int i, j, err = 0; 1529c3963bc0SZev Weiss u16 reg; 1530c3963bc0SZev Weiss 1531c3963bc0SZev Weiss mutex_lock(&data->update_lock); 1532c3963bc0SZev Weiss 1533c3963bc0SZev Weiss if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1534c3963bc0SZev Weiss || !data->valid) { 1535c3963bc0SZev Weiss /* Fan clock dividers */ 1536c3963bc0SZev Weiss err = nct6775_update_fan_div_common(data); 1537c3963bc0SZev Weiss if (err) 1538c3963bc0SZev Weiss goto out; 1539c3963bc0SZev Weiss 1540c3963bc0SZev Weiss /* Measured voltages and limits */ 1541c3963bc0SZev Weiss for (i = 0; i < data->in_num; i++) { 1542c3963bc0SZev Weiss if (!(data->have_in & BIT(i))) 1543c3963bc0SZev Weiss continue; 1544c3963bc0SZev Weiss 1545c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_VIN[i], ®); 1546c3963bc0SZev Weiss if (err) 1547c3963bc0SZev Weiss goto out; 1548c3963bc0SZev Weiss data->in[i][0] = reg; 1549c3963bc0SZev Weiss 1550c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); 1551c3963bc0SZev Weiss if (err) 1552c3963bc0SZev Weiss goto out; 1553c3963bc0SZev Weiss data->in[i][1] = reg; 1554c3963bc0SZev Weiss 1555c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®); 1556c3963bc0SZev Weiss if (err) 1557c3963bc0SZev Weiss goto out; 1558c3963bc0SZev Weiss data->in[i][2] = reg; 1559c3963bc0SZev Weiss } 1560c3963bc0SZev Weiss 1561c3963bc0SZev Weiss /* Measured fan speeds and limits */ 1562c3963bc0SZev Weiss for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { 1563c3963bc0SZev Weiss if (!(data->has_fan & BIT(i))) 1564c3963bc0SZev Weiss continue; 1565c3963bc0SZev Weiss 1566c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN[i], ®); 1567c3963bc0SZev Weiss if (err) 1568c3963bc0SZev Weiss goto out; 1569c3963bc0SZev Weiss data->rpm[i] = data->fan_from_reg(reg, 1570c3963bc0SZev Weiss data->fan_div[i]); 1571c3963bc0SZev Weiss 1572c3963bc0SZev Weiss if (data->has_fan_min & BIT(i)) { 1573c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1574c3963bc0SZev Weiss if (err) 1575c3963bc0SZev Weiss goto out; 1576c3963bc0SZev Weiss data->fan_min[i] = reg; 1577c3963bc0SZev Weiss } 1578c3963bc0SZev Weiss 1579c3963bc0SZev Weiss if (data->REG_FAN_PULSES[i]) { 1580c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®); 1581c3963bc0SZev Weiss if (err) 1582c3963bc0SZev Weiss goto out; 1583c3963bc0SZev Weiss data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03; 1584c3963bc0SZev Weiss } 1585c3963bc0SZev Weiss 1586c3963bc0SZev Weiss err = nct6775_select_fan_div(dev, data, i, reg); 1587c3963bc0SZev Weiss if (err) 1588c3963bc0SZev Weiss goto out; 1589c3963bc0SZev Weiss } 1590c3963bc0SZev Weiss 1591c3963bc0SZev Weiss err = nct6775_update_pwm(dev); 1592c3963bc0SZev Weiss if (err) 1593c3963bc0SZev Weiss goto out; 1594c3963bc0SZev Weiss 1595c3963bc0SZev Weiss err = nct6775_update_pwm_limits(dev); 1596c3963bc0SZev Weiss if (err) 1597c3963bc0SZev Weiss goto out; 1598c3963bc0SZev Weiss 1599c3963bc0SZev Weiss /* Measured temperatures and limits */ 1600c3963bc0SZev Weiss for (i = 0; i < NUM_TEMP; i++) { 1601c3963bc0SZev Weiss if (!(data->have_temp & BIT(i))) 1602c3963bc0SZev Weiss continue; 1603c3963bc0SZev Weiss for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { 1604c3963bc0SZev Weiss if (data->reg_temp[j][i]) { 1605c3963bc0SZev Weiss err = nct6775_read_temp(data, data->reg_temp[j][i], ®); 1606c3963bc0SZev Weiss if (err) 1607c3963bc0SZev Weiss goto out; 1608c3963bc0SZev Weiss data->temp[j][i] = reg; 1609c3963bc0SZev Weiss } 1610c3963bc0SZev Weiss } 1611c3963bc0SZev Weiss if (i >= NUM_TEMP_FIXED || 1612c3963bc0SZev Weiss !(data->have_temp_fixed & BIT(i))) 1613c3963bc0SZev Weiss continue; 1614c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®); 1615c3963bc0SZev Weiss if (err) 1616c3963bc0SZev Weiss goto out; 1617c3963bc0SZev Weiss data->temp_offset[i] = reg; 1618c3963bc0SZev Weiss } 1619c3963bc0SZev Weiss 1620c3963bc0SZev Weiss for (i = 0; i < NUM_TSI_TEMP; i++) { 1621c3963bc0SZev Weiss if (!(data->have_tsi_temp & BIT(i))) 1622c3963bc0SZev Weiss continue; 1623c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®); 1624c3963bc0SZev Weiss if (err) 1625c3963bc0SZev Weiss goto out; 1626c3963bc0SZev Weiss data->tsi_temp[i] = reg; 1627c3963bc0SZev Weiss } 1628c3963bc0SZev Weiss 1629c3963bc0SZev Weiss data->alarms = 0; 1630c3963bc0SZev Weiss for (i = 0; i < NUM_REG_ALARM; i++) { 1631c3963bc0SZev Weiss u16 alarm; 1632c3963bc0SZev Weiss 1633c3963bc0SZev Weiss if (!data->REG_ALARM[i]) 1634c3963bc0SZev Weiss continue; 1635c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_ALARM[i], &alarm); 1636c3963bc0SZev Weiss if (err) 1637c3963bc0SZev Weiss goto out; 1638c3963bc0SZev Weiss data->alarms |= ((u64)alarm) << (i << 3); 1639c3963bc0SZev Weiss } 1640c3963bc0SZev Weiss 1641c3963bc0SZev Weiss data->beeps = 0; 1642c3963bc0SZev Weiss for (i = 0; i < NUM_REG_BEEP; i++) { 1643c3963bc0SZev Weiss u16 beep; 1644c3963bc0SZev Weiss 1645c3963bc0SZev Weiss if (!data->REG_BEEP[i]) 1646c3963bc0SZev Weiss continue; 1647c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_BEEP[i], &beep); 1648c3963bc0SZev Weiss if (err) 1649c3963bc0SZev Weiss goto out; 1650c3963bc0SZev Weiss data->beeps |= ((u64)beep) << (i << 3); 1651c3963bc0SZev Weiss } 1652c3963bc0SZev Weiss 1653c3963bc0SZev Weiss data->last_updated = jiffies; 1654c3963bc0SZev Weiss data->valid = true; 1655c3963bc0SZev Weiss } 1656c3963bc0SZev Weiss out: 1657c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 1658c3963bc0SZev Weiss return err ? ERR_PTR(err) : data; 1659c3963bc0SZev Weiss } 1660f4e6960fSZev Weiss EXPORT_SYMBOL_GPL(nct6775_update_device); 1661c3963bc0SZev Weiss 1662c3963bc0SZev Weiss /* 1663c3963bc0SZev Weiss * Sysfs callback functions 1664c3963bc0SZev Weiss */ 1665c3963bc0SZev Weiss static ssize_t 1666c3963bc0SZev Weiss show_in_reg(struct device *dev, struct device_attribute *attr, char *buf) 1667c3963bc0SZev Weiss { 1668c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1669c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1670c3963bc0SZev Weiss int index = sattr->index; 1671c3963bc0SZev Weiss int nr = sattr->nr; 1672c3963bc0SZev Weiss 1673c3963bc0SZev Weiss if (IS_ERR(data)) 1674c3963bc0SZev Weiss return PTR_ERR(data); 1675c3963bc0SZev Weiss 1676c3963bc0SZev Weiss return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr)); 1677c3963bc0SZev Weiss } 1678c3963bc0SZev Weiss 1679c3963bc0SZev Weiss static ssize_t 1680c3963bc0SZev Weiss store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf, 1681c3963bc0SZev Weiss size_t count) 1682c3963bc0SZev Weiss { 1683c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1684c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1685c3963bc0SZev Weiss int index = sattr->index; 1686c3963bc0SZev Weiss int nr = sattr->nr; 1687c3963bc0SZev Weiss unsigned long val; 1688c3963bc0SZev Weiss int err; 1689c3963bc0SZev Weiss 1690c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 1691c3963bc0SZev Weiss if (err < 0) 1692c3963bc0SZev Weiss return err; 1693c3963bc0SZev Weiss mutex_lock(&data->update_lock); 1694c3963bc0SZev Weiss data->in[nr][index] = in_to_reg(val, nr); 1695c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1696c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 1697c3963bc0SZev Weiss return err ? : count; 1698c3963bc0SZev Weiss } 1699c3963bc0SZev Weiss 1700c3963bc0SZev Weiss ssize_t 1701c3963bc0SZev Weiss nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1702c3963bc0SZev Weiss { 1703c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1704c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1705c3963bc0SZev Weiss int nr; 1706c3963bc0SZev Weiss 1707c3963bc0SZev Weiss if (IS_ERR(data)) 1708c3963bc0SZev Weiss return PTR_ERR(data); 1709c3963bc0SZev Weiss 1710c3963bc0SZev Weiss nr = data->ALARM_BITS[sattr->index]; 1711c3963bc0SZev Weiss return sprintf(buf, "%u\n", 1712c3963bc0SZev Weiss (unsigned int)((data->alarms >> nr) & 0x01)); 1713c3963bc0SZev Weiss } 1714c3963bc0SZev Weiss EXPORT_SYMBOL_GPL(nct6775_show_alarm); 1715c3963bc0SZev Weiss 1716c3963bc0SZev Weiss static int find_temp_source(struct nct6775_data *data, int index, int count) 1717c3963bc0SZev Weiss { 1718c3963bc0SZev Weiss int source = data->temp_src[index]; 1719c3963bc0SZev Weiss int nr, err; 1720c3963bc0SZev Weiss 1721c3963bc0SZev Weiss for (nr = 0; nr < count; nr++) { 1722c3963bc0SZev Weiss u16 src; 1723c3963bc0SZev Weiss 1724c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src); 1725c3963bc0SZev Weiss if (err) 1726c3963bc0SZev Weiss return err; 1727c3963bc0SZev Weiss if ((src & 0x1f) == source) 1728c3963bc0SZev Weiss return nr; 1729c3963bc0SZev Weiss } 1730c3963bc0SZev Weiss return -ENODEV; 1731c3963bc0SZev Weiss } 1732c3963bc0SZev Weiss 1733c3963bc0SZev Weiss static ssize_t 1734c3963bc0SZev Weiss show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1735c3963bc0SZev Weiss { 1736c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1737c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1738c3963bc0SZev Weiss unsigned int alarm = 0; 1739c3963bc0SZev Weiss int nr; 1740c3963bc0SZev Weiss 1741c3963bc0SZev Weiss if (IS_ERR(data)) 1742c3963bc0SZev Weiss return PTR_ERR(data); 1743c3963bc0SZev Weiss 1744c3963bc0SZev Weiss /* 1745c3963bc0SZev Weiss * For temperatures, there is no fixed mapping from registers to alarm 1746c3963bc0SZev Weiss * bits. Alarm bits are determined by the temperature source mapping. 1747c3963bc0SZev Weiss */ 1748c3963bc0SZev Weiss nr = find_temp_source(data, sattr->index, data->num_temp_alarms); 1749c3963bc0SZev Weiss if (nr >= 0) { 1750c3963bc0SZev Weiss int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE]; 1751c3963bc0SZev Weiss 1752c3963bc0SZev Weiss alarm = (data->alarms >> bit) & 0x01; 1753c3963bc0SZev Weiss } 1754c3963bc0SZev Weiss return sprintf(buf, "%u\n", alarm); 1755c3963bc0SZev Weiss } 1756c3963bc0SZev Weiss 1757c3963bc0SZev Weiss ssize_t 1758c3963bc0SZev Weiss nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf) 1759c3963bc0SZev Weiss { 1760c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1761c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1762c3963bc0SZev Weiss int nr; 1763c3963bc0SZev Weiss 1764c3963bc0SZev Weiss if (IS_ERR(data)) 1765c3963bc0SZev Weiss return PTR_ERR(data); 1766c3963bc0SZev Weiss 1767c3963bc0SZev Weiss nr = data->BEEP_BITS[sattr->index]; 1768c3963bc0SZev Weiss 1769c3963bc0SZev Weiss return sprintf(buf, "%u\n", 1770c3963bc0SZev Weiss (unsigned int)((data->beeps >> nr) & 0x01)); 1771c3963bc0SZev Weiss } 1772c3963bc0SZev Weiss EXPORT_SYMBOL_GPL(nct6775_show_beep); 1773c3963bc0SZev Weiss 1774c3963bc0SZev Weiss ssize_t 1775c3963bc0SZev Weiss nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 1776c3963bc0SZev Weiss { 1777c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1778c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1779c3963bc0SZev Weiss int nr = data->BEEP_BITS[sattr->index]; 1780c3963bc0SZev Weiss int regindex = nr >> 3; 1781c3963bc0SZev Weiss unsigned long val; 1782c3963bc0SZev Weiss int err; 1783c3963bc0SZev Weiss 1784c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 1785c3963bc0SZev Weiss if (err < 0) 1786c3963bc0SZev Weiss return err; 1787c3963bc0SZev Weiss if (val > 1) 1788c3963bc0SZev Weiss return -EINVAL; 1789c3963bc0SZev Weiss 1790c3963bc0SZev Weiss mutex_lock(&data->update_lock); 1791c3963bc0SZev Weiss if (val) 1792c3963bc0SZev Weiss data->beeps |= (1ULL << nr); 1793c3963bc0SZev Weiss else 1794c3963bc0SZev Weiss data->beeps &= ~(1ULL << nr); 1795c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_BEEP[regindex], 1796c3963bc0SZev Weiss (data->beeps >> (regindex << 3)) & 0xff); 1797c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 1798c3963bc0SZev Weiss return err ? : count; 1799c3963bc0SZev Weiss } 1800c3963bc0SZev Weiss EXPORT_SYMBOL_GPL(nct6775_store_beep); 1801c3963bc0SZev Weiss 1802c3963bc0SZev Weiss static ssize_t 1803c3963bc0SZev Weiss show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf) 1804c3963bc0SZev Weiss { 1805c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1806c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1807c3963bc0SZev Weiss unsigned int beep = 0; 1808c3963bc0SZev Weiss int nr; 1809c3963bc0SZev Weiss 1810c3963bc0SZev Weiss if (IS_ERR(data)) 1811c3963bc0SZev Weiss return PTR_ERR(data); 1812c3963bc0SZev Weiss 1813c3963bc0SZev Weiss /* 1814c3963bc0SZev Weiss * For temperatures, there is no fixed mapping from registers to beep 1815c3963bc0SZev Weiss * enable bits. Beep enable bits are determined by the temperature 1816c3963bc0SZev Weiss * source mapping. 1817c3963bc0SZev Weiss */ 1818c3963bc0SZev Weiss nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1819c3963bc0SZev Weiss if (nr >= 0) { 1820c3963bc0SZev Weiss int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1821c3963bc0SZev Weiss 1822c3963bc0SZev Weiss beep = (data->beeps >> bit) & 0x01; 1823c3963bc0SZev Weiss } 1824c3963bc0SZev Weiss return sprintf(buf, "%u\n", beep); 1825c3963bc0SZev Weiss } 1826c3963bc0SZev Weiss 1827c3963bc0SZev Weiss static ssize_t 1828c3963bc0SZev Weiss store_temp_beep(struct device *dev, struct device_attribute *attr, 1829c3963bc0SZev Weiss const char *buf, size_t count) 1830c3963bc0SZev Weiss { 1831c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1832c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1833c3963bc0SZev Weiss int nr, bit, regindex; 1834c3963bc0SZev Weiss unsigned long val; 1835c3963bc0SZev Weiss int err; 1836c3963bc0SZev Weiss 1837c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 1838c3963bc0SZev Weiss if (err < 0) 1839c3963bc0SZev Weiss return err; 1840c3963bc0SZev Weiss if (val > 1) 1841c3963bc0SZev Weiss return -EINVAL; 1842c3963bc0SZev Weiss 1843c3963bc0SZev Weiss nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1844c3963bc0SZev Weiss if (nr < 0) 1845c3963bc0SZev Weiss return nr; 1846c3963bc0SZev Weiss 1847c3963bc0SZev Weiss bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1848c3963bc0SZev Weiss regindex = bit >> 3; 1849c3963bc0SZev Weiss 1850c3963bc0SZev Weiss mutex_lock(&data->update_lock); 1851c3963bc0SZev Weiss if (val) 1852c3963bc0SZev Weiss data->beeps |= (1ULL << bit); 1853c3963bc0SZev Weiss else 1854c3963bc0SZev Weiss data->beeps &= ~(1ULL << bit); 1855c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_BEEP[regindex], 1856c3963bc0SZev Weiss (data->beeps >> (regindex << 3)) & 0xff); 1857c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 1858c3963bc0SZev Weiss 1859c3963bc0SZev Weiss return err ? : count; 1860c3963bc0SZev Weiss } 1861c3963bc0SZev Weiss 1862c3963bc0SZev Weiss static umode_t nct6775_in_is_visible(struct kobject *kobj, 1863c3963bc0SZev Weiss struct attribute *attr, int index) 1864c3963bc0SZev Weiss { 1865c3963bc0SZev Weiss struct device *dev = kobj_to_dev(kobj); 1866c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1867c3963bc0SZev Weiss int in = index / 5; /* voltage index */ 1868c3963bc0SZev Weiss 1869c3963bc0SZev Weiss if (!(data->have_in & BIT(in))) 1870c3963bc0SZev Weiss return 0; 1871c3963bc0SZev Weiss 1872c3963bc0SZev Weiss return nct6775_attr_mode(data, attr); 1873c3963bc0SZev Weiss } 1874c3963bc0SZev Weiss 1875c3963bc0SZev Weiss SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0); 1876c3963bc0SZev Weiss SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0); 1877c3963bc0SZev Weiss SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0); 1878c3963bc0SZev Weiss SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1); 1879c3963bc0SZev Weiss SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2); 1880c3963bc0SZev Weiss 1881c3963bc0SZev Weiss /* 1882c3963bc0SZev Weiss * nct6775_in_is_visible uses the index into the following array 1883c3963bc0SZev Weiss * to determine if attributes should be created or not. 1884c3963bc0SZev Weiss * Any change in order or content must be matched. 1885c3963bc0SZev Weiss */ 1886c3963bc0SZev Weiss static struct sensor_device_template *nct6775_attributes_in_template[] = { 1887c3963bc0SZev Weiss &sensor_dev_template_in_input, 1888c3963bc0SZev Weiss &sensor_dev_template_in_alarm, 1889c3963bc0SZev Weiss &sensor_dev_template_in_beep, 1890c3963bc0SZev Weiss &sensor_dev_template_in_min, 1891c3963bc0SZev Weiss &sensor_dev_template_in_max, 1892c3963bc0SZev Weiss NULL 1893c3963bc0SZev Weiss }; 1894c3963bc0SZev Weiss 1895c3963bc0SZev Weiss static const struct sensor_template_group nct6775_in_template_group = { 1896c3963bc0SZev Weiss .templates = nct6775_attributes_in_template, 1897c3963bc0SZev Weiss .is_visible = nct6775_in_is_visible, 1898c3963bc0SZev Weiss }; 1899c3963bc0SZev Weiss 1900c3963bc0SZev Weiss static ssize_t 1901c3963bc0SZev Weiss show_fan(struct device *dev, struct device_attribute *attr, char *buf) 1902c3963bc0SZev Weiss { 1903c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1904c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1905c3963bc0SZev Weiss int nr = sattr->index; 1906c3963bc0SZev Weiss 1907c3963bc0SZev Weiss if (IS_ERR(data)) 1908c3963bc0SZev Weiss return PTR_ERR(data); 1909c3963bc0SZev Weiss 1910c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->rpm[nr]); 1911c3963bc0SZev Weiss } 1912c3963bc0SZev Weiss 1913c3963bc0SZev Weiss static ssize_t 1914c3963bc0SZev Weiss show_fan_min(struct device *dev, struct device_attribute *attr, char *buf) 1915c3963bc0SZev Weiss { 1916c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1917c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1918c3963bc0SZev Weiss int nr = sattr->index; 1919c3963bc0SZev Weiss 1920c3963bc0SZev Weiss if (IS_ERR(data)) 1921c3963bc0SZev Weiss return PTR_ERR(data); 1922c3963bc0SZev Weiss 1923c3963bc0SZev Weiss return sprintf(buf, "%d\n", 1924c3963bc0SZev Weiss data->fan_from_reg_min(data->fan_min[nr], 1925c3963bc0SZev Weiss data->fan_div[nr])); 1926c3963bc0SZev Weiss } 1927c3963bc0SZev Weiss 1928c3963bc0SZev Weiss static ssize_t 1929c3963bc0SZev Weiss show_fan_div(struct device *dev, struct device_attribute *attr, char *buf) 1930c3963bc0SZev Weiss { 1931c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 1932c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1933c3963bc0SZev Weiss int nr = sattr->index; 1934c3963bc0SZev Weiss 1935c3963bc0SZev Weiss if (IS_ERR(data)) 1936c3963bc0SZev Weiss return PTR_ERR(data); 1937c3963bc0SZev Weiss 1938c3963bc0SZev Weiss return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr])); 1939c3963bc0SZev Weiss } 1940c3963bc0SZev Weiss 1941c3963bc0SZev Weiss static ssize_t 1942c3963bc0SZev Weiss store_fan_min(struct device *dev, struct device_attribute *attr, 1943c3963bc0SZev Weiss const char *buf, size_t count) 1944c3963bc0SZev Weiss { 1945c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 1946c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1947c3963bc0SZev Weiss int nr = sattr->index; 1948c3963bc0SZev Weiss unsigned long val; 1949c3963bc0SZev Weiss unsigned int reg; 1950c3963bc0SZev Weiss u8 new_div; 1951c3963bc0SZev Weiss int err; 1952c3963bc0SZev Weiss 1953c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 1954c3963bc0SZev Weiss if (err < 0) 1955c3963bc0SZev Weiss return err; 1956c3963bc0SZev Weiss 1957c3963bc0SZev Weiss mutex_lock(&data->update_lock); 1958c3963bc0SZev Weiss if (!data->has_fan_div) { 1959c3963bc0SZev Weiss /* NCT6776F or NCT6779D; we know this is a 13 bit register */ 1960c3963bc0SZev Weiss if (!val) { 1961c3963bc0SZev Weiss val = 0xff1f; 1962c3963bc0SZev Weiss } else { 1963c3963bc0SZev Weiss if (val > 1350000U) 1964c3963bc0SZev Weiss val = 135000U; 1965c3963bc0SZev Weiss val = 1350000U / val; 1966c3963bc0SZev Weiss val = (val & 0x1f) | ((val << 3) & 0xff00); 1967c3963bc0SZev Weiss } 1968c3963bc0SZev Weiss data->fan_min[nr] = val; 1969c3963bc0SZev Weiss goto write_min; /* Leave fan divider alone */ 1970c3963bc0SZev Weiss } 1971c3963bc0SZev Weiss if (!val) { 1972c3963bc0SZev Weiss /* No min limit, alarm disabled */ 1973c3963bc0SZev Weiss data->fan_min[nr] = 255; 1974c3963bc0SZev Weiss new_div = data->fan_div[nr]; /* No change */ 1975c3963bc0SZev Weiss dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); 1976c3963bc0SZev Weiss goto write_div; 1977c3963bc0SZev Weiss } 1978c3963bc0SZev Weiss reg = 1350000U / val; 1979c3963bc0SZev Weiss if (reg >= 128 * 255) { 1980c3963bc0SZev Weiss /* 1981c3963bc0SZev Weiss * Speed below this value cannot possibly be represented, 1982c3963bc0SZev Weiss * even with the highest divider (128) 1983c3963bc0SZev Weiss */ 1984c3963bc0SZev Weiss data->fan_min[nr] = 254; 1985c3963bc0SZev Weiss new_div = 7; /* 128 == BIT(7) */ 1986c3963bc0SZev Weiss dev_warn(dev, 1987c3963bc0SZev Weiss "fan%u low limit %lu below minimum %u, set to minimum\n", 1988c3963bc0SZev Weiss nr + 1, val, data->fan_from_reg_min(254, 7)); 1989c3963bc0SZev Weiss } else if (!reg) { 1990c3963bc0SZev Weiss /* 1991c3963bc0SZev Weiss * Speed above this value cannot possibly be represented, 1992c3963bc0SZev Weiss * even with the lowest divider (1) 1993c3963bc0SZev Weiss */ 1994c3963bc0SZev Weiss data->fan_min[nr] = 1; 1995c3963bc0SZev Weiss new_div = 0; /* 1 == BIT(0) */ 1996c3963bc0SZev Weiss dev_warn(dev, 1997c3963bc0SZev Weiss "fan%u low limit %lu above maximum %u, set to maximum\n", 1998c3963bc0SZev Weiss nr + 1, val, data->fan_from_reg_min(1, 0)); 1999c3963bc0SZev Weiss } else { 2000c3963bc0SZev Weiss /* 2001c3963bc0SZev Weiss * Automatically pick the best divider, i.e. the one such 2002c3963bc0SZev Weiss * that the min limit will correspond to a register value 2003c3963bc0SZev Weiss * in the 96..192 range 2004c3963bc0SZev Weiss */ 2005c3963bc0SZev Weiss new_div = 0; 2006c3963bc0SZev Weiss while (reg > 192 && new_div < 7) { 2007c3963bc0SZev Weiss reg >>= 1; 2008c3963bc0SZev Weiss new_div++; 2009c3963bc0SZev Weiss } 2010c3963bc0SZev Weiss data->fan_min[nr] = reg; 2011c3963bc0SZev Weiss } 2012c3963bc0SZev Weiss 2013c3963bc0SZev Weiss write_div: 2014c3963bc0SZev Weiss /* 2015c3963bc0SZev Weiss * Write both the fan clock divider (if it changed) and the new 2016c3963bc0SZev Weiss * fan min (unconditionally) 2017c3963bc0SZev Weiss */ 2018c3963bc0SZev Weiss if (new_div != data->fan_div[nr]) { 2019c3963bc0SZev Weiss dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 2020c3963bc0SZev Weiss nr + 1, div_from_reg(data->fan_div[nr]), 2021c3963bc0SZev Weiss div_from_reg(new_div)); 2022c3963bc0SZev Weiss data->fan_div[nr] = new_div; 2023c3963bc0SZev Weiss err = nct6775_write_fan_div_common(data, nr); 2024c3963bc0SZev Weiss if (err) 2025c3963bc0SZev Weiss goto write_min; 2026c3963bc0SZev Weiss /* Give the chip time to sample a new speed value */ 2027c3963bc0SZev Weiss data->last_updated = jiffies; 2028c3963bc0SZev Weiss } 2029c3963bc0SZev Weiss 2030c3963bc0SZev Weiss write_min: 2031c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]); 2032c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2033c3963bc0SZev Weiss 2034c3963bc0SZev Weiss return err ? : count; 2035c3963bc0SZev Weiss } 2036c3963bc0SZev Weiss 2037c3963bc0SZev Weiss static ssize_t 2038c3963bc0SZev Weiss show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf) 2039c3963bc0SZev Weiss { 2040c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2041c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2042c3963bc0SZev Weiss int p; 2043c3963bc0SZev Weiss 2044c3963bc0SZev Weiss if (IS_ERR(data)) 2045c3963bc0SZev Weiss return PTR_ERR(data); 2046c3963bc0SZev Weiss 2047c3963bc0SZev Weiss p = data->fan_pulses[sattr->index]; 2048c3963bc0SZev Weiss return sprintf(buf, "%d\n", p ? : 4); 2049c3963bc0SZev Weiss } 2050c3963bc0SZev Weiss 2051c3963bc0SZev Weiss static ssize_t 2052c3963bc0SZev Weiss store_fan_pulses(struct device *dev, struct device_attribute *attr, 2053c3963bc0SZev Weiss const char *buf, size_t count) 2054c3963bc0SZev Weiss { 2055c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2056c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2057c3963bc0SZev Weiss int nr = sattr->index; 2058c3963bc0SZev Weiss unsigned long val; 2059c3963bc0SZev Weiss int err; 2060c3963bc0SZev Weiss u16 reg; 2061c3963bc0SZev Weiss 2062c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2063c3963bc0SZev Weiss if (err < 0) 2064c3963bc0SZev Weiss return err; 2065c3963bc0SZev Weiss 2066c3963bc0SZev Weiss if (val > 4) 2067c3963bc0SZev Weiss return -EINVAL; 2068c3963bc0SZev Weiss 2069c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2070c3963bc0SZev Weiss data->fan_pulses[nr] = val & 3; 2071c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®); 2072c3963bc0SZev Weiss if (err) 2073c3963bc0SZev Weiss goto out; 2074c3963bc0SZev Weiss reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); 2075c3963bc0SZev Weiss reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr]; 2076c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg); 2077c3963bc0SZev Weiss out: 2078c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2079c3963bc0SZev Weiss 2080c3963bc0SZev Weiss return err ? : count; 2081c3963bc0SZev Weiss } 2082c3963bc0SZev Weiss 2083c3963bc0SZev Weiss static umode_t nct6775_fan_is_visible(struct kobject *kobj, 2084c3963bc0SZev Weiss struct attribute *attr, int index) 2085c3963bc0SZev Weiss { 2086c3963bc0SZev Weiss struct device *dev = kobj_to_dev(kobj); 2087c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2088c3963bc0SZev Weiss int fan = index / 6; /* fan index */ 2089c3963bc0SZev Weiss int nr = index % 6; /* attribute index */ 2090c3963bc0SZev Weiss 2091c3963bc0SZev Weiss if (!(data->has_fan & BIT(fan))) 2092c3963bc0SZev Weiss return 0; 2093c3963bc0SZev Weiss 2094c3963bc0SZev Weiss if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1) 2095c3963bc0SZev Weiss return 0; 2096c3963bc0SZev Weiss if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1) 2097c3963bc0SZev Weiss return 0; 2098c3963bc0SZev Weiss if (nr == 3 && !data->REG_FAN_PULSES[fan]) 2099c3963bc0SZev Weiss return 0; 2100c3963bc0SZev Weiss if (nr == 4 && !(data->has_fan_min & BIT(fan))) 2101c3963bc0SZev Weiss return 0; 2102c3963bc0SZev Weiss if (nr == 5 && data->kind != nct6775) 2103c3963bc0SZev Weiss return 0; 2104c3963bc0SZev Weiss 2105c3963bc0SZev Weiss return nct6775_attr_mode(data, attr); 2106c3963bc0SZev Weiss } 2107c3963bc0SZev Weiss 2108c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0); 2109c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE); 2110c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep, 2111c3963bc0SZev Weiss nct6775_store_beep, FAN_ALARM_BASE); 2112c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0); 2113c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0); 2114c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0); 2115c3963bc0SZev Weiss 2116c3963bc0SZev Weiss /* 2117c3963bc0SZev Weiss * nct6775_fan_is_visible uses the index into the following array 2118c3963bc0SZev Weiss * to determine if attributes should be created or not. 2119c3963bc0SZev Weiss * Any change in order or content must be matched. 2120c3963bc0SZev Weiss */ 2121c3963bc0SZev Weiss static struct sensor_device_template *nct6775_attributes_fan_template[] = { 2122c3963bc0SZev Weiss &sensor_dev_template_fan_input, 2123c3963bc0SZev Weiss &sensor_dev_template_fan_alarm, /* 1 */ 2124c3963bc0SZev Weiss &sensor_dev_template_fan_beep, /* 2 */ 2125c3963bc0SZev Weiss &sensor_dev_template_fan_pulses, 2126c3963bc0SZev Weiss &sensor_dev_template_fan_min, /* 4 */ 2127c3963bc0SZev Weiss &sensor_dev_template_fan_div, /* 5 */ 2128c3963bc0SZev Weiss NULL 2129c3963bc0SZev Weiss }; 2130c3963bc0SZev Weiss 2131c3963bc0SZev Weiss static const struct sensor_template_group nct6775_fan_template_group = { 2132c3963bc0SZev Weiss .templates = nct6775_attributes_fan_template, 2133c3963bc0SZev Weiss .is_visible = nct6775_fan_is_visible, 2134c3963bc0SZev Weiss .base = 1, 2135c3963bc0SZev Weiss }; 2136c3963bc0SZev Weiss 2137c3963bc0SZev Weiss static ssize_t 2138c3963bc0SZev Weiss show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2139c3963bc0SZev Weiss { 2140c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2141c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2142c3963bc0SZev Weiss int nr = sattr->index; 2143c3963bc0SZev Weiss 2144c3963bc0SZev Weiss if (IS_ERR(data)) 2145c3963bc0SZev Weiss return PTR_ERR(data); 2146c3963bc0SZev Weiss 2147c3963bc0SZev Weiss return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]); 2148c3963bc0SZev Weiss } 2149c3963bc0SZev Weiss 2150c3963bc0SZev Weiss static ssize_t 2151c3963bc0SZev Weiss show_temp(struct device *dev, struct device_attribute *attr, char *buf) 2152c3963bc0SZev Weiss { 2153c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2154c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2155c3963bc0SZev Weiss int nr = sattr->nr; 2156c3963bc0SZev Weiss int index = sattr->index; 2157c3963bc0SZev Weiss 2158c3963bc0SZev Weiss if (IS_ERR(data)) 2159c3963bc0SZev Weiss return PTR_ERR(data); 2160c3963bc0SZev Weiss 2161c3963bc0SZev Weiss return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr])); 2162c3963bc0SZev Weiss } 2163c3963bc0SZev Weiss 2164c3963bc0SZev Weiss static ssize_t 2165c3963bc0SZev Weiss store_temp(struct device *dev, struct device_attribute *attr, const char *buf, 2166c3963bc0SZev Weiss size_t count) 2167c3963bc0SZev Weiss { 2168c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2169c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2170c3963bc0SZev Weiss int nr = sattr->nr; 2171c3963bc0SZev Weiss int index = sattr->index; 2172c3963bc0SZev Weiss int err; 2173c3963bc0SZev Weiss long val; 2174c3963bc0SZev Weiss 2175c3963bc0SZev Weiss err = kstrtol(buf, 10, &val); 2176c3963bc0SZev Weiss if (err < 0) 2177c3963bc0SZev Weiss return err; 2178c3963bc0SZev Weiss 2179c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2180c3963bc0SZev Weiss data->temp[index][nr] = LM75_TEMP_TO_REG(val); 2181c3963bc0SZev Weiss err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]); 2182c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2183c3963bc0SZev Weiss return err ? : count; 2184c3963bc0SZev Weiss } 2185c3963bc0SZev Weiss 2186c3963bc0SZev Weiss static ssize_t 2187c3963bc0SZev Weiss show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf) 2188c3963bc0SZev Weiss { 2189c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2190c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2191c3963bc0SZev Weiss 2192c3963bc0SZev Weiss if (IS_ERR(data)) 2193c3963bc0SZev Weiss return PTR_ERR(data); 2194c3963bc0SZev Weiss 2195c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000); 2196c3963bc0SZev Weiss } 2197c3963bc0SZev Weiss 2198c3963bc0SZev Weiss static ssize_t 2199c3963bc0SZev Weiss store_temp_offset(struct device *dev, struct device_attribute *attr, 2200c3963bc0SZev Weiss const char *buf, size_t count) 2201c3963bc0SZev Weiss { 2202c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2203c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2204c3963bc0SZev Weiss int nr = sattr->index; 2205c3963bc0SZev Weiss long val; 2206c3963bc0SZev Weiss int err; 2207c3963bc0SZev Weiss 2208c3963bc0SZev Weiss err = kstrtol(buf, 10, &val); 2209c3963bc0SZev Weiss if (err < 0) 2210c3963bc0SZev Weiss return err; 2211c3963bc0SZev Weiss 2212c3963bc0SZev Weiss val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127); 2213c3963bc0SZev Weiss 2214c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2215c3963bc0SZev Weiss data->temp_offset[nr] = val; 2216c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val); 2217c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2218c3963bc0SZev Weiss 2219c3963bc0SZev Weiss return err ? : count; 2220c3963bc0SZev Weiss } 2221c3963bc0SZev Weiss 2222c3963bc0SZev Weiss static ssize_t 2223c3963bc0SZev Weiss show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) 2224c3963bc0SZev Weiss { 2225c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2226c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2227c3963bc0SZev Weiss int nr = sattr->index; 2228c3963bc0SZev Weiss 2229c3963bc0SZev Weiss if (IS_ERR(data)) 2230c3963bc0SZev Weiss return PTR_ERR(data); 2231c3963bc0SZev Weiss 2232c3963bc0SZev Weiss return sprintf(buf, "%d\n", (int)data->temp_type[nr]); 2233c3963bc0SZev Weiss } 2234c3963bc0SZev Weiss 2235c3963bc0SZev Weiss static ssize_t 2236c3963bc0SZev Weiss store_temp_type(struct device *dev, struct device_attribute *attr, 2237c3963bc0SZev Weiss const char *buf, size_t count) 2238c3963bc0SZev Weiss { 2239c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2240c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2241c3963bc0SZev Weiss int nr = sattr->index; 2242c3963bc0SZev Weiss unsigned long val; 2243c3963bc0SZev Weiss int err; 2244c3963bc0SZev Weiss u8 vbit, dbit; 2245c3963bc0SZev Weiss u16 vbat, diode; 2246c3963bc0SZev Weiss 2247c3963bc0SZev Weiss if (IS_ERR(data)) 2248c3963bc0SZev Weiss return PTR_ERR(data); 2249c3963bc0SZev Weiss 2250c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2251c3963bc0SZev Weiss if (err < 0) 2252c3963bc0SZev Weiss return err; 2253c3963bc0SZev Weiss 2254c3963bc0SZev Weiss if (val != 1 && val != 3 && val != 4) 2255c3963bc0SZev Weiss return -EINVAL; 2256c3963bc0SZev Weiss 2257c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2258c3963bc0SZev Weiss 2259c3963bc0SZev Weiss data->temp_type[nr] = val; 2260c3963bc0SZev Weiss vbit = 0x02 << nr; 2261c3963bc0SZev Weiss dbit = data->DIODE_MASK << nr; 2262c3963bc0SZev Weiss 2263c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_VBAT, &vbat); 2264c3963bc0SZev Weiss if (err) 2265c3963bc0SZev Weiss goto out; 2266c3963bc0SZev Weiss vbat &= ~vbit; 2267c3963bc0SZev Weiss 2268c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_DIODE, &diode); 2269c3963bc0SZev Weiss if (err) 2270c3963bc0SZev Weiss goto out; 2271c3963bc0SZev Weiss diode &= ~dbit; 2272c3963bc0SZev Weiss 2273c3963bc0SZev Weiss switch (val) { 2274c3963bc0SZev Weiss case 1: /* CPU diode (diode, current mode) */ 2275c3963bc0SZev Weiss vbat |= vbit; 2276c3963bc0SZev Weiss diode |= dbit; 2277c3963bc0SZev Weiss break; 2278c3963bc0SZev Weiss case 3: /* diode, voltage mode */ 2279c3963bc0SZev Weiss vbat |= dbit; 2280c3963bc0SZev Weiss break; 2281c3963bc0SZev Weiss case 4: /* thermistor */ 2282c3963bc0SZev Weiss break; 2283c3963bc0SZev Weiss } 2284c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_VBAT, vbat); 2285c3963bc0SZev Weiss if (err) 2286c3963bc0SZev Weiss goto out; 2287c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_DIODE, diode); 2288c3963bc0SZev Weiss out: 2289c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2290c3963bc0SZev Weiss return err ? : count; 2291c3963bc0SZev Weiss } 2292c3963bc0SZev Weiss 2293c3963bc0SZev Weiss static umode_t nct6775_temp_is_visible(struct kobject *kobj, 2294c3963bc0SZev Weiss struct attribute *attr, int index) 2295c3963bc0SZev Weiss { 2296c3963bc0SZev Weiss struct device *dev = kobj_to_dev(kobj); 2297c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2298c3963bc0SZev Weiss int temp = index / 10; /* temp index */ 2299c3963bc0SZev Weiss int nr = index % 10; /* attribute index */ 2300c3963bc0SZev Weiss 2301c3963bc0SZev Weiss if (!(data->have_temp & BIT(temp))) 2302c3963bc0SZev Weiss return 0; 2303c3963bc0SZev Weiss 2304c3963bc0SZev Weiss if (nr == 1 && !data->temp_label) 2305c3963bc0SZev Weiss return 0; 2306c3963bc0SZev Weiss 2307c3963bc0SZev Weiss if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) 2308c3963bc0SZev Weiss return 0; /* alarm */ 2309c3963bc0SZev Weiss 2310c3963bc0SZev Weiss if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) 2311c3963bc0SZev Weiss return 0; /* beep */ 2312c3963bc0SZev Weiss 2313c3963bc0SZev Weiss if (nr == 4 && !data->reg_temp[1][temp]) /* max */ 2314c3963bc0SZev Weiss return 0; 2315c3963bc0SZev Weiss 2316c3963bc0SZev Weiss if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */ 2317c3963bc0SZev Weiss return 0; 2318c3963bc0SZev Weiss 2319c3963bc0SZev Weiss if (nr == 6 && !data->reg_temp[3][temp]) /* crit */ 2320c3963bc0SZev Weiss return 0; 2321c3963bc0SZev Weiss 2322c3963bc0SZev Weiss if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */ 2323c3963bc0SZev Weiss return 0; 2324c3963bc0SZev Weiss 2325c3963bc0SZev Weiss /* offset and type only apply to fixed sensors */ 2326c3963bc0SZev Weiss if (nr > 7 && !(data->have_temp_fixed & BIT(temp))) 2327c3963bc0SZev Weiss return 0; 2328c3963bc0SZev Weiss 2329c3963bc0SZev Weiss return nct6775_attr_mode(data, attr); 2330c3963bc0SZev Weiss } 2331c3963bc0SZev Weiss 2332c3963bc0SZev Weiss SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0); 2333c3963bc0SZev Weiss SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0); 2334c3963bc0SZev Weiss SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1); 2335c3963bc0SZev Weiss SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2); 2336c3963bc0SZev Weiss SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3); 2337c3963bc0SZev Weiss SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4); 2338c3963bc0SZev Weiss SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0); 2339c3963bc0SZev Weiss SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0); 2340c3963bc0SZev Weiss SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0); 2341c3963bc0SZev Weiss SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0); 2342c3963bc0SZev Weiss 2343c3963bc0SZev Weiss /* 2344c3963bc0SZev Weiss * nct6775_temp_is_visible uses the index into the following array 2345c3963bc0SZev Weiss * to determine if attributes should be created or not. 2346c3963bc0SZev Weiss * Any change in order or content must be matched. 2347c3963bc0SZev Weiss */ 2348c3963bc0SZev Weiss static struct sensor_device_template *nct6775_attributes_temp_template[] = { 2349c3963bc0SZev Weiss &sensor_dev_template_temp_input, 2350c3963bc0SZev Weiss &sensor_dev_template_temp_label, 2351c3963bc0SZev Weiss &sensor_dev_template_temp_alarm, /* 2 */ 2352c3963bc0SZev Weiss &sensor_dev_template_temp_beep, /* 3 */ 2353c3963bc0SZev Weiss &sensor_dev_template_temp_max, /* 4 */ 2354c3963bc0SZev Weiss &sensor_dev_template_temp_max_hyst, /* 5 */ 2355c3963bc0SZev Weiss &sensor_dev_template_temp_crit, /* 6 */ 2356c3963bc0SZev Weiss &sensor_dev_template_temp_lcrit, /* 7 */ 2357c3963bc0SZev Weiss &sensor_dev_template_temp_offset, /* 8 */ 2358c3963bc0SZev Weiss &sensor_dev_template_temp_type, /* 9 */ 2359c3963bc0SZev Weiss NULL 2360c3963bc0SZev Weiss }; 2361c3963bc0SZev Weiss 2362c3963bc0SZev Weiss static const struct sensor_template_group nct6775_temp_template_group = { 2363c3963bc0SZev Weiss .templates = nct6775_attributes_temp_template, 2364c3963bc0SZev Weiss .is_visible = nct6775_temp_is_visible, 2365c3963bc0SZev Weiss .base = 1, 2366c3963bc0SZev Weiss }; 2367c3963bc0SZev Weiss 2368c3963bc0SZev Weiss static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf) 2369c3963bc0SZev Weiss { 2370c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2371c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2372c3963bc0SZev Weiss 2373c3963bc0SZev Weiss if (IS_ERR(data)) 2374c3963bc0SZev Weiss return PTR_ERR(data); 2375c3963bc0SZev Weiss 2376c3963bc0SZev Weiss return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index])); 2377c3963bc0SZev Weiss } 2378c3963bc0SZev Weiss 2379c3963bc0SZev Weiss static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2380c3963bc0SZev Weiss { 2381c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2382c3963bc0SZev Weiss 2383c3963bc0SZev Weiss return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index); 2384c3963bc0SZev Weiss } 2385c3963bc0SZev Weiss 2386c3963bc0SZev Weiss SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0); 2387c3963bc0SZev Weiss SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0); 2388c3963bc0SZev Weiss 2389c3963bc0SZev Weiss static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr, 2390c3963bc0SZev Weiss int index) 2391c3963bc0SZev Weiss { 2392c3963bc0SZev Weiss struct device *dev = kobj_to_dev(kobj); 2393c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2394c3963bc0SZev Weiss int temp = index / 2; 2395c3963bc0SZev Weiss 2396c3963bc0SZev Weiss return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; 2397c3963bc0SZev Weiss } 2398c3963bc0SZev Weiss 2399c3963bc0SZev Weiss /* 2400c3963bc0SZev Weiss * The index calculation in nct6775_tsi_temp_is_visible() must be kept in 2401c3963bc0SZev Weiss * sync with the size of this array. 2402c3963bc0SZev Weiss */ 2403c3963bc0SZev Weiss static struct sensor_device_template *nct6775_tsi_temp_template[] = { 2404c3963bc0SZev Weiss &sensor_dev_template_tsi_temp_input, 2405c3963bc0SZev Weiss &sensor_dev_template_tsi_temp_label, 2406c3963bc0SZev Weiss NULL 2407c3963bc0SZev Weiss }; 2408c3963bc0SZev Weiss 2409c3963bc0SZev Weiss static ssize_t 2410c3963bc0SZev Weiss show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 2411c3963bc0SZev Weiss { 2412c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2413c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2414c3963bc0SZev Weiss 2415c3963bc0SZev Weiss if (IS_ERR(data)) 2416c3963bc0SZev Weiss return PTR_ERR(data); 2417c3963bc0SZev Weiss 2418c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]); 2419c3963bc0SZev Weiss } 2420c3963bc0SZev Weiss 2421c3963bc0SZev Weiss static ssize_t 2422c3963bc0SZev Weiss store_pwm_mode(struct device *dev, struct device_attribute *attr, 2423c3963bc0SZev Weiss const char *buf, size_t count) 2424c3963bc0SZev Weiss { 2425c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2426c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2427c3963bc0SZev Weiss int nr = sattr->index; 2428c3963bc0SZev Weiss unsigned long val; 2429c3963bc0SZev Weiss int err; 2430c3963bc0SZev Weiss u16 reg; 2431c3963bc0SZev Weiss 2432c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2433c3963bc0SZev Weiss if (err < 0) 2434c3963bc0SZev Weiss return err; 2435c3963bc0SZev Weiss 2436c3963bc0SZev Weiss if (val > 1) 2437c3963bc0SZev Weiss return -EINVAL; 2438c3963bc0SZev Weiss 2439c3963bc0SZev Weiss /* Setting DC mode (0) is not supported for all chips/channels */ 2440c3963bc0SZev Weiss if (data->REG_PWM_MODE[nr] == 0) { 2441c3963bc0SZev Weiss if (!val) 2442c3963bc0SZev Weiss return -EINVAL; 2443c3963bc0SZev Weiss return count; 2444c3963bc0SZev Weiss } 2445c3963bc0SZev Weiss 2446c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2447c3963bc0SZev Weiss data->pwm_mode[nr] = val; 2448c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®); 2449c3963bc0SZev Weiss if (err) 2450c3963bc0SZev Weiss goto out; 2451c3963bc0SZev Weiss reg &= ~data->PWM_MODE_MASK[nr]; 2452c3963bc0SZev Weiss if (!val) 2453c3963bc0SZev Weiss reg |= data->PWM_MODE_MASK[nr]; 2454c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg); 2455c3963bc0SZev Weiss out: 2456c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2457c3963bc0SZev Weiss return err ? : count; 2458c3963bc0SZev Weiss } 2459c3963bc0SZev Weiss 2460c3963bc0SZev Weiss static ssize_t 2461c3963bc0SZev Weiss show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 2462c3963bc0SZev Weiss { 2463c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2464c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2465c3963bc0SZev Weiss int nr = sattr->nr; 2466c3963bc0SZev Weiss int index = sattr->index; 2467c3963bc0SZev Weiss int err; 2468c3963bc0SZev Weiss u16 pwm; 2469c3963bc0SZev Weiss 2470c3963bc0SZev Weiss if (IS_ERR(data)) 2471c3963bc0SZev Weiss return PTR_ERR(data); 2472c3963bc0SZev Weiss 2473c3963bc0SZev Weiss /* 2474c3963bc0SZev Weiss * For automatic fan control modes, show current pwm readings. 2475c3963bc0SZev Weiss * Otherwise, show the configured value. 2476c3963bc0SZev Weiss */ 2477c3963bc0SZev Weiss if (index == 0 && data->pwm_enable[nr] > manual) { 2478c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm); 2479c3963bc0SZev Weiss if (err) 2480c3963bc0SZev Weiss return err; 2481c3963bc0SZev Weiss } else { 2482c3963bc0SZev Weiss pwm = data->pwm[index][nr]; 2483c3963bc0SZev Weiss } 2484c3963bc0SZev Weiss 2485c3963bc0SZev Weiss return sprintf(buf, "%d\n", pwm); 2486c3963bc0SZev Weiss } 2487c3963bc0SZev Weiss 2488c3963bc0SZev Weiss static ssize_t 2489c3963bc0SZev Weiss store_pwm(struct device *dev, struct device_attribute *attr, const char *buf, 2490c3963bc0SZev Weiss size_t count) 2491c3963bc0SZev Weiss { 2492c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2493c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2494c3963bc0SZev Weiss int nr = sattr->nr; 2495c3963bc0SZev Weiss int index = sattr->index; 2496c3963bc0SZev Weiss unsigned long val; 2497c3963bc0SZev Weiss int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; 2498c3963bc0SZev Weiss int maxval[7] 2499c3963bc0SZev Weiss = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 }; 2500c3963bc0SZev Weiss int err; 2501c3963bc0SZev Weiss u16 reg; 2502c3963bc0SZev Weiss 2503c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2504c3963bc0SZev Weiss if (err < 0) 2505c3963bc0SZev Weiss return err; 2506c3963bc0SZev Weiss val = clamp_val(val, minval[index], maxval[index]); 2507c3963bc0SZev Weiss 2508c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2509c3963bc0SZev Weiss data->pwm[index][nr] = val; 2510c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_PWM[index][nr], val); 2511c3963bc0SZev Weiss if (err) 2512c3963bc0SZev Weiss goto out; 2513c3963bc0SZev Weiss if (index == 2) { /* floor: disable if val == 0 */ 2514c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2515c3963bc0SZev Weiss if (err) 2516c3963bc0SZev Weiss goto out; 2517c3963bc0SZev Weiss reg &= 0x7f; 2518c3963bc0SZev Weiss if (val) 2519c3963bc0SZev Weiss reg |= 0x80; 2520c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2521c3963bc0SZev Weiss } 2522c3963bc0SZev Weiss out: 2523c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2524c3963bc0SZev Weiss return err ? : count; 2525c3963bc0SZev Weiss } 2526c3963bc0SZev Weiss 2527c3963bc0SZev Weiss /* Returns 0 if OK, -EINVAL otherwise */ 2528c3963bc0SZev Weiss static int check_trip_points(struct nct6775_data *data, int nr) 2529c3963bc0SZev Weiss { 2530c3963bc0SZev Weiss int i; 2531c3963bc0SZev Weiss 2532c3963bc0SZev Weiss for (i = 0; i < data->auto_pwm_num - 1; i++) { 2533c3963bc0SZev Weiss if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 2534c3963bc0SZev Weiss return -EINVAL; 2535c3963bc0SZev Weiss } 2536c3963bc0SZev Weiss for (i = 0; i < data->auto_pwm_num - 1; i++) { 2537c3963bc0SZev Weiss if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 2538c3963bc0SZev Weiss return -EINVAL; 2539c3963bc0SZev Weiss } 2540c3963bc0SZev Weiss /* validate critical temperature and pwm if enabled (pwm > 0) */ 2541c3963bc0SZev Weiss if (data->auto_pwm[nr][data->auto_pwm_num]) { 2542c3963bc0SZev Weiss if (data->auto_temp[nr][data->auto_pwm_num - 1] > 2543c3963bc0SZev Weiss data->auto_temp[nr][data->auto_pwm_num] || 2544c3963bc0SZev Weiss data->auto_pwm[nr][data->auto_pwm_num - 1] > 2545c3963bc0SZev Weiss data->auto_pwm[nr][data->auto_pwm_num]) 2546c3963bc0SZev Weiss return -EINVAL; 2547c3963bc0SZev Weiss } 2548c3963bc0SZev Weiss return 0; 2549c3963bc0SZev Weiss } 2550c3963bc0SZev Weiss 2551c3963bc0SZev Weiss static int pwm_update_registers(struct nct6775_data *data, int nr) 2552c3963bc0SZev Weiss { 2553c3963bc0SZev Weiss u16 reg; 2554c3963bc0SZev Weiss int err; 2555c3963bc0SZev Weiss 2556c3963bc0SZev Weiss switch (data->pwm_enable[nr]) { 2557c3963bc0SZev Weiss case off: 2558c3963bc0SZev Weiss case manual: 2559c3963bc0SZev Weiss break; 2560c3963bc0SZev Weiss case speed_cruise: 2561c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2562c3963bc0SZev Weiss if (err) 2563c3963bc0SZev Weiss return err; 2564c3963bc0SZev Weiss reg = (reg & ~data->tolerance_mask) | 2565c3963bc0SZev Weiss (data->target_speed_tolerance[nr] & data->tolerance_mask); 2566c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2567c3963bc0SZev Weiss if (err) 2568c3963bc0SZev Weiss return err; 2569c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TARGET[nr], 2570c3963bc0SZev Weiss data->target_speed[nr] & 0xff); 2571c3963bc0SZev Weiss if (err) 2572c3963bc0SZev Weiss return err; 2573c3963bc0SZev Weiss if (data->REG_TOLERANCE_H) { 2574c3963bc0SZev Weiss reg = (data->target_speed[nr] >> 8) & 0x0f; 2575c3963bc0SZev Weiss reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; 2576c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg); 2577c3963bc0SZev Weiss if (err) 2578c3963bc0SZev Weiss return err; 2579c3963bc0SZev Weiss } 2580c3963bc0SZev Weiss break; 2581c3963bc0SZev Weiss case thermal_cruise: 2582c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); 2583c3963bc0SZev Weiss if (err) 2584c3963bc0SZev Weiss return err; 2585c3963bc0SZev Weiss fallthrough; 2586c3963bc0SZev Weiss default: 2587c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2588c3963bc0SZev Weiss if (err) 2589c3963bc0SZev Weiss return err; 2590c3963bc0SZev Weiss reg = (reg & ~data->tolerance_mask) | 2591c3963bc0SZev Weiss data->temp_tolerance[0][nr]; 2592c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2593c3963bc0SZev Weiss if (err) 2594c3963bc0SZev Weiss return err; 2595c3963bc0SZev Weiss break; 2596c3963bc0SZev Weiss } 2597c3963bc0SZev Weiss 2598c3963bc0SZev Weiss return 0; 2599c3963bc0SZev Weiss } 2600c3963bc0SZev Weiss 2601c3963bc0SZev Weiss static ssize_t 2602c3963bc0SZev Weiss show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 2603c3963bc0SZev Weiss { 2604c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2605c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2606c3963bc0SZev Weiss 2607c3963bc0SZev Weiss if (IS_ERR(data)) 2608c3963bc0SZev Weiss return PTR_ERR(data); 2609c3963bc0SZev Weiss 2610c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]); 2611c3963bc0SZev Weiss } 2612c3963bc0SZev Weiss 2613c3963bc0SZev Weiss static ssize_t 2614c3963bc0SZev Weiss store_pwm_enable(struct device *dev, struct device_attribute *attr, 2615c3963bc0SZev Weiss const char *buf, size_t count) 2616c3963bc0SZev Weiss { 2617c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2618c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2619c3963bc0SZev Weiss int nr = sattr->index; 2620c3963bc0SZev Weiss unsigned long val; 2621c3963bc0SZev Weiss int err; 2622c3963bc0SZev Weiss u16 reg; 2623c3963bc0SZev Weiss 2624c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2625c3963bc0SZev Weiss if (err < 0) 2626c3963bc0SZev Weiss return err; 2627c3963bc0SZev Weiss 2628c3963bc0SZev Weiss if (val > sf4) 2629c3963bc0SZev Weiss return -EINVAL; 2630c3963bc0SZev Weiss 2631c3963bc0SZev Weiss if (val == sf3 && data->kind != nct6775) 2632c3963bc0SZev Weiss return -EINVAL; 2633c3963bc0SZev Weiss 2634c3963bc0SZev Weiss if (val == sf4 && check_trip_points(data, nr)) { 2635c3963bc0SZev Weiss dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n"); 2636c3963bc0SZev Weiss dev_err(dev, "Adjust trip points and try again\n"); 2637c3963bc0SZev Weiss return -EINVAL; 2638c3963bc0SZev Weiss } 2639c3963bc0SZev Weiss 2640c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2641c3963bc0SZev Weiss data->pwm_enable[nr] = val; 2642c3963bc0SZev Weiss if (val == off) { 2643c3963bc0SZev Weiss /* 2644c3963bc0SZev Weiss * turn off pwm control: select manual mode, set pwm to maximum 2645c3963bc0SZev Weiss */ 2646c3963bc0SZev Weiss data->pwm[0][nr] = 255; 2647c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); 2648c3963bc0SZev Weiss if (err) 2649c3963bc0SZev Weiss goto out; 2650c3963bc0SZev Weiss } 2651c3963bc0SZev Weiss err = pwm_update_registers(data, nr); 2652c3963bc0SZev Weiss if (err) 2653c3963bc0SZev Weiss goto out; 2654c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2655c3963bc0SZev Weiss if (err) 2656c3963bc0SZev Weiss goto out; 2657c3963bc0SZev Weiss reg &= 0x0f; 2658c3963bc0SZev Weiss reg |= pwm_enable_to_reg(val) << 4; 2659c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2660c3963bc0SZev Weiss out: 2661c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2662c3963bc0SZev Weiss return err ? : count; 2663c3963bc0SZev Weiss } 2664c3963bc0SZev Weiss 2665c3963bc0SZev Weiss static ssize_t 2666c3963bc0SZev Weiss show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src) 2667c3963bc0SZev Weiss { 2668c3963bc0SZev Weiss int i, sel = 0; 2669c3963bc0SZev Weiss 2670c3963bc0SZev Weiss for (i = 0; i < NUM_TEMP; i++) { 2671c3963bc0SZev Weiss if (!(data->have_temp & BIT(i))) 2672c3963bc0SZev Weiss continue; 2673c3963bc0SZev Weiss if (src == data->temp_src[i]) { 2674c3963bc0SZev Weiss sel = i + 1; 2675c3963bc0SZev Weiss break; 2676c3963bc0SZev Weiss } 2677c3963bc0SZev Weiss } 2678c3963bc0SZev Weiss 2679c3963bc0SZev Weiss return sprintf(buf, "%d\n", sel); 2680c3963bc0SZev Weiss } 2681c3963bc0SZev Weiss 2682c3963bc0SZev Weiss static ssize_t 2683c3963bc0SZev Weiss show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf) 2684c3963bc0SZev Weiss { 2685c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2686c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2687c3963bc0SZev Weiss int index = sattr->index; 2688c3963bc0SZev Weiss 2689c3963bc0SZev Weiss if (IS_ERR(data)) 2690c3963bc0SZev Weiss return PTR_ERR(data); 2691c3963bc0SZev Weiss 2692c3963bc0SZev Weiss return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]); 2693c3963bc0SZev Weiss } 2694c3963bc0SZev Weiss 2695c3963bc0SZev Weiss static ssize_t 2696c3963bc0SZev Weiss store_pwm_temp_sel(struct device *dev, struct device_attribute *attr, 2697c3963bc0SZev Weiss const char *buf, size_t count) 2698c3963bc0SZev Weiss { 2699c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2700c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2701c3963bc0SZev Weiss int nr = sattr->index; 2702c3963bc0SZev Weiss unsigned long val; 2703c3963bc0SZev Weiss int err, src; 2704c3963bc0SZev Weiss u16 reg; 2705c3963bc0SZev Weiss 2706c3963bc0SZev Weiss if (IS_ERR(data)) 2707c3963bc0SZev Weiss return PTR_ERR(data); 2708c3963bc0SZev Weiss 2709c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2710c3963bc0SZev Weiss if (err < 0) 2711c3963bc0SZev Weiss return err; 2712c3963bc0SZev Weiss if (val == 0 || val > NUM_TEMP) 2713c3963bc0SZev Weiss return -EINVAL; 2714c3963bc0SZev Weiss if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1]) 2715c3963bc0SZev Weiss return -EINVAL; 2716c3963bc0SZev Weiss 2717c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2718c3963bc0SZev Weiss src = data->temp_src[val - 1]; 2719c3963bc0SZev Weiss data->pwm_temp_sel[nr] = src; 2720c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2721c3963bc0SZev Weiss if (err) 2722c3963bc0SZev Weiss goto out; 2723c3963bc0SZev Weiss reg &= 0xe0; 2724c3963bc0SZev Weiss reg |= src; 2725c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2726c3963bc0SZev Weiss out: 2727c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2728c3963bc0SZev Weiss 2729c3963bc0SZev Weiss return err ? : count; 2730c3963bc0SZev Weiss } 2731c3963bc0SZev Weiss 2732c3963bc0SZev Weiss static ssize_t 2733c3963bc0SZev Weiss show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2734c3963bc0SZev Weiss char *buf) 2735c3963bc0SZev Weiss { 2736c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2737c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2738c3963bc0SZev Weiss int index = sattr->index; 2739c3963bc0SZev Weiss 2740c3963bc0SZev Weiss if (IS_ERR(data)) 2741c3963bc0SZev Weiss return PTR_ERR(data); 2742c3963bc0SZev Weiss 2743c3963bc0SZev Weiss return show_pwm_temp_sel_common(data, buf, 2744c3963bc0SZev Weiss data->pwm_weight_temp_sel[index]); 2745c3963bc0SZev Weiss } 2746c3963bc0SZev Weiss 2747c3963bc0SZev Weiss static ssize_t 2748c3963bc0SZev Weiss store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2749c3963bc0SZev Weiss const char *buf, size_t count) 2750c3963bc0SZev Weiss { 2751c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2752c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2753c3963bc0SZev Weiss int nr = sattr->index; 2754c3963bc0SZev Weiss unsigned long val; 2755c3963bc0SZev Weiss int err, src; 2756c3963bc0SZev Weiss u16 reg; 2757c3963bc0SZev Weiss 2758c3963bc0SZev Weiss if (IS_ERR(data)) 2759c3963bc0SZev Weiss return PTR_ERR(data); 2760c3963bc0SZev Weiss 2761c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2762c3963bc0SZev Weiss if (err < 0) 2763c3963bc0SZev Weiss return err; 2764c3963bc0SZev Weiss if (val > NUM_TEMP) 2765c3963bc0SZev Weiss return -EINVAL; 2766c3963bc0SZev Weiss val = array_index_nospec(val, NUM_TEMP + 1); 2767c3963bc0SZev Weiss if (val && (!(data->have_temp & BIT(val - 1)) || 2768c3963bc0SZev Weiss !data->temp_src[val - 1])) 2769c3963bc0SZev Weiss return -EINVAL; 2770c3963bc0SZev Weiss 2771c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2772c3963bc0SZev Weiss if (val) { 2773c3963bc0SZev Weiss src = data->temp_src[val - 1]; 2774c3963bc0SZev Weiss data->pwm_weight_temp_sel[nr] = src; 2775c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2776c3963bc0SZev Weiss if (err) 2777c3963bc0SZev Weiss goto out; 2778c3963bc0SZev Weiss reg &= 0xe0; 2779c3963bc0SZev Weiss reg |= (src | 0x80); 2780c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2781c3963bc0SZev Weiss } else { 2782c3963bc0SZev Weiss data->pwm_weight_temp_sel[nr] = 0; 2783c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2784c3963bc0SZev Weiss if (err) 2785c3963bc0SZev Weiss goto out; 2786c3963bc0SZev Weiss reg &= 0x7f; 2787c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2788c3963bc0SZev Weiss } 2789c3963bc0SZev Weiss out: 2790c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2791c3963bc0SZev Weiss 2792c3963bc0SZev Weiss return err ? : count; 2793c3963bc0SZev Weiss } 2794c3963bc0SZev Weiss 2795c3963bc0SZev Weiss static ssize_t 2796c3963bc0SZev Weiss show_target_temp(struct device *dev, struct device_attribute *attr, char *buf) 2797c3963bc0SZev Weiss { 2798c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2799c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2800c3963bc0SZev Weiss 2801c3963bc0SZev Weiss if (IS_ERR(data)) 2802c3963bc0SZev Weiss return PTR_ERR(data); 2803c3963bc0SZev Weiss 2804c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000); 2805c3963bc0SZev Weiss } 2806c3963bc0SZev Weiss 2807c3963bc0SZev Weiss static ssize_t 2808c3963bc0SZev Weiss store_target_temp(struct device *dev, struct device_attribute *attr, 2809c3963bc0SZev Weiss const char *buf, size_t count) 2810c3963bc0SZev Weiss { 2811c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2812c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2813c3963bc0SZev Weiss int nr = sattr->index; 2814c3963bc0SZev Weiss unsigned long val; 2815c3963bc0SZev Weiss int err; 2816c3963bc0SZev Weiss 2817c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2818c3963bc0SZev Weiss if (err < 0) 2819c3963bc0SZev Weiss return err; 2820c3963bc0SZev Weiss 2821c3963bc0SZev Weiss val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 2822c3963bc0SZev Weiss data->target_temp_mask); 2823c3963bc0SZev Weiss 2824c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2825c3963bc0SZev Weiss data->target_temp[nr] = val; 2826c3963bc0SZev Weiss err = pwm_update_registers(data, nr); 2827c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2828c3963bc0SZev Weiss return err ? : count; 2829c3963bc0SZev Weiss } 2830c3963bc0SZev Weiss 2831c3963bc0SZev Weiss static ssize_t 2832c3963bc0SZev Weiss show_target_speed(struct device *dev, struct device_attribute *attr, char *buf) 2833c3963bc0SZev Weiss { 2834c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2835c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2836c3963bc0SZev Weiss int nr = sattr->index; 2837c3963bc0SZev Weiss 2838c3963bc0SZev Weiss if (IS_ERR(data)) 2839c3963bc0SZev Weiss return PTR_ERR(data); 2840c3963bc0SZev Weiss 2841c3963bc0SZev Weiss return sprintf(buf, "%d\n", 2842c3963bc0SZev Weiss fan_from_reg16(data->target_speed[nr], 2843c3963bc0SZev Weiss data->fan_div[nr])); 2844c3963bc0SZev Weiss } 2845c3963bc0SZev Weiss 2846c3963bc0SZev Weiss static ssize_t 2847c3963bc0SZev Weiss store_target_speed(struct device *dev, struct device_attribute *attr, 2848c3963bc0SZev Weiss const char *buf, size_t count) 2849c3963bc0SZev Weiss { 2850c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2851c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2852c3963bc0SZev Weiss int nr = sattr->index; 2853c3963bc0SZev Weiss unsigned long val; 2854c3963bc0SZev Weiss int err; 2855c3963bc0SZev Weiss u16 speed; 2856c3963bc0SZev Weiss 2857c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2858c3963bc0SZev Weiss if (err < 0) 2859c3963bc0SZev Weiss return err; 2860c3963bc0SZev Weiss 2861c3963bc0SZev Weiss val = clamp_val(val, 0, 1350000U); 2862c3963bc0SZev Weiss speed = fan_to_reg(val, data->fan_div[nr]); 2863c3963bc0SZev Weiss 2864c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2865c3963bc0SZev Weiss data->target_speed[nr] = speed; 2866c3963bc0SZev Weiss err = pwm_update_registers(data, nr); 2867c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2868c3963bc0SZev Weiss return err ? : count; 2869c3963bc0SZev Weiss } 2870c3963bc0SZev Weiss 2871c3963bc0SZev Weiss static ssize_t 2872c3963bc0SZev Weiss show_temp_tolerance(struct device *dev, struct device_attribute *attr, 2873c3963bc0SZev Weiss char *buf) 2874c3963bc0SZev Weiss { 2875c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2876c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2877c3963bc0SZev Weiss int nr = sattr->nr; 2878c3963bc0SZev Weiss int index = sattr->index; 2879c3963bc0SZev Weiss 2880c3963bc0SZev Weiss if (IS_ERR(data)) 2881c3963bc0SZev Weiss return PTR_ERR(data); 2882c3963bc0SZev Weiss 2883c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000); 2884c3963bc0SZev Weiss } 2885c3963bc0SZev Weiss 2886c3963bc0SZev Weiss static ssize_t 2887c3963bc0SZev Weiss store_temp_tolerance(struct device *dev, struct device_attribute *attr, 2888c3963bc0SZev Weiss const char *buf, size_t count) 2889c3963bc0SZev Weiss { 2890c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2891c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2892c3963bc0SZev Weiss int nr = sattr->nr; 2893c3963bc0SZev Weiss int index = sattr->index; 2894c3963bc0SZev Weiss unsigned long val; 2895c3963bc0SZev Weiss int err; 2896c3963bc0SZev Weiss 2897c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2898c3963bc0SZev Weiss if (err < 0) 2899c3963bc0SZev Weiss return err; 2900c3963bc0SZev Weiss 2901c3963bc0SZev Weiss /* Limit tolerance as needed */ 2902c3963bc0SZev Weiss val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); 2903c3963bc0SZev Weiss 2904c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2905c3963bc0SZev Weiss data->temp_tolerance[index][nr] = val; 2906c3963bc0SZev Weiss if (index) 2907c3963bc0SZev Weiss err = pwm_update_registers(data, nr); 2908c3963bc0SZev Weiss else 2909c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val); 2910c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2911c3963bc0SZev Weiss return err ? : count; 2912c3963bc0SZev Weiss } 2913c3963bc0SZev Weiss 2914c3963bc0SZev Weiss /* 2915c3963bc0SZev Weiss * Fan speed tolerance is a tricky beast, since the associated register is 2916c3963bc0SZev Weiss * a tick counter, but the value is reported and configured as rpm. 2917c3963bc0SZev Weiss * Compute resulting low and high rpm values and report the difference. 2918c3963bc0SZev Weiss * A fan speed tolerance only makes sense if a fan target speed has been 2919c3963bc0SZev Weiss * configured, so only display values other than 0 if that is the case. 2920c3963bc0SZev Weiss */ 2921c3963bc0SZev Weiss static ssize_t 2922c3963bc0SZev Weiss show_speed_tolerance(struct device *dev, struct device_attribute *attr, 2923c3963bc0SZev Weiss char *buf) 2924c3963bc0SZev Weiss { 2925c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 2926c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2927c3963bc0SZev Weiss int nr = sattr->index; 2928c3963bc0SZev Weiss int target, tolerance = 0; 2929c3963bc0SZev Weiss 2930c3963bc0SZev Weiss if (IS_ERR(data)) 2931c3963bc0SZev Weiss return PTR_ERR(data); 2932c3963bc0SZev Weiss 2933c3963bc0SZev Weiss target = data->target_speed[nr]; 2934c3963bc0SZev Weiss 2935c3963bc0SZev Weiss if (target) { 2936c3963bc0SZev Weiss int low = target - data->target_speed_tolerance[nr]; 2937c3963bc0SZev Weiss int high = target + data->target_speed_tolerance[nr]; 2938c3963bc0SZev Weiss 2939c3963bc0SZev Weiss if (low <= 0) 2940c3963bc0SZev Weiss low = 1; 2941c3963bc0SZev Weiss if (high > 0xffff) 2942c3963bc0SZev Weiss high = 0xffff; 2943c3963bc0SZev Weiss if (high < low) 2944c3963bc0SZev Weiss high = low; 2945c3963bc0SZev Weiss 2946c3963bc0SZev Weiss tolerance = (fan_from_reg16(low, data->fan_div[nr]) 2947c3963bc0SZev Weiss - fan_from_reg16(high, data->fan_div[nr])) / 2; 2948c3963bc0SZev Weiss } 2949c3963bc0SZev Weiss 2950c3963bc0SZev Weiss return sprintf(buf, "%d\n", tolerance); 2951c3963bc0SZev Weiss } 2952c3963bc0SZev Weiss 2953c3963bc0SZev Weiss static ssize_t 2954c3963bc0SZev Weiss store_speed_tolerance(struct device *dev, struct device_attribute *attr, 2955c3963bc0SZev Weiss const char *buf, size_t count) 2956c3963bc0SZev Weiss { 2957c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 2958c3963bc0SZev Weiss struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2959c3963bc0SZev Weiss int nr = sattr->index; 2960c3963bc0SZev Weiss unsigned long val; 2961c3963bc0SZev Weiss int err; 2962c3963bc0SZev Weiss int low, high; 2963c3963bc0SZev Weiss 2964c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 2965c3963bc0SZev Weiss if (err < 0) 2966c3963bc0SZev Weiss return err; 2967c3963bc0SZev Weiss 2968c3963bc0SZev Weiss high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val; 2969c3963bc0SZev Weiss low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val; 2970c3963bc0SZev Weiss if (low <= 0) 2971c3963bc0SZev Weiss low = 1; 2972c3963bc0SZev Weiss if (high < low) 2973c3963bc0SZev Weiss high = low; 2974c3963bc0SZev Weiss 2975c3963bc0SZev Weiss val = (fan_to_reg(low, data->fan_div[nr]) - 2976c3963bc0SZev Weiss fan_to_reg(high, data->fan_div[nr])) / 2; 2977c3963bc0SZev Weiss 2978c3963bc0SZev Weiss /* Limit tolerance as needed */ 2979c3963bc0SZev Weiss val = clamp_val(val, 0, data->speed_tolerance_limit); 2980c3963bc0SZev Weiss 2981c3963bc0SZev Weiss mutex_lock(&data->update_lock); 2982c3963bc0SZev Weiss data->target_speed_tolerance[nr] = val; 2983c3963bc0SZev Weiss err = pwm_update_registers(data, nr); 2984c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 2985c3963bc0SZev Weiss return err ? : count; 2986c3963bc0SZev Weiss } 2987c3963bc0SZev Weiss 2988c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0); 2989c3963bc0SZev Weiss SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0); 2990c3963bc0SZev Weiss SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0); 2991c3963bc0SZev Weiss SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0); 2992c3963bc0SZev Weiss SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0); 2993c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0); 2994c3963bc0SZev Weiss SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance, 2995c3963bc0SZev Weiss store_speed_tolerance, 0); 2996c3963bc0SZev Weiss 2997c3963bc0SZev Weiss /* Smart Fan registers */ 2998c3963bc0SZev Weiss 2999c3963bc0SZev Weiss static ssize_t 3000c3963bc0SZev Weiss show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf) 3001c3963bc0SZev Weiss { 3002c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 3003c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3004c3963bc0SZev Weiss int nr = sattr->nr; 3005c3963bc0SZev Weiss int index = sattr->index; 3006c3963bc0SZev Weiss 3007c3963bc0SZev Weiss if (IS_ERR(data)) 3008c3963bc0SZev Weiss return PTR_ERR(data); 3009c3963bc0SZev Weiss 3010c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000); 3011c3963bc0SZev Weiss } 3012c3963bc0SZev Weiss 3013c3963bc0SZev Weiss static ssize_t 3014c3963bc0SZev Weiss store_weight_temp(struct device *dev, struct device_attribute *attr, 3015c3963bc0SZev Weiss const char *buf, size_t count) 3016c3963bc0SZev Weiss { 3017c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 3018c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3019c3963bc0SZev Weiss int nr = sattr->nr; 3020c3963bc0SZev Weiss int index = sattr->index; 3021c3963bc0SZev Weiss unsigned long val; 3022c3963bc0SZev Weiss int err; 3023c3963bc0SZev Weiss 3024c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 3025c3963bc0SZev Weiss if (err < 0) 3026c3963bc0SZev Weiss return err; 3027c3963bc0SZev Weiss 3028c3963bc0SZev Weiss val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); 3029c3963bc0SZev Weiss 3030c3963bc0SZev Weiss mutex_lock(&data->update_lock); 3031c3963bc0SZev Weiss data->weight_temp[index][nr] = val; 3032c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val); 3033c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 3034c3963bc0SZev Weiss return err ? : count; 3035c3963bc0SZev Weiss } 3036c3963bc0SZev Weiss 3037c3963bc0SZev Weiss SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644, 3038c3963bc0SZev Weiss show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0); 3039c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step", 3040c3963bc0SZev Weiss 0644, show_weight_temp, store_weight_temp, 0, 0); 3041c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol", 3042c3963bc0SZev Weiss 0644, show_weight_temp, store_weight_temp, 0, 1); 3043c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base", 3044c3963bc0SZev Weiss 0644, show_weight_temp, store_weight_temp, 0, 2); 3045c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5); 3046c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6); 3047c3963bc0SZev Weiss 3048c3963bc0SZev Weiss static ssize_t 3049c3963bc0SZev Weiss show_fan_time(struct device *dev, struct device_attribute *attr, char *buf) 3050c3963bc0SZev Weiss { 3051c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 3052c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3053c3963bc0SZev Weiss int nr = sattr->nr; 3054c3963bc0SZev Weiss int index = sattr->index; 3055c3963bc0SZev Weiss 3056c3963bc0SZev Weiss if (IS_ERR(data)) 3057c3963bc0SZev Weiss return PTR_ERR(data); 3058c3963bc0SZev Weiss 3059c3963bc0SZev Weiss return sprintf(buf, "%d\n", 3060c3963bc0SZev Weiss step_time_from_reg(data->fan_time[index][nr], 3061c3963bc0SZev Weiss data->pwm_mode[nr])); 3062c3963bc0SZev Weiss } 3063c3963bc0SZev Weiss 3064c3963bc0SZev Weiss static ssize_t 3065c3963bc0SZev Weiss store_fan_time(struct device *dev, struct device_attribute *attr, 3066c3963bc0SZev Weiss const char *buf, size_t count) 3067c3963bc0SZev Weiss { 3068c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 3069c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3070c3963bc0SZev Weiss int nr = sattr->nr; 3071c3963bc0SZev Weiss int index = sattr->index; 3072c3963bc0SZev Weiss unsigned long val; 3073c3963bc0SZev Weiss int err; 3074c3963bc0SZev Weiss 3075c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 3076c3963bc0SZev Weiss if (err < 0) 3077c3963bc0SZev Weiss return err; 3078c3963bc0SZev Weiss 3079c3963bc0SZev Weiss val = step_time_to_reg(val, data->pwm_mode[nr]); 3080c3963bc0SZev Weiss mutex_lock(&data->update_lock); 3081c3963bc0SZev Weiss data->fan_time[index][nr] = val; 3082c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val); 3083c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 3084c3963bc0SZev Weiss return err ? : count; 3085c3963bc0SZev Weiss } 3086c3963bc0SZev Weiss 3087c3963bc0SZev Weiss static ssize_t 3088c3963bc0SZev Weiss show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf) 3089c3963bc0SZev Weiss { 3090c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 3091c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3092c3963bc0SZev Weiss 3093c3963bc0SZev Weiss if (IS_ERR(data)) 3094c3963bc0SZev Weiss return PTR_ERR(data); 3095c3963bc0SZev Weiss 3096c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]); 3097c3963bc0SZev Weiss } 3098c3963bc0SZev Weiss 3099c3963bc0SZev Weiss static ssize_t 3100c3963bc0SZev Weiss store_auto_pwm(struct device *dev, struct device_attribute *attr, 3101c3963bc0SZev Weiss const char *buf, size_t count) 3102c3963bc0SZev Weiss { 3103c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 3104c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3105c3963bc0SZev Weiss int nr = sattr->nr; 3106c3963bc0SZev Weiss int point = sattr->index; 3107c3963bc0SZev Weiss unsigned long val; 3108c3963bc0SZev Weiss int err; 3109c3963bc0SZev Weiss u16 reg; 3110c3963bc0SZev Weiss 3111c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 3112c3963bc0SZev Weiss if (err < 0) 3113c3963bc0SZev Weiss return err; 3114c3963bc0SZev Weiss if (val > 255) 3115c3963bc0SZev Weiss return -EINVAL; 3116c3963bc0SZev Weiss 3117c3963bc0SZev Weiss if (point == data->auto_pwm_num) { 3118c3963bc0SZev Weiss if (data->kind != nct6775 && !val) 3119c3963bc0SZev Weiss return -EINVAL; 3120c3963bc0SZev Weiss if (data->kind != nct6779 && val) 3121c3963bc0SZev Weiss val = 0xff; 3122c3963bc0SZev Weiss } 3123c3963bc0SZev Weiss 3124c3963bc0SZev Weiss mutex_lock(&data->update_lock); 3125c3963bc0SZev Weiss data->auto_pwm[nr][point] = val; 3126c3963bc0SZev Weiss if (point < data->auto_pwm_num) { 3127c3963bc0SZev Weiss err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point), 3128c3963bc0SZev Weiss data->auto_pwm[nr][point]); 3129c3963bc0SZev Weiss } else { 3130c3963bc0SZev Weiss switch (data->kind) { 3131c3963bc0SZev Weiss case nct6775: 3132c3963bc0SZev Weiss /* disable if needed (pwm == 0) */ 3133c3963bc0SZev Weiss err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®); 3134c3963bc0SZev Weiss if (err) 3135c3963bc0SZev Weiss break; 3136c3963bc0SZev Weiss if (val) 3137c3963bc0SZev Weiss reg |= 0x02; 3138c3963bc0SZev Weiss else 3139c3963bc0SZev Weiss reg &= ~0x02; 3140c3963bc0SZev Weiss err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg); 3141c3963bc0SZev Weiss break; 3142c3963bc0SZev Weiss case nct6776: 3143c3963bc0SZev Weiss break; /* always enabled, nothing to do */ 3144c3963bc0SZev Weiss case nct6106: 3145c3963bc0SZev Weiss case nct6116: 3146c3963bc0SZev Weiss case nct6779: 3147c3963bc0SZev Weiss case nct6791: 3148c3963bc0SZev Weiss case nct6792: 3149c3963bc0SZev Weiss case nct6793: 3150c3963bc0SZev Weiss case nct6795: 3151c3963bc0SZev Weiss case nct6796: 3152c3963bc0SZev Weiss case nct6797: 3153c3963bc0SZev Weiss case nct6798: 3154*aee395bbSGuenter Roeck case nct6799: 3155c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val); 3156c3963bc0SZev Weiss if (err) 3157c3963bc0SZev Weiss break; 3158c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®); 3159c3963bc0SZev Weiss if (err) 3160c3963bc0SZev Weiss break; 3161c3963bc0SZev Weiss if (val == 255) 3162c3963bc0SZev Weiss reg &= ~data->CRITICAL_PWM_ENABLE_MASK; 3163c3963bc0SZev Weiss else 3164c3963bc0SZev Weiss reg |= data->CRITICAL_PWM_ENABLE_MASK; 3165c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg); 3166c3963bc0SZev Weiss break; 3167c3963bc0SZev Weiss } 3168c3963bc0SZev Weiss } 3169c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 3170c3963bc0SZev Weiss return err ? : count; 3171c3963bc0SZev Weiss } 3172c3963bc0SZev Weiss 3173c3963bc0SZev Weiss static ssize_t 3174c3963bc0SZev Weiss show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf) 3175c3963bc0SZev Weiss { 3176c3963bc0SZev Weiss struct nct6775_data *data = nct6775_update_device(dev); 3177c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3178c3963bc0SZev Weiss int nr = sattr->nr; 3179c3963bc0SZev Weiss int point = sattr->index; 3180c3963bc0SZev Weiss 3181c3963bc0SZev Weiss if (IS_ERR(data)) 3182c3963bc0SZev Weiss return PTR_ERR(data); 3183c3963bc0SZev Weiss 3184c3963bc0SZev Weiss /* 3185c3963bc0SZev Weiss * We don't know for sure if the temperature is signed or unsigned. 3186c3963bc0SZev Weiss * Assume it is unsigned. 3187c3963bc0SZev Weiss */ 3188c3963bc0SZev Weiss return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000); 3189c3963bc0SZev Weiss } 3190c3963bc0SZev Weiss 3191c3963bc0SZev Weiss static ssize_t 3192c3963bc0SZev Weiss store_auto_temp(struct device *dev, struct device_attribute *attr, 3193c3963bc0SZev Weiss const char *buf, size_t count) 3194c3963bc0SZev Weiss { 3195c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 3196c3963bc0SZev Weiss struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3197c3963bc0SZev Weiss int nr = sattr->nr; 3198c3963bc0SZev Weiss int point = sattr->index; 3199c3963bc0SZev Weiss unsigned long val; 3200c3963bc0SZev Weiss int err; 3201c3963bc0SZev Weiss 3202c3963bc0SZev Weiss err = kstrtoul(buf, 10, &val); 3203c3963bc0SZev Weiss if (err) 3204c3963bc0SZev Weiss return err; 3205c3963bc0SZev Weiss if (val > 255000) 3206c3963bc0SZev Weiss return -EINVAL; 3207c3963bc0SZev Weiss 3208c3963bc0SZev Weiss mutex_lock(&data->update_lock); 3209c3963bc0SZev Weiss data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000); 3210c3963bc0SZev Weiss if (point < data->auto_pwm_num) { 3211c3963bc0SZev Weiss err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point), 3212c3963bc0SZev Weiss data->auto_temp[nr][point]); 3213c3963bc0SZev Weiss } else { 3214c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr], 3215c3963bc0SZev Weiss data->auto_temp[nr][point]); 3216c3963bc0SZev Weiss } 3217c3963bc0SZev Weiss mutex_unlock(&data->update_lock); 3218c3963bc0SZev Weiss return err ? : count; 3219c3963bc0SZev Weiss } 3220c3963bc0SZev Weiss 3221c3963bc0SZev Weiss static umode_t nct6775_pwm_is_visible(struct kobject *kobj, 3222c3963bc0SZev Weiss struct attribute *attr, int index) 3223c3963bc0SZev Weiss { 3224c3963bc0SZev Weiss struct device *dev = kobj_to_dev(kobj); 3225c3963bc0SZev Weiss struct nct6775_data *data = dev_get_drvdata(dev); 3226c3963bc0SZev Weiss int pwm = index / 36; /* pwm index */ 3227c3963bc0SZev Weiss int nr = index % 36; /* attribute index */ 3228c3963bc0SZev Weiss 3229c3963bc0SZev Weiss if (!(data->has_pwm & BIT(pwm))) 3230c3963bc0SZev Weiss return 0; 3231c3963bc0SZev Weiss 3232c3963bc0SZev Weiss if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */ 3233c3963bc0SZev Weiss if (!data->REG_WEIGHT_TEMP_SEL[pwm]) 3234c3963bc0SZev Weiss return 0; 3235c3963bc0SZev Weiss if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */ 3236c3963bc0SZev Weiss return 0; 3237c3963bc0SZev Weiss if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */ 3238c3963bc0SZev Weiss return 0; 3239c3963bc0SZev Weiss if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */ 3240c3963bc0SZev Weiss return 0; 3241c3963bc0SZev Weiss 3242c3963bc0SZev Weiss if (nr >= 22 && nr <= 35) { /* auto point */ 3243c3963bc0SZev Weiss int api = (nr - 22) / 2; /* auto point index */ 3244c3963bc0SZev Weiss 3245c3963bc0SZev Weiss if (api > data->auto_pwm_num) 3246c3963bc0SZev Weiss return 0; 3247c3963bc0SZev Weiss } 3248c3963bc0SZev Weiss return nct6775_attr_mode(data, attr); 3249c3963bc0SZev Weiss } 3250c3963bc0SZev Weiss 3251c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0); 3252c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644, 3253c3963bc0SZev Weiss show_fan_time, store_fan_time, 0, 1); 3254c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644, 3255c3963bc0SZev Weiss show_fan_time, store_fan_time, 0, 2); 3256c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1); 3257c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2); 3258c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644, 3259c3963bc0SZev Weiss show_temp_tolerance, store_temp_tolerance, 0, 0); 3260c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance", 3261c3963bc0SZev Weiss 0644, show_temp_tolerance, store_temp_tolerance, 0, 1); 3262c3963bc0SZev Weiss 3263c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3); 3264c3963bc0SZev Weiss 3265c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4); 3266c3963bc0SZev Weiss 3267c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm", 3268c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 0); 3269c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp", 3270c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 0); 3271c3963bc0SZev Weiss 3272c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm", 3273c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 1); 3274c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp", 3275c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 1); 3276c3963bc0SZev Weiss 3277c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm", 3278c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 2); 3279c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp", 3280c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 2); 3281c3963bc0SZev Weiss 3282c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm", 3283c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 3); 3284c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp", 3285c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 3); 3286c3963bc0SZev Weiss 3287c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm", 3288c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 4); 3289c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp", 3290c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 4); 3291c3963bc0SZev Weiss 3292c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm", 3293c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 5); 3294c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp", 3295c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 5); 3296c3963bc0SZev Weiss 3297c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm", 3298c3963bc0SZev Weiss 0644, show_auto_pwm, store_auto_pwm, 0, 6); 3299c3963bc0SZev Weiss SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp", 3300c3963bc0SZev Weiss 0644, show_auto_temp, store_auto_temp, 0, 6); 3301c3963bc0SZev Weiss 3302c3963bc0SZev Weiss /* 3303c3963bc0SZev Weiss * nct6775_pwm_is_visible uses the index into the following array 3304c3963bc0SZev Weiss * to determine if attributes should be created or not. 3305c3963bc0SZev Weiss * Any change in order or content must be matched. 3306c3963bc0SZev Weiss */ 3307c3963bc0SZev Weiss static struct sensor_device_template *nct6775_attributes_pwm_template[] = { 3308c3963bc0SZev Weiss &sensor_dev_template_pwm, 3309c3963bc0SZev Weiss &sensor_dev_template_pwm_mode, 3310c3963bc0SZev Weiss &sensor_dev_template_pwm_enable, 3311c3963bc0SZev Weiss &sensor_dev_template_pwm_temp_sel, 3312c3963bc0SZev Weiss &sensor_dev_template_pwm_temp_tolerance, 3313c3963bc0SZev Weiss &sensor_dev_template_pwm_crit_temp_tolerance, 3314c3963bc0SZev Weiss &sensor_dev_template_pwm_target_temp, 3315c3963bc0SZev Weiss &sensor_dev_template_fan_target, 3316c3963bc0SZev Weiss &sensor_dev_template_fan_tolerance, 3317c3963bc0SZev Weiss &sensor_dev_template_pwm_stop_time, 3318c3963bc0SZev Weiss &sensor_dev_template_pwm_step_up_time, 3319c3963bc0SZev Weiss &sensor_dev_template_pwm_step_down_time, 3320c3963bc0SZev Weiss &sensor_dev_template_pwm_start, 3321c3963bc0SZev Weiss &sensor_dev_template_pwm_floor, 3322c3963bc0SZev Weiss &sensor_dev_template_pwm_weight_temp_sel, /* 14 */ 3323c3963bc0SZev Weiss &sensor_dev_template_pwm_weight_temp_step, 3324c3963bc0SZev Weiss &sensor_dev_template_pwm_weight_temp_step_tol, 3325c3963bc0SZev Weiss &sensor_dev_template_pwm_weight_temp_step_base, 3326c3963bc0SZev Weiss &sensor_dev_template_pwm_weight_duty_step, /* 18 */ 3327c3963bc0SZev Weiss &sensor_dev_template_pwm_max, /* 19 */ 3328c3963bc0SZev Weiss &sensor_dev_template_pwm_step, /* 20 */ 3329c3963bc0SZev Weiss &sensor_dev_template_pwm_weight_duty_base, /* 21 */ 3330c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */ 3331c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point1_temp, 3332c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point2_pwm, 3333c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point2_temp, 3334c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point3_pwm, 3335c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point3_temp, 3336c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point4_pwm, 3337c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point4_temp, 3338c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point5_pwm, 3339c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point5_temp, 3340c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point6_pwm, 3341c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point6_temp, 3342c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point7_pwm, 3343c3963bc0SZev Weiss &sensor_dev_template_pwm_auto_point7_temp, /* 35 */ 3344c3963bc0SZev Weiss 3345c3963bc0SZev Weiss NULL 3346c3963bc0SZev Weiss }; 3347c3963bc0SZev Weiss 3348c3963bc0SZev Weiss static const struct sensor_template_group nct6775_pwm_template_group = { 3349c3963bc0SZev Weiss .templates = nct6775_attributes_pwm_template, 3350c3963bc0SZev Weiss .is_visible = nct6775_pwm_is_visible, 3351c3963bc0SZev Weiss .base = 1, 3352c3963bc0SZev Weiss }; 3353c3963bc0SZev Weiss 3354c3963bc0SZev Weiss static inline int nct6775_init_device(struct nct6775_data *data) 3355c3963bc0SZev Weiss { 3356c3963bc0SZev Weiss int i, err; 3357c3963bc0SZev Weiss u16 tmp, diode; 3358c3963bc0SZev Weiss 3359c3963bc0SZev Weiss /* Start monitoring if needed */ 3360c3963bc0SZev Weiss if (data->REG_CONFIG) { 3361c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_CONFIG, &tmp); 3362c3963bc0SZev Weiss if (err) 3363c3963bc0SZev Weiss return err; 3364c3963bc0SZev Weiss if (!(tmp & 0x01)) { 3365c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); 3366c3963bc0SZev Weiss if (err) 3367c3963bc0SZev Weiss return err; 3368c3963bc0SZev Weiss } 3369c3963bc0SZev Weiss } 3370c3963bc0SZev Weiss 3371c3963bc0SZev Weiss /* Enable temperature sensors if needed */ 3372c3963bc0SZev Weiss for (i = 0; i < NUM_TEMP; i++) { 3373c3963bc0SZev Weiss if (!(data->have_temp & BIT(i))) 3374c3963bc0SZev Weiss continue; 3375c3963bc0SZev Weiss if (!data->reg_temp_config[i]) 3376c3963bc0SZev Weiss continue; 3377c3963bc0SZev Weiss err = nct6775_read_value(data, data->reg_temp_config[i], &tmp); 3378c3963bc0SZev Weiss if (err) 3379c3963bc0SZev Weiss return err; 3380c3963bc0SZev Weiss if (tmp & 0x01) { 3381c3963bc0SZev Weiss err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); 3382c3963bc0SZev Weiss if (err) 3383c3963bc0SZev Weiss return err; 3384c3963bc0SZev Weiss } 3385c3963bc0SZev Weiss } 3386c3963bc0SZev Weiss 3387c3963bc0SZev Weiss /* Enable VBAT monitoring if needed */ 3388c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_VBAT, &tmp); 3389c3963bc0SZev Weiss if (err) 3390c3963bc0SZev Weiss return err; 3391c3963bc0SZev Weiss if (!(tmp & 0x01)) { 3392c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); 3393c3963bc0SZev Weiss if (err) 3394c3963bc0SZev Weiss return err; 3395c3963bc0SZev Weiss } 3396c3963bc0SZev Weiss 3397c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_DIODE, &diode); 3398c3963bc0SZev Weiss if (err) 3399c3963bc0SZev Weiss return err; 3400c3963bc0SZev Weiss 3401c3963bc0SZev Weiss for (i = 0; i < data->temp_fixed_num; i++) { 3402c3963bc0SZev Weiss if (!(data->have_temp_fixed & BIT(i))) 3403c3963bc0SZev Weiss continue; 3404c3963bc0SZev Weiss if ((tmp & (data->DIODE_MASK << i))) /* diode */ 3405c3963bc0SZev Weiss data->temp_type[i] 3406c3963bc0SZev Weiss = 3 - ((diode >> i) & data->DIODE_MASK); 3407c3963bc0SZev Weiss else /* thermistor */ 3408c3963bc0SZev Weiss data->temp_type[i] = 4; 3409c3963bc0SZev Weiss } 3410c3963bc0SZev Weiss 3411c3963bc0SZev Weiss return 0; 3412c3963bc0SZev Weiss } 3413c3963bc0SZev Weiss 3414c3963bc0SZev Weiss static int add_temp_sensors(struct nct6775_data *data, const u16 *regp, 3415c3963bc0SZev Weiss int *available, int *mask) 3416c3963bc0SZev Weiss { 3417c3963bc0SZev Weiss int i, err; 3418c3963bc0SZev Weiss u16 src; 3419c3963bc0SZev Weiss 3420c3963bc0SZev Weiss for (i = 0; i < data->pwm_num && *available; i++) { 3421c3963bc0SZev Weiss int index; 3422c3963bc0SZev Weiss 3423c3963bc0SZev Weiss if (!regp[i]) 3424c3963bc0SZev Weiss continue; 3425c3963bc0SZev Weiss err = nct6775_read_value(data, regp[i], &src); 3426c3963bc0SZev Weiss if (err) 3427c3963bc0SZev Weiss return err; 3428c3963bc0SZev Weiss src &= 0x1f; 3429c3963bc0SZev Weiss if (!src || (*mask & BIT(src))) 3430c3963bc0SZev Weiss continue; 3431c3963bc0SZev Weiss if (!(data->temp_mask & BIT(src))) 3432c3963bc0SZev Weiss continue; 3433c3963bc0SZev Weiss 3434c3963bc0SZev Weiss index = __ffs(*available); 3435c3963bc0SZev Weiss err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src); 3436c3963bc0SZev Weiss if (err) 3437c3963bc0SZev Weiss return err; 3438c3963bc0SZev Weiss *available &= ~BIT(index); 3439c3963bc0SZev Weiss *mask |= BIT(src); 3440c3963bc0SZev Weiss } 3441c3963bc0SZev Weiss 3442c3963bc0SZev Weiss return 0; 3443c3963bc0SZev Weiss } 3444c3963bc0SZev Weiss 3445c3963bc0SZev Weiss int nct6775_probe(struct device *dev, struct nct6775_data *data, 3446c3963bc0SZev Weiss const struct regmap_config *regmapcfg) 3447c3963bc0SZev Weiss { 3448c3963bc0SZev Weiss int i, s, err = 0; 3449c3963bc0SZev Weiss int mask, available; 3450c3963bc0SZev Weiss u16 src; 3451c3963bc0SZev Weiss const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3452c3963bc0SZev Weiss const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3453c3963bc0SZev Weiss const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3454c3963bc0SZev Weiss int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp; 3455c3963bc0SZev Weiss struct device *hwmon_dev; 3456c3963bc0SZev Weiss struct sensor_template_group tsi_temp_tg; 3457c3963bc0SZev Weiss 3458c3963bc0SZev Weiss data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg); 3459c3963bc0SZev Weiss if (IS_ERR(data->regmap)) 3460c3963bc0SZev Weiss return PTR_ERR(data->regmap); 3461c3963bc0SZev Weiss 3462c3963bc0SZev Weiss mutex_init(&data->update_lock); 3463c3963bc0SZev Weiss data->name = nct6775_device_names[data->kind]; 3464c3963bc0SZev Weiss data->bank = 0xff; /* Force initial bank selection */ 3465c3963bc0SZev Weiss 3466c3963bc0SZev Weiss switch (data->kind) { 3467c3963bc0SZev Weiss case nct6106: 3468c3963bc0SZev Weiss data->in_num = 9; 3469c3963bc0SZev Weiss data->pwm_num = 3; 3470c3963bc0SZev Weiss data->auto_pwm_num = 4; 3471c3963bc0SZev Weiss data->temp_fixed_num = 3; 3472c3963bc0SZev Weiss data->num_temp_alarms = 6; 3473c3963bc0SZev Weiss data->num_temp_beeps = 6; 3474c3963bc0SZev Weiss 3475c3963bc0SZev Weiss data->fan_from_reg = fan_from_reg13; 3476c3963bc0SZev Weiss data->fan_from_reg_min = fan_from_reg13; 3477c3963bc0SZev Weiss 3478c3963bc0SZev Weiss data->temp_label = nct6776_temp_label; 3479c3963bc0SZev Weiss data->temp_mask = NCT6776_TEMP_MASK; 3480c3963bc0SZev Weiss data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3481c3963bc0SZev Weiss 3482c3963bc0SZev Weiss data->REG_VBAT = NCT6106_REG_VBAT; 3483c3963bc0SZev Weiss data->REG_DIODE = NCT6106_REG_DIODE; 3484c3963bc0SZev Weiss data->DIODE_MASK = NCT6106_DIODE_MASK; 3485c3963bc0SZev Weiss data->REG_VIN = NCT6106_REG_IN; 3486c3963bc0SZev Weiss data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3487c3963bc0SZev Weiss data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3488c3963bc0SZev Weiss data->REG_TARGET = NCT6106_REG_TARGET; 3489c3963bc0SZev Weiss data->REG_FAN = NCT6106_REG_FAN; 3490c3963bc0SZev Weiss data->REG_FAN_MODE = NCT6106_REG_FAN_MODE; 3491c3963bc0SZev Weiss data->REG_FAN_MIN = NCT6106_REG_FAN_MIN; 3492c3963bc0SZev Weiss data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES; 3493c3963bc0SZev Weiss data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT; 3494c3963bc0SZev Weiss data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; 3495c3963bc0SZev Weiss data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME; 3496c3963bc0SZev Weiss data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME; 3497c3963bc0SZev Weiss data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H; 3498c3963bc0SZev Weiss data->REG_PWM[0] = NCT6116_REG_PWM; 3499c3963bc0SZev Weiss data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT; 3500c3963bc0SZev Weiss data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT; 3501c3963bc0SZev Weiss data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3502c3963bc0SZev Weiss data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3503c3963bc0SZev Weiss data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3504c3963bc0SZev Weiss data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3505c3963bc0SZev Weiss data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3506c3963bc0SZev Weiss data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP; 3507c3963bc0SZev Weiss data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM; 3508c3963bc0SZev Weiss data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP; 3509c3963bc0SZev Weiss data->REG_CRITICAL_TEMP_TOLERANCE 3510c3963bc0SZev Weiss = NCT6106_REG_CRITICAL_TEMP_TOLERANCE; 3511c3963bc0SZev Weiss data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE; 3512c3963bc0SZev Weiss data->CRITICAL_PWM_ENABLE_MASK 3513c3963bc0SZev Weiss = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3514c3963bc0SZev Weiss data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM; 3515c3963bc0SZev Weiss data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3516c3963bc0SZev Weiss data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3517c3963bc0SZev Weiss data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3518c3963bc0SZev Weiss data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3519c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3520c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3521c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3522c3963bc0SZev Weiss data->REG_ALARM = NCT6106_REG_ALARM; 3523c3963bc0SZev Weiss data->ALARM_BITS = NCT6106_ALARM_BITS; 3524c3963bc0SZev Weiss data->REG_BEEP = NCT6106_REG_BEEP; 3525c3963bc0SZev Weiss data->BEEP_BITS = NCT6106_BEEP_BITS; 3526c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP; 3527c3963bc0SZev Weiss 3528c3963bc0SZev Weiss reg_temp = NCT6106_REG_TEMP; 3529c3963bc0SZev Weiss reg_temp_mon = NCT6106_REG_TEMP_MON; 3530c3963bc0SZev Weiss num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3531c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3532c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP); 3533c3963bc0SZev Weiss reg_temp_over = NCT6106_REG_TEMP_OVER; 3534c3963bc0SZev Weiss reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3535c3963bc0SZev Weiss reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3536c3963bc0SZev Weiss reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3537c3963bc0SZev Weiss reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3538c3963bc0SZev Weiss reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3539c3963bc0SZev Weiss reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3540c3963bc0SZev Weiss 3541c3963bc0SZev Weiss break; 3542c3963bc0SZev Weiss case nct6116: 3543c3963bc0SZev Weiss data->in_num = 9; 3544c3963bc0SZev Weiss data->pwm_num = 3; 3545c3963bc0SZev Weiss data->auto_pwm_num = 4; 3546c3963bc0SZev Weiss data->temp_fixed_num = 3; 3547c3963bc0SZev Weiss data->num_temp_alarms = 3; 3548c3963bc0SZev Weiss data->num_temp_beeps = 3; 3549c3963bc0SZev Weiss 3550c3963bc0SZev Weiss data->fan_from_reg = fan_from_reg13; 3551c3963bc0SZev Weiss data->fan_from_reg_min = fan_from_reg13; 3552c3963bc0SZev Weiss 3553c3963bc0SZev Weiss data->temp_label = nct6776_temp_label; 3554c3963bc0SZev Weiss data->temp_mask = NCT6776_TEMP_MASK; 3555c3963bc0SZev Weiss data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3556c3963bc0SZev Weiss 3557c3963bc0SZev Weiss data->REG_VBAT = NCT6106_REG_VBAT; 3558c3963bc0SZev Weiss data->REG_DIODE = NCT6106_REG_DIODE; 3559c3963bc0SZev Weiss data->DIODE_MASK = NCT6106_DIODE_MASK; 3560c3963bc0SZev Weiss data->REG_VIN = NCT6106_REG_IN; 3561c3963bc0SZev Weiss data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3562c3963bc0SZev Weiss data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3563c3963bc0SZev Weiss data->REG_TARGET = NCT6116_REG_TARGET; 3564c3963bc0SZev Weiss data->REG_FAN = NCT6116_REG_FAN; 3565c3963bc0SZev Weiss data->REG_FAN_MODE = NCT6116_REG_FAN_MODE; 3566c3963bc0SZev Weiss data->REG_FAN_MIN = NCT6116_REG_FAN_MIN; 3567c3963bc0SZev Weiss data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES; 3568c3963bc0SZev Weiss data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT; 3569c3963bc0SZev Weiss data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; 3570c3963bc0SZev Weiss data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME; 3571c3963bc0SZev Weiss data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME; 3572c3963bc0SZev Weiss data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H; 3573c3963bc0SZev Weiss data->REG_PWM[0] = NCT6116_REG_PWM; 3574c3963bc0SZev Weiss data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT; 3575c3963bc0SZev Weiss data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT; 3576c3963bc0SZev Weiss data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3577c3963bc0SZev Weiss data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3578c3963bc0SZev Weiss data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3579c3963bc0SZev Weiss data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3580c3963bc0SZev Weiss data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3581c3963bc0SZev Weiss data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP; 3582c3963bc0SZev Weiss data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM; 3583c3963bc0SZev Weiss data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP; 3584c3963bc0SZev Weiss data->REG_CRITICAL_TEMP_TOLERANCE 3585c3963bc0SZev Weiss = NCT6116_REG_CRITICAL_TEMP_TOLERANCE; 3586c3963bc0SZev Weiss data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE; 3587c3963bc0SZev Weiss data->CRITICAL_PWM_ENABLE_MASK 3588c3963bc0SZev Weiss = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3589c3963bc0SZev Weiss data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM; 3590c3963bc0SZev Weiss data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3591c3963bc0SZev Weiss data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE; 3592c3963bc0SZev Weiss data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3593c3963bc0SZev Weiss data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3594c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3595c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3596c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3597c3963bc0SZev Weiss data->REG_ALARM = NCT6106_REG_ALARM; 3598c3963bc0SZev Weiss data->ALARM_BITS = NCT6116_ALARM_BITS; 3599c3963bc0SZev Weiss data->REG_BEEP = NCT6106_REG_BEEP; 3600c3963bc0SZev Weiss data->BEEP_BITS = NCT6116_BEEP_BITS; 3601c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP; 3602c3963bc0SZev Weiss 3603c3963bc0SZev Weiss reg_temp = NCT6106_REG_TEMP; 3604c3963bc0SZev Weiss reg_temp_mon = NCT6106_REG_TEMP_MON; 3605c3963bc0SZev Weiss num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3606c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3607c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP); 3608c3963bc0SZev Weiss reg_temp_over = NCT6106_REG_TEMP_OVER; 3609c3963bc0SZev Weiss reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3610c3963bc0SZev Weiss reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3611c3963bc0SZev Weiss reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3612c3963bc0SZev Weiss reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3613c3963bc0SZev Weiss reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3614c3963bc0SZev Weiss reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3615c3963bc0SZev Weiss 3616c3963bc0SZev Weiss break; 3617c3963bc0SZev Weiss case nct6775: 3618c3963bc0SZev Weiss data->in_num = 9; 3619c3963bc0SZev Weiss data->pwm_num = 3; 3620c3963bc0SZev Weiss data->auto_pwm_num = 6; 3621c3963bc0SZev Weiss data->has_fan_div = true; 3622c3963bc0SZev Weiss data->temp_fixed_num = 3; 3623c3963bc0SZev Weiss data->num_temp_alarms = 3; 3624c3963bc0SZev Weiss data->num_temp_beeps = 3; 3625c3963bc0SZev Weiss 3626c3963bc0SZev Weiss data->ALARM_BITS = NCT6775_ALARM_BITS; 3627c3963bc0SZev Weiss data->BEEP_BITS = NCT6775_BEEP_BITS; 3628c3963bc0SZev Weiss 3629c3963bc0SZev Weiss data->fan_from_reg = fan_from_reg16; 3630c3963bc0SZev Weiss data->fan_from_reg_min = fan_from_reg8; 3631c3963bc0SZev Weiss data->target_temp_mask = 0x7f; 3632c3963bc0SZev Weiss data->tolerance_mask = 0x0f; 3633c3963bc0SZev Weiss data->speed_tolerance_limit = 15; 3634c3963bc0SZev Weiss 3635c3963bc0SZev Weiss data->temp_label = nct6775_temp_label; 3636c3963bc0SZev Weiss data->temp_mask = NCT6775_TEMP_MASK; 3637c3963bc0SZev Weiss data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK; 3638c3963bc0SZev Weiss 3639c3963bc0SZev Weiss data->REG_CONFIG = NCT6775_REG_CONFIG; 3640c3963bc0SZev Weiss data->REG_VBAT = NCT6775_REG_VBAT; 3641c3963bc0SZev Weiss data->REG_DIODE = NCT6775_REG_DIODE; 3642c3963bc0SZev Weiss data->DIODE_MASK = NCT6775_DIODE_MASK; 3643c3963bc0SZev Weiss data->REG_VIN = NCT6775_REG_IN; 3644c3963bc0SZev Weiss data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3645c3963bc0SZev Weiss data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3646c3963bc0SZev Weiss data->REG_TARGET = NCT6775_REG_TARGET; 3647c3963bc0SZev Weiss data->REG_FAN = NCT6775_REG_FAN; 3648c3963bc0SZev Weiss data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3649c3963bc0SZev Weiss data->REG_FAN_MIN = NCT6775_REG_FAN_MIN; 3650c3963bc0SZev Weiss data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES; 3651c3963bc0SZev Weiss data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3652c3963bc0SZev Weiss data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3653c3963bc0SZev Weiss data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3654c3963bc0SZev Weiss data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3655c3963bc0SZev Weiss data->REG_PWM[0] = NCT6775_REG_PWM; 3656c3963bc0SZev Weiss data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3657c3963bc0SZev Weiss data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3658c3963bc0SZev Weiss data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT; 3659c3963bc0SZev Weiss data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT; 3660c3963bc0SZev Weiss data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3661c3963bc0SZev Weiss data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3662c3963bc0SZev Weiss data->REG_PWM_MODE = NCT6775_REG_PWM_MODE; 3663c3963bc0SZev Weiss data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK; 3664c3963bc0SZev Weiss data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3665c3963bc0SZev Weiss data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3666c3963bc0SZev Weiss data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3667c3963bc0SZev Weiss data->REG_CRITICAL_TEMP_TOLERANCE 3668c3963bc0SZev Weiss = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3669c3963bc0SZev Weiss data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3670c3963bc0SZev Weiss data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3671c3963bc0SZev Weiss data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3672c3963bc0SZev Weiss data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3673c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3674c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3675c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3676c3963bc0SZev Weiss data->REG_ALARM = NCT6775_REG_ALARM; 3677c3963bc0SZev Weiss data->REG_BEEP = NCT6775_REG_BEEP; 3678c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP; 3679c3963bc0SZev Weiss 3680c3963bc0SZev Weiss reg_temp = NCT6775_REG_TEMP; 3681c3963bc0SZev Weiss reg_temp_mon = NCT6775_REG_TEMP_MON; 3682c3963bc0SZev Weiss num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3683c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3684c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP); 3685c3963bc0SZev Weiss reg_temp_over = NCT6775_REG_TEMP_OVER; 3686c3963bc0SZev Weiss reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3687c3963bc0SZev Weiss reg_temp_config = NCT6775_REG_TEMP_CONFIG; 3688c3963bc0SZev Weiss reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE; 3689c3963bc0SZev Weiss reg_temp_crit = NCT6775_REG_TEMP_CRIT; 3690c3963bc0SZev Weiss 3691c3963bc0SZev Weiss break; 3692c3963bc0SZev Weiss case nct6776: 3693c3963bc0SZev Weiss data->in_num = 9; 3694c3963bc0SZev Weiss data->pwm_num = 3; 3695c3963bc0SZev Weiss data->auto_pwm_num = 4; 3696c3963bc0SZev Weiss data->has_fan_div = false; 3697c3963bc0SZev Weiss data->temp_fixed_num = 3; 3698c3963bc0SZev Weiss data->num_temp_alarms = 3; 3699c3963bc0SZev Weiss data->num_temp_beeps = 6; 3700c3963bc0SZev Weiss 3701c3963bc0SZev Weiss data->ALARM_BITS = NCT6776_ALARM_BITS; 3702c3963bc0SZev Weiss data->BEEP_BITS = NCT6776_BEEP_BITS; 3703c3963bc0SZev Weiss 3704c3963bc0SZev Weiss data->fan_from_reg = fan_from_reg13; 3705c3963bc0SZev Weiss data->fan_from_reg_min = fan_from_reg13; 3706c3963bc0SZev Weiss data->target_temp_mask = 0xff; 3707c3963bc0SZev Weiss data->tolerance_mask = 0x07; 3708c3963bc0SZev Weiss data->speed_tolerance_limit = 63; 3709c3963bc0SZev Weiss 3710c3963bc0SZev Weiss data->temp_label = nct6776_temp_label; 3711c3963bc0SZev Weiss data->temp_mask = NCT6776_TEMP_MASK; 3712c3963bc0SZev Weiss data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3713c3963bc0SZev Weiss 3714c3963bc0SZev Weiss data->REG_CONFIG = NCT6775_REG_CONFIG; 3715c3963bc0SZev Weiss data->REG_VBAT = NCT6775_REG_VBAT; 3716c3963bc0SZev Weiss data->REG_DIODE = NCT6775_REG_DIODE; 3717c3963bc0SZev Weiss data->DIODE_MASK = NCT6775_DIODE_MASK; 3718c3963bc0SZev Weiss data->REG_VIN = NCT6775_REG_IN; 3719c3963bc0SZev Weiss data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3720c3963bc0SZev Weiss data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3721c3963bc0SZev Weiss data->REG_TARGET = NCT6775_REG_TARGET; 3722c3963bc0SZev Weiss data->REG_FAN = NCT6775_REG_FAN; 3723c3963bc0SZev Weiss data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3724c3963bc0SZev Weiss data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3725c3963bc0SZev Weiss data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3726c3963bc0SZev Weiss data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3727c3963bc0SZev Weiss data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3728c3963bc0SZev Weiss data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3729c3963bc0SZev Weiss data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3730c3963bc0SZev Weiss data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3731c3963bc0SZev Weiss data->REG_PWM[0] = NCT6775_REG_PWM; 3732c3963bc0SZev Weiss data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3733c3963bc0SZev Weiss data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3734c3963bc0SZev Weiss data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3735c3963bc0SZev Weiss data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3736c3963bc0SZev Weiss data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3737c3963bc0SZev Weiss data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3738c3963bc0SZev Weiss data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3739c3963bc0SZev Weiss data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3740c3963bc0SZev Weiss data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3741c3963bc0SZev Weiss data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3742c3963bc0SZev Weiss data->REG_CRITICAL_TEMP_TOLERANCE 3743c3963bc0SZev Weiss = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3744c3963bc0SZev Weiss data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3745c3963bc0SZev Weiss data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3746c3963bc0SZev Weiss data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3747c3963bc0SZev Weiss data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3748c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3749c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3750c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3751c3963bc0SZev Weiss data->REG_ALARM = NCT6775_REG_ALARM; 3752c3963bc0SZev Weiss data->REG_BEEP = NCT6776_REG_BEEP; 3753c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3754c3963bc0SZev Weiss 3755c3963bc0SZev Weiss reg_temp = NCT6775_REG_TEMP; 3756c3963bc0SZev Weiss reg_temp_mon = NCT6775_REG_TEMP_MON; 3757c3963bc0SZev Weiss num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3758c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3759c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3760c3963bc0SZev Weiss reg_temp_over = NCT6775_REG_TEMP_OVER; 3761c3963bc0SZev Weiss reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3762c3963bc0SZev Weiss reg_temp_config = NCT6776_REG_TEMP_CONFIG; 3763c3963bc0SZev Weiss reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE; 3764c3963bc0SZev Weiss reg_temp_crit = NCT6776_REG_TEMP_CRIT; 3765c3963bc0SZev Weiss 3766c3963bc0SZev Weiss break; 3767c3963bc0SZev Weiss case nct6779: 3768c3963bc0SZev Weiss data->in_num = 15; 3769c3963bc0SZev Weiss data->pwm_num = 5; 3770c3963bc0SZev Weiss data->auto_pwm_num = 4; 3771c3963bc0SZev Weiss data->has_fan_div = false; 3772c3963bc0SZev Weiss data->temp_fixed_num = 6; 3773c3963bc0SZev Weiss data->num_temp_alarms = 2; 3774c3963bc0SZev Weiss data->num_temp_beeps = 2; 3775c3963bc0SZev Weiss 3776c3963bc0SZev Weiss data->ALARM_BITS = NCT6779_ALARM_BITS; 3777c3963bc0SZev Weiss data->BEEP_BITS = NCT6779_BEEP_BITS; 3778c3963bc0SZev Weiss 3779c3963bc0SZev Weiss data->fan_from_reg = fan_from_reg_rpm; 3780c3963bc0SZev Weiss data->fan_from_reg_min = fan_from_reg13; 3781c3963bc0SZev Weiss data->target_temp_mask = 0xff; 3782c3963bc0SZev Weiss data->tolerance_mask = 0x07; 3783c3963bc0SZev Weiss data->speed_tolerance_limit = 63; 3784c3963bc0SZev Weiss 3785c3963bc0SZev Weiss data->temp_label = nct6779_temp_label; 3786c3963bc0SZev Weiss data->temp_mask = NCT6779_TEMP_MASK; 3787c3963bc0SZev Weiss data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK; 3788c3963bc0SZev Weiss 3789c3963bc0SZev Weiss data->REG_CONFIG = NCT6775_REG_CONFIG; 3790c3963bc0SZev Weiss data->REG_VBAT = NCT6775_REG_VBAT; 3791c3963bc0SZev Weiss data->REG_DIODE = NCT6775_REG_DIODE; 3792c3963bc0SZev Weiss data->DIODE_MASK = NCT6775_DIODE_MASK; 3793c3963bc0SZev Weiss data->REG_VIN = NCT6779_REG_IN; 3794c3963bc0SZev Weiss data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3795c3963bc0SZev Weiss data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3796c3963bc0SZev Weiss data->REG_TARGET = NCT6775_REG_TARGET; 3797c3963bc0SZev Weiss data->REG_FAN = NCT6779_REG_FAN; 3798c3963bc0SZev Weiss data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3799c3963bc0SZev Weiss data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3800c3963bc0SZev Weiss data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3801c3963bc0SZev Weiss data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3802c3963bc0SZev Weiss data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3803c3963bc0SZev Weiss data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3804c3963bc0SZev Weiss data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3805c3963bc0SZev Weiss data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3806c3963bc0SZev Weiss data->REG_PWM[0] = NCT6775_REG_PWM; 3807c3963bc0SZev Weiss data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3808c3963bc0SZev Weiss data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3809c3963bc0SZev Weiss data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3810c3963bc0SZev Weiss data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3811c3963bc0SZev Weiss data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3812c3963bc0SZev Weiss data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3813c3963bc0SZev Weiss data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3814c3963bc0SZev Weiss data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3815c3963bc0SZev Weiss data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3816c3963bc0SZev Weiss data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3817c3963bc0SZev Weiss data->REG_CRITICAL_TEMP_TOLERANCE 3818c3963bc0SZev Weiss = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3819c3963bc0SZev Weiss data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3820c3963bc0SZev Weiss data->CRITICAL_PWM_ENABLE_MASK 3821c3963bc0SZev Weiss = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3822c3963bc0SZev Weiss data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3823c3963bc0SZev Weiss data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3824c3963bc0SZev Weiss data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3825c3963bc0SZev Weiss data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3826c3963bc0SZev Weiss data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3827c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3828c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3829c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3830c3963bc0SZev Weiss data->REG_ALARM = NCT6779_REG_ALARM; 3831c3963bc0SZev Weiss data->REG_BEEP = NCT6776_REG_BEEP; 3832c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3833c3963bc0SZev Weiss 3834c3963bc0SZev Weiss reg_temp = NCT6779_REG_TEMP; 3835c3963bc0SZev Weiss reg_temp_mon = NCT6779_REG_TEMP_MON; 3836c3963bc0SZev Weiss num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3837c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3838c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3839c3963bc0SZev Weiss reg_temp_over = NCT6779_REG_TEMP_OVER; 3840c3963bc0SZev Weiss reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3841c3963bc0SZev Weiss reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3842c3963bc0SZev Weiss reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3843c3963bc0SZev Weiss reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3844c3963bc0SZev Weiss 3845c3963bc0SZev Weiss break; 3846c3963bc0SZev Weiss case nct6791: 3847c3963bc0SZev Weiss case nct6792: 3848c3963bc0SZev Weiss case nct6793: 3849c3963bc0SZev Weiss case nct6795: 3850c3963bc0SZev Weiss case nct6796: 3851c3963bc0SZev Weiss case nct6797: 3852c3963bc0SZev Weiss case nct6798: 3853*aee395bbSGuenter Roeck case nct6799: 3854c3963bc0SZev Weiss data->in_num = 15; 3855c3963bc0SZev Weiss data->pwm_num = (data->kind == nct6796 || 3856c3963bc0SZev Weiss data->kind == nct6797 || 3857*aee395bbSGuenter Roeck data->kind == nct6798 || 3858*aee395bbSGuenter Roeck data->kind == nct6799) ? 7 : 6; 3859c3963bc0SZev Weiss data->auto_pwm_num = 4; 3860c3963bc0SZev Weiss data->has_fan_div = false; 3861c3963bc0SZev Weiss data->temp_fixed_num = 6; 3862c3963bc0SZev Weiss data->num_temp_alarms = 2; 3863c3963bc0SZev Weiss data->num_temp_beeps = 2; 3864c3963bc0SZev Weiss 3865c3963bc0SZev Weiss data->ALARM_BITS = NCT6791_ALARM_BITS; 3866c3963bc0SZev Weiss data->BEEP_BITS = NCT6779_BEEP_BITS; 3867c3963bc0SZev Weiss 3868c3963bc0SZev Weiss data->fan_from_reg = fan_from_reg_rpm; 3869c3963bc0SZev Weiss data->fan_from_reg_min = fan_from_reg13; 3870c3963bc0SZev Weiss data->target_temp_mask = 0xff; 3871c3963bc0SZev Weiss data->tolerance_mask = 0x07; 3872c3963bc0SZev Weiss data->speed_tolerance_limit = 63; 3873c3963bc0SZev Weiss 3874c3963bc0SZev Weiss switch (data->kind) { 3875c3963bc0SZev Weiss default: 3876c3963bc0SZev Weiss case nct6791: 3877c3963bc0SZev Weiss data->temp_label = nct6779_temp_label; 3878c3963bc0SZev Weiss data->temp_mask = NCT6791_TEMP_MASK; 3879c3963bc0SZev Weiss data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK; 3880c3963bc0SZev Weiss break; 3881c3963bc0SZev Weiss case nct6792: 3882c3963bc0SZev Weiss data->temp_label = nct6792_temp_label; 3883c3963bc0SZev Weiss data->temp_mask = NCT6792_TEMP_MASK; 3884c3963bc0SZev Weiss data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK; 3885c3963bc0SZev Weiss break; 3886c3963bc0SZev Weiss case nct6793: 3887c3963bc0SZev Weiss data->temp_label = nct6793_temp_label; 3888c3963bc0SZev Weiss data->temp_mask = NCT6793_TEMP_MASK; 3889c3963bc0SZev Weiss data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK; 3890c3963bc0SZev Weiss break; 3891c3963bc0SZev Weiss case nct6795: 3892c3963bc0SZev Weiss case nct6797: 3893c3963bc0SZev Weiss data->temp_label = nct6795_temp_label; 3894c3963bc0SZev Weiss data->temp_mask = NCT6795_TEMP_MASK; 3895c3963bc0SZev Weiss data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK; 3896c3963bc0SZev Weiss break; 3897c3963bc0SZev Weiss case nct6796: 3898c3963bc0SZev Weiss data->temp_label = nct6796_temp_label; 3899c3963bc0SZev Weiss data->temp_mask = NCT6796_TEMP_MASK; 3900c3963bc0SZev Weiss data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; 3901c3963bc0SZev Weiss break; 3902c3963bc0SZev Weiss case nct6798: 3903c3963bc0SZev Weiss data->temp_label = nct6798_temp_label; 3904c3963bc0SZev Weiss data->temp_mask = NCT6798_TEMP_MASK; 3905c3963bc0SZev Weiss data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; 3906c3963bc0SZev Weiss break; 3907*aee395bbSGuenter Roeck case nct6799: 3908*aee395bbSGuenter Roeck data->temp_label = nct6799_temp_label; 3909*aee395bbSGuenter Roeck data->temp_mask = NCT6799_TEMP_MASK; 3910*aee395bbSGuenter Roeck data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; 3911*aee395bbSGuenter Roeck break; 3912c3963bc0SZev Weiss } 3913c3963bc0SZev Weiss 3914c3963bc0SZev Weiss data->REG_CONFIG = NCT6775_REG_CONFIG; 3915c3963bc0SZev Weiss data->REG_VBAT = NCT6775_REG_VBAT; 3916c3963bc0SZev Weiss data->REG_DIODE = NCT6775_REG_DIODE; 3917c3963bc0SZev Weiss data->DIODE_MASK = NCT6775_DIODE_MASK; 3918c3963bc0SZev Weiss data->REG_VIN = NCT6779_REG_IN; 3919c3963bc0SZev Weiss data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3920c3963bc0SZev Weiss data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3921c3963bc0SZev Weiss data->REG_TARGET = NCT6775_REG_TARGET; 3922c3963bc0SZev Weiss data->REG_FAN = NCT6779_REG_FAN; 3923c3963bc0SZev Weiss data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3924c3963bc0SZev Weiss data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3925c3963bc0SZev Weiss data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3926c3963bc0SZev Weiss data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3927c3963bc0SZev Weiss data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3928c3963bc0SZev Weiss data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3929c3963bc0SZev Weiss data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3930c3963bc0SZev Weiss data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3931c3963bc0SZev Weiss data->REG_PWM[0] = NCT6775_REG_PWM; 3932c3963bc0SZev Weiss data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3933c3963bc0SZev Weiss data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3934c3963bc0SZev Weiss data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 3935c3963bc0SZev Weiss data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 3936c3963bc0SZev Weiss data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3937c3963bc0SZev Weiss data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3938c3963bc0SZev Weiss data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3939c3963bc0SZev Weiss data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3940c3963bc0SZev Weiss data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3941c3963bc0SZev Weiss data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3942c3963bc0SZev Weiss data->REG_CRITICAL_TEMP_TOLERANCE 3943c3963bc0SZev Weiss = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3944c3963bc0SZev Weiss data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3945c3963bc0SZev Weiss data->CRITICAL_PWM_ENABLE_MASK 3946c3963bc0SZev Weiss = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3947c3963bc0SZev Weiss data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3948c3963bc0SZev Weiss data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3949c3963bc0SZev Weiss data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3950c3963bc0SZev Weiss data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3951c3963bc0SZev Weiss data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 3952c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 3953c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 3954c3963bc0SZev Weiss data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 3955c3963bc0SZev Weiss data->REG_ALARM = NCT6791_REG_ALARM; 3956c3963bc0SZev Weiss if (data->kind == nct6791) 3957c3963bc0SZev Weiss data->REG_BEEP = NCT6776_REG_BEEP; 3958c3963bc0SZev Weiss else 3959c3963bc0SZev Weiss data->REG_BEEP = NCT6792_REG_BEEP; 3960c3963bc0SZev Weiss switch (data->kind) { 3961c3963bc0SZev Weiss case nct6791: 3962c3963bc0SZev Weiss case nct6792: 3963c3963bc0SZev Weiss case nct6793: 3964c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3965c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3966c3963bc0SZev Weiss break; 3967c3963bc0SZev Weiss case nct6795: 3968c3963bc0SZev Weiss case nct6796: 3969c3963bc0SZev Weiss case nct6797: 3970c3963bc0SZev Weiss case nct6798: 3971*aee395bbSGuenter Roeck case nct6799: 3972c3963bc0SZev Weiss data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 3973c3963bc0SZev Weiss num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 3974c3963bc0SZev Weiss break; 3975c3963bc0SZev Weiss default: 3976c3963bc0SZev Weiss num_reg_tsi_temp = 0; 3977c3963bc0SZev Weiss break; 3978c3963bc0SZev Weiss } 3979c3963bc0SZev Weiss 3980c3963bc0SZev Weiss reg_temp = NCT6779_REG_TEMP; 3981c3963bc0SZev Weiss num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3982c3963bc0SZev Weiss if (data->kind == nct6791) { 3983c3963bc0SZev Weiss reg_temp_mon = NCT6779_REG_TEMP_MON; 3984c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3985c3963bc0SZev Weiss } else { 3986c3963bc0SZev Weiss reg_temp_mon = NCT6792_REG_TEMP_MON; 3987c3963bc0SZev Weiss num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON); 3988c3963bc0SZev Weiss } 3989c3963bc0SZev Weiss reg_temp_over = NCT6779_REG_TEMP_OVER; 3990c3963bc0SZev Weiss reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3991c3963bc0SZev Weiss reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3992c3963bc0SZev Weiss reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3993c3963bc0SZev Weiss reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3994c3963bc0SZev Weiss 3995c3963bc0SZev Weiss break; 3996c3963bc0SZev Weiss default: 3997c3963bc0SZev Weiss return -ENODEV; 3998c3963bc0SZev Weiss } 3999c3963bc0SZev Weiss data->have_in = BIT(data->in_num) - 1; 4000c3963bc0SZev Weiss data->have_temp = 0; 4001c3963bc0SZev Weiss 4002c3963bc0SZev Weiss /* 4003c3963bc0SZev Weiss * On some boards, not all available temperature sources are monitored, 4004c3963bc0SZev Weiss * even though some of the monitoring registers are unused. 4005c3963bc0SZev Weiss * Get list of unused monitoring registers, then detect if any fan 4006c3963bc0SZev Weiss * controls are configured to use unmonitored temperature sources. 4007c3963bc0SZev Weiss * If so, assign the unmonitored temperature sources to available 4008c3963bc0SZev Weiss * monitoring registers. 4009c3963bc0SZev Weiss */ 4010c3963bc0SZev Weiss mask = 0; 4011c3963bc0SZev Weiss available = 0; 4012c3963bc0SZev Weiss for (i = 0; i < num_reg_temp; i++) { 4013c3963bc0SZev Weiss if (reg_temp[i] == 0) 4014c3963bc0SZev Weiss continue; 4015c3963bc0SZev Weiss 4016c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4017c3963bc0SZev Weiss if (err) 4018c3963bc0SZev Weiss return err; 4019c3963bc0SZev Weiss src &= 0x1f; 4020c3963bc0SZev Weiss if (!src || (mask & BIT(src))) 4021c3963bc0SZev Weiss available |= BIT(i); 4022c3963bc0SZev Weiss 4023c3963bc0SZev Weiss mask |= BIT(src); 4024c3963bc0SZev Weiss } 4025c3963bc0SZev Weiss 4026c3963bc0SZev Weiss /* 4027c3963bc0SZev Weiss * Now find unmonitored temperature registers and enable monitoring 4028c3963bc0SZev Weiss * if additional monitoring registers are available. 4029c3963bc0SZev Weiss */ 4030c3963bc0SZev Weiss err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask); 4031c3963bc0SZev Weiss if (err) 4032c3963bc0SZev Weiss return err; 4033c3963bc0SZev Weiss err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask); 4034c3963bc0SZev Weiss if (err) 4035c3963bc0SZev Weiss return err; 4036c3963bc0SZev Weiss 4037c3963bc0SZev Weiss mask = 0; 4038c3963bc0SZev Weiss s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */ 4039c3963bc0SZev Weiss for (i = 0; i < num_reg_temp; i++) { 4040c3963bc0SZev Weiss if (reg_temp[i] == 0) 4041c3963bc0SZev Weiss continue; 4042c3963bc0SZev Weiss 4043c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4044c3963bc0SZev Weiss if (err) 4045c3963bc0SZev Weiss return err; 4046c3963bc0SZev Weiss src &= 0x1f; 4047c3963bc0SZev Weiss if (!src || (mask & BIT(src))) 4048c3963bc0SZev Weiss continue; 4049c3963bc0SZev Weiss 4050c3963bc0SZev Weiss if (!(data->temp_mask & BIT(src))) { 4051c3963bc0SZev Weiss dev_info(dev, 4052c3963bc0SZev Weiss "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4053c3963bc0SZev Weiss src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]); 4054c3963bc0SZev Weiss continue; 4055c3963bc0SZev Weiss } 4056c3963bc0SZev Weiss 4057c3963bc0SZev Weiss mask |= BIT(src); 4058c3963bc0SZev Weiss 4059c3963bc0SZev Weiss /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4060c3963bc0SZev Weiss if (src <= data->temp_fixed_num) { 4061c3963bc0SZev Weiss data->have_temp |= BIT(src - 1); 4062c3963bc0SZev Weiss data->have_temp_fixed |= BIT(src - 1); 4063c3963bc0SZev Weiss data->reg_temp[0][src - 1] = reg_temp[i]; 4064c3963bc0SZev Weiss data->reg_temp[1][src - 1] = reg_temp_over[i]; 4065c3963bc0SZev Weiss data->reg_temp[2][src - 1] = reg_temp_hyst[i]; 4066c3963bc0SZev Weiss if (reg_temp_crit_h && reg_temp_crit_h[i]) 4067c3963bc0SZev Weiss data->reg_temp[3][src - 1] = reg_temp_crit_h[i]; 4068c3963bc0SZev Weiss else if (reg_temp_crit[src - 1]) 4069c3963bc0SZev Weiss data->reg_temp[3][src - 1] 4070c3963bc0SZev Weiss = reg_temp_crit[src - 1]; 4071c3963bc0SZev Weiss if (reg_temp_crit_l && reg_temp_crit_l[i]) 4072c3963bc0SZev Weiss data->reg_temp[4][src - 1] = reg_temp_crit_l[i]; 4073c3963bc0SZev Weiss data->reg_temp_config[src - 1] = reg_temp_config[i]; 4074c3963bc0SZev Weiss data->temp_src[src - 1] = src; 4075c3963bc0SZev Weiss continue; 4076c3963bc0SZev Weiss } 4077c3963bc0SZev Weiss 4078c3963bc0SZev Weiss if (s >= NUM_TEMP) 4079c3963bc0SZev Weiss continue; 4080c3963bc0SZev Weiss 4081c3963bc0SZev Weiss /* Use dynamic index for other sources */ 4082c3963bc0SZev Weiss data->have_temp |= BIT(s); 4083c3963bc0SZev Weiss data->reg_temp[0][s] = reg_temp[i]; 4084c3963bc0SZev Weiss data->reg_temp[1][s] = reg_temp_over[i]; 4085c3963bc0SZev Weiss data->reg_temp[2][s] = reg_temp_hyst[i]; 4086c3963bc0SZev Weiss data->reg_temp_config[s] = reg_temp_config[i]; 4087c3963bc0SZev Weiss if (reg_temp_crit_h && reg_temp_crit_h[i]) 4088c3963bc0SZev Weiss data->reg_temp[3][s] = reg_temp_crit_h[i]; 4089c3963bc0SZev Weiss else if (reg_temp_crit[src - 1]) 4090c3963bc0SZev Weiss data->reg_temp[3][s] = reg_temp_crit[src - 1]; 4091c3963bc0SZev Weiss if (reg_temp_crit_l && reg_temp_crit_l[i]) 4092c3963bc0SZev Weiss data->reg_temp[4][s] = reg_temp_crit_l[i]; 4093c3963bc0SZev Weiss 4094c3963bc0SZev Weiss data->temp_src[s] = src; 4095c3963bc0SZev Weiss s++; 4096c3963bc0SZev Weiss } 4097c3963bc0SZev Weiss 4098c3963bc0SZev Weiss /* 4099c3963bc0SZev Weiss * Repeat with temperatures used for fan control. 4100c3963bc0SZev Weiss * This set of registers does not support limits. 4101c3963bc0SZev Weiss */ 4102c3963bc0SZev Weiss for (i = 0; i < num_reg_temp_mon; i++) { 4103c3963bc0SZev Weiss if (reg_temp_mon[i] == 0) 4104c3963bc0SZev Weiss continue; 4105c3963bc0SZev Weiss 4106c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src); 4107c3963bc0SZev Weiss if (err) 4108c3963bc0SZev Weiss return err; 4109c3963bc0SZev Weiss src &= 0x1f; 4110c3963bc0SZev Weiss if (!src) 4111c3963bc0SZev Weiss continue; 4112c3963bc0SZev Weiss 4113c3963bc0SZev Weiss if (!(data->temp_mask & BIT(src))) { 4114c3963bc0SZev Weiss dev_info(dev, 4115c3963bc0SZev Weiss "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4116c3963bc0SZev Weiss src, i, data->REG_TEMP_SEL[i], 4117c3963bc0SZev Weiss reg_temp_mon[i]); 4118c3963bc0SZev Weiss continue; 4119c3963bc0SZev Weiss } 4120c3963bc0SZev Weiss 4121c3963bc0SZev Weiss /* 4122c3963bc0SZev Weiss * For virtual temperature sources, the 'virtual' temperature 4123c3963bc0SZev Weiss * for each fan reflects a different temperature, and there 4124c3963bc0SZev Weiss * are no duplicates. 4125c3963bc0SZev Weiss */ 4126c3963bc0SZev Weiss if (!(data->virt_temp_mask & BIT(src))) { 4127c3963bc0SZev Weiss if (mask & BIT(src)) 4128c3963bc0SZev Weiss continue; 4129c3963bc0SZev Weiss mask |= BIT(src); 4130c3963bc0SZev Weiss } 4131c3963bc0SZev Weiss 4132c3963bc0SZev Weiss /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4133c3963bc0SZev Weiss if (src <= data->temp_fixed_num) { 4134c3963bc0SZev Weiss if (data->have_temp & BIT(src - 1)) 4135c3963bc0SZev Weiss continue; 4136c3963bc0SZev Weiss data->have_temp |= BIT(src - 1); 4137c3963bc0SZev Weiss data->have_temp_fixed |= BIT(src - 1); 4138c3963bc0SZev Weiss data->reg_temp[0][src - 1] = reg_temp_mon[i]; 4139c3963bc0SZev Weiss data->temp_src[src - 1] = src; 4140c3963bc0SZev Weiss continue; 4141c3963bc0SZev Weiss } 4142c3963bc0SZev Weiss 4143c3963bc0SZev Weiss if (s >= NUM_TEMP) 4144c3963bc0SZev Weiss continue; 4145c3963bc0SZev Weiss 4146c3963bc0SZev Weiss /* Use dynamic index for other sources */ 4147c3963bc0SZev Weiss data->have_temp |= BIT(s); 4148c3963bc0SZev Weiss data->reg_temp[0][s] = reg_temp_mon[i]; 4149c3963bc0SZev Weiss data->temp_src[s] = src; 4150c3963bc0SZev Weiss s++; 4151c3963bc0SZev Weiss } 4152c3963bc0SZev Weiss 4153c3963bc0SZev Weiss #ifdef USE_ALTERNATE 4154c3963bc0SZev Weiss /* 4155c3963bc0SZev Weiss * Go through the list of alternate temp registers and enable 4156c3963bc0SZev Weiss * if possible. 4157c3963bc0SZev Weiss * The temperature is already monitored if the respective bit in <mask> 4158c3963bc0SZev Weiss * is set. 4159c3963bc0SZev Weiss */ 4160c3963bc0SZev Weiss for (i = 0; i < 31; i++) { 4161c3963bc0SZev Weiss if (!(data->temp_mask & BIT(i + 1))) 4162c3963bc0SZev Weiss continue; 4163c3963bc0SZev Weiss if (!reg_temp_alternate[i]) 4164c3963bc0SZev Weiss continue; 4165c3963bc0SZev Weiss if (mask & BIT(i + 1)) 4166c3963bc0SZev Weiss continue; 4167c3963bc0SZev Weiss if (i < data->temp_fixed_num) { 4168c3963bc0SZev Weiss if (data->have_temp & BIT(i)) 4169c3963bc0SZev Weiss continue; 4170c3963bc0SZev Weiss data->have_temp |= BIT(i); 4171c3963bc0SZev Weiss data->have_temp_fixed |= BIT(i); 4172c3963bc0SZev Weiss data->reg_temp[0][i] = reg_temp_alternate[i]; 4173c3963bc0SZev Weiss if (i < num_reg_temp) { 4174c3963bc0SZev Weiss data->reg_temp[1][i] = reg_temp_over[i]; 4175c3963bc0SZev Weiss data->reg_temp[2][i] = reg_temp_hyst[i]; 4176c3963bc0SZev Weiss } 4177c3963bc0SZev Weiss data->temp_src[i] = i + 1; 4178c3963bc0SZev Weiss continue; 4179c3963bc0SZev Weiss } 4180c3963bc0SZev Weiss 4181c3963bc0SZev Weiss if (s >= NUM_TEMP) /* Abort if no more space */ 4182c3963bc0SZev Weiss break; 4183c3963bc0SZev Weiss 4184c3963bc0SZev Weiss data->have_temp |= BIT(s); 4185c3963bc0SZev Weiss data->reg_temp[0][s] = reg_temp_alternate[i]; 4186c3963bc0SZev Weiss data->temp_src[s] = i + 1; 4187c3963bc0SZev Weiss s++; 4188c3963bc0SZev Weiss } 4189c3963bc0SZev Weiss #endif /* USE_ALTERNATE */ 4190c3963bc0SZev Weiss 4191c3963bc0SZev Weiss /* Check which TSIx_TEMP registers are active */ 4192c3963bc0SZev Weiss for (i = 0; i < num_reg_tsi_temp; i++) { 4193c3963bc0SZev Weiss u16 tmp; 4194c3963bc0SZev Weiss 4195c3963bc0SZev Weiss err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp); 4196c3963bc0SZev Weiss if (err) 4197c3963bc0SZev Weiss return err; 4198c3963bc0SZev Weiss if (tmp) 4199c3963bc0SZev Weiss data->have_tsi_temp |= BIT(i); 4200c3963bc0SZev Weiss } 4201c3963bc0SZev Weiss 4202c3963bc0SZev Weiss /* Initialize the chip */ 4203c3963bc0SZev Weiss err = nct6775_init_device(data); 4204c3963bc0SZev Weiss if (err) 4205c3963bc0SZev Weiss return err; 4206c3963bc0SZev Weiss 4207c3963bc0SZev Weiss if (data->driver_init) { 4208c3963bc0SZev Weiss err = data->driver_init(data); 4209c3963bc0SZev Weiss if (err) 4210c3963bc0SZev Weiss return err; 4211c3963bc0SZev Weiss } 4212c3963bc0SZev Weiss 4213c3963bc0SZev Weiss /* Read fan clock dividers immediately */ 4214c3963bc0SZev Weiss err = nct6775_init_fan_common(dev, data); 4215c3963bc0SZev Weiss if (err) 4216c3963bc0SZev Weiss return err; 4217c3963bc0SZev Weiss 4218c3963bc0SZev Weiss /* Register sysfs hooks */ 4219c3963bc0SZev Weiss err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group, 4220c3963bc0SZev Weiss data->pwm_num); 4221c3963bc0SZev Weiss if (err) 4222c3963bc0SZev Weiss return err; 4223c3963bc0SZev Weiss 4224c3963bc0SZev Weiss err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group, 4225c3963bc0SZev Weiss fls(data->have_in)); 4226c3963bc0SZev Weiss if (err) 4227c3963bc0SZev Weiss return err; 4228c3963bc0SZev Weiss 4229c3963bc0SZev Weiss err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group, 4230c3963bc0SZev Weiss fls(data->has_fan)); 4231c3963bc0SZev Weiss if (err) 4232c3963bc0SZev Weiss return err; 4233c3963bc0SZev Weiss 4234c3963bc0SZev Weiss err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group, 4235c3963bc0SZev Weiss fls(data->have_temp)); 4236c3963bc0SZev Weiss if (err) 4237c3963bc0SZev Weiss return err; 4238c3963bc0SZev Weiss 4239c3963bc0SZev Weiss if (data->have_tsi_temp) { 4240c3963bc0SZev Weiss tsi_temp_tg.templates = nct6775_tsi_temp_template; 4241c3963bc0SZev Weiss tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible; 4242c3963bc0SZev Weiss tsi_temp_tg.base = fls(data->have_temp) + 1; 4243c3963bc0SZev Weiss err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg, 4244c3963bc0SZev Weiss fls(data->have_tsi_temp)); 4245c3963bc0SZev Weiss if (err) 4246c3963bc0SZev Weiss return err; 4247c3963bc0SZev Weiss } 4248c3963bc0SZev Weiss 4249c3963bc0SZev Weiss hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name, 4250c3963bc0SZev Weiss data, data->groups); 4251c3963bc0SZev Weiss return PTR_ERR_OR_ZERO(hwmon_dev); 4252c3963bc0SZev Weiss } 4253c3963bc0SZev Weiss EXPORT_SYMBOL_GPL(nct6775_probe); 4254c3963bc0SZev Weiss 4255c3963bc0SZev Weiss MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4256c3963bc0SZev Weiss MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips"); 4257c3963bc0SZev Weiss MODULE_LICENSE("GPL"); 4258