1512d1027SAndreas Herrmann /* 2512d1027SAndreas Herrmann * fam15h_power.c - AMD Family 15h processor power monitoring 3512d1027SAndreas Herrmann * 4512d1027SAndreas Herrmann * Copyright (c) 2011 Advanced Micro Devices, Inc. 5d034fbf0SAndreas Herrmann * Author: Andreas Herrmann <herrmann.der.user@googlemail.com> 6512d1027SAndreas Herrmann * 7512d1027SAndreas Herrmann * 8512d1027SAndreas Herrmann * This driver is free software; you can redistribute it and/or 9512d1027SAndreas Herrmann * modify it under the terms of the GNU General Public License; either 10512d1027SAndreas Herrmann * version 2 of the License, or (at your option) any later version. 11512d1027SAndreas Herrmann * 12512d1027SAndreas Herrmann * This driver is distributed in the hope that it will be useful, 13512d1027SAndreas Herrmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 14512d1027SAndreas Herrmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 15512d1027SAndreas Herrmann * See the GNU General Public License for more details. 16512d1027SAndreas Herrmann * 17512d1027SAndreas Herrmann * You should have received a copy of the GNU General Public License 18512d1027SAndreas Herrmann * along with this driver; if not, see <http://www.gnu.org/licenses/>. 19512d1027SAndreas Herrmann */ 20512d1027SAndreas Herrmann 21512d1027SAndreas Herrmann #include <linux/err.h> 22512d1027SAndreas Herrmann #include <linux/hwmon.h> 23512d1027SAndreas Herrmann #include <linux/hwmon-sysfs.h> 24512d1027SAndreas Herrmann #include <linux/init.h> 25512d1027SAndreas Herrmann #include <linux/module.h> 26512d1027SAndreas Herrmann #include <linux/pci.h> 27512d1027SAndreas Herrmann #include <linux/bitops.h> 28*fa794344SHuang Rui #include <linux/cpu.h> 29*fa794344SHuang Rui #include <linux/cpumask.h> 30512d1027SAndreas Herrmann #include <asm/processor.h> 313b5ea47dSHuang Rui #include <asm/msr.h> 32512d1027SAndreas Herrmann 33512d1027SAndreas Herrmann MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor"); 34d034fbf0SAndreas Herrmann MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>"); 35512d1027SAndreas Herrmann MODULE_LICENSE("GPL"); 36512d1027SAndreas Herrmann 37512d1027SAndreas Herrmann /* D18F3 */ 38512d1027SAndreas Herrmann #define REG_NORTHBRIDGE_CAP 0xe8 39512d1027SAndreas Herrmann 40512d1027SAndreas Herrmann /* D18F4 */ 41512d1027SAndreas Herrmann #define REG_PROCESSOR_TDP 0x1b8 42512d1027SAndreas Herrmann 43512d1027SAndreas Herrmann /* D18F5 */ 44512d1027SAndreas Herrmann #define REG_TDP_RUNNING_AVERAGE 0xe0 45512d1027SAndreas Herrmann #define REG_TDP_LIMIT3 0xe8 46512d1027SAndreas Herrmann 477deb14b1SHuang Rui #define FAM15H_MIN_NUM_ATTRS 2 487deb14b1SHuang Rui #define FAM15H_NUM_GROUPS 2 49*fa794344SHuang Rui #define MAX_CUS 8 507deb14b1SHuang Rui 51*fa794344SHuang Rui #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a 523b5ea47dSHuang Rui #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b 533b5ea47dSHuang Rui 54eff2a945SHuang Rui #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4 55eff2a945SHuang Rui 56512d1027SAndreas Herrmann struct fam15h_power_data { 57562dc973SAxel Lin struct pci_dev *pdev; 58512d1027SAndreas Herrmann unsigned int tdp_to_watts; 59512d1027SAndreas Herrmann unsigned int base_tdp; 60512d1027SAndreas Herrmann unsigned int processor_pwr_watts; 611ed32160SHuang Rui unsigned int cpu_pwr_sample_ratio; 627deb14b1SHuang Rui const struct attribute_group *groups[FAM15H_NUM_GROUPS]; 637deb14b1SHuang Rui struct attribute_group group; 643b5ea47dSHuang Rui /* maximum accumulated power of a compute unit */ 653b5ea47dSHuang Rui u64 max_cu_acc_power; 66*fa794344SHuang Rui /* accumulated power of the compute units */ 67*fa794344SHuang Rui u64 cu_acc_power[MAX_CUS]; 68512d1027SAndreas Herrmann }; 69512d1027SAndreas Herrmann 70512d1027SAndreas Herrmann static ssize_t show_power(struct device *dev, 71512d1027SAndreas Herrmann struct device_attribute *attr, char *buf) 72512d1027SAndreas Herrmann { 73512d1027SAndreas Herrmann u32 val, tdp_limit, running_avg_range; 74512d1027SAndreas Herrmann s32 running_avg_capture; 75512d1027SAndreas Herrmann u64 curr_pwr_watts; 76512d1027SAndreas Herrmann struct fam15h_power_data *data = dev_get_drvdata(dev); 77562dc973SAxel Lin struct pci_dev *f4 = data->pdev; 78512d1027SAndreas Herrmann 79512d1027SAndreas Herrmann pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), 80512d1027SAndreas Herrmann REG_TDP_RUNNING_AVERAGE, &val); 81e9cd4d55SHuang Rui 82e9cd4d55SHuang Rui /* 83e9cd4d55SHuang Rui * On Carrizo and later platforms, TdpRunAvgAccCap bit field 84e9cd4d55SHuang Rui * is extended to 4:31 from 4:25. 85e9cd4d55SHuang Rui */ 86e9cd4d55SHuang Rui if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) { 87e9cd4d55SHuang Rui running_avg_capture = val >> 4; 88e9cd4d55SHuang Rui running_avg_capture = sign_extend32(running_avg_capture, 27); 89e9cd4d55SHuang Rui } else { 90512d1027SAndreas Herrmann running_avg_capture = (val >> 4) & 0x3fffff; 91fc0900cbSAndreas Herrmann running_avg_capture = sign_extend32(running_avg_capture, 21); 92e9cd4d55SHuang Rui } 93e9cd4d55SHuang Rui 94941a956bSAndre Przywara running_avg_range = (val & 0xf) + 1; 95512d1027SAndreas Herrmann 96512d1027SAndreas Herrmann pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), 97512d1027SAndreas Herrmann REG_TDP_LIMIT3, &val); 98512d1027SAndreas Herrmann 9960dee3caSGioh Kim /* 10060dee3caSGioh Kim * On Carrizo and later platforms, ApmTdpLimit bit field 10160dee3caSGioh Kim * is extended to 16:31 from 16:28. 10260dee3caSGioh Kim */ 10360dee3caSGioh Kim if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) 104512d1027SAndreas Herrmann tdp_limit = val >> 16; 10560dee3caSGioh Kim else 10660dee3caSGioh Kim tdp_limit = (val >> 16) & 0x1fff; 10760dee3caSGioh Kim 10862867d49SGuenter Roeck curr_pwr_watts = ((u64)(tdp_limit + 10962867d49SGuenter Roeck data->base_tdp)) << running_avg_range; 110941a956bSAndre Przywara curr_pwr_watts -= running_avg_capture; 111512d1027SAndreas Herrmann curr_pwr_watts *= data->tdp_to_watts; 112512d1027SAndreas Herrmann 113512d1027SAndreas Herrmann /* 114512d1027SAndreas Herrmann * Convert to microWatt 115512d1027SAndreas Herrmann * 116512d1027SAndreas Herrmann * power is in Watt provided as fixed point integer with 117512d1027SAndreas Herrmann * scaling factor 1/(2^16). For conversion we use 118512d1027SAndreas Herrmann * (10^6)/(2^16) = 15625/(2^10) 119512d1027SAndreas Herrmann */ 120941a956bSAndre Przywara curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range); 121512d1027SAndreas Herrmann return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts); 122512d1027SAndreas Herrmann } 123512d1027SAndreas Herrmann static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL); 124512d1027SAndreas Herrmann 125512d1027SAndreas Herrmann static ssize_t show_power_crit(struct device *dev, 126512d1027SAndreas Herrmann struct device_attribute *attr, char *buf) 127512d1027SAndreas Herrmann { 128512d1027SAndreas Herrmann struct fam15h_power_data *data = dev_get_drvdata(dev); 129512d1027SAndreas Herrmann 130512d1027SAndreas Herrmann return sprintf(buf, "%u\n", data->processor_pwr_watts); 131512d1027SAndreas Herrmann } 132512d1027SAndreas Herrmann static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL); 133512d1027SAndreas Herrmann 134*fa794344SHuang Rui static void do_read_registers_on_cu(void *_data) 135*fa794344SHuang Rui { 136*fa794344SHuang Rui struct fam15h_power_data *data = _data; 137*fa794344SHuang Rui int cpu, cu; 138*fa794344SHuang Rui 139*fa794344SHuang Rui cpu = smp_processor_id(); 140*fa794344SHuang Rui 141*fa794344SHuang Rui /* 142*fa794344SHuang Rui * With the new x86 topology modelling, cpu core id actually 143*fa794344SHuang Rui * is compute unit id. 144*fa794344SHuang Rui */ 145*fa794344SHuang Rui cu = cpu_data(cpu).cpu_core_id; 146*fa794344SHuang Rui 147*fa794344SHuang Rui rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, &data->cu_acc_power[cu]); 148*fa794344SHuang Rui } 149*fa794344SHuang Rui 150*fa794344SHuang Rui /* 151*fa794344SHuang Rui * This function is only able to be called when CPUID 152*fa794344SHuang Rui * Fn8000_0007:EDX[12] is set. 153*fa794344SHuang Rui */ 154*fa794344SHuang Rui static int read_registers(struct fam15h_power_data *data) 155*fa794344SHuang Rui { 156*fa794344SHuang Rui int this_cpu, ret, cpu; 157*fa794344SHuang Rui int core, this_core; 158*fa794344SHuang Rui cpumask_var_t mask; 159*fa794344SHuang Rui 160*fa794344SHuang Rui ret = zalloc_cpumask_var(&mask, GFP_KERNEL); 161*fa794344SHuang Rui if (!ret) 162*fa794344SHuang Rui return -ENOMEM; 163*fa794344SHuang Rui 164*fa794344SHuang Rui get_online_cpus(); 165*fa794344SHuang Rui this_cpu = smp_processor_id(); 166*fa794344SHuang Rui 167*fa794344SHuang Rui /* 168*fa794344SHuang Rui * Choose the first online core of each compute unit, and then 169*fa794344SHuang Rui * read their MSR value of power and ptsc in a single IPI, 170*fa794344SHuang Rui * because the MSR value of CPU core represent the compute 171*fa794344SHuang Rui * unit's. 172*fa794344SHuang Rui */ 173*fa794344SHuang Rui core = -1; 174*fa794344SHuang Rui 175*fa794344SHuang Rui for_each_online_cpu(cpu) { 176*fa794344SHuang Rui this_core = topology_core_id(cpu); 177*fa794344SHuang Rui 178*fa794344SHuang Rui if (this_core == core) 179*fa794344SHuang Rui continue; 180*fa794344SHuang Rui 181*fa794344SHuang Rui core = this_core; 182*fa794344SHuang Rui 183*fa794344SHuang Rui /* get any CPU on this compute unit */ 184*fa794344SHuang Rui cpumask_set_cpu(cpumask_any(topology_sibling_cpumask(cpu)), mask); 185*fa794344SHuang Rui } 186*fa794344SHuang Rui 187*fa794344SHuang Rui if (cpumask_test_cpu(this_cpu, mask)) 188*fa794344SHuang Rui do_read_registers_on_cu(data); 189*fa794344SHuang Rui 190*fa794344SHuang Rui smp_call_function_many(mask, do_read_registers_on_cu, data, true); 191*fa794344SHuang Rui put_online_cpus(); 192*fa794344SHuang Rui 193*fa794344SHuang Rui free_cpumask_var(mask); 194*fa794344SHuang Rui 195*fa794344SHuang Rui return 0; 196*fa794344SHuang Rui } 197*fa794344SHuang Rui 1987deb14b1SHuang Rui static int fam15h_power_init_attrs(struct pci_dev *pdev, 1997deb14b1SHuang Rui struct fam15h_power_data *data) 200961a2378SAravind Gopalakrishnan { 2017deb14b1SHuang Rui int n = FAM15H_MIN_NUM_ATTRS; 2027deb14b1SHuang Rui struct attribute **fam15h_power_attrs; 20346f29c2bSHuang Rui struct cpuinfo_x86 *c = &boot_cpu_data; 2047deb14b1SHuang Rui 20546f29c2bSHuang Rui if (c->x86 == 0x15 && 20646f29c2bSHuang Rui (c->x86_model <= 0xf || 207eff2a945SHuang Rui (c->x86_model >= 0x60 && c->x86_model <= 0x7f))) 2087deb14b1SHuang Rui n += 1; 2097deb14b1SHuang Rui 2107deb14b1SHuang Rui fam15h_power_attrs = devm_kcalloc(&pdev->dev, n, 2117deb14b1SHuang Rui sizeof(*fam15h_power_attrs), 2127deb14b1SHuang Rui GFP_KERNEL); 2137deb14b1SHuang Rui 2147deb14b1SHuang Rui if (!fam15h_power_attrs) 2157deb14b1SHuang Rui return -ENOMEM; 2167deb14b1SHuang Rui 2177deb14b1SHuang Rui n = 0; 2187deb14b1SHuang Rui fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr; 21946f29c2bSHuang Rui if (c->x86 == 0x15 && 22046f29c2bSHuang Rui (c->x86_model <= 0xf || 221eff2a945SHuang Rui (c->x86_model >= 0x60 && c->x86_model <= 0x7f))) 2227deb14b1SHuang Rui fam15h_power_attrs[n++] = &dev_attr_power1_input.attr; 2237deb14b1SHuang Rui 2247deb14b1SHuang Rui data->group.attrs = fam15h_power_attrs; 2257deb14b1SHuang Rui 226961a2378SAravind Gopalakrishnan return 0; 227961a2378SAravind Gopalakrishnan } 228961a2378SAravind Gopalakrishnan 229d83e92b3SHuang Rui static bool should_load_on_this_node(struct pci_dev *f4) 230512d1027SAndreas Herrmann { 231512d1027SAndreas Herrmann u32 val; 232512d1027SAndreas Herrmann 233512d1027SAndreas Herrmann pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3), 234512d1027SAndreas Herrmann REG_NORTHBRIDGE_CAP, &val); 235512d1027SAndreas Herrmann if ((val & BIT(29)) && ((val >> 30) & 3)) 236512d1027SAndreas Herrmann return false; 237512d1027SAndreas Herrmann 238512d1027SAndreas Herrmann return true; 239512d1027SAndreas Herrmann } 240512d1027SAndreas Herrmann 24100250ec9SAndre Przywara /* 24200250ec9SAndre Przywara * Newer BKDG versions have an updated recommendation on how to properly 24300250ec9SAndre Przywara * initialize the running average range (was: 0xE, now: 0x9). This avoids 24400250ec9SAndre Przywara * counter saturations resulting in bogus power readings. 24500250ec9SAndre Przywara * We correct this value ourselves to cope with older BIOSes. 24600250ec9SAndre Przywara */ 2475f0ecb90SAndreas Herrmann static const struct pci_device_id affected_device[] = { 248c3e40a99SGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }, 249c3e40a99SGuenter Roeck { 0 } 250c3e40a99SGuenter Roeck }; 251c3e40a99SGuenter Roeck 2525f0ecb90SAndreas Herrmann static void tweak_runavg_range(struct pci_dev *pdev) 25300250ec9SAndre Przywara { 25400250ec9SAndre Przywara u32 val; 25500250ec9SAndre Przywara 25600250ec9SAndre Przywara /* 25700250ec9SAndre Przywara * let this quirk apply only to the current version of the 25800250ec9SAndre Przywara * northbridge, since future versions may change the behavior 25900250ec9SAndre Przywara */ 260c3e40a99SGuenter Roeck if (!pci_match_id(affected_device, pdev)) 26100250ec9SAndre Przywara return; 26200250ec9SAndre Przywara 26300250ec9SAndre Przywara pci_bus_read_config_dword(pdev->bus, 26400250ec9SAndre Przywara PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), 26500250ec9SAndre Przywara REG_TDP_RUNNING_AVERAGE, &val); 26600250ec9SAndre Przywara if ((val & 0xf) != 0xe) 26700250ec9SAndre Przywara return; 26800250ec9SAndre Przywara 26900250ec9SAndre Przywara val &= ~0xf; 27000250ec9SAndre Przywara val |= 0x9; 27100250ec9SAndre Przywara pci_bus_write_config_dword(pdev->bus, 27200250ec9SAndre Przywara PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), 27300250ec9SAndre Przywara REG_TDP_RUNNING_AVERAGE, val); 27400250ec9SAndre Przywara } 27500250ec9SAndre Przywara 2765f0ecb90SAndreas Herrmann #ifdef CONFIG_PM 2775f0ecb90SAndreas Herrmann static int fam15h_power_resume(struct pci_dev *pdev) 2785f0ecb90SAndreas Herrmann { 2795f0ecb90SAndreas Herrmann tweak_runavg_range(pdev); 2805f0ecb90SAndreas Herrmann return 0; 2815f0ecb90SAndreas Herrmann } 2825f0ecb90SAndreas Herrmann #else 2835f0ecb90SAndreas Herrmann #define fam15h_power_resume NULL 2845f0ecb90SAndreas Herrmann #endif 2855f0ecb90SAndreas Herrmann 2867deb14b1SHuang Rui static int fam15h_power_init_data(struct pci_dev *f4, 287512d1027SAndreas Herrmann struct fam15h_power_data *data) 288512d1027SAndreas Herrmann { 2891ed32160SHuang Rui u32 val, eax, ebx, ecx, edx; 290512d1027SAndreas Herrmann u64 tmp; 2917deb14b1SHuang Rui int ret; 292512d1027SAndreas Herrmann 293512d1027SAndreas Herrmann pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val); 294512d1027SAndreas Herrmann data->base_tdp = val >> 16; 295512d1027SAndreas Herrmann tmp = val & 0xffff; 296512d1027SAndreas Herrmann 297512d1027SAndreas Herrmann pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), 298512d1027SAndreas Herrmann REG_TDP_LIMIT3, &val); 299512d1027SAndreas Herrmann 300512d1027SAndreas Herrmann data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f); 301512d1027SAndreas Herrmann tmp *= data->tdp_to_watts; 302512d1027SAndreas Herrmann 303512d1027SAndreas Herrmann /* result not allowed to be >= 256W */ 304512d1027SAndreas Herrmann if ((tmp >> 16) >= 256) 305b55f3757SGuenter Roeck dev_warn(&f4->dev, 306b55f3757SGuenter Roeck "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n", 307512d1027SAndreas Herrmann (unsigned int) (tmp >> 16)); 308512d1027SAndreas Herrmann 309512d1027SAndreas Herrmann /* convert to microWatt */ 310512d1027SAndreas Herrmann data->processor_pwr_watts = (tmp * 15625) >> 10; 3111ed32160SHuang Rui 3127deb14b1SHuang Rui ret = fam15h_power_init_attrs(f4, data); 3137deb14b1SHuang Rui if (ret) 3147deb14b1SHuang Rui return ret; 3157deb14b1SHuang Rui 3161ed32160SHuang Rui cpuid(0x80000007, &eax, &ebx, &ecx, &edx); 3171ed32160SHuang Rui 3181ed32160SHuang Rui /* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */ 3191ed32160SHuang Rui if (!(edx & BIT(12))) 3207deb14b1SHuang Rui return 0; 3211ed32160SHuang Rui 3221ed32160SHuang Rui /* 3231ed32160SHuang Rui * determine the ratio of the compute unit power accumulator 3241ed32160SHuang Rui * sample period to the PTSC counter period by executing CPUID 3251ed32160SHuang Rui * Fn8000_0007:ECX 3261ed32160SHuang Rui */ 3271ed32160SHuang Rui data->cpu_pwr_sample_ratio = ecx; 3287deb14b1SHuang Rui 3293b5ea47dSHuang Rui if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &tmp)) { 3303b5ea47dSHuang Rui pr_err("Failed to read max compute unit power accumulator MSR\n"); 3313b5ea47dSHuang Rui return -ENODEV; 3323b5ea47dSHuang Rui } 3333b5ea47dSHuang Rui 3343b5ea47dSHuang Rui data->max_cu_acc_power = tmp; 3353b5ea47dSHuang Rui 336*fa794344SHuang Rui return read_registers(data); 337512d1027SAndreas Herrmann } 338512d1027SAndreas Herrmann 3396c931ae1SBill Pemberton static int fam15h_power_probe(struct pci_dev *pdev, 340512d1027SAndreas Herrmann const struct pci_device_id *id) 341512d1027SAndreas Herrmann { 342512d1027SAndreas Herrmann struct fam15h_power_data *data; 34387432a2eSGuenter Roeck struct device *dev = &pdev->dev; 344562dc973SAxel Lin struct device *hwmon_dev; 3457deb14b1SHuang Rui int ret; 346512d1027SAndreas Herrmann 34700250ec9SAndre Przywara /* 34800250ec9SAndre Przywara * though we ignore every other northbridge, we still have to 34900250ec9SAndre Przywara * do the tweaking on _each_ node in MCM processors as the counters 35000250ec9SAndre Przywara * are working hand-in-hand 35100250ec9SAndre Przywara */ 35200250ec9SAndre Przywara tweak_runavg_range(pdev); 35300250ec9SAndre Przywara 354d83e92b3SHuang Rui if (!should_load_on_this_node(pdev)) 35587432a2eSGuenter Roeck return -ENODEV; 356512d1027SAndreas Herrmann 35787432a2eSGuenter Roeck data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL); 35887432a2eSGuenter Roeck if (!data) 35987432a2eSGuenter Roeck return -ENOMEM; 36087432a2eSGuenter Roeck 3617deb14b1SHuang Rui ret = fam15h_power_init_data(pdev, data); 3627deb14b1SHuang Rui if (ret) 3637deb14b1SHuang Rui return ret; 3647deb14b1SHuang Rui 365562dc973SAxel Lin data->pdev = pdev; 366512d1027SAndreas Herrmann 3677deb14b1SHuang Rui data->groups[0] = &data->group; 3687deb14b1SHuang Rui 369562dc973SAxel Lin hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power", 370562dc973SAxel Lin data, 3717deb14b1SHuang Rui &data->groups[0]); 372562dc973SAxel Lin return PTR_ERR_OR_ZERO(hwmon_dev); 373512d1027SAndreas Herrmann } 374512d1027SAndreas Herrmann 375cd9bb056SJingoo Han static const struct pci_device_id fam15h_power_id_table[] = { 376512d1027SAndreas Herrmann { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }, 3770a0039adSAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) }, 3785dc08725SHuang Rui { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) }, 379eff2a945SHuang Rui { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F4) }, 38022e32f4fSBoris Ostrovsky { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) }, 3810bd52941SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) }, 382512d1027SAndreas Herrmann {} 383512d1027SAndreas Herrmann }; 384512d1027SAndreas Herrmann MODULE_DEVICE_TABLE(pci, fam15h_power_id_table); 385512d1027SAndreas Herrmann 386512d1027SAndreas Herrmann static struct pci_driver fam15h_power_driver = { 387512d1027SAndreas Herrmann .name = "fam15h_power", 388512d1027SAndreas Herrmann .id_table = fam15h_power_id_table, 389512d1027SAndreas Herrmann .probe = fam15h_power_probe, 3905f0ecb90SAndreas Herrmann .resume = fam15h_power_resume, 391512d1027SAndreas Herrmann }; 392512d1027SAndreas Herrmann 393f71f5a55SAxel Lin module_pci_driver(fam15h_power_driver); 394